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@@ -0,0 +1,852 @@
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/dts-v1/;
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/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
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*
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* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "ipq5018.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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model = "HFCL ION4x_w";
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compatible = "hfcl,ion4x_w", "qcom,ipq5018-mp03.3", "qcom,ipq5018";
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interrupt-parent = <&intc>;
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aliases {
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sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
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serial0 = &blsp1_uart1;
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serial1 = &blsp1_uart2;
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ethernet0 = "/soc/dp1";
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
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bootargs-append = " swiotlb=1 coherent_pool=2M";
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stdout-path = "serial0";
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};
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reserved-memory {
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#ifdef __IPQ_MEM_PROFILE_256_MB__
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/* 256 MB Profile
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* +==========+==============+=========================+
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* | | | |
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* | Region | Start Offset | Size |
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* | | | |
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* +----------+--------------+-------------------------+
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* | NSS | 0x40000000 | 8MB |
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* +----------+--------------+-------------------------+
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* | Linux | 0x40800000 | Depends on total memory |
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* +----------+--------------+-------------------------+
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* | uboot | 0x4A600000 | 4MB |
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* +----------+--------------+-------------------------+
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* | SBL | 0x4AA00000 | 1MB |
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* +----------+--------------+-------------------------+
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* | smem | 0x4AB00000 | 1MB |
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* +----------+--------------+-------------------------+
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* | TZ | 0x4AC00000 | 4MB |
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* +----------+--------------+-------------------------+
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* | Q6 | | |
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* | code/ | 0x4B000000 | 20MB |
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* | data | | |
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* +----------+--------------+-------------------------+
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* | IPQ5018 | | |
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* | data | 0x4C400000 | 13MB |
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* +----------+--------------+-------------------------+
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* | IPQ5018 | | |
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* | M3 Dump | 0x4D100000 | 1MB |
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* +----------+--------------+-------------------------+
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* | IPQ5018 | | |
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* | QDSS | 0x4D200000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_1| | |
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* | data | 0x4D300000 | 13MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_1| | |
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* | M3 Dump | 0x4E000000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_1| | |
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* | QDSS | 0x4E100000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_2| | |
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* | data | 0x4E200000 | 13MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_2| | |
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* | M3 Dump | 0x4EF00000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_2| | |
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* | QDSS | 0x4F000000 | 1MB |
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* +----------+--------------+-------------------------+
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* | |
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* | Rest of the memory for Linux |
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* | |
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* +===================================================+
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*/
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q6_mem_regions: q6_mem_regions@4B000000 {
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no-map;
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reg = <0x0 0x4B000000 0x0 0x4100000>;
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};
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q6_code_data: q6_code_data@4B000000 {
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no-map;
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reg = <0x0 0x4B000000 0x0 0x1400000>;
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};
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q6_ipq5018_data: q6_ipq5018_data@4C400000 {
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no-map;
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reg = <0x0 0x4C400000 0x0 0xD00000>;
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};
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m3_dump: m3_dump@4D100000 {
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no-map;
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reg = <0x0 0x4D100000 0x0 0x100000>;
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};
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q6_etr_region: q6_etr_dump@4D200000 {
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no-map;
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reg = <0x0 0x4D200000 0x0 0x100000>;
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};
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q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
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no-map;
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reg = <0x0 0x4D300000 0x0 0xD00000>;
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};
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m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 {
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no-map;
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reg = <0x0 0x4E000000 0x0 0x100000>;
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};
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q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 {
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no-map;
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reg = <0x0 0x4E100000 0x0 0x100000>;
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};
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q6_qcn6122_data2: q6_qcn6122_data2@4E200000 {
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no-map;
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reg = <0x0 0x4E200000 0x0 0xD00000>;
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};
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m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 {
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no-map;
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reg = <0x0 0x4EF00000 0x0 0x100000>;
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};
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q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 {
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no-map;
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reg = <0x0 0x4F000000 0x0 0x100000>;
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};
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#else
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/* 512MB/1GB Profiles
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* +==========+==============+=========================+
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* | | | |
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* | Region | Start Offset | Size |
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* | | | |
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* +----------+--------------+-------------------------+
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* | NSS | 0x40000000 | 16MB |
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* +----------+--------------+-------------------------+
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* | Linux | 0x41000000 | Depends on total memory |
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* +----------+--------------+-------------------------+
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* | uboot | 0x4A600000 | 4MB |
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* +----------+--------------+-------------------------+
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* | SBL | 0x4AA00000 | 1MB |
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* +----------+--------------+-------------------------+
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* | smem | 0x4AB00000 | 1MB |
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* +----------+--------------+-------------------------+
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* | TZ | 0x4AC00000 | 4MB |
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* +----------+--------------+-------------------------+
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* | Q6 | | |
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* | code/ | 0x4B000000 | 20MB |
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* | data | | |
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* +----------+--------------+-------------------------+
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* | IPQ5018 | | |
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* | data | 0x4C400000 | 13MB |
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* +----------+--------------+-------------------------+
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* | IPQ5018 | | |
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* | M3 Dump | 0x4D100000 | 1MB |
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* +----------+--------------+-------------------------+
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* | IPQ5018 | | |
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* | QDSS | 0x4D200000 | 1MB |
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* +----------+--------------+-------------------------+
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* | IPQ5018 | | |
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* | Caldb | 0x4D300000 | 2MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_1| | |
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* | data | 0x4D500000 | 13MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_1| | |
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* | M3 Dump | 0x4E200000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_1| | |
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* | QDSS | 0x4E300000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_1| | |
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* | Caldb | 0x4E400000 | 5MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_2| | |
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* | data | 0x4E900000 | 13MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_2| | |
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* | M3 Dump | 0x4F600000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_2| | |
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* | QDSS | 0x4F700000 | 1MB |
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* +----------+--------------+-------------------------+
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* | QCN6122_2| | |
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* | Caldb | 0x4F800000 | 5MB |
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* +----------+--------------+-------------------------+
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* | |
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* | Rest of the memory for Linux |
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* | |
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* +===================================================+
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*/
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q6_mem_regions: q6_mem_regions@4B000000 {
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no-map;
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reg = <0x0 0x4B000000 0x0 0x4D00000>;
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};
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q6_code_data: q6_code_data@4B000000 {
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no-map;
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reg = <0x0 0x4B000000 0x0 01400000>;
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};
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q6_ipq5018_data: q6_ipq5018_data@4C400000 {
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no-map;
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reg = <0x0 0x4C400000 0x0 0xD00000>;
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};
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m3_dump: m3_dump@4D100000 {
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no-map;
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reg = <0x0 0x4D100000 0x0 0x100000>;
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};
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q6_etr_region: q6_etr_dump@4D200000 {
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no-map;
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reg = <0x0 0x4D200000 0x0 0x100000>;
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};
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q6_caldb_region: q6_caldb_region@4D300000 {
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no-map;
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reg = <0x0 0x4D300000 0x0 0x200000>;
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};
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q6_qcn6122_data1: q6_qcn6122_data1@4D500000 {
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no-map;
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reg = <0x0 0x4D500000 0x0 0xD00000>;
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};
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m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
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no-map;
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reg = <0x0 0x4E200000 0x0 0x100000>;
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};
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q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
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no-map;
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reg = <0x0 0x4E300000 0x0 0x100000>;
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};
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q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E400000 {
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no-map;
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reg = <0x0 0x4E400000 0x0 0x500000>;
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};
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q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
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no-map;
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reg = <0x0 0x4E900000 0x0 0xD00000>;
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};
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m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F600000 {
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no-map;
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reg = <0x0 0x4F600000 0x0 0x100000>;
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};
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q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F700000 {
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no-map;
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reg = <0x0 0x4F700000 0x0 0x100000>;
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};
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q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4F800000 {
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no-map;
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reg = <0x0 0x4F800000 0x0 0x500000>;
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};
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#endif
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};
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soc {
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serial@78af000 {
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status = "ok";
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};
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blsp1_uart2: serial@78b0000 {
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pinctrl-0 = <&blsp1_uart_pins>;
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pinctrl-names = "default";
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};
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qpic_bam: dma@7984000{
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status = "ok";
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};
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nand: qpic-nand@79b0000 {
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pinctrl-0 = <&qspi_nand_pins>;
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pinctrl-names = "default";
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|
|
|
status = "ok";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
|
|
|
|
|
pinctrl-0 = <&blsp0_spi_pins>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
cs-select = <0>;
|
|
|
|
|
status = "ok";
|
|
|
|
|
|
|
|
|
|
m25p80@0 {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
reg = <0>;
|
|
|
|
|
compatible = "n25q128a11";
|
|
|
|
|
linux,modalias = "m25p80", "n25q128a11";
|
|
|
|
|
spi-max-frequency = <50000000>;
|
|
|
|
|
use-default-sizes;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mdio0: mdio@88000 {
|
|
|
|
|
status = "ok";
|
|
|
|
|
|
|
|
|
|
ethernet-phy@0 {
|
|
|
|
|
reg = <7>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mdio1: mdio@90000 {
|
|
|
|
|
status = "ok";
|
|
|
|
|
pinctrl-0 = <&mdio1_pins>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
phy-reset-gpio = <&tlmm 39 0>;
|
|
|
|
|
|
|
|
|
|
ethernet-phy@0 {
|
|
|
|
|
reg = <28>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ess-instance {
|
|
|
|
|
num_devices = <0x1>;
|
|
|
|
|
ess-switch@0x39c00000 {
|
|
|
|
|
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
|
|
|
|
|
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
|
|
|
|
|
qcom,port_phyinfo {
|
|
|
|
|
port@0 {
|
|
|
|
|
port_id = <1>;
|
|
|
|
|
phy_address = <7>;
|
|
|
|
|
mdiobus = <&mdio0>;
|
|
|
|
|
};
|
|
|
|
|
port@1 {
|
|
|
|
|
port_id = <2>;
|
|
|
|
|
phy_address = <0x1c>;
|
|
|
|
|
mdiobus = <&mdio1>;
|
|
|
|
|
port_mac_sel = "QGMAC_PORT";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
led_source@0 {
|
|
|
|
|
source = <0>;
|
|
|
|
|
mode = "normal";
|
|
|
|
|
speed = "all";
|
|
|
|
|
blink_en = "enable";
|
|
|
|
|
active = "high";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
dp1 {
|
|
|
|
|
device_type = "network";
|
|
|
|
|
compatible = "qcom,nss-dp";
|
|
|
|
|
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
|
|
|
|
|
clock-names = "nss-snoc-gmac-axi-clk";
|
|
|
|
|
qcom,id = <2>;
|
|
|
|
|
reg = <0x39D00000 0x10000>;
|
|
|
|
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
qcom,mactype = <2>;
|
|
|
|
|
qcom,link-poll = <1>;
|
|
|
|
|
qcom,phy-mdio-addr = <28>;
|
|
|
|
|
mdio-bus = <&mdio1>;
|
|
|
|
|
local-mac-address = [000000000000];
|
|
|
|
|
phy-mode = "sgmii";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
qcom,test@0 {
|
|
|
|
|
status = "ok";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
thermal-zones {
|
|
|
|
|
status = "ok";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&tlmm {
|
|
|
|
|
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
|
|
blsp0_uart_pins: uart_pins {
|
|
|
|
|
blsp0_uart_rx_tx {
|
|
|
|
|
pins = "gpio20", "gpio21";
|
|
|
|
|
function = "blsp0_uart0";
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
blsp1_uart_pins: blsp1_uart_pins {
|
|
|
|
|
blsp1_uart_rx_tx {
|
|
|
|
|
pins = "gpio23", "gpio25", "gpio24", "gpio26";
|
|
|
|
|
function = "blsp1_uart2";
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
blsp0_spi_pins: blsp0_spi_pins {
|
|
|
|
|
mux {
|
|
|
|
|
pins = "gpio10", "gpio11", "gpio12", "gpio13";
|
|
|
|
|
function = "blsp0_spi";
|
|
|
|
|
drive-strength = <2>;
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
qspi_nand_pins: qspi_nand_pins {
|
|
|
|
|
qspi_clock {
|
|
|
|
|
pins = "gpio9";
|
|
|
|
|
function = "qspi_clk";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
qspi_cs {
|
|
|
|
|
pins = "gpio8";
|
|
|
|
|
function = "qspi_cs";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
qspi_data {
|
|
|
|
|
pins = "gpio4", "gpio5", "gpio6", "gpio7";
|
|
|
|
|
function = "qspi_data";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mdio1_pins: mdio_pinmux {
|
|
|
|
|
mux_0 {
|
|
|
|
|
pins = "gpio36";
|
|
|
|
|
function = "mdc";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-up;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mux_1 {
|
|
|
|
|
pins = "gpio37";
|
|
|
|
|
function = "mdio";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-up;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
phy_led_pins: phy_led_pins {
|
|
|
|
|
gephy_led_pin {
|
|
|
|
|
pins = "gpio46";
|
|
|
|
|
function = "led0";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
led_pins: led_pinmux {
|
|
|
|
|
mux_1 {
|
|
|
|
|
pins = "gpio38";
|
|
|
|
|
function = "gpio";
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c_pins: i2c_pins {
|
|
|
|
|
i2c_scl {
|
|
|
|
|
pins = "gpio25";
|
|
|
|
|
function = "blsp2_i2c1";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c_sda {
|
|
|
|
|
pins = "gpio26";
|
|
|
|
|
function = "blsp2_i2c1";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-disable;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
button_pins: button_pins {
|
|
|
|
|
wps_button {
|
|
|
|
|
pins = "gpio14";
|
|
|
|
|
function = "gpio";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-up;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
audio_pins: audio_pinmux {
|
|
|
|
|
mux_1 {
|
|
|
|
|
pins = "gpio24";
|
|
|
|
|
function = "audio_rxbclk";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mux_2 {
|
|
|
|
|
pins = "gpio25";
|
|
|
|
|
function = "audio_rxfsync";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mux_3 {
|
|
|
|
|
pins = "gpio26";
|
|
|
|
|
function = "audio_rxd";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mux_4 {
|
|
|
|
|
pins = "gpio27";
|
|
|
|
|
function = "audio_txmclk";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mux_5 {
|
|
|
|
|
pins = "gpio28";
|
|
|
|
|
function = "audio_txbclk";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mux_6 {
|
|
|
|
|
pins = "gpio29";
|
|
|
|
|
function = "audio_txfsync";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mux_7 {
|
|
|
|
|
pins = "gpio30";
|
|
|
|
|
function = "audio_txd";
|
|
|
|
|
drive-strength = <8>;
|
|
|
|
|
bias-pull-down;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&soc {
|
|
|
|
|
|
|
|
|
|
leds {
|
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
|
pinctrl-0 = <&led_pins>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
|
|
led_power: led@38 {
|
|
|
|
|
label = "blue:status";
|
|
|
|
|
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
|
|
|
|
|
default-state = "on";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
};
|
|
|
|
|
gpio_keys {
|
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
pinctrl-0 = <&button_pins>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
|
|
|
|
|
reset {
|
|
|
|
|
label = "reset";
|
|
|
|
|
linux,code = <KEY_RESTART>;
|
|
|
|
|
gpios = <&tlmm 14 GPIO_ACTIVE_LOW>;
|
|
|
|
|
linux,input-type = <1>;
|
|
|
|
|
debounce-interval = <60>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&q6v5_wcss {
|
|
|
|
|
compatible = "qcom,ipq5018-q6-mpd";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
ranges;
|
|
|
|
|
firmware = "IPQ5018/q6_fw.mdt";
|
|
|
|
|
reg = <0x0cd00000 0x4040>,
|
|
|
|
|
<0x1938000 0x8>,
|
|
|
|
|
<0x193d204 0x4>;
|
|
|
|
|
reg-names = "qdsp6",
|
|
|
|
|
"tcsr-msip",
|
|
|
|
|
"tcsr-q6";
|
|
|
|
|
resets = <&gcc GCC_WCSSAON_RESET>,
|
|
|
|
|
<&gcc GCC_WCSS_Q6_BCR>;
|
|
|
|
|
|
|
|
|
|
reset-names = "wcss_aon_reset",
|
|
|
|
|
"wcss_q6_reset";
|
|
|
|
|
|
|
|
|
|
clocks = <&gcc GCC_Q6_AXIS_CLK>,
|
|
|
|
|
<&gcc GCC_WCSS_ECAHB_CLK>,
|
|
|
|
|
<&gcc GCC_Q6_AXIM_CLK>,
|
|
|
|
|
<&gcc GCC_Q6_AXIM2_CLK>,
|
|
|
|
|
<&gcc GCC_Q6_AHB_CLK>,
|
|
|
|
|
<&gcc GCC_Q6_AHB_S_CLK>,
|
|
|
|
|
<&gcc GCC_WCSS_AXI_S_CLK>;
|
|
|
|
|
clock-names = "gcc_q6_axis_clk",
|
|
|
|
|
"gcc_wcss_ecahb_clk",
|
|
|
|
|
"gcc_q6_axim_clk",
|
|
|
|
|
"gcc_q6_axim2_clk",
|
|
|
|
|
"gcc_q6_ahb_clk",
|
|
|
|
|
"gcc_q6_ahb_s_clk",
|
|
|
|
|
"gcc_wcss_axi_s_clk";
|
|
|
|
|
|
|
|
|
|
#ifdef __IPQ_MEM_PROFILE_256_MB__
|
|
|
|
|
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
|
|
|
|
|
#else
|
|
|
|
|
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
|
|
|
|
|
<&q6_caldb_region>;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
qcom,rproc = <&q6v5_wcss>;
|
|
|
|
|
qcom,bootargs_smem = <507>;
|
|
|
|
|
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
|
|
|
|
|
<0x2 0x4 0x2 0x12 0x0 0x0>;
|
|
|
|
|
status = "ok";
|
|
|
|
|
q6_wcss_pd1: remoteproc_pd1@4ab000 {
|
|
|
|
|
compatible = "qcom,ipq5018-wcss-ahb-mpd";
|
|
|
|
|
reg = <0x4ab000 0x20>;
|
|
|
|
|
reg-names = "rmb";
|
|
|
|
|
firmware = "IPQ5018/q6_fw.mdt";
|
|
|
|
|
m3_firmware = "IPQ5018/m3_fw.mdt";
|
|
|
|
|
interrupts-extended = <&wcss_smp2p_in 8 0>,
|
|
|
|
|
<&wcss_smp2p_in 9 0>,
|
|
|
|
|
<&wcss_smp2p_in 12 0>,
|
|
|
|
|
<&wcss_smp2p_in 11 0>;
|
|
|
|
|
interrupt-names = "fatal",
|
|
|
|
|
"ready",
|
|
|
|
|
"spawn-ack",
|
|
|
|
|
"stop-ack";
|
|
|
|
|
|
|
|
|
|
resets = <&gcc GCC_WCSSAON_RESET>,
|
|
|
|
|
<&gcc GCC_WCSS_BCR>,
|
|
|
|
|
<&gcc GCC_CE_BCR>;
|
|
|
|
|
reset-names = "wcss_aon_reset",
|
|
|
|
|
"wcss_reset",
|
|
|
|
|
"ce_reset";
|
|
|
|
|
|
|
|
|
|
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
|
|
|
|
|
<&gcc GCC_WCSS_ACMT_CLK>,
|
|
|
|
|
<&gcc GCC_WCSS_AXI_M_CLK>;
|
|
|
|
|
clock-names = "gcc_wcss_ahb_s_clk",
|
|
|
|
|
"gcc_wcss_acmt_clk",
|
|
|
|
|
"gcc_wcss_axi_m_clk";
|
|
|
|
|
|
|
|
|
|
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
|
|
|
|
|
|
|
|
|
|
qcom,smem-states = <&wcss_smp2p_out 8>,
|
|
|
|
|
<&wcss_smp2p_out 9>,
|
|
|
|
|
<&wcss_smp2p_out 10>;
|
|
|
|
|
qcom,smem-state-names = "shutdown",
|
|
|
|
|
"stop",
|
|
|
|
|
"spawn";
|
|
|
|
|
#ifdef __IPQ_MEM_PROFILE_256_MB__
|
|
|
|
|
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
|
|
|
|
|
<&q6_etr_region>;
|
|
|
|
|
#else
|
|
|
|
|
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
|
|
|
|
|
<&q6_etr_region>, <&q6_caldb_region>;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
q6_wcss_pd2: remoteproc_pd2 {
|
|
|
|
|
compatible = "qcom,ipq5018-wcss-pcie-mpd";
|
|
|
|
|
firmware = "IPQ5018/q6_fw.mdt";
|
|
|
|
|
m3_firmware = "qcn6122/m3_fw.mdt";
|
|
|
|
|
interrupts-extended = <&wcss_smp2p_in 16 0>,
|
|
|
|
|
<&wcss_smp2p_in 17 0>,
|
|
|
|
|
<&wcss_smp2p_in 20 0>,
|
|
|
|
|
<&wcss_smp2p_in 19 0>;
|
|
|
|
|
interrupt-names = "fatal",
|
|
|
|
|
"ready",
|
|
|
|
|
"spawn-ack",
|
|
|
|
|
"stop-ack";
|
|
|
|
|
|
|
|
|
|
qcom,smem-states = <&wcss_smp2p_out 16>,
|
|
|
|
|
<&wcss_smp2p_out 17>,
|
|
|
|
|
<&wcss_smp2p_out 18>;
|
|
|
|
|
qcom,smem-state-names = "shutdown",
|
|
|
|
|
"stop",
|
|
|
|
|
"spawn";
|
|
|
|
|
#ifdef __IPQ_MEM_PROFILE_256_MB__
|
|
|
|
|
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
|
|
|
|
|
<&q6_qcn6122_etr_1>;
|
|
|
|
|
#else
|
|
|
|
|
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
|
|
|
|
|
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
q6_wcss_pd3: remoteproc_pd3 {
|
|
|
|
|
compatible = "qcom,ipq5018-wcss-pcie-mpd";
|
|
|
|
|
firmware = "IPQ5018/q6_fw.mdt";
|
|
|
|
|
interrupts-extended = <&wcss_smp2p_in 24 0>,
|
|
|
|
|
<&wcss_smp2p_in 25 0>,
|
|
|
|
|
<&wcss_smp2p_in 28 0>,
|
|
|
|
|
<&wcss_smp2p_in 27 0>;
|
|
|
|
|
interrupt-names = "fatal",
|
|
|
|
|
"ready",
|
|
|
|
|
"spawn-ack",
|
|
|
|
|
"stop-ack";
|
|
|
|
|
|
|
|
|
|
qcom,smem-states = <&wcss_smp2p_out 24>,
|
|
|
|
|
<&wcss_smp2p_out 25>,
|
|
|
|
|
<&wcss_smp2p_out 26>;
|
|
|
|
|
qcom,smem-state-names = "shutdown",
|
|
|
|
|
"stop",
|
|
|
|
|
"spawn";
|
|
|
|
|
#ifdef __IPQ_MEM_PROFILE_256_MB__
|
|
|
|
|
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
|
|
|
|
|
<&q6_qcn6122_etr_2>;
|
|
|
|
|
#else
|
|
|
|
|
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
|
|
|
|
|
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
|
|
|
|
|
#endif
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&wifi0 {
|
|
|
|
|
/* IPQ5018 */
|
|
|
|
|
qcom,multipd_arch;
|
|
|
|
|
qcom,rproc = <&q6_wcss_pd1>;
|
|
|
|
|
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
|
|
|
|
|
#ifdef __IPQ_MEM_PROFILE_256_MB__
|
|
|
|
|
qcom,tgt-mem-mode = <2>;
|
|
|
|
|
#else
|
|
|
|
|
qcom,tgt-mem-mode = <1>;
|
|
|
|
|
#endif
|
|
|
|
|
qcom,board_id = <0x23>;
|
|
|
|
|
#ifdef __CNSS2__
|
|
|
|
|
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
|
|
|
|
|
qcom,caldb-addr = <0x4D300000 0x4D300000 0 0 0>;
|
|
|
|
|
qcom,caldb-size = <0x200000>;
|
|
|
|
|
mem-region = <&q6_ipq5018_data>;
|
|
|
|
|
#else
|
|
|
|
|
memory-region = <&q6_ipq5018_data>;
|
|
|
|
|
#endif
|
|
|
|
|
status = "ok";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&wifi1 {
|
|
|
|
|
/* QCN6122 5G */
|
|
|
|
|
qcom,multipd_arch;
|
|
|
|
|
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
|
|
|
|
|
qcom,rproc = <&q6_wcss_pd2>;
|
|
|
|
|
#ifdef __IPQ_MEM_PROFILE_256_MB__
|
|
|
|
|
qcom,tgt-mem-mode = <2>;
|
|
|
|
|
#else
|
|
|
|
|
qcom,tgt-mem-mode = <1>;
|
|
|
|
|
#endif
|
|
|
|
|
qcom,board_id = <0x60>;
|
|
|
|
|
#ifdef __CNSS2__
|
|
|
|
|
qcom,bdf-addr = <0x4D500000 0x4D500000 0x4D300000 0x0 0x0>;
|
|
|
|
|
qcom,caldb-addr = <0x4E400000 0x4E400000 0 0 0>;
|
|
|
|
|
qcom,caldb-size = <0x500000>;
|
|
|
|
|
mem-region = <&q6_qcn6122_data1>;
|
|
|
|
|
#else
|
|
|
|
|
memory-region = <&q6_qcn6122_data1>;
|
|
|
|
|
#endif
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&wifi2 {
|
|
|
|
|
/* QCN6122 6G */
|
|
|
|
|
qcom,multipd_arch;
|
|
|
|
|
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
|
|
|
|
|
qcom,rproc = <&q6_wcss_pd3>;
|
|
|
|
|
#ifdef __IPQ_MEM_PROFILE_256_MB__
|
|
|
|
|
qcom,tgt-mem-mode = <2>;
|
|
|
|
|
#else
|
|
|
|
|
qcom,tgt-mem-mode = <1>;
|
|
|
|
|
#endif
|
|
|
|
|
qcom,board_id = <0xb0>;
|
|
|
|
|
#ifdef __CNSS2__
|
|
|
|
|
qcom,bdf-addr = <0x4E900000 0x4E900000 0x4E200000 0x0 0x0>;
|
|
|
|
|
qcom,caldb-addr = <0x4F800000 0x4F800000 0 0 0>;
|
|
|
|
|
qcom,caldb-size = <0x500000>;
|
|
|
|
|
mem-region = <&q6_qcn6122_data2>;
|
|
|
|
|
#else
|
|
|
|
|
memory-region = <&q6_qcn6122_data2>;
|
|
|
|
|
#endif
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usb3 {
|
|
|
|
|
status = "ok";
|
|
|
|
|
device-power-gpio = <&tlmm 24 1>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&dwc_0 {
|
|
|
|
|
/delete-property/ #phy-cells;
|
|
|
|
|
/delete-property/ phys;
|
|
|
|
|
/delete-property/ phy-names;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&hs_m31phy_0 {
|
|
|
|
|
status = "ok";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&eud {
|
|
|
|
|
status = "ok";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pcie_x1 {
|
|
|
|
|
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pcie_x2 {
|
|
|
|
|
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pcie_x1_rp {
|
|
|
|
|
status = "disabled";
|
|
|
|
|
|
|
|
|
|
mhi_0: qcom,mhi@0 {
|
|
|
|
|
reg = <0 0 0 0 0 >;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pcie_x2_rp {
|
|
|
|
|
status = "disabled";
|
|
|
|
|
|
|
|
|
|
mhi_1: qcom,mhi@1 {
|
|
|
|
|
reg = <0 0 0 0 0 >;
|
|
|
|
|
|
|
|
|
|
};
|
|
|
|
|
};
|