From 18889cfb54d2b984e0521f96bc7055d9a366ae50 Mon Sep 17 00:00:00 2001 From: Tanya Singh Date: Fri, 9 Aug 2024 19:25:51 +0800 Subject: [PATCH] mediatek: Support Edgecore EAP112 Fixes: WIFI-13753 Signed-off-by: Tanya Singh --- .github/workflows/build-dev.yml | 2 +- .../dts/mediatek/mt7981-edgecore-eap112.dts | 378 ++++++++++++++++++ feeds/mediatek-sdk/mediatek/image/mt7981.mk | 18 + .../mediatek/mt7981-edgecore-eap112.dts | 378 ++++++++++++++++++ .../mt7981/base-files/etc/board.d/01_leds | 3 +- .../mt7981/base-files/etc/board.d/02_network | 3 +- .../mt7981/base-files/etc/init.d/boocount | 3 +- .../etc/uci-defaults/30_uboot-envtools | 3 +- .../mt7981/base-files/lib/upgrade/platform.sh | 6 +- .../certificates/files/usr/bin/mount_certs | 3 +- profiles/edgecore_eap112.yml | 18 + 11 files changed, 807 insertions(+), 8 deletions(-) create mode 100755 feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-edgecore-eap112.dts create mode 100755 feeds/mediatek-sdk/mediatek/mt7981-edgecore-eap112.dts create mode 100644 profiles/edgecore_eap112.yml diff --git a/.github/workflows/build-dev.yml b/.github/workflows/build-dev.yml index 27c97c8a2..281ca9157 100644 --- a/.github/workflows/build-dev.yml +++ b/.github/workflows/build-dev.yml @@ -21,7 +21,7 @@ jobs: strategy: fail-fast: false matrix: - target: [ 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf196', 'cig_wf189', 'cybertan_eww631-a1', 'cybertan_eww631-b1','sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'sercomm_ap72tip', 'udaya_a6-id2', 'wallys_dr5018', 'wallys_dr6018', 'wallys_dr6018-v4', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655' ] + target: [ 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf196', 'cig_wf189', 'cybertan_eww631-a1', 'cybertan_eww631-b1','sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'sercomm_ap72tip', 'udaya_a6-id2', 'wallys_dr5018', 'wallys_dr6018', 'wallys_dr6018-v4', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655' ] steps: - uses: actions/checkout@v3 diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-edgecore-eap112.dts b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-edgecore-eap112.dts new file mode 100755 index 000000000..e7a15ca82 --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-edgecore-eap112.dts @@ -0,0 +1,378 @@ +/dts-v1/; +#include "mt7981.dtsi" +/ { + model = "EdgeCore EAP112"; + compatible = "edgecore,eap112"; + chosen { + bootargs = "console=ttyS0,115200n1 loglevel=8 \ + earlycon=uart8250,mmio32,0x11002000"; + }; + + aliases { + led-boot = &led_green; + led-failsafe = &led_green; + led-running = &led_green; + led-upgrade = &led_green; + serial0 = &uart0; + }; + + memory { + // fpga ddr2: 128MB*2 + reg = <0 0x40000000 0 0x20000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_green: led@0 { + label = "green:power"; + gpios = <&pio 9 GPIO_ACTIVE_HIGH>; + }; + + led_orange: led@1 { + label = "orange:wan"; + gpios = <&pio 34 GPIO_ACTIVE_HIGH>; + }; + + led_blue: led@2 { + label = "blue:wlan5g"; + gpios = <&pio 35 GPIO_ACTIVE_HIGH>; + }; + }; + + nmbm_spim_nand { + compatible = "generic,nmbm"; + + #address-cells = <1>; + #size-cells = <1>; + + lower-mtd-device = <&spi_nand>; + forced-create; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x00000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x180000 0x0200000>; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x0200000>; + }; + + partition@580000 { + label = "rootfs1"; + reg = <0x580000 0x4000000>; + compatible = "linux,ubi"; + }; + + partition@4580000 { + label = "rootfs2"; + reg = <0x4580000 0x4000000>; + compatible = "linux,ubi"; + }; + }; + }; + + sound_wm8960 { + compatible = "mediatek,mt7986-wm8960-sound"; + audio-routing = "Headphone", "HP_L", + "Headphone", "HP_R", + "LINPUT1", "AMIC", + "RINPUT1", "AMIC"; + + status = "disabled"; + + platform { + sound-dai = <&afe>; + }; + + codec { + sound-dai = <&wm8960>; + }; + }; + + sound_si3218x { + compatible = "mediatek,mt7986-si3218x-sound"; + status = "disabled"; + + platform { + sound-dai = <&afe>; + }; + + codec { + sound-dai = <&proslic_spi>; + }; + }; +}; + +&afe { + pinctrl-names = "default"; + pinctrl-0 = <&pcm_pins>; + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + status = "disabled"; + + wm8960: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "sgmii"; + phy-handle = <&phy1>; // add phy handler + mtd-mac-address = <&factory 0x24>; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&phy0>; + mtd-mac-address = <&factory 0x2a>; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id03a2.9461"; + reg = <0>; + phy-mode = "gmii"; + nvmem-cells = <&phy_calibration>; + nvmem-cell-names = "phy-cal-data"; + }; + + phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id03a2.9471"; + reg = <24>; // set phy address to 0x18 + reset-gpios = <&pio 39 1>; + reset-assert-us = <600>; + reset-deassert-us = <20000>; + phy-mode = "sgmii"; + }; + + }; +}; + +&hnat { + mtketh-wan = "eth1"; + mtketh-lan = "lan"; + mtketh-max-gmac = <2>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + spi_nand: spi_nand@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + status = "okay"; + + proslic_spi: proslic_spi@0 { + compatible = "silabs,proslic_spi"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-cpha = <1>; + spi-cpol = <1>; + channel_count = <1>; + debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */ + reset_gpio = <&pio 15 0>; + ig,enable-spi = <1>; /* 1: Enable, 0: Disable */ + }; +}; + +&wbsys { + mediatek,mtd-eeprom = <&factory 0x0000>; + status = "okay"; + pinctrl-names = "dbdc"; + pinctrl-0 = <&wf_dbdc_pins>; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins>; + status = "okay"; + + slb9670: slb9670@0 { + compatible = "infineon,slb9670"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-cal-enable; + spi-cal-mode = "read-data"; + spi-cal-datalen = <2>; + spi-cal-data = /bits/ 8 <0x00 0x1b>; + spi-max-frequency = <40000000>; + }; +}; + +&pio { + + i2c_pins: i2c-pins-g0 { + mux { + function = "i2c"; + groups = "i2c0_0"; + }; + }; + + pcm_pins: pcm-pins-g0 { + mux { + function = "pcm"; + groups = "pcm"; + }; + }; + + pwm0_pin: pwm0-pin-g0 { + mux { + function = "pwm"; + groups = "pwm0_0"; + }; + }; + + pwm1_pin: pwm1-pin-g0 { + mux { + function = "pwm"; + groups = "pwm1_0"; + }; + }; + + pwm2_pin: pwm2-pin { + mux { + function = "pwm"; + groups = "pwm2"; + }; + }; + + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = ; + bias-pull-up = ; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = ; + bias-pull-down = ; + }; + }; + + spic_pins: spi1-pins { + mux { + function = "spi"; + groups = "spi1_1"; + }; + }; + + spi2_pins: spi2-pins { + mux { + function = "spi"; + groups = "spi2"; + }; + }; + + uart1_pins: uart1-pins-g1 { + mux { + function = "uart"; + groups = "uart1_1"; + }; + }; + + uart2_pins: uart2-pins-g1 { + mux { + function = "uart"; + groups = "uart2_1"; + }; + }; + + wf_dbdc_pins: wf_dbdc-pins { + mux { + function = "eth"; + groups = "wf0_mode1"; + }; + conf { + pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4", + "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6", + "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10", + "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ", + "WF_CBA_RESETB", "WF_DIG_RESETB"; + drive-strength = ; + }; + }; +}; + +&xhci { + mediatek,u3p-dis-msk = <0x0>; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + status = "okay"; +}; diff --git a/feeds/mediatek-sdk/mediatek/image/mt7981.mk b/feeds/mediatek-sdk/mediatek/image/mt7981.mk index db17c4728..f140a95fe 100755 --- a/feeds/mediatek-sdk/mediatek/image/mt7981.mk +++ b/feeds/mediatek-sdk/mediatek/image/mt7981.mk @@ -61,6 +61,24 @@ define Device/edgecore_eap111 endef TARGET_DEVICES += edgecore_eap111 +define Device/edgecore_eap112 + DEVICE_VENDOR := EdgeCore + DEVICE_MODEL := EAP112 + DEVICE_DTS := mt7981-edgecore-eap112 + DEVICE_DTS_DIR := $(DTS_DIR)/mediatek + SUPPORTED_DEVICES := edgecore,eap112 + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 65536k + KERNEL_IN_UBI := 1 + IMAGES += factory.bin + IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + DEVICE_PACKAGES := kmod-mt7981-firmware kmod-mt7915e +endef +TARGET_DEVICES += edgecore_eap112 + define Device/mt7981-spim-nand-gsw DEVICE_VENDOR := MediaTek DEVICE_MODEL := mt7981-spim-nand-gsw diff --git a/feeds/mediatek-sdk/mediatek/mt7981-edgecore-eap112.dts b/feeds/mediatek-sdk/mediatek/mt7981-edgecore-eap112.dts new file mode 100755 index 000000000..e7a15ca82 --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/mt7981-edgecore-eap112.dts @@ -0,0 +1,378 @@ +/dts-v1/; +#include "mt7981.dtsi" +/ { + model = "EdgeCore EAP112"; + compatible = "edgecore,eap112"; + chosen { + bootargs = "console=ttyS0,115200n1 loglevel=8 \ + earlycon=uart8250,mmio32,0x11002000"; + }; + + aliases { + led-boot = &led_green; + led-failsafe = &led_green; + led-running = &led_green; + led-upgrade = &led_green; + serial0 = &uart0; + }; + + memory { + // fpga ddr2: 128MB*2 + reg = <0 0x40000000 0 0x20000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_green: led@0 { + label = "green:power"; + gpios = <&pio 9 GPIO_ACTIVE_HIGH>; + }; + + led_orange: led@1 { + label = "orange:wan"; + gpios = <&pio 34 GPIO_ACTIVE_HIGH>; + }; + + led_blue: led@2 { + label = "blue:wlan5g"; + gpios = <&pio 35 GPIO_ACTIVE_HIGH>; + }; + }; + + nmbm_spim_nand { + compatible = "generic,nmbm"; + + #address-cells = <1>; + #size-cells = <1>; + + lower-mtd-device = <&spi_nand>; + forced-create; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x00000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x180000 0x0200000>; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x0200000>; + }; + + partition@580000 { + label = "rootfs1"; + reg = <0x580000 0x4000000>; + compatible = "linux,ubi"; + }; + + partition@4580000 { + label = "rootfs2"; + reg = <0x4580000 0x4000000>; + compatible = "linux,ubi"; + }; + }; + }; + + sound_wm8960 { + compatible = "mediatek,mt7986-wm8960-sound"; + audio-routing = "Headphone", "HP_L", + "Headphone", "HP_R", + "LINPUT1", "AMIC", + "RINPUT1", "AMIC"; + + status = "disabled"; + + platform { + sound-dai = <&afe>; + }; + + codec { + sound-dai = <&wm8960>; + }; + }; + + sound_si3218x { + compatible = "mediatek,mt7986-si3218x-sound"; + status = "disabled"; + + platform { + sound-dai = <&afe>; + }; + + codec { + sound-dai = <&proslic_spi>; + }; + }; +}; + +&afe { + pinctrl-names = "default"; + pinctrl-0 = <&pcm_pins>; + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + status = "disabled"; + + wm8960: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "sgmii"; + phy-handle = <&phy1>; // add phy handler + mtd-mac-address = <&factory 0x24>; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&phy0>; + mtd-mac-address = <&factory 0x2a>; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id03a2.9461"; + reg = <0>; + phy-mode = "gmii"; + nvmem-cells = <&phy_calibration>; + nvmem-cell-names = "phy-cal-data"; + }; + + phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id03a2.9471"; + reg = <24>; // set phy address to 0x18 + reset-gpios = <&pio 39 1>; + reset-assert-us = <600>; + reset-deassert-us = <20000>; + phy-mode = "sgmii"; + }; + + }; +}; + +&hnat { + mtketh-wan = "eth1"; + mtketh-lan = "lan"; + mtketh-max-gmac = <2>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + spi_nand: spi_nand@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + status = "okay"; + + proslic_spi: proslic_spi@0 { + compatible = "silabs,proslic_spi"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-cpha = <1>; + spi-cpol = <1>; + channel_count = <1>; + debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */ + reset_gpio = <&pio 15 0>; + ig,enable-spi = <1>; /* 1: Enable, 0: Disable */ + }; +}; + +&wbsys { + mediatek,mtd-eeprom = <&factory 0x0000>; + status = "okay"; + pinctrl-names = "dbdc"; + pinctrl-0 = <&wf_dbdc_pins>; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins>; + status = "okay"; + + slb9670: slb9670@0 { + compatible = "infineon,slb9670"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-cal-enable; + spi-cal-mode = "read-data"; + spi-cal-datalen = <2>; + spi-cal-data = /bits/ 8 <0x00 0x1b>; + spi-max-frequency = <40000000>; + }; +}; + +&pio { + + i2c_pins: i2c-pins-g0 { + mux { + function = "i2c"; + groups = "i2c0_0"; + }; + }; + + pcm_pins: pcm-pins-g0 { + mux { + function = "pcm"; + groups = "pcm"; + }; + }; + + pwm0_pin: pwm0-pin-g0 { + mux { + function = "pwm"; + groups = "pwm0_0"; + }; + }; + + pwm1_pin: pwm1-pin-g0 { + mux { + function = "pwm"; + groups = "pwm1_0"; + }; + }; + + pwm2_pin: pwm2-pin { + mux { + function = "pwm"; + groups = "pwm2"; + }; + }; + + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = ; + bias-pull-up = ; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = ; + bias-pull-down = ; + }; + }; + + spic_pins: spi1-pins { + mux { + function = "spi"; + groups = "spi1_1"; + }; + }; + + spi2_pins: spi2-pins { + mux { + function = "spi"; + groups = "spi2"; + }; + }; + + uart1_pins: uart1-pins-g1 { + mux { + function = "uart"; + groups = "uart1_1"; + }; + }; + + uart2_pins: uart2-pins-g1 { + mux { + function = "uart"; + groups = "uart2_1"; + }; + }; + + wf_dbdc_pins: wf_dbdc-pins { + mux { + function = "eth"; + groups = "wf0_mode1"; + }; + conf { + pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4", + "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6", + "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10", + "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ", + "WF_CBA_RESETB", "WF_DIG_RESETB"; + drive-strength = ; + }; + }; +}; + +&xhci { + mediatek,u3p-dis-msk = <0x0>; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + status = "okay"; +}; diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/01_leds b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/01_leds index fa85ba940..a8088e5d0 100644 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/01_leds +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/01_leds @@ -6,7 +6,8 @@ board=$(board_name) board_config_update case $board in -edgecore,eap111) +edgecore,eap111|\ +edgecore,eap112) ucidef_set_led_netdev "wan" "wan" "orange:wan" "eth1" ucidef_set_led_netdev "wlan5g" "WLAN5G" "blue:wlan5g" "phy1-ap0" ;; diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network index 113eed4ed..fe3616e63 100755 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network @@ -38,7 +38,8 @@ mediatek_setup_macs() local wan_mac_offset="" case $board in - edgecore,eap111) + edgecore,eap111|\ + edgecore,eap112) lan_mac_offset="0x24" wan_mac_offset="0x2a" ;; diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/init.d/boocount b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/init.d/boocount index a7e9155c8..eacfaadcb 100755 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/init.d/boocount +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/init.d/boocount @@ -4,7 +4,8 @@ START=99 boot() { case $(board_name) in - edgecore,eap111) + edgecore,eap111|\ + edgecore,eap112) bootcount=$(fw_printenv -n bootcount) [ "$bootcount" != 0 ] && fw_setenv bootcount 0 ;; diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools index cabb29f7d..2832161a2 100644 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools @@ -12,7 +12,8 @@ touch /etc/config/ubootenv board=$(board_name) case "$board" in -edgecore,eap111) +edgecore,eap111|\ +edgecore,eap112) ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x20000" "0x20000" ;; esac diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh b/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh index 5161c3e65..810bb4494 100644 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh @@ -3,7 +3,8 @@ platform_do_upgrade() { local board=$(board_name) case "$board" in - edgecore,eap111) + edgecore,eap111|\ + edgecore,eap112) if [ -e /tmp/downgrade ]; then CI_UBIPART="rootfs1" { echo 'active 1'; echo 'upgrade_available 0'; } > /tmp/fw_setenv.txt || exit 1 @@ -42,7 +43,8 @@ platform_check_image() { [ "$#" -gt 1 ] && return 1 case "$board" in - edgecore,eap111) + edgecore,eap111|\ + edgecore,eap112) nand_do_platform_check "$board" "$1" return $? ;; diff --git a/feeds/tip/certificates/files/usr/bin/mount_certs b/feeds/tip/certificates/files/usr/bin/mount_certs index 27ebecb46..2d67b5d4c 100755 --- a/feeds/tip/certificates/files/usr/bin/mount_certs +++ b/feeds/tip/certificates/files/usr/bin/mount_certs @@ -45,7 +45,8 @@ edgecore,ecw5211|\ edgecore,eap101|\ edgecore,eap102|\ edgecore,oap104|\ -edgecore,eap111) +edgecore,eap111|\ +edgecore,eap112) if grep -q rootfs1 /proc/cmdline; then PART_NAME=rootfs2 else diff --git a/profiles/edgecore_eap112.yml b/profiles/edgecore_eap112.yml new file mode 100644 index 000000000..b905ac399 --- /dev/null +++ b/profiles/edgecore_eap112.yml @@ -0,0 +1,18 @@ +--- +profile: edgecore_eap112 +target: mediatek +subtarget: mt7981 +description: Build image for the EdgeCore EAP112 +image: bin/targets/mediatek/mt7981/openwrt-mediatek-mt7981-edgecore_eap112-squashfs-sysupgrade.bin +feeds: + - name: mediatek + path: ../../feeds/mediatek-sdk +packages: + - mediatek +include: + - ucentral-ap +diffconfig: | + # CONFIG_PACKAGE_kmod-nft-offload is not set + # CONFIG_PACKAGE_procd-ujail is not set + # CONFIG_PACKAGE_kmod-batman-adv is not set + # CONFIG_PACKAGE_unetd is not set