From 443fc3f4a29a0afa4d9a18b42abd8aa692252863 Mon Sep 17 00:00:00 2001 From: YenLin Pan Date: Wed, 2 Jul 2025 15:17:06 +0800 Subject: [PATCH] qca-wifi-7: Add Zyxel NWA50BE model Signed-off-by: YenLin Pan --- .github/workflows/build-dev.yml | 2 +- feeds/qca-wifi-7/ath12k-wifi/Makefile | 13 + .../ipq53xx/base-files/etc/board.d/02_network | 6 +- .../etc/hotplug.d/firmware/10-ath12k-caldata | 6 +- .../ipq53xx/base-files/etc/init.d/phy_quirks | 3 +- .../base-files/lib/upgrade/platform.sh | 3 +- .../ipq53xx/dts/ipq5332-zyxel-nwa50be.dts | 592 ++++++++++++++++++ feeds/qca-wifi-7/ipq53xx/image/ipq53xx.mk | 16 + .../0001-thermal-thermal-setting.patch | 59 ++ ...01-pinctrl-make-the-switch-LED-works.patch | 47 ++ .../files/usr/share/rrmd/policy_chanutil.uc | 1 + profiles/zyxel_nwa50be.yml | 16 + 12 files changed, 757 insertions(+), 7 deletions(-) create mode 100755 feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa50be.dts create mode 100644 feeds/qca-wifi-7/mac80211/patches-zyxel_nwa50be/0001-thermal-thermal-setting.patch create mode 100644 feeds/qca-wifi-7/qca-ssdk-qca/patches-zyxel_nwa50be/0001-pinctrl-make-the-switch-LED-works.patch create mode 100644 profiles/zyxel_nwa50be.yml diff --git a/.github/workflows/build-dev.yml b/.github/workflows/build-dev.yml index 68bcd25a2..16fd41f72 100755 --- a/.github/workflows/build-dev.yml +++ b/.github/workflows/build-dev.yml @@ -21,7 +21,7 @@ jobs: strategy: fail-fast: false matrix: - target: [ 'cig_wf189h', 'cig_wf189w', 'cig_wf660a', 'cig_wf672', 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf189', 'cig_wf196', 'cig_wf196', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'sonicfi_rap630w-312g', 'sonicfi_rap63xc-211g', 'sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'sonicfi_rap650c', 'sonicfi_rap7110c-341x', 'sonicfi_rap750e-h', 'sonicfi_rap750e-s', 'sonicfi_rap750w-311a', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'edgecore_oap103', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'senao_iap4300m', 'senao_iap2300m', 'senao_jeap6500', 'udaya_a6-id2', 'udaya_a6-od2', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655', 'emplus_wap588m', 'zyxel_nwa130be', 'sercomm_ap72tip-v4' ] + target: [ 'cig_wf189h', 'cig_wf189w', 'cig_wf660a', 'cig_wf672', 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf189', 'cig_wf196', 'cig_wf196', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'sonicfi_rap630w-312g', 'sonicfi_rap63xc-211g', 'sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'sonicfi_rap650c', 'sonicfi_rap7110c-341x', 'sonicfi_rap750e-h', 'sonicfi_rap750e-s', 'sonicfi_rap750w-311a', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'edgecore_oap103', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'senao_iap4300m', 'senao_iap2300m', 'senao_jeap6500', 'udaya_a6-id2', 'udaya_a6-od2', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655', 'emplus_wap588m', 'zyxel_nwa130be', 'zyxel_nwa50be', 'sercomm_ap72tip-v4' ] steps: - uses: actions/checkout@v3 diff --git a/feeds/qca-wifi-7/ath12k-wifi/Makefile b/feeds/qca-wifi-7/ath12k-wifi/Makefile index 96a0542a1..ee00cee3d 100755 --- a/feeds/qca-wifi-7/ath12k-wifi/Makefile +++ b/feeds/qca-wifi-7/ath12k-wifi/Makefile @@ -88,6 +88,11 @@ $(call Package/ath12k-wifi-default) TITLE:=board-2.bin for NWA130BE endef +define Package/ath12k-wifi-zyxel-nwa50be +$(call Package/ath12k-wifi-default) + TITLE:=board-2.bin for NWA50BE +endef + define Package/ath12k-wifi-cig-wf672 $(call Package/ath12k-wifi-default) TITLE:=board-2.bin for WF672 @@ -179,6 +184,13 @@ define Package/ath12k-wifi-zyxel-nwa130be/install $(INSTALL_DATA) ./board-2.bin.nwa130be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin endef +define Package/ath12k-wifi-zyxel-nwa50be/install + $(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/ + $(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/ + $(INSTALL_DATA) ./board-2.bin.nwa130be.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin + $(INSTALL_DATA) ./board-2.bin.nwa130be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin +endef + define Package/ath12k-wifi-cig-wf672/install $(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/ @@ -197,4 +209,5 @@ $(eval $(call BuildPackage,ath12k-wifi-cig-wf189h)) $(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip)) $(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip-v4)) $(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa130be)) +$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa50be)) $(eval $(call BuildPackage,ath12k-wifi-cig-wf672)) diff --git a/feeds/qca-wifi-7/ipq53xx/base-files/etc/board.d/02_network b/feeds/qca-wifi-7/ipq53xx/base-files/etc/board.d/02_network index 276660d35..91deacba1 100755 --- a/feeds/qca-wifi-7/ipq53xx/base-files/etc/board.d/02_network +++ b/feeds/qca-wifi-7/ipq53xx/base-files/etc/board.d/02_network @@ -35,7 +35,8 @@ ipq53xx_setup_interfaces() sercomm,ap72tip-v4) ucidef_set_interface_wan "eth0" ;; - zyxel,nwa130be) + zyxel,nwa130be|\ + zyxel,nwa50be) ucidef_set_interfaces_lan_wan "eth1" "eth0" ;; esac @@ -110,7 +111,8 @@ qcom_setup_macs() ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 2) ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 3) ;; - zyxel,nwa130be) + zyxel,nwa130be|\ + zyxel,nwa50be) wan_mac=$(cat /proc/cmdline) wan_mac="${wan_mac##*hwaddr=}" wan_mac="${wan_mac%% *}" diff --git a/feeds/qca-wifi-7/ipq53xx/base-files/etc/hotplug.d/firmware/10-ath12k-caldata b/feeds/qca-wifi-7/ipq53xx/base-files/etc/hotplug.d/firmware/10-ath12k-caldata index bf79789b2..c9b9a867b 100755 --- a/feeds/qca-wifi-7/ipq53xx/base-files/etc/hotplug.d/firmware/10-ath12k-caldata +++ b/feeds/qca-wifi-7/ipq53xx/base-files/etc/hotplug.d/firmware/10-ath12k-caldata @@ -66,7 +66,8 @@ ath12k/IPQ5332/hw1.0/caldata.bin) edgecore,eap105|\ sercomm,ap72tip-v4|\ sercomm,ap72tip|\ - zyxel,nwa130be) + zyxel,nwa130be|\ + zyxel,nwa50be) caldata_extract "0:ART" 0x1000 0x20000 ;; cig,wf672) @@ -88,7 +89,8 @@ ath12k/QCN92XX/hw1.0/cal-pci-0001:01:00.0.bin) edgecore,eap105|\ sercomm,ap72tip-v4|\ sercomm,ap72tip|\ - zyxel,nwa130be) + zyxel,nwa130be|\ + zyxel,nwa50be) caldata_extract "0:ART" 0x58800 0x2d000 ;; cig,wf672) diff --git a/feeds/qca-wifi-7/ipq53xx/base-files/etc/init.d/phy_quirks b/feeds/qca-wifi-7/ipq53xx/base-files/etc/init.d/phy_quirks index 65670d248..663bc0ee6 100755 --- a/feeds/qca-wifi-7/ipq53xx/base-files/etc/init.d/phy_quirks +++ b/feeds/qca-wifi-7/ipq53xx/base-files/etc/init.d/phy_quirks @@ -9,7 +9,8 @@ boot() { edgecore,eap105) ssdk_sh debug phy set 0x1 0x601FD032 0xff ;; - zyxel,nwa130be) + zyxel,nwa130be|\ + zyxel,nwa50be) #eth0: APPE: phyaddr 4 green:2.5G orange:others ssdk_sh debug phy set 4 0x40078074 0x670 ssdk_sh debug phy set 4 0x40078078 0x8600 diff --git a/feeds/qca-wifi-7/ipq53xx/base-files/lib/upgrade/platform.sh b/feeds/qca-wifi-7/ipq53xx/base-files/lib/upgrade/platform.sh index c1d4ab2ec..15ac28c8f 100755 --- a/feeds/qca-wifi-7/ipq53xx/base-files/lib/upgrade/platform.sh +++ b/feeds/qca-wifi-7/ipq53xx/base-files/lib/upgrade/platform.sh @@ -173,7 +173,8 @@ platform_do_upgrade() { sonicfi_dualimage_check nand_upgrade_tar "$1" ;; - zyxel,nwa130be) + zyxel,nwa130be|\ + zyxel,nwa50be) nand_upgrade_tar "$1" ;; esac diff --git a/feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa50be.dts b/feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa50be.dts new file mode 100755 index 000000000..6adb86d64 --- /dev/null +++ b/feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa50be.dts @@ -0,0 +1,592 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ5332 RDP468 board device tree source + * + * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. + * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include +#include +#include +#include "ipq5332.dtsi" +#include "ipq5332-default-memory.dtsi" + +/ { + model = "Zyxel NWA130BE"; + compatible = "zyxel,nwa130be", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332-rdp468", "qcom,ipq5332"; + + aliases { + serial0 = &blsp1_uart0; + serial1 = &blsp1_uart1; + ethernet0 = "/soc/dp1"; + ethernet1 = "/soc/dp2"; + }; + + chosen { + stdout-path = "serial0"; + }; + + soc@0 { + mdio:mdio@90000 { + pinctrl-0 = <&mdio1_pins &mdio0_pins>; + pinctrl-names = "default"; + /*gpio51 for manhattan reset*/ + phy-reset-gpio = <&tlmm 51 GPIO_ACTIVE_LOW>; + phyaddr_fixup = <0xC90F018>; + uniphyaddr_fixup = <0xC90F014>; + mdio_clk_fixup; /* MDIO clock sequence fix up flag */ + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <1>; + fixup; + }; + phy1: ethernet-phy@1 { + reg = <2>; + fixup; + }; + phy2: ethernet-phy@2 { + reg = <3>; + fixup; + }; + phy3: ethernet-phy@3 { + reg = <4>; + fixup; + }; + + switch0@10 { + compatible = "qca,qca8386"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "cpu"; + ethernet = <&gmac2>; + dsa-tag-protocol = "qca_4b"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-handle = <&phy0>; + phy-mode = "usxgmii"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-handle = <&phy1>; + phy-mode = "usxgmii"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-handle = <&phy2>; + phy-mode = "usxgmii"; + }; + }; + }; + }; + + ess-instance { + num_devices = <0x2>; + + ess-switch@3a000000 { + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x2>; /* lan port bitmap */ + switch_wan_bmp = <0x4>; /* wan port bitmap */ + switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/ + switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ + + qcom,port_phyinfo { + port@0 { + port_id = <1>; + forced-speed = <2500>; + forced-duplex = <1>; + }; + port@1 { + port_id = <2>; + phy_address = <4>; + }; + }; + + led_source@5 { + source = <5>; + mode = "normal"; + speed = "all"; + blink_en = "enable"; + active = "high"; + }; + }; + + ess-switch1@1 { + compatible = "qcom,ess-switch-qca8386"; + device_id = <1>; + switch_access_mode = "mdio"; + mdio-bus = <&mdio>; + switch_mac_mode = <0xc>; /* mac mode for uniphy instance0 */ + switch_mac_mode1 = <0xff>; /* mac mode1 for uniphy instance1 */ + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0xe>; /* lan port bitmap */ + switch_wan_bmp = <0x0>; /* wan port bitmap */ + link-polling-required = <0>; + fdb_sync = "interrupt"; + link-intr-gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>; + + qcom,port_phyinfo { + port@0 { + port_id = <0>; + forced-speed = <2500>; + forced-duplex = <1>; + }; + port@1 { + port_id = <1>; + phy_address = <1>; + }; + port@2 { + port_id = <2>; + phy_address = <2>; + }; + port@3 { + port_id = <3>; + phy_address = <3>; + }; + }; + + led_source@2 { + source = <2>; + mode = "normal"; + speed = "all"; + blink_en = "enable"; + active = "high"; + }; + led_source@5 { + source = <5>; + mode = "normal"; + speed = "all"; + blink_en = "enable"; + active = "high"; + }; + led_source@8 { + source = <8>; + mode = "normal"; + speed = "all"; + blink_en = "enable"; + active = "high"; + }; + }; + }; + + dp1 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <2>; + reg = <0x3a504000 0x4000>; + qcom,mactype = <1>; + local-mac-address = [000000000000]; + mdio-bus = <&mdio>; + qcom,phy-mdio-addr = <4>; + qcom,link-poll = <1>; + phy-mode = "sgmii"; + }; + + gmac2:dp2 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <1>; + reg = <0x3a500000 0x4000>; + qcom,mactype = <1>; + local-mac-address = [000000000000]; + phy-mode = "sgmii"; + qcom,mht-dev = <1>; + qcom,is_switch_connected = <1>; + qcom,ppe-offload-disabled = <1>; + }; + + /* EDMA host driver configuration for the board */ + edma@3ab00000 { + qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */ + qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */ + qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */ + qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */ + qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */ + qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */ + qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */ + qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */ + qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */ + qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */ + qcom,rx-page-mode = <0>; /* Rx fill ring page mode */ + qcom,tx-map-priority-level = <1>; /* Tx priority level per port */ + qcom,rx-map-priority-level = <1>; /* Rx priority level per core */ + qcom,ppeds-num = <2>; /* Number of PPEDS nodes */ + /* PPE-DS node format: */ + qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */ + <2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */ + qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */ + <12 13 14 15>, /* MHT-Port1 per-core Tx ring map */ + <4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/ + <16 17 18 19>, /* MHT-Port3 per-core Tx ring map */ + <20 21 22 23>; /* MHT-Port4 per-core Tx ring map */ + qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */ + qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */ + qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */ + qcom,rx-queue-start = <0>; /* Rx queue start */ + qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */ + <1 9 17 25>, /* Priority 1 queues per-core Rx ring map */ + <2 10 18 26>, /* Priority 2 queues per-core Rx ring map */ + <3 11 19 27>, /* Priority 3 queues per-core Rx ring map */ + <4 12 20 28>, /* Priority 4 queues per-core Rx ring map */ + <5 13 21 29>, /* Priority 5 queues per-core Rx ring map */ + <6 14 22 30>, /* Priority 6 queues per-core Rx ring map */ + <7 15 23 31>; /* Priority 7 queues per-core Rx ring map */ + interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */ + <0 164 4>, /* Tx complete ring id #5 IRQ info */ + <0 165 4>, /* Tx complete ring id #6 IRQ info */ + <0 166 4>, /* Tx complete ring id #7 IRQ info */ + <0 167 4>, /* Tx complete ring id #8 IRQ info */ + <0 168 4>, /* Tx complete ring id #9 IRQ info */ + <0 169 4>, /* Tx complete ring id #10 IRQ info */ + <0 170 4>, /* Tx complete ring id #11 IRQ info */ + <0 171 4>, /* Tx complete ring id #12 IRQ info */ + <0 172 4>, /* Tx complete ring id #13 IRQ info */ + <0 173 4>, /* Tx complete ring id #14 IRQ info */ + <0 174 4>, /* Tx complete ring id #15 IRQ info */ + <0 139 4>, /* Rx desc ring id #12 IRQ info */ + <0 140 4>, /* Rx desc ring id #13 IRQ info */ + <0 141 4>, /* Rx desc ring id #14 IRQ info */ + <0 142 4>, /* Rx desc ring id #15 IRQ info */ + <0 191 4>, /* Misc error IRQ info */ + <0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */ + <0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */ + <0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */ + <0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */ + <0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */ + <0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */ + <0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */ + <0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */ + <0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */ + <0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */ + <0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */ + <0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */ + <0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */ + <0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */ + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + led_blue{ + label = "led_blue"; + gpio = <&tlmm 22 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "led_blue"; + default-state = "off"; + }; + led_green { + label = "led_green"; + gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "led_green"; + default-state = "on"; + }; + led_white { + label = "led_white"; + gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "led_white"; + default-state = "off"; + }; + led_red { + label = "led_red"; + gpio = <&tlmm 44 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "led_red"; + default-state = "off"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + button@1 { + label = "reset"; + linux,code = ; + gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + debounce-interval = <60>; + }; + }; + + wsi: wsi { + id = <0>; + num_chip = <2>; + status = "okay"; + chip_info = <0 1 1>, + <1 1 0>; + }; + }; +}; + +&wifi0 { + led-gpio = <&tlmm 36 GPIO_ACTIVE_HIGH>; + qcom,rproc = <&q6_wcss_pd1>; + qcom,rproc_rpd = <&q6v5_wcss>; + qcom,multipd_arch; + qcom,userpd-subsys-name = "q6v5_wcss_userpd1"; + memory-region = <&q6_region>; + qcom,wsi = <&wsi>; + qcom,wsi_index = <0>; + qcom,board_id = <0x12>; + status = "okay"; +}; + +&qcn9224_pcie1 { + status = "okay"; +}; + +&blsp1_uart0 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_1_pins>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&blsp1_spi0 { + pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; + pinctrl-names = "default"; + status = "okay"; + + flash@0 { + compatible = "n25q128a11", "micron,n25q128a11", "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + }; +}; + +&sdhc { + bus-width = <4>; + max-frequency = <192000000>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + pinctrl-0 = <&sdc_default_state>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&xo { + clock-frequency = <24000000>; +}; + +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + pinctrl-0 = <&qspi_default_state>; + pinctrl-names = "default"; + status = "okay"; + + nandcs@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + }; +}; + +&pcie1_phy_x2 { + status = "okay"; +}; + +&pcie1 { + pinctrl-0 = <&pcie1_default_state>; + pinctrl-names = "default"; + perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>; + status = "okay"; + + pcie1_rp { + reg = <0 0 0 0 0>; + + qcom,mhi@1 { + reg = <0 0 0 0 0>; + boot-args = <0x2 0x4 0x34 0x3 0x0 0x0 /* MX Rail, GPIO52, Drive strength 0x3 */ + 0x4 0x4 0x18 0x3 0x0 0x0 /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */ + 0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */ + memory-region = <&qcn9224_pcie1>; + qcom,wsi = <&wsi>; + qcom,wsi_index = <1>; + qcom,board_id = <0x1019>; + }; + }; +}; + +/* PINCTRL */ + +&tlmm { + + led_pins: led_pins { + led_blue { + pins = "gpio22"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_green { + pins = "gpio31"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_white { + pins = "gpio32"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + led_red { + pins = "gpio44"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + }; + + + sdc_default_state: sdc-default-state { + clk-pins { + pins = "gpio13"; + function = "sdc_clk"; + drive-strength = <8>; + bias-disable; + }; + + cmd-pins { + pins = "gpio12"; + function = "sdc_cmd"; + drive-strength = <8>; + bias-pull-up; + }; + + data-pins { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "sdc_data"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + spi_0_data_clk_pins: spi-0-data-clk-state { + pins = "gpio14", "gpio15", "gpio16"; + function = "blsp0_spi"; + drive-strength = <2>; + bias-pull-down; + }; + + spi_0_cs_pins: spi-0-cs-state { + pins = "gpio17"; + function = "blsp0_spi"; + drive-strength = <2>; + bias-pull-up; + }; + + qspi_default_state: qspi-default-state { + qspi_clock { + pins = "gpio13"; + function = "qspi_clk"; + drive-strength = <8>; + bias-pull-down; + }; + + qspi_cs { + pins = "gpio12"; + function = "qspi_cs"; + drive-strength = <8>; + bias-pull-up; + }; + + qspi_data { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "qspi_data"; + drive-strength = <8>; + bias-pull-down; + }; + }; + + serial_1_pins: serial1-pinmux { + pins = "gpio33", "gpio34", "gpio35", "gpio36"; + function = "blsp1_uart2"; + drive-strength = <8>; + bias-pull-up; + }; + + button_pins: button-state { + pins = "gpio30"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + pwm_pins: pwm-state { + pins = "gpio46"; + function = "pwm0"; + drive-strength = <8>; + }; + + pcie1_default_state: pcie1-default-state { + pins = "gpio47"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + output-low; + }; +}; + +&license_manager { + status = "okay"; +}; + +&usb3 { + qcom,multiplexed-phy; + status = "okay"; +}; + +&pwm { + pinctrl-0 = <&pwm_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&hs_m31phy_0 { + status = "okay"; +}; + +&ssuniphy_0 { + status = "okay"; +}; diff --git a/feeds/qca-wifi-7/ipq53xx/image/ipq53xx.mk b/feeds/qca-wifi-7/ipq53xx/image/ipq53xx.mk index 4cb3ff7b5..ae5d866bd 100755 --- a/feeds/qca-wifi-7/ipq53xx/image/ipq53xx.mk +++ b/feeds/qca-wifi-7/ipq53xx/image/ipq53xx.mk @@ -149,6 +149,22 @@ define Device/zyxel_nwa130be endef TARGET_DEVICES += zyxel_nwa130be + +define Device/zyxel_nwa50be + DEVICE_TITLE := Zyxel NWA50BE + DEVICE_DTS := ipq5332-zyxel-nwa50be + DEVICE_DTS_DIR := ../dts + DEVICE_DTS_CONFIG := config@mi01.6 + IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi + BLOCKSIZE := 256k + PAGESIZE := 4096 + IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata + IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand + IMAGE/nand-factory.ubi := append-ubi + DEVICE_PACKAGES := ath12k-wifi-zyxel-nwa50be ath12k-firmware-qcn92xx ath12k-firmware-ipq5332 +endef +TARGET_DEVICES += zyxel_nwa50be + define Device/cig_wf672 DEVICE_TITLE := CIG WF672 DEVICE_DTS := ipq5332-cig-wf672 diff --git a/feeds/qca-wifi-7/mac80211/patches-zyxel_nwa50be/0001-thermal-thermal-setting.patch b/feeds/qca-wifi-7/mac80211/patches-zyxel_nwa50be/0001-thermal-thermal-setting.patch new file mode 100644 index 000000000..1e6d53afd --- /dev/null +++ b/feeds/qca-wifi-7/mac80211/patches-zyxel_nwa50be/0001-thermal-thermal-setting.patch @@ -0,0 +1,59 @@ +From 1a46aa106a50a06bfa4b669d87a8143c3d59f2f4 Mon Sep 17 00:00:00 2001 +From: YenLin Pan +Date: Wed, 14 May 2025 14:14:22 +0800 +Subject: [PATCH] thermal: thermal setting + +lv0 -100 -hi0 105 -off0 0 +lv1 95 -hi1 110 -off1 75 +lv2 100 -hi2 115 -off2 98 +lv3 105 -hi3 120 -off3 100 + +Signed-off-by: YenLin Pan +--- + drivers/net/wireless/ath/ath12k/thermal.h | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h +index 5c91906..a493cd5 100644 +--- a/drivers/net/wireless/ath/ath12k/thermal.h ++++ b/drivers/net/wireless/ath/ath12k/thermal.h +@@ -13,28 +13,28 @@ + + /* Below temperatures are in celsius */ + #define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100 +-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100 ++#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105 + #define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95 +-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105 ++#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110 + #define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100 +-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110 ++#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115 + #define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105 + #define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120 + + #define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100 +-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95 ++#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105 + #define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90 +-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100 ++#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110 + #define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95 + #define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105 + #define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100 +-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110 ++#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 115 + #define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105 + #define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120 + + #define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0 +-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50 +-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90 ++#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 75 ++#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 98 + #define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100 + + #define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE +-- +2.34.1 + diff --git a/feeds/qca-wifi-7/qca-ssdk-qca/patches-zyxel_nwa50be/0001-pinctrl-make-the-switch-LED-works.patch b/feeds/qca-wifi-7/qca-ssdk-qca/patches-zyxel_nwa50be/0001-pinctrl-make-the-switch-LED-works.patch new file mode 100644 index 000000000..0fd4afc5b --- /dev/null +++ b/feeds/qca-wifi-7/qca-ssdk-qca/patches-zyxel_nwa50be/0001-pinctrl-make-the-switch-LED-works.patch @@ -0,0 +1,47 @@ +From 7fa9e9b683f1c573c58a14755347988919bc7d06 Mon Sep 17 00:00:00 2001 +From: YenLin Pan +Date: Wed, 14 May 2025 13:47:06 +0800 +Subject: [PATCH] pinctrl: make the switch LED works + +Enable switch LED pin definition for LED0/LED1/LED2 control + +Signed-off-by: YenLin Pan +--- + src/init/ssdk_mht_pinctrl.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/src/init/ssdk_mht_pinctrl.c b/src/init/ssdk_mht_pinctrl.c +index 2debe59..1ae0002 100755 +--- a/src/init/ssdk_mht_pinctrl.c ++++ b/src/init/ssdk_mht_pinctrl.c +@@ -33,11 +33,17 @@ static struct mht_pinctrl_setting mht_pin_settings[] = { + /*PINs default MUX Setting*/ + MHT_PIN_SETTING_MUX(0, MHT_PIN_FUNC_INTN_WOL), + MHT_PIN_SETTING_MUX(1, MHT_PIN_FUNC_INTN), +-#if 0 ++#if 1 + MHT_PIN_SETTING_MUX(2, MHT_PIN_FUNC_P0_LED_0), + MHT_PIN_SETTING_MUX(3, MHT_PIN_FUNC_P1_LED_0), + MHT_PIN_SETTING_MUX(4, MHT_PIN_FUNC_P2_LED_0), + MHT_PIN_SETTING_MUX(5, MHT_PIN_FUNC_P3_LED_0), ++ MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_P0_LED_2), ++ MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_P1_LED_2), ++ MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_P2_LED_2), ++ MHT_PIN_SETTING_MUX(9, MHT_PIN_FUNC_P3_LED_2), ++#endif ++#if 0 + MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_PPS_IN), + MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_TOD_IN), + MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_RTC_REFCLK_IN), +@@ -49,7 +55,7 @@ static struct mht_pinctrl_setting mht_pin_settings[] = { + MHT_PIN_SETTING_MUX(13, MHT_PIN_FUNC_P0_TOD_OUT), + MHT_PIN_SETTING_MUX(14, MHT_PIN_FUNC_P0_CLK125_TDI), + MHT_PIN_SETTING_MUX(15, MHT_PIN_FUNC_P0_SYNC_CLKO_PTP), +-#if 0 ++#if 1 + MHT_PIN_SETTING_MUX(16, MHT_PIN_FUNC_P0_LED_1), + MHT_PIN_SETTING_MUX(17, MHT_PIN_FUNC_P1_LED_1), + MHT_PIN_SETTING_MUX(18, MHT_PIN_FUNC_P2_LED_1), +-- +2.34.1 + diff --git a/feeds/ucentral/rrmd/files/usr/share/rrmd/policy_chanutil.uc b/feeds/ucentral/rrmd/files/usr/share/rrmd/policy_chanutil.uc index 0afbe0519..8a624fea6 100644 --- a/feeds/ucentral/rrmd/files/usr/share/rrmd/policy_chanutil.uc +++ b/feeds/ucentral/rrmd/files/usr/share/rrmd/policy_chanutil.uc @@ -20,6 +20,7 @@ case 'edgecore,eap105': case 'edgecore,oap101-6e': case 'edgecore,oap101e-6e': case 'zyxel,nwa130be': +case 'zyxel,nwa50be': num_radios = 3; break; } diff --git a/profiles/zyxel_nwa50be.yml b/profiles/zyxel_nwa50be.yml new file mode 100644 index 000000000..4cf5eb461 --- /dev/null +++ b/profiles/zyxel_nwa50be.yml @@ -0,0 +1,16 @@ +--- +profile: zyxel_nwa50be +target: ipq53xx +subtarget: generic +description: Build image for the zyxel nwa50be +image: bin/targets/ipq53xx/generic/openwrt-ipq53xx-zyxel_nwa50be-squashfs-sysupgrade.tar +feeds: + - name: qca + path: ../../feeds/qca-wifi-7 +packages: + - ipq53xx + - qca-ssdk-shell +include: + - ucentral-ap +diffconfig: | + CONFIG_KERNEL_IPQ_MEM_PROFILE=0