diff --git a/patches/0017-ipq807x-add-the-Qualcomm-AX-target-support.patch b/patches/0017-ipq807x-add-the-Qualcomm-AX-target-support.patch index 5fcaf9920..cd6037ca1 100644 --- a/patches/0017-ipq807x-add-the-Qualcomm-AX-target-support.patch +++ b/patches/0017-ipq807x-add-the-Qualcomm-AX-target-support.patch @@ -1,25 +1,14868 @@ -From ba5c41500dfb7c7ccb0fa6d83f3bf7dd57b936a1 Mon Sep 17 00:00:00 2001 +From 67a6b38fa419294a243219e1d99ac0f8e89daef4 Mon Sep 17 00:00:00 2001 From: John Crispin -Date: Mon, 27 Sep 2021 09:59:01 +0200 -Subject: [PATCH] foo +Date: Sat, 18 Jul 2020 08:53:44 +0200 +Subject: [PATCH 01/30] ipq807x: add the Qualcomm AX target support +Signed-off-by: John Crispin --- - .../ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) + config/Config-kernel.in | 9 + + include/image.mk | 6 +- + include/kernel-version.mk | 2 +- + package/boot/uboot-envtools/files/ipq807x | 37 + + .../etc/hotplug.d/firmware/11-ath10k-caldata | 5 + + target/linux/ipq807x/109-logspam.patch | 24 + + target/linux/ipq807x/Makefile | 22 + + .../ipq807x/base-files/etc/board.d/01_leds | 36 + + .../ipq807x/base-files/etc/board.d/02_network | 78 + + .../etc/hotplug.d/firmware/10-ath11k-caldata | 92 + + .../ipq807x/base-files/etc/init.d/aq_phy | 15 + + .../ipq807x/base-files/etc/init.d/bootcount | 12 + + .../linux/ipq807x/base-files/etc/init.d/wdt | 14 + + ...G4_v5.4.B-AQR_CIG_WIFI_ID44715_VER1673.cld | Bin 0 -> 391170 bytes + .../base-files/lib/upgrade/platform.sh | 66 + + target/linux/ipq807x/config-4.4 | 828 +++++++++ + .../arm/boot/dts/qcom-ipq6018-cig-wf188.dts | 18 + + .../arm/boot/dts/qcom-ipq6018-cig-wf188n.dts | 18 + + .../boot/dts/qcom-ipq6018-edgecore-eap101.dts | 18 + + .../boot/dts/qcom-ipq6018-miwifi-ax1800.dts | 18 + + .../arch/arm/boot/dts/qcom-ipq807x-eap102.dts | 26 + + .../arch/arm/boot/dts/qcom-ipq807x-eap106.dts | 26 + + .../arch/arm/boot/dts/qcom-ipq807x-ex227.dts | 26 + + .../arch/arm/boot/dts/qcom-ipq807x-ex447.dts | 26 + + .../boot/dts/qcom-ipq807x-sercomm-wallaby.dts | 26 + + .../arch/arm/boot/dts/qcom-ipq807x-wf194c.dts | 26 + + .../dts/qcom/qcom-ipq6018-miwifi-ax1800.dts | 419 +++++ + .../boot/dts/qcom/qcom-ipq807x-eap102.dts | 918 ++++++++++ + target/linux/ipq807x/image/Makefile | 26 + + target/linux/ipq807x/image/ipq60xx.mk | 47 + + target/linux/ipq807x/image/ipq807x.mk | 81 + + target/linux/ipq807x/ipq60xx/config-default | 122 ++ + .../linux/ipq807x/ipq60xx/profiles/default.mk | 9 + + target/linux/ipq807x/ipq60xx/target.mk | 8 + + target/linux/ipq807x/ipq807x/config-default | 78 + + .../linux/ipq807x/ipq807x/profiles/default.mk | 9 + + target/linux/ipq807x/ipq807x/target.mk | 7 + + target/linux/ipq807x/modules.mk | 61 + + .../linux/ipq807x/patches/100-qrtr-ns.patch | 976 +++++++++++ + .../linux/ipq807x/patches/101-squashfs.patch | 16 + + .../linux/ipq807x/patches/102-cig-wf188.patch | 869 ++++++++++ + .../ipq807x/patches/103-sercomm-wallaby.patch | 816 +++++++++ + target/linux/ipq807x/patches/104-wf194c.patch | 816 +++++++++ + .../patches/105-fix-dtc-gcc10-build.patch | 11 + + target/linux/ipq807x/patches/106-eap101.patch | 993 +++++++++++ + .../linux/ipq807x/patches/108-log-spam.patch | 37 + + target/linux/ipq807x/patches/109-tplink.patch | 1518 +++++++++++++++++ + .../ipq807x/patches/110-add-esmt-nand.patch | 37 + + target/linux/ipq807x/patches/111-eap106.patch | 765 +++++++++ + target/linux/ipq807x/patches/112-pstore.patch | 147 ++ + 50 files changed, 10258 insertions(+), 2 deletions(-) + create mode 100644 package/boot/uboot-envtools/files/ipq807x + create mode 100644 target/linux/ipq807x/109-logspam.patch + create mode 100644 target/linux/ipq807x/Makefile + create mode 100755 target/linux/ipq807x/base-files/etc/board.d/01_leds + create mode 100755 target/linux/ipq807x/base-files/etc/board.d/02_network + create mode 100755 target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata + create mode 100755 target/linux/ipq807x/base-files/etc/init.d/aq_phy + create mode 100755 target/linux/ipq807x/base-files/etc/init.d/bootcount + create mode 100755 target/linux/ipq807x/base-files/etc/init.d/wdt + create mode 100644 target/linux/ipq807x/base-files/lib/firmware/AQR-G4_v5.4.B-AQR_CIG_WIFI_ID44715_VER1673.cld + create mode 100755 target/linux/ipq807x/base-files/lib/upgrade/platform.sh + create mode 100644 target/linux/ipq807x/config-4.4 + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188n.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-edgecore-eap101.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-miwifi-ax1800.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap102.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap106.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex227.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex447.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-sercomm-wallaby.dts + create mode 100644 target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-wf194c.dts + create mode 100755 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq6018-miwifi-ax1800.dts + create mode 100755 target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts + create mode 100644 target/linux/ipq807x/image/Makefile + create mode 100644 target/linux/ipq807x/image/ipq60xx.mk + create mode 100644 target/linux/ipq807x/image/ipq807x.mk + create mode 100644 target/linux/ipq807x/ipq60xx/config-default + create mode 100644 target/linux/ipq807x/ipq60xx/profiles/default.mk + create mode 100644 target/linux/ipq807x/ipq60xx/target.mk + create mode 100644 target/linux/ipq807x/ipq807x/config-default + create mode 100644 target/linux/ipq807x/ipq807x/profiles/default.mk + create mode 100644 target/linux/ipq807x/ipq807x/target.mk + create mode 100644 target/linux/ipq807x/modules.mk + create mode 100644 target/linux/ipq807x/patches/100-qrtr-ns.patch + create mode 100644 target/linux/ipq807x/patches/101-squashfs.patch + create mode 100644 target/linux/ipq807x/patches/102-cig-wf188.patch + create mode 100644 target/linux/ipq807x/patches/103-sercomm-wallaby.patch + create mode 100644 target/linux/ipq807x/patches/104-wf194c.patch + create mode 100644 target/linux/ipq807x/patches/105-fix-dtc-gcc10-build.patch + create mode 100644 target/linux/ipq807x/patches/106-eap101.patch + create mode 100644 target/linux/ipq807x/patches/108-log-spam.patch + create mode 100644 target/linux/ipq807x/patches/109-tplink.patch + create mode 100644 target/linux/ipq807x/patches/110-add-esmt-nand.patch + create mode 100644 target/linux/ipq807x/patches/111-eap106.patch + create mode 100644 target/linux/ipq807x/patches/112-pstore.patch -diff --git a/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata b/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata -index e8dfc85403..2b768e2f9b 100755 ---- a/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata -+++ b/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata -@@ -47,7 +47,7 @@ case "$FIRMWARE" in - tplink,ex227|\ - tplink,ex447|\ - sercomm,wallaby) -- caldata_extract "0:ART" 0x1000 0x10000 -+ caldata_extract "0:ART" 0x1000 0x20000 +diff --git a/config/Config-kernel.in b/config/Config-kernel.in +index f71114b5da..4a85d83118 100644 +--- a/config/Config-kernel.in ++++ b/config/Config-kernel.in +@@ -2,6 +2,15 @@ + # + # Copyright (C) 2006-2014 OpenWrt.org + ++config KERNEL_IPQ_MEM_PROFILE ++ int "Different memory profile " ++ range 0 1024 ++ default 512 ++ depends on TARGET_ipq807x ++ help ++ This option select memory profile to be used,which defines ++ the reserved memory configuration used in device tree. ++ + config KERNEL_BUILD_USER + string "Custom Kernel Build User Name" + default "builder" if BUILDBOT +diff --git a/include/image.mk b/include/image.mk +index 6fc02a3f6b..92b23321b1 100644 +--- a/include/image.mk ++++ b/include/image.mk +@@ -179,6 +179,10 @@ define Image/pad-root-squashfs + $(call Image/pad-to,$(KDIR)/root.squashfs,$(if $(1),$(1),$(ROOTFS_PARTSIZE))) + endef + ++ifeq ($(CONFIG_IPQ_MEM_PROFILE),512) ++DTC_CFLAGS = -D __IPQ_MEM_PROFILE_512_MB__ ++endif ++ + # $(1) source dts file + # $(2) target dtb file + # $(3) extra CPP flags +@@ -188,7 +192,7 @@ define Image/BuildDTB + -I$(DTS_DIR) \ + -I$(DTS_DIR)/include \ + -I$(LINUX_DIR)/include/ \ +- -undef -D__DTS__ $(3) \ ++ -undef -D__DTS__ $(DTC_CFLAGS) $(3) \ + -o $(2).tmp $(1) + $(LINUX_DIR)/scripts/dtc/dtc -O dtb \ + -i$(dir $(1)) $(DTC_FLAGS) $(4) \ +diff --git a/include/kernel-version.mk b/include/kernel-version.mk +index 3c109c13c8..dff01895be 100644 +--- a/include/kernel-version.mk ++++ b/include/kernel-version.mk +@@ -11,7 +11,7 @@ LINUX_VERSION-4.14 = .193 + LINUX_VERSION-5.4 = .142 + LINUX_VERSION-5.10 = .27 + +-LINUX_KERNEL_HASH-4.4.60 = 2cd8df6f1ac6a5329c5a286ec9b5956215977221a1b731597ed169fff74a9659 ++LINUX_KERNEL_HASH-4.4.60 = e7f2f47acf17497d6ffd713eda65c025b3df0bce09faa8c04712bf1b3cfc9fdb + LINUX_KERNEL_HASH-4.14.193 = 0b0fb41d4430e1a42738b341cbfd2f41951aa5cd02acabbd53f076119c8b9f03 + LINUX_KERNEL_HASH-5.4.142 = 99785728968564ba27c7e552d024b560072dcbc885540912eabb5c021e231451 + LINUX_KERNEL_HASH-5.10.27 = d99dc9662951299c53a0a8d8c8d0a72a16ff861d20e927c0f9b14f63282d69d9 +diff --git a/package/boot/uboot-envtools/files/ipq807x b/package/boot/uboot-envtools/files/ipq807x +new file mode 100644 +index 0000000000..6c429f1852 +--- /dev/null ++++ b/package/boot/uboot-envtools/files/ipq807x +@@ -0,0 +1,37 @@ ++[ -e /etc/config/ubootenv ] && exit 0 ++ ++touch /etc/config/ubootenv ++ ++. /lib/uboot-envtools.sh ++. /lib/functions.sh ++ ++board=$(board_name) ++ ++ubootenv_mtdinfo () { ++ UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV) ++ mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//') ++ mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}') ++ mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}') ++ nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev}) ++ ++ if [ -n "$nor_flash" ]; then ++ ubootenv_size=$mtd_size ++ else ++ # size is fixed to 0x40000 in u-boot ++ ubootenv_size=0x40000 ++ fi ++ ++ sectors=$(( $ubootenv_size / $mtd_erase )) ++ echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors ++} ++ ++case "$board" in ++*) ++ ubootenv_add_uci_config $(ubootenv_mtdinfo) ++ ;; ++esac ++ ++config_load ubootenv ++config_foreach ubootenv_add_app_config ubootenv ++ ++exit 0 +diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +index b12c9af9a7..b7ee73b12e 100644 +--- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata ++++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +@@ -265,6 +265,11 @@ case "$FIRMWARE" in + caldata_extract "ART" 0x5000 0x2f20 + ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1) ;; ++ tp-link,ap2220 |\ ++ tp-link,ec420-g1) ++ ath10kcal_extract "0:ART" 4096 12064 ++ ath10kcal_patch_mac_crc $(macaddr_add "$(get_tip mac_address)" 9) #2.4G, wlan1 ++ ;; esac ;; + *) +diff --git a/target/linux/ipq807x/109-logspam.patch b/target/linux/ipq807x/109-logspam.patch +new file mode 100644 +index 0000000000..79ee61dc77 +--- /dev/null ++++ b/target/linux/ipq807x/109-logspam.patch +@@ -0,0 +1,24 @@ ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/clk/qcom/clk-branch.c ++=================================================================== ++--- linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce.orig/drivers/clk/qcom/clk-branch.c +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/clk/qcom/clk-branch.c ++@@ -75,7 +75,7 @@ static int clk_branch_wait(const struct ++ bool (check_halt)(const struct clk_branch *, bool)) ++ { ++ bool voted = br->halt_check & BRANCH_VOTED; ++- const char *name = clk_hw_get_name(&br->clkr.hw); +++ //const char *name = clk_hw_get_name(&br->clkr.hw); ++ ++ /* Skip checking halt bit if the clock is in hardware gated mode */ ++ if (clk_branch_in_hwcg_mode(br)) ++@@ -93,8 +93,8 @@ static int clk_branch_wait(const struct ++ return 0; ++ udelay(1); ++ } ++- WARN(1, "%s status stuck at 'o%s'", name, ++- enabling ? "ff" : "n"); +++/* WARN(1, "%s status stuck at 'o%s'", name, +++ enabling ? "ff" : "n");*/ ++ return -EBUSY; ++ } ++ return 0; +diff --git a/target/linux/ipq807x/Makefile b/target/linux/ipq807x/Makefile +new file mode 100644 +index 0000000000..97c770df4a +--- /dev/null ++++ b/target/linux/ipq807x/Makefile +@@ -0,0 +1,22 @@ ++include $(TOPDIR)/rules.mk ++ ++ARCH:=arm ++BOARD:=ipq807x ++BOARDNAME:=Qualcomm Atheros AX ++SUBTARGETS:=ipq807x ipq60xx ++FEATURES:=squashfs ramdisk nand pcie usb ++KERNELNAME:=Image dtbs ++CPU_TYPE:=cortex-a7 ++ ++KERNEL_PATCHVER:=4.4 ++KERNEL_NAME_SUFFIX=-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016 ++ ++include $(INCLUDE_DIR)/target.mk ++DEFAULT_PACKAGES += kmod-qca-nss-dp kmod-qca-ssdk swconfig \ ++ kmod-qca-nss-drv \ ++ kmod-usb-phy-ipq807x kmod-usb-dwc3-of-simple \ ++ kmod-ath11k-ahb kmod-qrtr_mproc wpad \ ++ kmod-gpio-button-hotplug \ ++ qca-thermald-10.4 qca-ssdk-shell kmod-qca-nss-drv-bridge-mgr ++ ++$(eval $(call BuildTarget)) +diff --git a/target/linux/ipq807x/base-files/etc/board.d/01_leds b/target/linux/ipq807x/base-files/etc/board.d/01_leds +new file mode 100755 +index 0000000000..0bfa04d614 +--- /dev/null ++++ b/target/linux/ipq807x/base-files/etc/board.d/01_leds +@@ -0,0 +1,36 @@ ++#!/bin/sh ++ ++. /lib/functions/uci-defaults.sh ++ ++board_config_update ++ ++board=$(board_name) ++ ++case "$board" in ++sercomm,wallaby|\ ++cig,wf188n|\ ++cig,wf194c) ++ ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0" "tx rx link" ++ ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy0tpt" ++ ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy1tpt" ++ ;; ++esac ++ ++case "$board" in ++edgecore,eap101) ++ ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy0tpt" ++ ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy1tpt" ++ ucidef_set_led_netdev "lan1" "lan1" "green:lan1" "eth1" ++ ucidef_set_led_netdev "lan2" "lan2" "green:lan2" "eth2" ++ ucidef_set_led_netdev "poe" "poe" "green:wan" "eth0" ++ ;; ++edgecore,eap102) ++ ucidef_set_led_netdev "poe" "poe" "green:wan" "eth0" ++ ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wifi5" "phy0tpt" ++ ucidef_set_led_wlan "wlan2g" "WLAN2G" "green:wifi2" "phy1tpt" ++ ;; ++esac ++ ++board_config_flush ++ ++exit 0 +diff --git a/target/linux/ipq807x/base-files/etc/board.d/02_network b/target/linux/ipq807x/base-files/etc/board.d/02_network +new file mode 100755 +index 0000000000..ee9973f7a8 +--- /dev/null ++++ b/target/linux/ipq807x/base-files/etc/board.d/02_network +@@ -0,0 +1,78 @@ ++#!/bin/sh ++ ++. /lib/functions.sh ++. /lib/functions/uci-defaults.sh ++. /lib/functions/system.sh ++ ++qcom_setup_interfaces() ++{ ++ local board="$1" ++ ucidef_add_switch "switch0" ++ ucidef_add_switch_attr "switch0" "enable" "false" ++ ucidef_add_switch_attr "switch0" "reset" "false" ++ ++ case $board in ++ cig,wf188|\ ++ tplink,ex227|\ ++ tplink,ex447) ++ ucidef_set_interface_wan "eth0" ++ ucidef_set_interface_lan "" ++ ;; ++ qcom,ipq6018-cp01|\ ++ qcom,ipq807x-hk01) ++ ucidef_set_interface_lan "eth0 eth1 eth2 eth3 eth4" ++ ucidef_set_interface_wan "eth5" ++ ;; ++ cig,wf194c|\ ++ sercomm,wallaby) ++ ucidef_set_interface_lan "eth0" ++ ucidef_set_interface_wan "eth1" ++ ;; ++ edgecore,eap101) ++ ucidef_set_interface_lan "eth1 eth2" ++ ucidef_set_interface_wan "eth0" ++ ;; ++ edgecore,eap102|\ ++ edgecore,eap106|\ ++ cig,wf188n) ++ ucidef_set_interface_lan "eth1" ++ ucidef_set_interface_wan "eth0" ++ ;; ++ qcom,ipq807x-hk14) ++ ucidef_set_interface_lan "eth0 eth1 eth2 eth3" ++ ucidef_set_interface_wan "eth4" ++ ;; ++ esac ++} ++ ++qcom_setup_macs() ++{ ++ local board="$1" ++ ++ case $board in ++ cig,wf194c) ++ mac=$(grep BaseMacAddress= /dev/mtd14 | cut -dx -f2) ++ wan_mac=$(macaddr_canonicalize $mac) ++ lan_mac=$(macaddr_add "$wan_mac" 1) ++ ucidef_set_network_device_mac eth0 $lan_mac ++ ucidef_set_network_device_mac eth1 $wan_mac ++ ip link set eth0 address $lan_mac ++ ip link set eth1 address $wan_mac ++ ;; ++ *) ++ wan_mac=$(cat /sys/class/net/eth0/address) ++ lan_mac=$(macaddr_add "$wan_mac" 1) ++ ;; ++ esac ++ [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac ++ [ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac ++} ++ ++board_config_update ++board=$(board_name) ++ucidef_set_bridge_device bridge ++qcom_setup_interfaces $board ++qcom_setup_macs $board ++board_config_flush ++ ++exit 0 +diff --git a/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata b/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata +new file mode 100755 +index 0000000000..e64ea1a105 +--- /dev/null ++++ b/target/linux/ipq807x/base-files/etc/hotplug.d/firmware/10-ath11k-caldata +@@ -0,0 +1,92 @@ ++#!/bin/sh ++ ++[ -e /lib/firmware/$FIRMWARE ] && exit 0 ++ ++. /lib/functions.sh ++. /lib/functions/system.sh ++ ++ath11k_generate_macs() { ++ touch /lib/firmware/ath11k-macs ++ eth=$(cat /sys/class/net/eth0/address) ++ mac1=$(macaddr_add $eth 2) ++ mac2=$(macaddr_add $eth 10) ++ mac3=$(macaddr_add $eth 18) ++ echo -ne \\x${mac1//:/\\x} >> /lib/firmware/ath11k-macs ++ echo -ne \\x${mac2//:/\\x} >> /lib/firmware/ath11k-macs ++ echo -ne \\x${mac3//:/\\x} >> /lib/firmware/ath11k-macs ++} ++ ++caldata_die() { ++ echo "caldata: " "$*" ++ exit 1 ++} ++ ++caldata_extract() { ++ local part=$1 ++ local offset=$(($2)) ++ local count=$(($3)) ++ local mtd ++ ++ mtd=$(find_mtd_chardev $part) ++ [ -n "$mtd" ] || caldata_die "no mtd device found for partition $part" ++ ++ dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \ ++ caldata_die "failed to extract calibration data from $mtd" ++} ++ ++board=$(board_name) ++ ++case "$FIRMWARE" in ++"ath11k/IPQ8074/hw2.0/caldata.bin") ++ case "$board" in ++ cig,wf194c|\ ++ edgecore,eap102 |\ ++ edgecore,eap106 |\ ++ qcom,ipq807x-hk01|\ ++ qcom,ipq807x-hk14|\ ++ tplink,ex227|\ ++ tplink,ex447|\ ++ sercomm,wallaby) ++ caldata_extract "0:ART" 0x1000 0x20000 ++ ;; ++ esac ++ ;; ++"ath11k/IPQ6018/hw1.0/caldata.bin") ++ case "$board" in ++ cig,wf188|\ ++ cig,wf188n|\ ++ edgecore,eap101|\ ++ qcom,ipq6018-cp01|\ ++ xiaomi,ax1800) ++ caldata_extract "0:ART" 0x1000 0x20000 ++ ;; ++ esac ++ ;; ++ath11k/QCN9074/hw1.0/caldata_1.bin) ++ case "$board" in ++ qcom,ipq807x-hk14) ++ caldata_extract "0:ART" 0x26800 0x20000 ++ ;; ++ esac ++ ;; ++ath11k/QCN9074/hw1.0/caldata_2.bin) ++ case "$board" in ++ qcom,ipq807x-hk14) ++ caldata_extract "0:ART" 0x4C000 0x20000 ++ ;; ++ esac ++ ;; ++ath11k-macs) ++ case "$board" in ++ edgecore,eap101|\ ++ edgecore,eap102|\ ++ edgecore,eap106|\ ++ cig,wf188n) ++ ath11k_generate_macs ++ ;; ++ esac ++ ;; ++*) ++ exit 1 ++ ;; ++esac +diff --git a/target/linux/ipq807x/base-files/etc/init.d/aq_phy b/target/linux/ipq807x/base-files/etc/init.d/aq_phy +new file mode 100755 +index 0000000000..41a52ccc2d +--- /dev/null ++++ b/target/linux/ipq807x/base-files/etc/init.d/aq_phy +@@ -0,0 +1,15 @@ ++#!/bin/sh /etc/rc.common ++ ++START=30 ++ ++boot() { ++ . /lib/functions.sh ++ ++ case "$(board_name)" in ++ cig,wf194c) ++ aq-fw-download /lib/firmware/AQR-G4_v5.4.B-AQR_CIG_WIFI_ID44715_VER1673.cld miireg 0 > /dev/null ++ sleep 1 ++ ssdk_sh debug phy set 0 0x4004c441 0x8 ++ ;; ++ esac ++} +diff --git a/target/linux/ipq807x/base-files/etc/init.d/bootcount b/target/linux/ipq807x/base-files/etc/init.d/bootcount +new file mode 100755 +index 0000000000..a24f27353e +--- /dev/null ++++ b/target/linux/ipq807x/base-files/etc/init.d/bootcount +@@ -0,0 +1,12 @@ ++#!/bin/sh /etc/rc.common ++ ++START=99 ++ ++boot() { ++ case "$(board_name)" in ++ edgecore,eap101|\ ++ edgecore,eap102) ++ fw_setenv bootcount 0 ++ ;; ++ esac ++} +diff --git a/target/linux/ipq807x/base-files/etc/init.d/wdt b/target/linux/ipq807x/base-files/etc/init.d/wdt +new file mode 100755 +index 0000000000..75de36a347 +--- /dev/null ++++ b/target/linux/ipq807x/base-files/etc/init.d/wdt +@@ -0,0 +1,14 @@ ++#!/bin/sh /etc/rc.common ++ ++START=10 ++ ++boot() { ++ . /lib/functions.sh ++ ++ case "$(board_name)" in ++ cig,wf188|\ ++ cig,wf188n) ++ watchdog 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+z@Kjx%J1DzLh_}t8mn$MWK{kfHIw|_L} +b4F2C~4_;jUw%c04m4Mu7{r~pwLDT;MxmF=) + +literal 0 +HcmV?d00001 + +diff --git a/target/linux/ipq807x/base-files/lib/upgrade/platform.sh b/target/linux/ipq807x/base-files/lib/upgrade/platform.sh +new file mode 100755 +index 0000000000..4943b6c406 +--- /dev/null ++++ b/target/linux/ipq807x/base-files/lib/upgrade/platform.sh +@@ -0,0 +1,66 @@ ++. /lib/functions/system.sh ++ ++qca_do_upgrade() { ++ local tar_file="$1" ++ ++ local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$') ++ board_dir=${board_dir%/} ++ local dev=$(find_mtd_chardev "0:HLOS") ++ ++ tar Oxf $tar_file ${board_dir}/kernel | mtd write - ${dev} ++ ++ if [ -n "$UPGRADE_BACKUP" ]; then ++ tar Oxf $tar_file ${board_dir}/root | mtd -j "$UPGRADE_BACKUP" write - rootfs ++ else ++ tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs ++ fi ++} ++ ++platform_check_image() { ++ local magic_long="$(get_magic_long "$1")" ++ board=$(board_name) ++ case $board in ++ cig,wf188|\ ++ cig,wf188n|\ ++ cig,wf194c|\ ++ edgecore,eap101|\ ++ edgecore,eap102|\ ++ edgecore,eap106|\ ++ tplink,ex227|\ ++ tplink,ex447|\ ++ qcom,ipq6018-cp01|\ ++ qcom,ipq807x-hk01|\ ++ qcom,ipq807x-hk14) ++ [ "$magic_long" = "73797375" ] && return 0 ++ ;; ++ esac ++ return 1 ++} ++ ++platform_do_upgrade() { ++ CI_UBIPART="rootfs" ++ CI_ROOTPART="ubi_rootfs" ++ CI_IPQ807X=1 ++ ++ board=$(board_name) ++ case $board in ++ cig,wf188) ++ qca_do_upgrade $1 ++ ;; ++ cig,wf188n|\ ++ cig,wf194c|\ ++ qcom,ipq6018-cp01|\ ++ qcom,ipq807x-hk01|\ ++ qcom,ipq807x-hk14|\ ++ tplink,ex447|\ ++ tplink,ex227) ++ nand_upgrade_tar "$1" ++ ;; ++ edgecore,eap106|\ ++ edgecore,eap102|\ ++ edgecore,eap101) ++ CI_UBIPART="rootfs1" ++ nand_upgrade_tar "$1" ++ ;; ++ esac ++} +diff --git a/target/linux/ipq807x/config-4.4 b/target/linux/ipq807x/config-4.4 +new file mode 100644 +index 0000000000..1b4b95b968 +--- /dev/null ++++ b/target/linux/ipq807x/config-4.4 +@@ -0,0 +1,828 @@ ++# CONFIG_AHCI_IPQ is not set ++CONFIG_ALIGNMENT_TRAP=y ++# CONFIG_ALLOW_DEV_COREDUMP is not set ++# CONFIG_AMBA_PL08X is not set ++# CONFIG_APM_EMULATION is not set ++# CONFIG_APQ_GCC_8084 is not set ++# CONFIG_APQ_MMCC_8084 is not set ++# CONFIG_AR8216_PHY is not set ++CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y ++CONFIG_ARCH_HAS_ELF_RANDOMIZE=y ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_ARCH_HAS_SG_CHAIN=y ++CONFIG_ARCH_HAS_TICK_BROADCAST=y ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++# CONFIG_ARCH_IPQ40XX is not set ++# CONFIG_ARCH_IPQ806x is not set ++# CONFIG_ARCH_IPQ807x is not set ++# CONFIG_ARCH_IPQ6018 is not set ++# CONFIG_ARCH_IPQ5018 is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_ARCH_MSM8960 is not set ++# CONFIG_ARCH_MSM8974 is not set ++CONFIG_ARCH_MSM8X60=y ++CONFIG_ARCH_MULTIPLATFORM=y ++# CONFIG_ARCH_MULTI_CPU_AUTO is not set ++CONFIG_ARCH_MULTI_V6_V7=y ++CONFIG_ARCH_MULTI_V7=y ++CONFIG_ARCH_NR_GPIO=0 ++CONFIG_ARCH_QCOM=y ++CONFIG_QSEECOM=m ++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set ++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set ++CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y ++CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y ++CONFIG_ARCH_SUPPORTS_UPROBES=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_ARCH_USE_BUILTIN_BSWAP=y ++CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y ++CONFIG_ARCH_WANT_GENERAL_HUGETLB=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y ++CONFIG_ARM=y ++CONFIG_ARM_AMBA=y ++CONFIG_ARM_ARCH_TIMER=y ++CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y ++# CONFIG_ARM_ATAG_DTB_COMPAT is not set ++CONFIG_ARM_CCI=y ++CONFIG_ARM_CCI400_COMMON=y ++CONFIG_ARM_CCI400_PMU=y ++CONFIG_ARM_CCI_PMU=y ++CONFIG_ARM_CPU_SUSPEND=y ++CONFIG_ARM_GIC=y ++CONFIG_ARM_HAS_SG_CHAIN=y ++# CONFIG_ARM_HIGHBANK_CPUIDLE is not set ++CONFIG_ARM_CPUIDLE=y ++CONFIG_ARM_L1_CACHE_SHIFT=6 ++CONFIG_ARM_L1_CACHE_SHIFT_6=y ++# CONFIG_ARM_LPAE is not set ++CONFIG_ARM_MODULE_PLTS=y ++CONFIG_ARM_PATCH_PHYS_VIRT=y ++CONFIG_ARM_PMU=y ++CONFIG_ARM_PSCI=y ++CONFIG_ARM_PSCI_FW=y ++CONFIG_ARM_QCOM_CPUFREQ=y ++# CONFIG_ARM_SMMU is not set ++# CONFIG_ARM_SP805_WATCHDOG is not set ++CONFIG_ARM_THUMB=y ++# CONFIG_ARM_THUMBEE is not set ++CONFIG_ARM_UNWIND=y ++CONFIG_ARM_VIRT_EXT=y ++CONFIG_AT803X_PHY=y ++# CONFIG_ATA is not set ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_NVME=y ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=4096 ++# CONFIG_VIRTIO_BLK is not set ++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set ++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 ++CONFIG_BOUNCE=y ++CONFIG_BUILD_BIN2C=y ++# CONFIG_CNSS_QCN9000 is not set ++# CONFIG_CNSS2 is not set ++# CONFIG_CNSS2_GENL is not set ++# CONFIG_CNSS2_DEBUG is not set ++# CONFIG_CNSS2_PM is not set ++# CONFIG_CNSS2_PCI_DRIVER is not set ++# CONFIG_CNSS2_CALIBRATION_SUPPORT is not set ++# CONFIG_CNSS2_SMMU is not set ++# CONFIG_CNSS2_RAMDUMP is not set ++# CONFIG_CACHE_L2X0 is not set ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_CC_STACKPROTECTOR=y ++# CONFIG_CC_STACKPROTECTOR_NONE is not set ++CONFIG_CC_STACKPROTECTOR_REGULAR=y ++# CONFIG_CHARGER_QCOM_SMBB is not set ++CONFIG_CLEANCACHE=y ++CONFIG_CLKDEV_LOOKUP=y ++CONFIG_CLKSRC_OF=y ++CONFIG_CLKSRC_PROBE=y ++CONFIG_CLKSRC_QCOM=y ++CONFIG_CLONE_BACKWARDS=y ++CONFIG_COMMON_CLK=y ++CONFIG_COMMON_CLK_QCOM=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_COREDUMP=y ++# CONFIG_CORESIGHT is not set ++# CONFIG_CORESIGHT_CSR is not set ++# CONFIG_CORESIGHT_CTI is not set ++# NFIG_CORESIGHT_EVENT is not set ++# CONFIG_CORESIGHT_HWEVENT is not set ++# CONFIG_CORESIGHT_LINKS_AND_SINKS is not set ++# CONFIG_CORESIGHT_LINK_AND_SINK_TMC is not set ++# CONFIG_CORESIGHT_QCOM_REPLICATOR is not set ++# CONFIG_CORESIGHT_QPDI is not set ++# CONFIG_CORESIGHT_SINK_ETBV10 is not set ++# CONFIG_CORESIGHT_SINK_TPIU is not set ++# CONFIG_CORESIGHT_SOURCE_DUMMY is not set ++# CONFIG_CORESIGHT_SOURCE_ETM3X is not set ++# CONFIG_CORESIGHT_SOURCE_ETM4X is not set ++# CONFIG_CORESIGHT_REMOTE_ETM is not set ++# CONFIG_CORESIGHT_STM is not set ++# CONFIG_CORESIGHT_TPDA is not set ++# CONFIG_CORESIGHT_TPDM is not set ++# CONFIG_CORESIGHT_TPDM_DEFAULT_ENABLE is not set ++# CONFIG_CORESIGHT_STREAM is not set ++CONFIG_CPUFREQ_DT=y ++CONFIG_CPUFREQ_DT_PLATDEV=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v7=y ++CONFIG_CPU_ABRT_EV7=y ++# CONFIG_CPU_BIG_ENDIAN is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++CONFIG_CPU_CACHE_V7=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++# CONFIG_CPU_SW_DOMAIN_PAN is not set ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y ++CONFIG_CPU_FREQ_GOV_COMMON=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++CONFIG_CPU_FREQ_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_HAS_ASID=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++CONFIG_CPU_IDLE=y ++CONFIG_CPU_IDLE_GOV_LADDER=y ++CONFIG_CPU_IDLE_GOV_MENU=y ++CONFIG_CPU_PABRT_V7=y ++CONFIG_CPU_PM=y ++CONFIG_CPU_RMAP=y ++# CONFIG_CPU_THERMAL is not set ++CONFIG_CPU_TLB_V7=y ++CONFIG_CPU_V7=y ++CONFIG_CRC16=y ++# CONFIG_CRC32_SARWATE is not set ++CONFIG_CRC32_SLICEBY8=y ++CONFIG_CROSS_MEMORY_ATTACH=y ++# CONFIG_CRYPTO_DEV_QCOM_MSM_QCE is not set ++# CONFIG_CRYPTO_DEV_OTA_CRYPTO is not set ++# CONFIG_FIPS_ENABLE is not set ++CONFIG_CRYPTO_AEAD=y ++CONFIG_CRYPTO_AEAD2=y ++CONFIG_CRYPTO_BLKCIPHER=y ++CONFIG_CRYPTO_BLKCIPHER2=y ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_CCM=y ++CONFIG_CRYPTO_CRC32C=y ++CONFIG_CRYPTO_CTR=y ++CONFIG_CRYPTO_DEFLATE=y ++CONFIG_CRYPTO_CMAC=y ++# CONFIG_CRYPTO_DEV_QCOM_ICE is not set ++CONFIG_CRYPTO_ECHAINIV=y ++CONFIG_CRYPTO_ECB=y ++CONFIG_CRYPTO_HASH2=y ++CONFIG_CRYPTO_HASH_INFO=y ++CONFIG_CRYPTO_HW=y ++CONFIG_CRYPTO_LZO=y ++CONFIG_CRYPTO_MANAGER=y ++CONFIG_CRYPTO_MANAGER2=y ++CONFIG_CRYPTO_NULL=y ++CONFIG_CRYPTO_RNG=y ++CONFIG_CRYPTO_RNG2=y ++CONFIG_CRYPTO_SEQIV=y ++CONFIG_CRYPTO_SHA256=y ++CONFIG_CRYPTO_WORKQUEUE=y ++CONFIG_CRYPTO_XZ=y ++CONFIG_CRYPTO_ARC4=y ++CONFIG_CRYPTO_GCM=y ++CONFIG_DCACHE_WORD_ACCESS=y ++CONFIG_DEBUG_BUGVERBOSE=y ++CONFIG_DEBUG_GPIO=y ++# CONFIG_DEBUG_INFO_REDUCED is not set ++CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" ++# CONFIG_DEBUG_MEM_USAGE is not set ++# CONFIG_DEBUG_UART_8250 is not set ++# CONFIG_DEBUG_USER is not set ++CONFIG_DECOMPRESS_GZIP=y ++CONFIG_DEVMEM=y ++# CONFIG_DIAG_OVER_USB is not set ++CONFIG_DMADEVICES=y ++CONFIG_DMA_ENGINE=y ++CONFIG_DMA_OF=y ++CONFIG_DMA_VIRTUAL_CHANNELS=y ++CONFIG_DTC=y ++# CONFIG_DWMAC_GENERIC is not set ++# CONFIG_DWMAC_IPQ806X is not set ++# CONFIG_DWMAC_SUNXI is not set ++# CONFIG_DW_DMAC_PCI is not set ++# CONFIG_VHOST_NET is not set ++# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set ++CONFIG_DYNAMIC_DEBUG=y ++CONFIG_ETHERNET_PACKET_MANGLE=y ++CONFIG_EXT4_FS=y ++# CONFIG_EXT4_USE_FOR_EXT2 is not set ++CONFIG_FB=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++CONFIG_FB_CMDLINE=y ++CONFIG_FB_QCOM_QPIC=y ++CONFIG_FB_QCOM_QPIC_ER_SSD1963_PANEL=y ++CONFIG_FB_SYS_FOPS=y ++CONFIG_FIXED_PHY=y ++CONFIG_FIX_EARLYCON_MEM=y ++CONFIG_FS_MBCACHE=y ++CONFIG_GENERIC_ALLOCATOR=y ++CONFIG_GENERIC_BUG=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y ++# CONFIG_GENERIC_CPUFREQ_KRAIT is not set ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_GENERIC_IO=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_IRQ_SHOW_LEVEL=y ++CONFIG_GENERIC_MSI_IRQ=y ++CONFIG_GENERIC_PCI_IOMAP=y ++CONFIG_GENERIC_PHY=y ++CONFIG_GENERIC_PINCONF=y ++CONFIG_GENERIC_SCHED_CLOCK=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_TIME_VSYSCALL=y ++CONFIG_GPIOLIB=y ++CONFIG_GPIOLIB_IRQCHIP=y ++CONFIG_GPIO_DEVRES=y ++# CONFIG_GPIO_LATCH is not set ++# CONFIG_GPIO_NXP_74HC153 is not set ++CONFIG_GPIO_SYSFS=y ++CONFIG_HANDLE_DOMAIN_IRQ=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_HAS_DMA=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT_MAP=y ++# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set ++CONFIG_HAVE_ARCH_AUDITSYSCALL=y ++CONFIG_HAVE_ARCH_BITREVERSE=y ++CONFIG_HAVE_ARCH_JUMP_LABEL=y ++CONFIG_HAVE_ARCH_KGDB=y ++CONFIG_HAVE_ARCH_PFN_VALID=y ++CONFIG_HAVE_ARCH_SECCOMP_FILTER=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_ARM_ARCH_TIMER=y ++# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set ++CONFIG_HAVE_BPF_JIT=y ++CONFIG_HAVE_CC_STACKPROTECTOR=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_CLK_PREPARE=y ++CONFIG_HAVE_CONTEXT_TRACKING=y ++CONFIG_HAVE_C_RECORDMCOUNT=y ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++CONFIG_HAVE_DMA_API_DEBUG=y ++CONFIG_HAVE_DMA_ATTRS=y ++CONFIG_HAVE_DMA_CONTIGUOUS=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++# CONFIG_SRD_TRACE is not set ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_HAVE_HW_BREAKPOINT=y ++CONFIG_HAVE_IDE=y ++CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_LZ4=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_HAVE_KERNEL_XZ=y ++# CONFIG_HAVE_KPROBES is not set ++# CONFIG_HAVE_KRETPROBES is not set ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_HAVE_MOD_ARCH_SPECIFIC=y ++CONFIG_HAVE_NET_DSA=y ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_HAVE_OPTPROBES is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_HAVE_PERF_REGS=y ++CONFIG_HAVE_PERF_USER_STACK_DUMP=y ++CONFIG_HAVE_PROC_CPU=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_SMP=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_HAVE_UID16=y ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_HIGHMEM=y ++CONFIG_HIGHPTE=y ++CONFIG_HOTPLUG_CPU=y ++CONFIG_HWMON=y ++CONFIG_HWSPINLOCK=y ++CONFIG_HWSPINLOCK_QCOM=y ++CONFIG_HW_RANDOM=y ++CONFIG_HW_RANDOM_MSM=y ++CONFIG_HZ_FIXED=0 ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_HELPER_AUTO=y ++CONFIG_I2C_QUP=y ++# CONFIG_IIO is not set ++# CONFIG_IIO_BUFFER is not set ++# CONFIG_IIO_TRIGGER is not set ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_INITRAMFS_SOURCE="" ++# CONFIG_INPUT_PM8941_PWRKEY is not set ++CONFIG_IOMMU_HELPER=y ++# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set ++# CONFIG_IPQ_DWC3_QTI_EXTCON is not set ++# CONFIG_IPQ_GCC_4019 is not set ++# CONFIG_IPQ_GCC_5018 is not set ++# CONFIG_IPQ_APSS_5018 is not set ++# CONFIG_IPQ_GCC_6018 is not set ++# CONFIG_IPQ_APSS_6018 is not set ++# CONFIG_IPQ_GCC_806X is not set ++# CONFIG_IPQ_ADSS_807x is not set ++# CONFIG_IPQ_APSS_807x is not set ++# CONFIG_IPQ_GCC_807x is not set ++# CONFIG_IPQ_ADCC_4019 is not set ++# CONFIG_IPQ_LCC_806X is not set ++# CONFIG_IPQ_REMOTEPROC_ADSP is not set ++# CONFIG_IPQ_SUBSYSTEM_RESTART is not set ++# CONFIG_IPQ_SUBSYSTEM_RESTART_TEST is not set ++CONFIG_IRQCHIP=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_DOMAIN_HIERARCHY=y ++CONFIG_IRQ_FORCED_THREADING=y ++CONFIG_IRQ_WORK=y ++CONFIG_JBD2=y ++# CONFIG_IPC_ROUTER is not set ++# CONFIG_IPC_ROUTER_SECURITY is not set ++# CONFIG_IPC_LOGGING is not set ++CONFIG_KPSS_XCC=y ++# CONFIG_KRAITCC is not set ++# CONFIG_KRAIT_CLOCKS is not set ++# CONFIG_KRAIT_L2_ACCESSORS is not set ++CONFIG_LEDS_IPQ=y ++CONFIG_LEDS_TLC591XX=y ++# CONFIG_LEDS_PCA9956B is not set ++CONFIG_LIBFDT=y ++CONFIG_LOCKUP_DETECTOR=y ++CONFIG_LOCK_SPIN_ON_OWNER=y ++CONFIG_LZO_COMPRESS=y ++CONFIG_LZO_DECOMPRESS=y ++CONFIG_MDIO=y ++CONFIG_MDIO_BITBANG=y ++CONFIG_MDIO_BOARDINFO=y ++CONFIG_MDIO_GPIO=y ++# CONFIG_MDIO_QCA is not set ++CONFIG_MFD_QCOM_RPM=y ++CONFIG_MFD_SPMI_PMIC=y ++# CONFIG_SLIMBUS is not set ++# CONFIG_SLIMBUS_MSM_CTRL is not set ++# CONFIG_SLIMBUS_MSM_NGD is not set ++# CONFIG_OF_SLIMBUS is not set ++CONFIG_MFD_SYSCON=y ++CONFIG_MIGHT_HAVE_CACHE_L2X0=y ++CONFIG_MIGHT_HAVE_PCI=y ++CONFIG_MMC=y ++CONFIG_MMC_ARMMMCI=y ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_MINORS=32 ++CONFIG_MMC_QCOM_DML=y ++CONFIG_MMC_QCOM_TUNING=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_MSM=y ++# CONFIG_MMC_SDHCI_OF_ARASAN is not set ++# CONFIG_MMC_SDHCI_PCI is not set ++CONFIG_MMC_SDHCI_PLTFM=y ++# CONFIG_MMC_TIFM_SD is not set ++CONFIG_MODULES_TREE_LOOKUP=y ++CONFIG_MODULES_USE_ELF_REL=y ++# CONFIG_MPLS_ROUTING is not set ++# CONFIG_MSM_GCC_8660 is not set ++# CONFIG_MSM_GCC_8916 is not set ++# CONFIG_MSM_GCC_8960 is not set ++# CONFIG_MSM_GCC_8974 is not set ++# CONFIG_MSM_LCC_8960 is not set ++# CONFIG_MSM_MMCC_8960 is not set ++# CONFIG_MSM_MMCC_8974 is not set ++# CONFIG_MSM_MHI is not set ++# CONFIG_MSM_IPC_ROUTER_MHI_XPRT is not set ++# CONFIG_MSM_MHI_DEBUG is not set ++# CONFIG_MSM_MHI_DEV is not set ++# CONFIG_MSM_MHI_UCI is not set ++# CONFIG_DIAGFWD_BRIDGE_CODE is not set ++# CONFIG_MSM_BUS_SCALING is not set ++# CONFIG_BUS_TOPOLOGY_ADHOC is not set ++# CONFIG_QPNP_REVID is not set ++# CONFIG_SPS is not set ++# CONFIG_SPS_SUPPORT_NDP_BAM is not set ++# CONFIG_USB_BAM is not set ++# CONFIG_SPS_SUPPORT_BAMDMA is not set ++# CONFIG_IPA is not set ++# CONFIG_IPA3 is not set ++# CONFIG_EP_PCIE is not set ++# CONFIG_GSI is not set ++# CONFIG_PFT is not set ++# CONFIG_SEEMP_CORE is not set ++# CONFIG_GPIO_USB_DETECT is not set ++# CONFIG_MSM_GLINK is not set ++# CONFIG_MSM_GLINK_LOOPBACK_SERVER is not set ++# CONFIG_MSM_GLINK_SMEM_NATIVE_XPRT is not set ++# CONFIG_MSM_GLINK_PKT is not set ++# CONFIG_MSM_IPC_ROUTER_GLINK_XPRT is not set ++# CONFIG_MSM_QMI_INTERFACE is not set ++# CONFIG_MSM_TEST_QMI_CLIENT is not set ++# CONFIG_GLINK_DEBUG_FS is not set ++# CONFIG_MSM_RPM_SMD is not set ++# CONFIG_MSM_RPM_GLINK is not set ++CONFIG_MSM_RPM_LOG=y ++# CONFIG_MSM_SMEM is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++CONFIG_MTD_M25P80=y ++CONFIG_MTD_NAND=y ++CONFIG_MTD_NAND_ECC=y ++CONFIG_MTD_NAND_QCOM=y ++CONFIG_MTD_QCOM_SMEM_PARTS=y ++CONFIG_MTD_SPINAND_GIGADEVICE=y ++CONFIG_MTD_SPINAND_MT29F=y ++CONFIG_MTD_SPINAND_ONDIEECC=y ++CONFIG_MTD_SPI_NOR=y ++CONFIG_MTD_SPLIT_FIRMWARE=y ++CONFIG_MTD_SPLIT_FIT_FW=y ++CONFIG_MTD_UBI=y ++CONFIG_MTD_UBI_BEB_LIMIT=20 ++CONFIG_MTD_UBI_BLOCK=y ++# CONFIG_MTD_UBI_FASTMAP is not set ++CONFIG_MTD_UBI_GLUEBI=y ++CONFIG_MTD_UBI_WL_THRESHOLD=4096 ++CONFIG_MULTI_IRQ_HANDLER=y ++CONFIG_MUTEX_SPIN_ON_OWNER=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_NEON=y ++CONFIG_NET=y ++# CONFIG_NET_DSA_MV88E6063 is not set ++CONFIG_NET_FLOW_LIMIT=y ++CONFIG_NET_PTP_CLASSIFY=y ++CONFIG_NO_BOOTMEM=y ++CONFIG_NO_HZ=y ++CONFIG_NO_HZ_COMMON=y ++CONFIG_NO_HZ_IDLE=y ++CONFIG_NR_CPUS=4 ++CONFIG_NUM_ALT_PARTITION=8 ++CONFIG_NVMEM=y ++CONFIG_OF=y ++CONFIG_OF_ADDRESS=y ++CONFIG_OF_ADDRESS_PCI=y ++CONFIG_OF_EARLY_FLATTREE=y ++CONFIG_OF_FLATTREE=y ++CONFIG_OF_GPIO=y ++CONFIG_OF_IRQ=y ++CONFIG_OF_MDIO=y ++CONFIG_OF_MTD=y ++CONFIG_OF_NET=y ++CONFIG_OF_PCI=y ++CONFIG_OF_PCI_IRQ=y ++CONFIG_OF_RESERVED_MEM=y ++CONFIG_OLD_SIGACTION=y ++CONFIG_OLD_SIGSUSPEND3=y ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_PANIC_ON_OOPS=y ++CONFIG_PANIC_ON_OOPS_VALUE=1 ++CONFIG_PANIC_TIMEOUT=5 ++CONFIG_PCI=y ++# CONFIG_PCIEAER is not set ++CONFIG_PCIE_DW=y ++# CONFIG_PCIE_DW_PLAT is not set ++CONFIG_PCIE_PME=y ++CONFIG_PCIE_QCOM=y ++CONFIG_PCI_DOMAINS=y ++CONFIG_PCI_DOMAINS_GENERIC=y ++CONFIG_PCI_MSI=y ++CONFIG_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++CONFIG_PGTABLE_LEVELS=2 ++CONFIG_PHYLIB=y ++# CONFIG_PHY_IPQ_BALDUR_USB is not set ++# CONFIG_PHY_IPQ_UNIPHY_USB is not set ++# CONFIG_PHY_QCOM_APQ8064_SATA is not set ++# CONFIG_PHY_QCOM_IPQ806X_SATA is not set ++CONFIG_PHY_QCA_PCIE_QMP=y ++# CONFIG_PHY_QCOM_UFS is not set ++# CONFIG_PHY_IPQ_UNIPHY_PCIE is not set ++CONFIG_PINCTRL=y ++# CONFIG_PINCTRL_APQ8064 is not set ++# CONFIG_PINCTRL_APQ8084 is not set ++# CONFIG_PINCTRL_IPQ4019 is not set ++# CONFIG_PINCTRL_IPQ6018 is not set ++# CONFIG_PINCTRL_IPQ8064 is not set ++# CONFIG_PINCTRL_IPQ807x is not set ++# CONFIG_PINCTRL_IPQ5018 is not set ++CONFIG_PINCTRL_MSM=y ++# CONFIG_PINCTRL_MSM8660 is not set ++# CONFIG_PINCTRL_MSM8916 is not set ++# CONFIG_PINCTRL_MSM8960 is not set ++CONFIG_PINCTRL_QCOM_SPMI_PMIC=y ++# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set ++# CONFIG_PL330_DMA is not set ++CONFIG_PM=y ++CONFIG_PM_CLK=y ++# CONFIG_PM_DEBUG is not set ++CONFIG_PM_GENERIC_DOMAINS=y ++CONFIG_PM_GENERIC_DOMAINS_OF=y ++CONFIG_PM_GENERIC_DOMAINS_SLEEP=y ++CONFIG_PM_OPP=y ++CONFIG_PM_SLEEP=y ++CONFIG_PM_SLEEP_SMP=y ++CONFIG_POWER_RESET=y ++CONFIG_POWER_RESET_MSM=y ++CONFIG_POWER_SUPPLY=y ++CONFIG_PREEMPT=y ++CONFIG_PREEMPT_COUNT=y ++# CONFIG_PREEMPT_NONE is not set ++CONFIG_PREEMPT_RCU=y ++CONFIG_PRINTK_TIME=y ++CONFIG_PROC_PAGE_MONITOR=y ++# CONFIG_PROC_STRIPPED is not set ++CONFIG_PSTORE=y ++CONFIG_PSTORE_RAM=y ++# CONFIG_PSTORE_CONSOLE is not set ++# CONFIG_PSTORE_PMSG is not set ++CONFIG_PWM=y ++# CONFIG_PWM_IPQ4019 is not set ++# CONFIG_PWM_PCA9685 is not set ++CONFIG_PWM_SYSFS=y ++CONFIG_QCOM_ADM=y ++# CONFIG_QCOM_APM is not set ++CONFIG_QCOM_BAM_DMA=y ++# CONFIG_QTI_BT_TTY is not set ++# CONFIG_QCOM_COINCELL is not set ++# CONFIG_QCOM_DCC is not set ++CONFIG_QCOM_GDSC=y ++CONFIG_QCOM_GSBI=y ++# CONFIG_QCOM_HFPLL is not set ++# CONFIG_QCOM_MEMORY_DUMP_V2 is not set ++# CONFIG_QCOM_MDT_LOADER is not set ++CONFIG_QCOM_QFPROM=y ++# CONFIG_QCOM_SPMI_TEMP_ALARM is not set ++CONFIG_QCOM_RPM_CLK=y ++# CONFIG_QCOM_RTB is not set ++# CONFIG_QCOM_PM is not set ++CONFIG_QCOM_SCM=y ++CONFIG_QCOM_SCM_32=y ++# CONFIG_HAVE_ARM_SMCCC is not set ++CONFIG_QCA_SCM_RESTART_REASON=y ++CONFIG_IPQ_TCSR=y ++CONFIG_QCOM_QFPROM=y ++# CONFIG_QCOM_SMD is not set ++CONFIG_QCOM_SMEM=y ++CONFIG_QCOM_SMEM_STATE=y ++# CONFIG_QCOM_SMD is not set ++CONFIG_QCOM_SMP2P=y ++# CONFIG_QCOM_SPMI_VADC is not set ++CONFIG_QCOM_TSENS=y ++CONFIG_QCOM_TZ_LOG=y ++CONFIG_QCOM_WDT=y ++CONFIG_QMI_ENCDEC=y ++CONFIG_RATIONAL=y ++# CONFIG_RCU_BOOST is not set ++CONFIG_RCU_CPU_STALL_TIMEOUT=21 ++# CONFIG_RCU_EXPERT is not set ++CONFIG_RCU_STALL_COMMON=y ++CONFIG_RD_GZIP=y ++CONFIG_REGMAP=y ++# CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS is not set ++CONFIG_REGMAP_MMIO=y ++CONFIG_REGULATOR=y ++# CONFIG_REGULATOR_CPR3 is not set ++CONFIG_REGULATOR_GPIO=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=y ++CONFIG_REGULATOR_QCOM_RPM=y ++CONFIG_REGULATOR_QCOM_SPMI=y ++# CONFIG_REGULATOR_IPQ40XX is not set ++# CONFIG_REGULATOR_RPM_SMD is not set ++# CONFIG_REGULATOR_RPM_GLINK is not set ++CONFIG_RELAY=y ++CONFIG_REMOTEPROC=y ++# CONFIG_IPQ807X_REMOTEPROC is not set ++CONFIG_RESET_CONTROLLER=y ++CONFIG_RFS_ACCEL=y ++CONFIG_RPS=y ++CONFIG_RTC_CLASS=y ++CONFIG_NET_L3_MASTER_DEV=y ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_PM8XXX is not set ++CONFIG_RWSEM_SPIN_ON_OWNER=y ++CONFIG_RWSEM_XCHGADD_ALGORITHM=y ++# CONFIG_SATA_AHCI is not set ++CONFIG_SCHED_HRTICK=y ++# CONFIG_SCSI is not set ++# CONFIG_SCHED_INFO is not set ++# CONFIG_SCSI_DMA is not set ++# CONFIG_SERIAL_8250 is not set ++# CONFIG_SERIAL_8250_CONSOLE is not set ++# CONFIG_SERIAL_8250_DMA is not set ++# CONFIG_SERIAL_AMBA_PL010 is not set ++# CONFIG_SERIAL_AMBA_PL011 is not set ++CONFIG_SERIAL_MSM=y ++CONFIG_SERIAL_MSM_CONSOLE=y ++# CONFIG_VIRTIO_CONSOLE is not set ++CONFIG_SMP=y ++CONFIG_SMP_ON_UP=y ++# CONFIG_SND is not set ++CONFIG_SND_DYNAMIC_MINORS=y ++CONFIG_SND_MAX_CARDS=32 ++CONFIG_SND_PROC_FS=y ++# CONFIG_SND_COMPRESS_OFFLOAD is not set ++CONFIG_SND_PCM=y ++CONFIG_SND_SOC=y ++# CONFIG_SND_SOC_APQ8016_SBC is not set ++CONFIG_SND_SOC_I2C_AND_SPI=y ++CONFIG_SND_SOC_IPQ=y ++# CONFIG_SND_SOC_IPQ806X_LPAIF is not set ++# CONFIG_SND_SOC_IPQ806X_PCM_RAW is not set ++CONFIG_SND_SOC_IPQ_ADSS=y ++CONFIG_SND_SOC_IPQ_CODEC=y ++CONFIG_SND_SOC_IPQ_CPU_DAI=y ++CONFIG_SND_SOC_IPQ_MBOX=y ++CONFIG_SND_SOC_IPQ_PCM_I2S=y ++CONFIG_SND_SOC_IPQ_PCM_RAW=y ++CONFIG_SND_SOC_IPQ_PCM_SPDIF=y ++CONFIG_SND_SOC_IPQ_PCM_TDM=y ++CONFIG_SND_SOC_IPQ_STEREO=y ++CONFIG_SND_SOC_QCOM=y ++# CONFIG_SND_SOC_STORM is not set ++CONFIG_SOUND=y ++CONFIG_SPARSE_IRQ=y ++CONFIG_SPI=y ++CONFIG_SPI_MASTER=y ++CONFIG_SPI_QUP=y ++CONFIG_SPI_SPIDEV=y ++# CONFIG_SPI_VSC7385 is not set ++CONFIG_SPMI=y ++CONFIG_SPMI_MSM_PMIC_ARB=y ++CONFIG_SRCU=y ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_STOPWATCH is not set ++CONFIG_SUSPEND=y ++CONFIG_SWCONFIG=y ++CONFIG_SWIOTLB=y ++# CONFIG_SWAP is not set ++CONFIG_SWP_EMULATE=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_THERMAL=y ++CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y ++CONFIG_THERMAL_GOV_STEP_WISE=y ++CONFIG_THERMAL_GOV_USER_SPACE=y ++CONFIG_THERMAL_HWMON=y ++CONFIG_THERMAL_OF=y ++CONFIG_THERMAL_WRITABLE_TRIPS=y ++# CONFIG_THUMB2_KERNEL is not set ++# CONFIG_TICK_CPU_ACCOUNTING is not set ++CONFIG_IRQ_TIME_ACCOUNTING=y ++CONFIG_TRACING_EVENTS_GPIO=y ++CONFIG_UBIFS_FS=y ++CONFIG_UBIFS_FS_ADVANCED_COMPR=y ++CONFIG_UBIFS_FS_LZO=y ++CONFIG_UBIFS_FS_XZ=y ++CONFIG_UBIFS_FS_ZLIB=y ++CONFIG_UEVENT_HELPER_PATH="" ++CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" ++CONFIG_UNINLINE_SPIN_UNLOCK=y ++CONFIG_USB_GADGET=n ++CONFIG_USB_SUPPORT=y ++# CONFIG_USB_DWC3_OF_SIMPLE is not set ++# CONFIG_USB_QCOM_8X16_PHY is not set ++# CONFIG_USB_QCOM_KS_BRIDGE is not set ++# CONFIG_USB_QCOM_QUSB_PHY is not set ++# CONFIG_USB_QCOM_QMP_PHY is not set ++# CONFIG_USB_QCA_M31_PHY is not set ++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set ++# CONFIG_USB_EHCI_TT_NEWSCHED is not set ++# CONFIG_USB_OHCI_LITTLE_ENDIAN is not set ++CONFIG_USE_OF=y ++CONFIG_VDSO=y ++CONFIG_VECTORS_BASE=0xffff0000 ++CONFIG_VFP=y ++CONFIG_VFPv3=y ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_WATCHDOG_CORE=y ++# CONFIG_WL_TI is not set ++# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set ++CONFIG_XPS=y ++CONFIG_XZ_DEC_ARM=y ++CONFIG_XZ_DEC_BCJ=y ++CONFIG_ZBOOT_ROM_BSS=0 ++CONFIG_ZBOOT_ROM_TEXT=0 ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_QCOM_CACHE_DUMP=y ++CONFIG_QCOM_CACHE_DUMP_ON_PANIC=y ++# CONFIG_QCOM_RESTART_REASON is not set ++# CONFIG_QCOM_DLOAD_MODE is not set ++CONFIG_FW_AUTH=y ++CONFIG_FW_AUTH_TEST=m ++CONFIG_ASYMMETRIC_KEY_TYPE=y ++CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y ++CONFIG_PUBLIC_KEY_ALGO_RSA=y ++CONFIG_X509_CERTIFICATE_PARSER=y ++CONFIG_PKCS7_MESSAGE_PARSER=n ++CONFIG_KEYS=y ++# CONFIG_SKB_RECYCLER is not set ++CONFIG_SKB_RECYCLER_MULTI_CPU=y ++# CONFIG_SKB_RECYCLER_PREALLOC is not set ++# CONFIG_U_SERIAL_CONSOLE is not set ++CONFIG_SCSI_SCAN_ASYNC=y ++# CONFIG_NF_IPV6_DUMMY_HEADER is not set ++# CONFIG_RMNET is not set ++# CONFIG_RMNET_DATA is not set ++# CONFIG_RMNET_CTL is not set ++# CONFIG_MSM_SECURE_BUFFER is not set ++# CONFIG_STAGING is not set ++# CONFIG_ANDROID is not set ++# CONFIG_ION is not set ++# CONFIG_ION_DUMMY is not set ++# CONFIG_ION_MSM is not set ++# CONFIG_ION_TEST is not set ++# CONFIG_CMA is not set ++# CONFIG_CMA_DEBUG is not set ++# CONFIG_CMA_DEBUGFS is not set ++# CONFIG_DMA_CMA is not set ++# CONFIG_CMA_AREAS is not set ++# CONFIG_CMA_SIZE_MBYTES is not set ++# CONFIG_CMA_SIZE_SEL_MBYTES is not set ++# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set ++# CONFIG_CMA_SIZE_SEL_MIN is not set ++# CONFIG_CMA_SIZE_SEL_MAX is not set ++# CONFIG_CMA_ALIGNMENT is not set ++# CONFIG_ASHMEM is not set ++# CONFIG_ANDROID_TIMED_OUTPUT is not set ++# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set ++# CONFIG_SYNC is not set ++# CONFIG_SW_SYNC is not set ++# CONFIG_FSL_MC_BUS is not set ++# CONFIG_ALLOC_BUFFERS_IN_4K_CHUNKS is not set ++CONFIG_ALLOC_SKB_PAGE_FRAG_DISABLE=y ++# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set ++# CONFIG_MAILBOX is not set ++# CONFIG_MAILBOX_TEST is not set ++# CONFIG_QCOM_APCS_IPC is not set ++# CONFIG_QCOM_GLINK_SSR is not set ++# CONFIG_QCOM_Q6V5_WCSS is not set ++# CONFIG_QCOM_SYSMON is not set ++# CONFIG_QRTR is not set ++# CONFIG_QRTR_SMD is not set ++# CONFIG_QRTR_TUN is not set ++# CONFIG_RPMSG is not set ++# CONFIG_RPMSG_QCOM_GLINK_RPM is not set ++# CONFIG_RPMSG_VIRTIO is not set ++# CONFIG_RPMSG_CHAR is not set ++# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set ++# CONFIG_RPMSG_QCOM_SMD is not set ++CONFIG_QCA_MINIDUMP=y ++# CONFIG_QCA_MINIDUMP_DEBUG is not set ++# CONFIG_QRTR_USB is not set ++# CONFIG_QRTR_FIFO is not set ++CONFIG_QRTR_MHI=y ++CONFIG_MHI_BUS=y ++# CONFIG_MHI_QTI is not set ++# CONFIG_MHI_NETDEV is not set ++# CONFIG_MHI_DEBUG is not set ++# CONFIG_MHI_UCI is not set ++# CONFIG_MHI_SATELLITE is not set ++# CONFIG_DIAG_OVER_QRTR is not set ++# CONFIG_MSM_ADSPRPC is not set ++CONFIG_CRYPTO_MICHAEL_MIC=y ++# CONFIG_ARCH_HAS_KCOV is not set ++# CONFIG_KCOV is not set ++# CONFIG_GCC_PLUGINS is not set ++# CONFIG_QTI_Q6V5_ADSP is not set ++# CONFIG_MSM_RPM_RPMSG is not set ++# CONFIG_RPMSG_QCOM_GLINK_RPM is not set ++# CONFIG_REGULATOR_RPM_GLINK is not set ++# CONFIG_MTD_NAND_SERIAL is not set ++# CONFIG_ARM_QTI_IPQ60XX_CPUFREQ is not set ++# CONFIG_PAGE_SCOPE_MULTI_PAGE_READ is not set ++# CONFIG_CRYPTO_NO_ZERO_LEN_HASH is not set ++# CONFIG_CRYPTO_DISABLE_AES192_TEST is not set ++# CONFIG_QTI_EUD is not set ++# CONFIG_EUD_EXTCON_SUPPORT is not set ++# CONFIG_CLK_TEST_5018 is not set ++CONFIG_MAP_E_SUPPORT=y ++# CONFIG_IPQ_FLASH_16M_PROFILE is not set ++# CONFIG_QGIC2_MSI is not set ++CONFIG_BRIDGE_VLAN_FILTERING=y ++CONFIG_LEDS_GPIO=y ++# CONFIG_ARCH_IPQ256M is not set ++CONFIG_SKB_FIXED_SIZE_2K=y ++# CONFIG_IPQ_MEM_PROFILE is not set ++# CONFIG_VIRTIO_NET is not set ++# CONFIG_QCA_85XX_SWITCH is not set ++CONFIG_AQ_PHY=y ++CONFIG_DIAG_CHAR=y ++# CONFIG_HW_RANDOM_VIRTIO is not set ++# CONFIG_BOOTCONFIG_PARTITION is not set ++# CONFIG_CRYPTO_DEV_QCEDEV is not set ++# CONFIG_CRYPTO_DEV_QCRYPTO is not set ++# CONFIG_MHI_BUS_TEST is not set +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188.dts +new file mode 100644 +index 0000000000..5f2d4fb03f +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188.dts +@@ -0,0 +1,18 @@ ++/* ++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq6018-cig-wf188.dts" ++#include "qcom-ipq6018.dtsi" +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188n.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188n.dts +new file mode 100644 +index 0000000000..ffd7899228 +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-cig-wf188n.dts +@@ -0,0 +1,18 @@ ++/* ++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq6018-cig-wf188n.dts" ++#include "qcom-ipq6018.dtsi" +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-edgecore-eap101.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-edgecore-eap101.dts +new file mode 100644 +index 0000000000..531510a764 +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-edgecore-eap101.dts +@@ -0,0 +1,18 @@ ++/* ++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq6018-edgecore-eap101.dts" ++#include "qcom-ipq6018.dtsi" +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-miwifi-ax1800.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-miwifi-ax1800.dts +new file mode 100644 +index 0000000000..5c452c5741 +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq6018-miwifi-ax1800.dts +@@ -0,0 +1,18 @@ ++/* ++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq6018-miwifi-ax1800.dts" ++#include "qcom-ipq6018.dtsi" +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap102.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap102.dts +new file mode 100644 +index 0000000000..d1d3f3755e +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap102.dts +@@ -0,0 +1,26 @@ ++/* ++ * Copyright (c) 2017, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts" ++ ++/ { ++ soc { ++ pmu { ++ compatible = "arm,cortex-a7-pmu"; ++ interrupts = ; ++ }; ++ }; ++}; +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap106.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap106.dts +new file mode 100644 +index 0000000000..1527f81a40 +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-eap106.dts +@@ -0,0 +1,26 @@ ++/* ++ * Copyright (c) 2017, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq807x-eap106.dts" ++ ++/ { ++ soc { ++ pmu { ++ compatible = "arm,cortex-a7-pmu"; ++ interrupts = ; ++ }; ++ }; ++}; +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex227.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex227.dts +new file mode 100644 +index 0000000000..f3b25e2633 +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex227.dts +@@ -0,0 +1,26 @@ ++/* ++ * Copyright (c) 2017, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq807x-ex227.dts" ++ ++/ { ++ soc { ++ pmu { ++ compatible = "arm,cortex-a7-pmu"; ++ interrupts = ; ++ }; ++ }; ++}; +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex447.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex447.dts +new file mode 100644 +index 0000000000..7cfd66ba0a +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-ex447.dts +@@ -0,0 +1,26 @@ ++/* ++ * Copyright (c) 2017, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq807x-ex447.dts" ++ ++/ { ++ soc { ++ pmu { ++ compatible = "arm,cortex-a7-pmu"; ++ interrupts = ; ++ }; ++ }; ++}; +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-sercomm-wallaby.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-sercomm-wallaby.dts +new file mode 100644 +index 0000000000..e756aa5622 +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-sercomm-wallaby.dts +@@ -0,0 +1,26 @@ ++/* ++ * Copyright (c) 2017, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq807x-sercomm-wallaby.dts" ++ ++/ { ++ soc { ++ pmu { ++ compatible = "arm,cortex-a7-pmu"; ++ interrupts = ; ++ }; ++ }; ++}; +diff --git a/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-wf194c.dts b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-wf194c.dts +new file mode 100644 +index 0000000000..4274b6c704 +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm/boot/dts/qcom-ipq807x-wf194c.dts +@@ -0,0 +1,26 @@ ++/* ++ * Copyright (c) 2017, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++#include "../../../arm64/boot/dts/qcom/qcom-ipq807x-wf194c.dts" ++ ++/ { ++ soc { ++ pmu { ++ compatible = "arm,cortex-a7-pmu"; ++ interrupts = ; ++ }; ++ }; ++}; +diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq6018-miwifi-ax1800.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq6018-miwifi-ax1800.dts +new file mode 100755 +index 0000000000..ba4a5ef3ca +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq6018-miwifi-ax1800.dts +@@ -0,0 +1,419 @@ ++/dts-v1/; ++/* ++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++ ++#define __IPQ_MEM_PROFILE_256_MB__ ++#include "qcom-ipq6018.dtsi" ++#include "qcom-ipq6018-rpm-regulator.dtsi" ++#include "qcom-ipq6018-cpr-regulator.dtsi" ++#include "qcom-ipq6018-cp-cpu.dtsi" ++#include ++/ { ++ #address-cells = <0x2>; ++ #size-cells = <0x2>; ++ model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP03-C1"; ++ compatible = "xiaomi,ax1800", "qcom,ipq6018-cp03", "qcom,ipq6018"; ++ interrupt-parent = <&intc>; ++ qcom,msm-id = <0x1A5 0x0>; ++ ++ aliases { ++ /* ++ * Aliases as required by u-boot ++ * to patch MAC addresses ++ */ ++ ethernet1 = "/soc/dp2"; ++ ethernet2 = "/soc/dp3"; ++ ethernet3 = "/soc/dp4"; ++ ethernet4 = "/soc/dp5"; ++ }; ++ ++ chosen { ++ bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; ++ bootargs-append = " swiotlb=1 coherent_pool=2M console=ttyMSM0,115200,n8"; ++ }; ++ ++ /* ++ * +=========+==============+========================+ ++ * | | | | ++ * | Region | Start Offset | Size | ++ * | | | | ++ * +--------+--------------+-------------------------+ ++ * | | | | ++ * | | | | ++ * | | | | ++ * | | | | ++ * | Linux | 0x41000000 | 139MB | ++ * | | | | ++ * | | | | ++ * | | | | ++ * +--------+--------------+-------------------------+ ++ * | TZ App | 0x49B00000 | 6MB | ++ * +--------+--------------+-------------------------+ ++ * ++ * From the available 145 MB for Linux in the first 256 MB, ++ * we are reserving 6 MB for TZAPP. ++ * ++ * Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi ++ * for memory layout. ++ */ ++ ++}; ++ ++&tlmm { ++ uart_pins: uart_pins { ++ mux { ++ pins = "gpio44", "gpio45"; ++ function = "blsp2_uart"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ }; ++ ++ spi_0_pins: spi_0_pins { ++ mux { ++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; ++ function = "blsp0_spi"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ }; ++ ++ qpic_pins: qpic_pins { ++ data_0 { ++ pins = "gpio15"; ++ function = "qpic_pad0"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ data_1 { ++ pins = "gpio12"; ++ function = "qpic_pad1"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ data_2 { ++ pins = "gpio13"; ++ function = "qpic_pad2"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ data_3 { ++ pins = "gpio14"; ++ function = "qpic_pad3"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ data_4 { ++ pins = "gpio5"; ++ function = "qpic_pad4"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ data_5 { ++ pins = "gpio6"; ++ function = "qpic_pad5"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ data_6 { ++ pins = "gpio7"; ++ function = "qpic_pad6"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ data_7 { ++ pins = "gpio8"; ++ function = "qpic_pad7"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ qpic_pad { ++ pins = "gpio1", "gpio3", "gpio4", ++ "gpio10", "gpio11", "gpio17"; ++ function = "qpic_pad"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ }; ++ ++ button_pins: button_pins { ++ wps_button { ++ pins = "gpio19"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ }; ++ ++ mdio_pins: mdio_pinmux { ++ mux_0 { ++ pins = "gpio64"; ++ function = "mdc"; ++ drive-strength = <8>; ++ bias-pull-up; ++ }; ++ mux_1 { ++ pins = "gpio65"; ++ function = "mdio"; ++ drive-strength = <8>; ++ bias-pull-up; ++ }; ++ mux_2 { ++ pins = "gpio75"; ++ function = "gpio"; ++ bias-pull-up; ++ }; ++ }; ++ ++ gpio_keys { ++ pinctrl-names = "default"; ++ compatible = "gpio-keys"; ++ pinctrl-0 = <&button_pins>; ++ ++ button@1 { ++ debounce-interval = <0x3c>; ++ label = "reset"; ++ linux,code = ; ++ linux,input-type = <0x01>; ++ gpios = <&tlmm 0x13 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ leds_pins: leds_pins { ++ led_blue { ++ pins = "gpio31"; ++ bias-pull-down; ++ function = "gpio"; ++ drive-strength = <0x08>; ++ }; ++ ++ net_blue { ++ pins = "gpio29"; ++ bias-pull-down; ++ function = "gpio"; ++ drive-strength = <0x08>; ++ }; ++ ++ net_yellow { ++ pins = "gpio30"; ++ bias-pull-down; ++ function = "gpio"; ++ drive-strength = <0x08>; ++ }; ++ ++ led_yellow { ++ pins = "gpio32"; ++ bias-pull-down; ++ function = "gpio"; ++ drive-strength = <0x08>; ++ }; ++ }; ++}; ++ ++&soc { ++ mdio@90000 { ++ pinctrl-0 = <&mdio_pins>; ++ pinctrl-names = "default"; ++ phy-reset-gpio = <&tlmm 75 0>; ++ status = "ok"; ++ ethernet-phy@0 { ++ reg = <0x00>; ++ }; ++ ++ ethernet-phy@1 { ++ reg = <0x01>; ++ }; ++ ++ ethernet-phy@4 { ++ reg = <0x04>; ++ }; ++ ++ ethernet-phy@2 { ++ reg = <0x02>; ++ }; ++ ++ ethernet-phy@3 { ++ reg = <0x03>; ++ }; ++ }; ++ ++ ess-switch@3a000000 { ++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ ++ switch_lan_bmp = <0x1e>; /* lan port bitmap */ ++ switch_wan_bmp = <0x20>; /* wan port bitmap */ ++ switch_inner_bmp = <0xc0>; /*inner port bitmap*/ ++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ ++ switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/ ++ switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ ++ qcom,port_phyinfo { ++ port@0 { ++ port_id = <0x01>; ++ phy_address = <0x00>; ++ }; ++ ++ port@4 { ++ port_id = <0x05>; ++ phy_address = <0x04>; ++ }; ++ ++ port@2 { ++ port_id = <0x03>; ++ phy_address = <0x02>; ++ }; ++ ++ port@1 { ++ port_id = <0x02>; ++ phy_address = <0x01>; ++ }; ++ ++ port@3 { ++ port_id = <0x04>; ++ phy_address = <0x03>; ++ }; ++ ++ }; ++ }; ++ ++ dp2 { ++ reg = <0x3a001200 0x200>; ++ qcom,id = <0x02>; ++ qcom,phy-mdio-addr = <0x01>; ++ qcom,link-poll = <0x01>; ++ qcom,mactype = <0x00>; ++ compatible = "qcom,nss-dp"; ++ phy-mode = "sgmii"; ++ local-mac-address = [000000000000]; ++ device_type = "network"; ++ }; ++ ++ dp3 { ++ reg = <0x3a001400 0x200>; ++ qcom,id = <0x03>; ++ qcom,phy-mdio-addr = <0x02>; ++ qcom,link-poll = <0x01>; ++ qcom,mactype = <0x00>; ++ compatible = "qcom,nss-dp"; ++ phy-mode = "sgmii"; ++ local-mac-address = [000000000000]; ++ device_type = "network"; ++ }; ++ ++ dp4 { ++ reg = <0x3a001600 0x200>; ++ qcom,id = <0x04>; ++ qcom,phy-mdio-addr = <0x03>; ++ qcom,link-poll = <0x01>; ++ qcom,mactype = <0x00>; ++ compatible = "qcom,nss-dp"; ++ phy-mode = "sgmii"; ++ local-mac-address = [000000000000]; ++ device_type = "network"; ++ }; ++ ++ dp5 { ++ reg = <0x3a001800 0x200>; ++ qcom,id = <0x05>; ++ qcom,phy-mdio-addr = <0x04>; ++ qcom,link-poll = <0x01>; ++ qcom,mactype = <0x00>; ++ compatible = "qcom,nss-dp"; ++ phy-mode = "sgmii"; ++ local-mac-address = [8c 53 c3 b6 7d ac]; ++ device_type = "network"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&leds_pins>; ++ pinctrl-names = "default"; ++ ++ led_sys_yellow { ++ label = "yellow:status"; ++ default-state = "on"; ++ gpio = <&tlmm 0x1e GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led_net_yellow { ++ label = "yellow:net"; ++ default-state = "off"; ++ gpio = <&tlmm 0x20 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led_sys_blue { ++ label = "blue:status"; ++ default-state = "off"; ++ gpio = <&tlmm 0x1d GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led_net_blue { ++ label = "blue:net"; ++ default-state = "off"; ++ gpio = <&tlmm 0x1f GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; ++ ++&blsp1_uart3 { ++ pinctrl-0 = <&uart_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++}; ++ ++&spi_0 { ++ pinctrl-0 = <&spi_0_pins>; ++ pinctrl-names = "default"; ++ cs-select = <0>; ++ status = "ok"; ++ ++ m25p80@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0>; ++ compatible = "n25q128a11"; ++ linux,modalias = "m25p80", "n25q128a11"; ++ spi-max-frequency = <50000000>; ++ use-default-sizes; ++ }; ++}; ++ ++&qpic_bam { ++ status = "ok"; ++}; ++ ++&nand { ++ pinctrl-0 = <&qpic_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++}; ++ ++&ssphy_0 { ++ status = "ok"; ++}; ++ ++&qusb_phy_0 { ++ status = "ok"; ++}; ++ ++&usb3 { ++ status = "ok"; ++}; ++ ++&nss_crypto { ++ status = "ok"; ++}; ++ ++&q6_region { ++ reg = <0x0 0x4ab00000 0x0 0x05500000>; ++}; +diff --git a/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts +new file mode 100755 +index 0000000000..d04cb1020c +--- /dev/null ++++ b/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap102.dts +@@ -0,0 +1,918 @@ ++/dts-v1/; ++/* ++ * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ */ ++#include "qcom-ipq807x-soc.dtsi" ++#include "qcom-ipq807x-ac-cpu.dtsi" ++ ++/ { ++ #address-cells = <0x2>; ++ #size-cells = <0x2>; ++ model = "Edgecore EAP102"; ++ compatible = "edgecore,eap102", "qcom,ipq807x-ac02", "qcom,ipq807x"; ++ qcom,msm-id = <0x178 0x0>; ++ interrupt-parent = <&intc>; ++ qcom,board-id = <0x8 0x0>; ++ qcom,pmic-id = <0x0 0x0 0x0 0x0>; ++ ++ aliases { ++ /* ++ * Aliases as required by u-boot ++ * to patch MAC addresses ++ */ ++ ethernet1 = "/soc/dp5"; ++ ethernet0 = "/soc/dp6"; ++ ++ led-boot = &led_power; ++ led-failsafe = &led_power; ++ led-running = &led_power; ++ led-upgrade = &led_power; ++ }; ++ ++ chosen { ++ bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw \ ++ init=/init"; ++ #ifdef __IPQ_MEM_PROFILE_256_MB__ ++ bootargs-append = " swiotlb=1"; ++ #else ++ bootargs-append = " swiotlb=1 coherent_pool=2M"; ++ #endif ++ }; ++}; ++ ++&tlmm { ++ pinctrl-0 = <&btcoex_pins>; ++ pinctrl-names = "default"; ++ ++ btcoex_pins: btcoex_pins { ++ mux_0 { ++ pins = "gpio64"; ++ function = "pta1_1"; ++ drive-strength = <6>; ++ bias-pull-down; ++ }; ++ mux_1 { ++ pins = "gpio65"; ++ function = "pta1_2"; ++ drive-strength = <6>; ++ bias-pull-down; ++ }; ++ }; ++ ++ mdio_pins: mdio_pinmux { ++ mux_0 { ++ pins = "gpio68"; ++ function = "mdc"; ++ drive-strength = <8>; ++ bias-pull-up; ++ }; ++ mux_1 { ++ pins = "gpio69"; ++ function = "mdio"; ++ drive-strength = <8>; ++ bias-pull-up; ++ }; ++ mux_2 { ++ pins = "gpio33"; ++ function = "gpio"; ++ bias-pull-up; ++ }; ++ mux_3 { ++ pins = "gpio44"; ++ function = "gpio"; ++ bias-pull-up; ++ }; ++ }; ++ ++ uart_pins: uart_pins { ++ mux { ++ pins = "gpio23", "gpio24"; ++ function = "blsp4_uart1"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ }; ++ ++ spi_0_pins: spi_0_pins { ++ mux { ++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; ++ function = "blsp0_spi"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ }; ++ ++ qpic_pins: qpic_pins { ++ data_0 { ++ pins = "gpio15"; ++ function = "qpic_pad0"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ data_1 { ++ pins = "gpio12"; ++ function = "qpic_pad1"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ data_2 { ++ pins = "gpio13"; ++ function = "qpic_pad2"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ data_3 { ++ pins = "gpio14"; ++ function = "qpic_pad3"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ data_4 { ++ pins = "gpio5"; ++ function = "qpic_pad4"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ data_5 { ++ pins = "gpio6"; ++ function = "qpic_pad5"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ data_6 { ++ pins = "gpio7"; ++ function = "qpic_pad6"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ data_7 { ++ pins = "gpio8"; ++ function = "qpic_pad7"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ qpic_pad { ++ pins = "gpio1", "gpio3", "gpio4", ++ "gpio10", "gpio11", "gpio17"; ++ function = "qpic_pad"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ }; ++ ++ hsuart_pins: hsuart_pins { ++ mux { ++ pins = "gpio49"; ++ function = "blsp2_uart"; ++ drive-strength = <8>; ++ bias-disable; ++ }; ++ }; ++ ++ button_pins: button_pins { ++ ++ reset_button { ++ pins = "gpio66"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-pull-up; ++ }; ++ }; ++ ++ led_pins: led_pins { ++ led_pwr { ++ pins = "gpio46"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ ++ led_2g { ++ pins = "gpio47"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ ++ led_5g { ++ pins = "gpio48"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ ++ led_bt { ++ pins = "gpio50"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ }; ++ ++ usb_mux_sel_pins: usb_mux_pins { ++ mux { ++ pins = "gpio27"; ++ function = "gpio"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ }; ++ ++ pcie0_pins: pcie_pins { ++ pcie0_rst { ++ pins = "gpio58"; ++ function = "pcie0_rst"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ pcie0_wake { ++ pins = "gpio59"; ++ function = "pcie0_wake"; ++ drive-strength = <8>; ++ bias-pull-down; ++ }; ++ }; ++ ++}; ++ ++&soc { ++ gpio_keys { ++ compatible = "gpio-keys"; ++ pinctrl-0 = <&button_pins>; ++ pinctrl-names = "default"; ++ ++ button@1 { ++ label = "reset_button"; ++ linux,code = ; ++ gpios = <&tlmm 66 GPIO_ACTIVE_LOW>; ++ linux,input-type = <1>; ++ debounce-interval = <60>; ++ }; ++ }; ++ ++ mdio: mdio@90000 { ++ pinctrl-0 = <&mdio_pins>; ++ pinctrl-names = "default"; ++ phy-reset-gpio = <&tlmm 37 0 &tlmm 25 1 &tlmm 44 1>; ++ compatible = "qcom,ipq40xx-mdio", "qcom,qca-mdio"; ++ phy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ phy2: ethernet-phy@2 { ++ reg = <2>; ++ }; ++ phy3: ethernet-phy@3 { ++ reg = <3>; ++ }; ++ phy4: ethernet-phy@4 { ++ reg = <24>; ++ }; ++ phy5: ethernet-phy@5 { ++ reg = <28>; ++ }; ++ }; ++ ++ ess-switch@3a000000 { ++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ ++ switch_lan_bmp = <0x3e>; /* lan port bitmap */ ++ switch_wan_bmp = <0x40>; /* wan port bitmap */ ++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ ++ switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ ++ switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/ ++ bm_tick_mode = <0>; /* bm tick mode */ ++ tm_tick_mode = <0>; /* tm tick mode */ ++ qcom,port_phyinfo { ++ port@0 { ++ port_id = <1>; ++ phy_address = <0>; ++ }; ++ port@1 { ++ port_id = <2>; ++ phy_address = <1>; ++ }; ++ port@2 { ++ port_id = <3>; ++ phy_address = <2>; ++ }; ++ port@3 { ++ port_id = <4>; ++ phy_address = <3>; ++ }; ++ port@4 { ++ port_id = <5>; ++ phy_address = <24>; ++ port_mac_sel = "QGMAC_PORT"; ++ }; ++ port@5 { ++ port_id = <6>; ++ phy_address = <28>; ++ port_mac_sel = "QGMAC_PORT"; ++ }; ++ }; ++ port_scheduler_resource { ++ port@0 { ++ port_id = <0>; ++ ucast_queue = <0 143>; ++ mcast_queue = <256 271>; ++ l0sp = <0 35>; ++ l0cdrr = <0 47>; ++ l0edrr = <0 47>; ++ l1cdrr = <0 7>; ++ l1edrr = <0 7>; ++ }; ++ port@1 { ++ port_id = <1>; ++ ucast_queue = <144 159>; ++ mcast_queue = <272 275>; ++ l0sp = <36 39>; ++ l0cdrr = <48 63>; ++ l0edrr = <48 63>; ++ l1cdrr = <8 11>; ++ l1edrr = <8 11>; ++ }; ++ port@2 { ++ port_id = <2>; ++ ucast_queue = <160 175>; ++ mcast_queue = <276 279>; ++ l0sp = <40 43>; ++ l0cdrr = <64 79>; ++ l0edrr = <64 79>; ++ l1cdrr = <12 15>; ++ l1edrr = <12 15>; ++ }; ++ port@3 { ++ port_id = <3>; ++ ucast_queue = <176 191>; ++ mcast_queue = <280 283>; ++ l0sp = <44 47>; ++ l0cdrr = <80 95>; ++ l0edrr = <80 95>; ++ l1cdrr = <16 19>; ++ l1edrr = <16 19>; ++ }; ++ port@4 { ++ port_id = <4>; ++ ucast_queue = <192 207>; ++ mcast_queue = <284 287>; ++ l0sp = <48 51>; ++ l0cdrr = <96 111>; ++ l0edrr = <96 111>; ++ l1cdrr = <20 23>; ++ l1edrr = <20 23>; ++ }; ++ port@5 { ++ port_id = <5>; ++ ucast_queue = <208 223>; ++ mcast_queue = <288 291>; ++ l0sp = <52 55>; ++ l0cdrr = <112 127>; ++ l0edrr = <112 127>; ++ l1cdrr = <24 27>; ++ l1edrr = <24 27>; ++ }; ++ port@6 { ++ port_id = <6>; ++ ucast_queue = <224 239>; ++ mcast_queue = <292 295>; ++ l0sp = <56 59>; ++ l0cdrr = <128 143>; ++ l0edrr = <128 143>; ++ l1cdrr = <28 31>; ++ l1edrr = <28 31>; ++ }; ++ port@7 { ++ port_id = <7>; ++ ucast_queue = <240 255>; ++ mcast_queue = <296 299>; ++ l0sp = <60 63>; ++ l0cdrr = <144 159>; ++ l0edrr = <144 159>; ++ l1cdrr = <32 35>; ++ l1edrr = <32 35>; ++ }; ++ }; ++ port_scheduler_config { ++ port@0 { ++ port_id = <0>; ++ l1scheduler { ++ group@0 { ++ sp = <0 1>; /*L0 SPs*/ ++ /*cpri cdrr epri edrr*/ ++ cfg = <0 0 0 0>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ /*unicast queues*/ ++ ucast_queue = <0 4 8>; ++ /*multicast queues*/ ++ mcast_queue = <256 260>; ++ /*sp cpri cdrr epri edrr*/ ++ cfg = <0 0 0 0 0>; ++ }; ++ group@1 { ++ ucast_queue = <1 5 9>; ++ mcast_queue = <257 261>; ++ cfg = <0 1 1 1 1>; ++ }; ++ group@2 { ++ ucast_queue = <2 6 10>; ++ mcast_queue = <258 262>; ++ cfg = <0 2 2 2 2>; ++ }; ++ group@3 { ++ ucast_queue = <3 7 11>; ++ mcast_queue = <259 263>; ++ cfg = <0 3 3 3 3>; ++ }; ++ }; ++ }; ++ port@1 { ++ port_id = <1>; ++ l1scheduler { ++ group@0 { ++ sp = <36>; ++ cfg = <0 8 0 8>; ++ }; ++ group@1 { ++ sp = <37>; ++ cfg = <1 9 1 9>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ ucast_queue = <144>; ++ ucast_loop_pri = <16>; ++ mcast_queue = <272>; ++ mcast_loop_pri = <4>; ++ cfg = <36 0 48 0 48>; ++ }; ++ }; ++ }; ++ port@2 { ++ port_id = <2>; ++ l1scheduler { ++ group@0 { ++ sp = <40>; ++ cfg = <0 12 0 12>; ++ }; ++ group@1 { ++ sp = <41>; ++ cfg = <1 13 1 13>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ ucast_queue = <160>; ++ ucast_loop_pri = <16>; ++ mcast_queue = <276>; ++ mcast_loop_pri = <4>; ++ cfg = <40 0 64 0 64>; ++ }; ++ }; ++ }; ++ port@3 { ++ port_id = <3>; ++ l1scheduler { ++ group@0 { ++ sp = <44>; ++ cfg = <0 16 0 16>; ++ }; ++ group@1 { ++ sp = <45>; ++ cfg = <1 17 1 17>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ ucast_queue = <176>; ++ ucast_loop_pri = <16>; ++ mcast_queue = <280>; ++ mcast_loop_pri = <4>; ++ cfg = <44 0 80 0 80>; ++ }; ++ }; ++ }; ++ port@4 { ++ port_id = <4>; ++ l1scheduler { ++ group@0 { ++ sp = <48>; ++ cfg = <0 20 0 20>; ++ }; ++ group@1 { ++ sp = <49>; ++ cfg = <1 21 1 21>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ ucast_queue = <192>; ++ ucast_loop_pri = <16>; ++ mcast_queue = <284>; ++ mcast_loop_pri = <4>; ++ cfg = <48 0 96 0 96>; ++ }; ++ }; ++ }; ++ port@5 { ++ port_id = <5>; ++ l1scheduler { ++ group@0 { ++ sp = <52>; ++ cfg = <0 24 0 24>; ++ }; ++ group@1 { ++ sp = <53>; ++ cfg = <1 25 1 25>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ ucast_queue = <208>; ++ ucast_loop_pri = <16>; ++ mcast_queue = <288>; ++ mcast_loop_pri = <4>; ++ cfg = <52 0 112 0 112>; ++ }; ++ }; ++ }; ++ port@6 { ++ port_id = <6>; ++ l1scheduler { ++ group@0 { ++ sp = <56>; ++ cfg = <0 28 0 28>; ++ }; ++ group@1 { ++ sp = <57>; ++ cfg = <1 29 1 29>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ ucast_queue = <224>; ++ ucast_loop_pri = <16>; ++ mcast_queue = <292>; ++ mcast_loop_pri = <4>; ++ cfg = <56 0 128 0 128>; ++ }; ++ }; ++ }; ++ port@7 { ++ port_id = <7>; ++ l1scheduler { ++ group@0 { ++ sp = <60>; ++ cfg = <0 32 0 32>; ++ }; ++ }; ++ l0scheduler { ++ group@0 { ++ ucast_queue = <240>; ++ mcast_queue = <296>; ++ cfg = <60 0 144 0 144>; ++ }; ++ }; ++ }; ++ }; ++ }; ++/* ++ dp1 { ++ device_type = "network"; ++ compatible = "qcom,nss-dp"; ++ qcom,id = <1>; ++ reg = <0x3a001000 0x200>; ++ qcom,mactype = <0>; ++ local-mac-address = [000000000000]; ++ qcom,link-poll = <1>; ++ qcom,phy-mdio-addr = <0>; ++ phy-mode = "sgmii"; ++ }; ++ ++ dp2 { ++ device_type = "network"; ++ compatible = "qcom,nss-dp"; ++ qcom,id = <2>; ++ reg = <0x3a001200 0x200>; ++ qcom,mactype = <0>; ++ local-mac-address = [000000000000]; ++ qcom,link-poll = <1>; ++ qcom,phy-mdio-addr = <1>; ++ phy-mode = "sgmii"; ++ }; ++ ++ dp3 { ++ device_type = "network"; ++ compatible = "qcom,nss-dp"; ++ qcom,id = <3>; ++ reg = <0x3a001400 0x200>; ++ qcom,mactype = <0>; ++ local-mac-address = [000000000000]; ++ qcom,link-poll = <1>; ++ qcom,phy-mdio-addr = <2>; ++ phy-mode = "sgmii"; ++ }; ++ ++ dp4 { ++ device_type = "network"; ++ compatible = "qcom,nss-dp"; ++ qcom,id = <4>; ++ reg = <0x3a001600 0x200>; ++ qcom,mactype = <0>; ++ local-mac-address = [000000000000]; ++ qcom,link-poll = <1>; ++ qcom,phy-mdio-addr = <3>; ++ phy-mode = "sgmii"; ++ }; ++*/ ++ dp6 { ++ device_type = "network"; ++ compatible = "qcom,nss-dp"; ++ qcom,id = <6>; ++ reg = <0x3a001800 0x200>; ++ qcom,mactype = <0>; ++ local-mac-address = [000000000000]; ++ qcom,link-poll = <1>; ++ qcom,phy-mdio-addr = <28>; ++ phy-mode = "sgmii"; ++ }; ++ ++ dp5 { ++ device_type = "network"; ++ compatible = "qcom,nss-dp"; ++ qcom,id = <5>; ++ reg = <0x3a001a00 0x200>; ++ qcom,mactype = <0>; ++ local-mac-address = [000000000000]; ++ qcom,link-poll = <1>; ++ qcom,phy-mdio-addr = <24>; ++ phy-mode = "sgmii"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&led_pins>; ++ pinctrl-names = "default"; ++ ++ led_pwr { ++ label = "green:wan"; ++ gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ linux,default-trigger = "led_pwr"; ++ }; ++ ++ led_2g { ++ label = "green:wifi2"; ++ gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ }; ++ ++ led_5g { ++ label = "green:wifi5"; ++ gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>; ++ default-state = "off"; ++ }; ++ ++ led_power: led_bt { ++ gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>; ++ label = "green:power"; ++ default-state = "on"; ++ linux,default-trigger = "led_bt"; ++ }; ++ }; ++ nss-macsec0 { ++ compatible = "qcom,nss-macsec"; ++ phy_addr = <0x18>; ++ phy_access_mode = <0>; ++ mdiobus = <&mdio>; ++ }; ++ nss-macsec1 { ++ compatible = "qcom,nss-macsec"; ++ phy_addr = <0x1c>; ++ phy_access_mode = <0>; ++ mdiobus = <&mdio>; ++ }; ++}; ++ ++&serial_blsp4 { ++ pinctrl-0 = <&uart_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++}; ++ ++&spi_0 { /* BLSP1 QUP1 */ ++ pinctrl-0 = <&spi_0_pins>; ++ pinctrl-names = "default"; ++ cs-select = <0>; ++ status = "ok"; ++ ++ m25p80@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0>; ++ compatible = "n25q128a11"; ++ linux,modalias = "m25p80", "n25q128a11"; ++ spi-max-frequency = <50000000>; ++ use-default-sizes; ++ }; ++}; ++ ++&serial_blsp2 { ++ pinctrl-0 = <&hsuart_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++}; ++ ++&nss0 { ++ qcom,low-frequency = <187200000>; ++ qcom,mid-frequency = <748800000>; ++ qcom,max-frequency = <1497600000>; ++}; ++ ++&msm_imem { ++ status = "disabled"; ++}; ++ ++&ssphy_0 { ++ status = "ok"; ++}; ++ ++&qusb_phy_0 { ++ status = "ok"; ++}; ++ ++&ssphy_1 { ++ status = "ok"; ++}; ++ ++&qusb_phy_1 { ++ status = "ok"; ++}; ++ ++&usb3_0 { ++ status = "ok"; ++}; ++ ++&usb3_1 { ++ status = "ok"; ++}; ++ ++&cryptobam { ++ status = "ok"; ++}; ++ ++&crypto { ++ status = "ok"; ++}; ++ ++&i2c_0 { ++ status = "disabled"; ++}; ++ ++&i2c_1 { ++ status = "disabled"; ++}; ++ ++&qpic_bam { ++ status = "ok"; ++}; ++ ++&nand { ++ pinctrl-0 = <&qpic_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++}; ++ ++&qpic_lcd { ++ status = "disabled"; ++}; ++ ++&qpic_lcd_panel { ++ status = "disabled"; ++}; ++ ++&ledc { ++ status = "disabled"; ++}; ++ ++&pcie0 { ++ status = "ok"; ++}; ++ ++&pcie1 { ++ status = "disabled"; ++}; ++ ++&glink_rpm { ++ status = "disabled"; ++}; ++ ++&apc_cpr { ++ /* Same CPR configuration as OAK */ ++ compatible = "qcom,cpr4-ipq817x-apss-regulator"; ++ ++ thread@0 { ++ apc_vreg: regulator { ++ regulator-min-microvolt = <1>; ++ regulator-max-microvolt = <2>; ++ qcom,cpr-fuse-corners = <2>; ++ qcom,cpr-corners = <3>; ++ qcom,cpr-speed-bin-corners = <3>; ++ qcom,cpr-corner-fmax-map = <1 3>; ++ ++ qcom,cpr-voltage-ceiling = ++ <840000 904000 944000>; ++ qcom,cpr-voltage-floor = ++ <592000 648000 712000>; ++ qcom,corner-frequencies = ++ <1017600000 1382400000 1382400000>; ++ ++ qcom,cpr-open-loop-voltage-fuse-adjustment-0 = ++ /* Speed bin 0; CPR rev 0..7 */ ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>; ++ ++ qcom,cpr-open-loop-voltage-fuse-adjustment-1 = ++ /* Speed bin 0; CPR rev 0..7 */ ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 20000 26000>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>; ++ ++ qcom,cpr-open-loop-voltage-fuse-adjustment-v2-0 = ++ /* Speed bin 0; CPR rev 0..7 */ ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>; ++ ++ qcom,cpr-open-loop-voltage-fuse-adjustment-v2-1 = ++ /* Speed bin 0; CPR rev 0..7 */ ++ < 0 0>, ++ < 0 7000>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>, ++ < 0 0>; ++ ++ qcom,cpr-floor-to-ceiling-max-range = ++ < 40000 40000 40000>, ++ < 40000 40000 40000>, ++ < 40000 40000 40000>, ++ < 40000 40000 40000>, ++ < 40000 40000 40000>, ++ < 40000 40000 40000>, ++ < 40000 40000 40000>, ++ < 40000 40000 40000>; ++ }; ++ }; ++}; ++ ++&npu_cpr { ++ status = "disabled"; ++}; ++ ++&nss0 { ++ npu-supply = <&dummy_reg>; ++ mx-supply = <&dummy_reg>; ++}; ++ ++&wifi0 { ++ qcom,board_id = <0x92>; ++}; ++ ++&wifi1 { ++ qcom,board_id = <0x292>; ++}; +diff --git a/target/linux/ipq807x/image/Makefile b/target/linux/ipq807x/image/Makefile +new file mode 100644 +index 0000000000..3a219e6d6c +--- /dev/null ++++ b/target/linux/ipq807x/image/Makefile +@@ -0,0 +1,26 @@ ++include $(TOPDIR)/rules.mk ++include $(INCLUDE_DIR)/image.mk ++ ++IMG_PREFIX:=$(VERSION_DIST_SANITIZED)-$(IMG_PREFIX_VERNUM)$(IMG_PREFIX_VERCODE)$(IMG_PREFIX_EXTRA)$(BOARD) ++ ++# default all platform image(fit) build ++define Device/Default ++ PROFILES = Default $$(DEVICE_NAME) ++ KERNEL_NAME := zImage ++ FILESYSTEMS := squashfs ++ DEVICE_DTS_DIR := $(DTS_DIR) ++ KERNEL_IN_UBI := 1 ++ ROOTFSNAME_IN_UBI := ubi_rootfs ++ BLOCKSIZE := 128k ++ PAGESIZE := 2048 ++ IMAGES := sysupgrade.tar nand-factory.bin ++ IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata ++ IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand ++ KERNEL_NAME := Image ++ KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb ++ KERNEL_INITRAMFS = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb ++endef ++ ++include $(SUBTARGET).mk ++ ++$(eval $(call BuildImage)) +diff --git a/target/linux/ipq807x/image/ipq60xx.mk b/target/linux/ipq807x/image/ipq60xx.mk +new file mode 100644 +index 0000000000..2751391ac7 +--- /dev/null ++++ b/target/linux/ipq807x/image/ipq60xx.mk +@@ -0,0 +1,47 @@ ++KERNEL_LOADADDR := 0x41008000 ++ ++define Device/cig_wf188 ++ DEVICE_TITLE := Cigtech WF-188 ++ DEVICE_DTS := qcom-ipq6018-cig-wf188 ++ DEVICE_DTS_CONFIG := config@cp03-c1 ++ SUPPORTED_DEVICES := cig,wf188 ++ IMAGES := sysupgrade.tar ++ IMAGE/sysupgrade.tar/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata ++ DEVICE_PACKAGES := ath11k-wifi-cig-wf188 uboot-env ++endef ++TARGET_DEVICES += cig_wf188 ++ ++define Device/cig_wf188n ++ DEVICE_TITLE := Cigtech WF-188n ++ DEVICE_DTS := qcom-ipq6018-cig-wf188n ++ DEVICE_DTS_CONFIG := config@cp03-c1 ++ SUPPORTED_DEVICES := cig,wf188n ++ DEVICE_PACKAGES := ath11k-wifi-cig-wf188n uboot-env ++endef ++TARGET_DEVICES += cig_wf188n ++ ++define Device/edgecore_eap101 ++ DEVICE_TITLE := EdgeCore EAP101 ++ DEVICE_DTS := qcom-ipq6018-edgecore-eap101 ++ DEVICE_DTS_CONFIG := config@cp01-c1 ++ SUPPORTED_DEVICES := edgecore,eap101 ++ DEVICE_PACKAGES := ath11k-wifi-edgecore-eap101 uboot-envtools ++endef ++TARGET_DEVICES += edgecore_eap101 ++ ++define Device/qcom_cp01_c1 ++ DEVICE_TITLE := Qualcomm Cypress C1 ++ DEVICE_DTS := qcom-ipq6018-cp01-c1 ++ SUPPORTED_DEVICES := qcom,ipq6018-cp01 ++ DEVICE_PACKAGES := ath11k-wifi-qcom-ipq6018 ++endef ++TARGET_DEVICES += qcom_cp01_c1 ++ ++define Device/xiaomi_ax1800 ++ DEVICE_TITLE := Xiaomi AX1800 ++ DEVICE_DTS := qcom-ipq6018-miwifi-ax1800 ++ SUPPORTED_DEVICES := xiaomi,ax1800 ++ DEVICE_DTS_CONFIG := config@cp03-c1 ++ DEVICE_PACKAGES := ath11k-wifi-xiaomi-ax1800 ++endef ++TARGET_DEVICES += xiaomi_ax1800 +diff --git a/target/linux/ipq807x/image/ipq807x.mk b/target/linux/ipq807x/image/ipq807x.mk +new file mode 100644 +index 0000000000..92b301bcfb +--- /dev/null ++++ b/target/linux/ipq807x/image/ipq807x.mk +@@ -0,0 +1,81 @@ ++KERNEL_LOADADDR := 0x41208000 ++ ++define Device/qcom_hk01 ++ DEVICE_TITLE := Qualcomm Hawkeye HK01 ++ DEVICE_DTS := qcom-ipq807x-hk01 ++ DEVICE_DTS_CONFIG=config@hk01 ++ SUPPORTED_DEVICES := qcom,ipq807x-hk01 ++ DEVICE_PACKAGES := ath11k-wifi-qcom-ipq8074 ++endef ++TARGET_DEVICES += qcom_hk01 ++ ++define Device/qcom_hk14 ++ DEVICE_TITLE := Qualcomm Hawkeye HK14 ++ DEVICE_DTS := qcom-ipq807x-hk14 ++ DEVICE_DTS_CONFIG=config@hk14 ++ SUPPORTED_DEVICES := qcom,ipq807x-hk14 ++ DEVICE_PACKAGES := ath11k-wifi-qcom-ipq8074 kmod-ath11k-pci ath11k-firmware-qcn9000 ++endef ++TARGET_DEVICES += qcom_hk14 ++ ++define Device/sercomm_wallaby ++ DEVICE_TITLE := Sercomm Kiwi ++ DEVICE_DTS := qcom-ipq807x-sercomm-wallaby ++ DEVICE_DTS_CONFIG=config@hk09 ++ SUPPORTED_DEVICES := sercomm,wallaby ++ DEVICE_PACKAGES := ath11k-wifi-sercomm-wallaby ++endef ++TARGET_DEVICES += sercomm_wallaby ++ ++define Device/cig_wf194 ++ DEVICE_TITLE := CIG WF194C ++ DEVICE_DTS := qcom-ipq807x-wf194c ++ DEVICE_DTS_CONFIG=config@hk01 ++ SUPPORTED_DEVICES := cig,wf194c ++ DEVICE_PACKAGES := ath11k-wifi-cig-wf194c aq-fw-download uboot-envtools kmod-usb3 kmod-usb2 ++endef ++TARGET_DEVICES += cig_wf194 ++ ++define Device/edgecore_eap102 ++ DEVICE_TITLE := Edgecore EAP102 ++ DEVICE_DTS := qcom-ipq807x-eap102 ++ DEVICE_DTS_CONFIG=config@ac02 ++ SUPPORTED_DEVICES := edgecore,eap102 ++ DEVICE_PACKAGES := ath11k-wifi-edgecore-eap102 kmod-usb3 uboot-envtools ++endef ++TARGET_DEVICES += edgecore_eap102 ++ ++define Device/edgecore_eap106 ++ DEVICE_TITLE := Edgecore EAP102 ++ DEVICE_DTS := qcom-ipq807x-eap106 ++ DEVICE_DTS_CONFIG=config@hk02 ++ SUPPORTED_DEVICES := edgecore,eap106 ++ DEVICE_PACKAGES := ath11k-wifi-edgecore-eap106 iaq-fw-download kmod-usb2 kmod-usb3 uboot-envtools ++endef ++TARGET_DEVICES += edgecore_eap106 ++ ++define Device/tplink_ex227 ++ DEVICE_TITLE := TP-Link EX227 ++ DEVICE_DTS := qcom-ipq807x-ex227 ++ DEVICE_DTS_CONFIG=config@hk07 ++ SUPPORTED_DEVICES := tplink,ex227 ++ DEVICE_PACKAGES := ath11k-wifi-tplink-ex227 ++ IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi ++ IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata ++ IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand ++ IMAGE/nand-factory.ubi := append-ubi ++endef ++TARGET_DEVICES += tplink_ex227 ++ ++define Device/tplink_ex447 ++ DEVICE_TITLE := TP-Link EX447 ++ DEVICE_DTS := qcom-ipq807x-ex447 ++ DEVICE_DTS_CONFIG=config@hk09 ++ SUPPORTED_DEVICES := tplink,ex447 ++ DEVICE_PACKAGES := ath11k-wifi-tplink-ex447 ++ IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi ++ IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata ++ IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand ++ IMAGE/nand-factory.ubi := append-ubi ++endef ++TARGET_DEVICES += tplink_ex447 +diff --git a/target/linux/ipq807x/ipq60xx/config-default b/target/linux/ipq807x/ipq60xx/config-default +new file mode 100644 +index 0000000000..3d7c59698e +--- /dev/null ++++ b/target/linux/ipq807x/ipq60xx/config-default +@@ -0,0 +1,122 @@ ++CONFIG_ALLOC_BUFFERS_IN_4K_CHUNKS=y ++CONFIG_ANDROID=y ++# CONFIG_ANDROID_BINDER_IPC is not set ++# CONFIG_AQ_PHY is not set ++CONFIG_ARCH_HIBERNATION_POSSIBLE=y ++CONFIG_ARCH_IPQ6018=y ++# CONFIG_ARCH_MSM8X60 is not set ++CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8 ++CONFIG_ARM_DMA_USE_IOMMU=y ++CONFIG_ARM_HEAVY_MB=y ++CONFIG_ARM_QTI_IPQ60XX_CPUFREQ=y ++CONFIG_ARM_SMMU=y ++CONFIG_ASN1=y ++CONFIG_ASSOCIATIVE_ARRAY=y ++CONFIG_CACHE_L2X0=y ++CONFIG_CLZ_TAB=y ++CONFIG_CMA=y ++CONFIG_CMA_ALIGNMENT=8 ++CONFIG_CMA_AREAS=7 ++CONFIG_CMA_DEBUG=y ++CONFIG_CMA_DEBUGFS=y ++CONFIG_CMA_SIZE_MBYTES=0 ++CONFIG_CMA_SIZE_SEL_MBYTES=y ++CONFIG_CORESIGHT=y ++CONFIG_CORESIGHT_CSR=y ++CONFIG_CORESIGHT_CTI=y ++CONFIG_CORESIGHT_HWEVENT=y ++CONFIG_CORESIGHT_LINKS_AND_SINKS=y ++CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y ++CONFIG_CORESIGHT_QCOM_REPLICATOR=y ++CONFIG_CORESIGHT_SINK_TPIU=y ++CONFIG_CORESIGHT_SOURCE_ETM3X=y ++CONFIG_CORESIGHT_SOURCE_ETM4X=y ++CONFIG_CORESIGHT_STM=y ++CONFIG_CORESIGHT_TPDA=y ++CONFIG_CORESIGHT_TPDM=y ++CONFIG_CRC_CCITT=m ++CONFIG_CRYPTO_AKCIPHER=y ++CONFIG_CRYPTO_AKCIPHER2=y ++CONFIG_CRYPTO_DRBG=y ++CONFIG_CRYPTO_DRBG_HMAC=y ++CONFIG_CRYPTO_DRBG_MENU=y ++CONFIG_CRYPTO_GF128MUL=y ++CONFIG_CRYPTO_GHASH=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_JITTERENTROPY=y ++# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set ++CONFIG_CRYPTO_NULL2=y ++CONFIG_CRYPTO_PCOMP2=y ++CONFIG_CRYPTO_RNG_DEFAULT=y ++CONFIG_CRYPTO_SHA512=y ++CONFIG_DMA_CMA=y ++CONFIG_DMA_SHARED_BUFFER=y ++CONFIG_DT_IDLE_STATES=y ++CONFIG_EDAC_ATOMIC_SCRUB=y ++CONFIG_EDAC_SUPPORT=y ++CONFIG_EXTCON=y ++CONFIG_EXTCON_USB_GPIO=y ++CONFIG_FB_DEFERRED_IO=y ++CONFIG_FREEZER=y ++CONFIG_GPIO_WATCHDOG=y ++CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y ++CONFIG_IOMMU_API=y ++CONFIG_IOMMU_DMA=y ++CONFIG_IOMMU_IOVA=y ++CONFIG_IOMMU_IO_PGTABLE=y ++# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set ++CONFIG_IOMMU_IO_PGTABLE_LPAE=y ++# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set ++CONFIG_IOMMU_SUPPORT=y ++CONFIG_ION=y ++CONFIG_ION_MSM=y ++CONFIG_IPQ_APSS_6018=y ++CONFIG_IPQ_GCC_6018=y ++CONFIG_IPQ_MEM_PROFILE=256 ++CONFIG_KASAN_SHADOW_OFFSET=0x5f000000 ++CONFIG_LEDS_PCA9956B=y ++CONFIG_MDIO_QCA=y ++CONFIG_MEMORY_ISOLATION=y ++CONFIG_MIGRATION=y ++CONFIG_MPILIB=y ++CONFIG_MSM_SECURE_BUFFER=y ++CONFIG_NEED_SG_DMA_LENGTH=y ++CONFIG_NET_SWITCHDEV=y ++CONFIG_NUM_ALT_PARTITION=16 ++CONFIG_OF_IOMMU=y ++CONFIG_OID_REGISTRY=y ++CONFIG_OUTER_CACHE=y ++CONFIG_OUTER_CACHE_SYNC=y ++CONFIG_PAGE_OFFSET=0x80000000 ++CONFIG_PINCTRL_IPQ6018=y ++# CONFIG_PKCS7_MESSAGE_PARSER is not set ++# CONFIG_PL310_ERRATA_588369 is not set ++# CONFIG_PL310_ERRATA_727915 is not set ++# CONFIG_PL310_ERRATA_753970 is not set ++# CONFIG_PL310_ERRATA_769419 is not set ++CONFIG_PPS=y ++CONFIG_PTP_1588_CLOCK=y ++CONFIG_PWM_IPQ4019=y ++CONFIG_QCOM_APM=y ++CONFIG_QCOM_DCC=y ++CONFIG_QCOM_QMI_HELPERS=y ++CONFIG_REGMAP_I2C=y ++CONFIG_REGMAP_SPMI=y ++CONFIG_REGULATOR_CPR3=y ++CONFIG_REGULATOR_CPR3_NPU=y ++CONFIG_REGULATOR_CPR4_APSS=y ++# CONFIG_SKB_FIXED_SIZE_2K is not set ++CONFIG_SOC_BUS=y ++CONFIG_SPS=y ++CONFIG_SPS_SUPPORT_NDP_BAM=y ++CONFIG_STAGING=y ++CONFIG_SUSPEND_FREEZER=y ++# CONFIG_USB_GADGET is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++# CONFIG_VFIO is not set ++CONFIG_VIRTIO=y ++CONFIG_VIRTUALIZATION=y ++CONFIG_VMSPLIT_2G=y ++# CONFIG_VMSPLIT_3G is not set ++CONFIG_WANT_DEV_COREDUMP=y +diff --git a/target/linux/ipq807x/ipq60xx/profiles/default.mk b/target/linux/ipq807x/ipq60xx/profiles/default.mk +new file mode 100644 +index 0000000000..f47e73acfc +--- /dev/null ++++ b/target/linux/ipq807x/ipq60xx/profiles/default.mk +@@ -0,0 +1,9 @@ ++define Profile/Default ++ NAME:=Default Profile (minimum package set) ++endef ++ ++define Profile/Default/Description ++Default package set compatible with most boards. ++endef ++$(eval $(call Profile,Default)) ++ +diff --git a/target/linux/ipq807x/ipq60xx/target.mk b/target/linux/ipq807x/ipq60xx/target.mk +new file mode 100644 +index 0000000000..cf2bf7b9cd +--- /dev/null ++++ b/target/linux/ipq807x/ipq60xx/target.mk +@@ -0,0 +1,8 @@ ++SUBTARGET:=ipq60xx ++BOARDNAME:=IPQ60xx based boards ++ ++DEFAULT_PACKAGES += ath11k-firmware-ipq60xx qca-nss-fw-ipq60xx ++ ++define Target/Description ++ Build images for IPQ60xx systems. ++endef +diff --git a/target/linux/ipq807x/ipq807x/config-default b/target/linux/ipq807x/ipq807x/config-default +new file mode 100644 +index 0000000000..f1e8aadc9c +--- /dev/null ++++ b/target/linux/ipq807x/ipq807x/config-default +@@ -0,0 +1,78 @@ ++# CONFIG_AHCI_IPQ is not set ++CONFIG_ARCH_IPQ807x=y ++# CONFIG_DIAGFWD_BRIDGE_CODE is not set ++CONFIG_IPQ_ADSS_807x=y ++CONFIG_IPQ_APSS_807x=y ++CONFIG_IPQ_GCC_807x=y ++CONFIG_NET_SWITCHDEV=y ++CONFIG_NUM_ALT_PARTITION=16 ++CONFIG_PINCTRL_IPQ807x=y ++# CONFIG_IPC_LOGGING is not set ++CONFIG_IPQ_SUBSYSTEM_DUMP=y ++CONFIG_SPS=y ++CONFIG_SPS_SUPPORT_NDP_BAM=y ++CONFIG_CORESIGHT=y ++CONFIG_CORESIGHT_CSR=y ++CONFIG_CORESIGHT_CTI=y ++CONFIG_CORESIGHT_EVENT=y ++CONFIG_CORESIGHT_HWEVENT=y ++CONFIG_CORESIGHT_LINKS_AND_SINKS=y ++CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y ++CONFIG_CORESIGHT_QCOM_REPLICATOR=y ++CONFIG_CORESIGHT_STREAM=m ++# CONFIG_INPUT_PM8941_PWRKEY is not set ++CONFIG_MDIO_QCA=y ++# CONFIG_CRYPTO_ALL_CASES is not set ++CONFIG_CRYPTO_DEV_QCOM_ICE=y ++# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set ++CONFIG_CRYPTO_SHA512=y ++# CONFIG_CORESIGHT_QPDI is not set ++# CONFIG_CORESIGHT_SINK_ETBV10 is not set ++CONFIG_CORESIGHT_SINK_TPIU=y ++# CONFIG_CORESIGHT_SOURCE_DUMMY is not set ++CONFIG_CORESIGHT_SOURCE_ETM3X=y ++CONFIG_CORESIGHT_SOURCE_ETM4X=y ++# CONFIG_CORESIGHT_REMOTE_ETM is not set ++CONFIG_CORESIGHT_STM=y ++CONFIG_CORESIGHT_TPDA=y ++CONFIG_CORESIGHT_TPDM=y ++CONFIG_AQUANTIA_PHY=y ++# CONFIG_CORESIGHT_TPDM_DEFAULT_ENABLE is not set ++CONFIG_IIO=y ++# CONFIG_IIO_BUFFER is not set ++# CONFIG_IIO_TRIGGER is not set ++CONFIG_PCIE_DW_PLAT=y ++CONFIG_VMSPLIT_2G=y ++# CONFIG_VMSPLIT_3G is not set ++CONFIG_PPS=y ++CONFIG_PTP_1588_CLOCK=y ++# CONFIG_DP83640_PHY is not set ++CONFIG_PWM_IPQ4019=y ++CONFIG_QCOM_APM=y ++CONFIG_QCOM_DCC=y ++# CONFIG_QCOM_SPMI_TEMP_ALARM is not set ++CONFIG_QCOM_SPMI_VADC=y ++CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS=y ++CONFIG_REGULATOR_CPR3=y ++CONFIG_REGULATOR_CPR3_NPU=y ++CONFIG_REGULATOR_CPR4_APSS=y ++CONFIG_MMC_SDHCI_MSM_ICE=y ++CONFIG_USB_BAM=y ++CONFIG_USB_QCOM_KS_BRIDGE=m ++CONFIG_MAILBOX=y ++# CONFIG_USB_QCOM_DIAG_BRIDGE is not set ++# CONFIG_USB_CONFIGFS_F_DIAG is not set ++# CONFIG_NF_IPV6_DUMMY_HEADER is not set ++CONFIG_RMNET=y ++CONFIG_RMNET_DATA=y ++CONFIG_RMNET_DATA_DEBUG_PKT=y ++# CONFIG_RMNET_DATA_FC is not set ++CONFIG_QCOM_QMI_RMNET=y ++CONFIG_QCOM_QMI_DFC=y ++CONFIG_QCOM_QMI_POWER_COLLAPSE=y ++CONFIG_RMNET_CTL=y ++CONFIG_RMNET_CTL_DEBUG=y ++CONFIG_MHI_BUS_TEST=y ++CONFIG_MHI_DEBUG=y ++CONFIG_MHI_NETDEV=y ++CONFIG_MHI_UCI=y +diff --git a/target/linux/ipq807x/ipq807x/profiles/default.mk b/target/linux/ipq807x/ipq807x/profiles/default.mk +new file mode 100644 +index 0000000000..f47e73acfc +--- /dev/null ++++ b/target/linux/ipq807x/ipq807x/profiles/default.mk +@@ -0,0 +1,9 @@ ++define Profile/Default ++ NAME:=Default Profile (minimum package set) ++endef ++ ++define Profile/Default/Description ++Default package set compatible with most boards. ++endef ++$(eval $(call Profile,Default)) ++ +diff --git a/target/linux/ipq807x/ipq807x/target.mk b/target/linux/ipq807x/ipq807x/target.mk +new file mode 100644 +index 0000000000..7c24b66e60 +--- /dev/null ++++ b/target/linux/ipq807x/ipq807x/target.mk +@@ -0,0 +1,7 @@ ++SUBTARGET:=ipq807x ++BOARDNAME:=IPQ807x based boards ++ ++DEFAULT_PACKAGES += ath11k-firmware-ipq807x qca-nss-fw-ipq807x ++define Target/Description ++ Build images for IPQ807x systems. ++endef +diff --git a/target/linux/ipq807x/modules.mk b/target/linux/ipq807x/modules.mk +new file mode 100644 +index 0000000000..0223ff2590 +--- /dev/null ++++ b/target/linux/ipq807x/modules.mk +@@ -0,0 +1,61 @@ ++define KernelPackage/usb-phy-ipq807x ++ TITLE:=DWC3 USB QCOM PHY driver for IPQ807x ++ DEPENDS:=@TARGET_ipq807x ++ KCONFIG:= \ ++ CONFIG_USB_QCOM_QUSB_PHY \ ++ CONFIG_USB_QCOM_QMP_PHY ++ FILES:= \ ++ $(LINUX_DIR)/drivers/usb/phy/phy-msm-qusb.ko \ ++ $(LINUX_DIR)/drivers/usb/phy/phy-msm-ssusb-qmp.ko ++ AUTOLOAD:=$(call AutoLoad,45,phy-msm-qusb phy-msm-ssusb-qmp,1) ++ $(call AddDepends/usb) ++endef ++ ++define KernelPackage/usb-phy-ipq807x/description ++ This driver provides support for the USB PHY drivers ++ within the IPQ807x SoCs. ++endef ++ ++$(eval $(call KernelPackage,usb-phy-ipq807x)) ++ ++ ++define KernelPackage/qrtr_mproc ++ TITLE:= Ath11k Specific kernel configs for IPQ807x and IPQ60xx ++ DEPENDS+= @TARGET_ipq807x ++ KCONFIG:= \ ++ CONFIG_QRTR=y \ ++ CONFIG_QRTR_MHI=y \ ++ CONFIG_MHI_BUS=y \ ++ CONFIG_MHI_QTI=y \ ++ CONFIG_QCOM_APCS_IPC=y \ ++ CONFIG_QCOM_GLINK_SSR=y \ ++ CONFIG_QCOM_Q6V5_WCSS=y \ ++ CONFIG_MSM_RPM_RPMSG=y \ ++ CONFIG_RPMSG_QCOM_GLINK_RPM=y \ ++ CONFIG_REGULATOR_RPM_GLINK=y \ ++ CONFIG_QCOM_SYSMON=y \ ++ CONFIG_RPMSG=y \ ++ CONFIG_RPMSG_CHAR=y \ ++ CONFIG_RPMSG_QCOM_GLINK_SMEM=y \ ++ CONFIG_RPMSG_QCOM_SMD=y \ ++ CONFIG_QRTR_SMD=y \ ++ CONFIG_QCOM_QMI_HELPERS=y \ ++ CONFIG_SAMPLES=y \ ++ CONFIG_SAMPLE_QMI_CLIENT=m \ ++ CONFIG_SAMPLE_TRACE_EVENTS=n \ ++ CONFIG_SAMPLE_KOBJECT=n \ ++ CONFIG_SAMPLE_KPROBES=n \ ++ CONFIG_SAMPLE_KRETPROBES=n \ ++ CONFIG_SAMPLE_HW_BREAKPOINT=n \ ++ CONFIG_SAMPLE_KFIFO=n \ ++ CONFIG_SAMPLE_CONFIGFS=n \ ++ CONFIG_SAMPLE_RPMSG_CLIENT=n \ ++ CONFIG_MAILBOX=y \ ++ CONFIG_DIAG_OVER_QRTR=y ++endef ++ ++define KernelPackage/qrtr_mproc/description ++Kernel configs for ath11k support specific to ipq807x and IPQ60xx ++endef ++ ++$(eval $(call KernelPackage,qrtr_mproc)) +diff --git a/target/linux/ipq807x/patches/100-qrtr-ns.patch b/target/linux/ipq807x/patches/100-qrtr-ns.patch +new file mode 100644 +index 0000000000..850e644778 +--- /dev/null ++++ b/target/linux/ipq807x/patches/100-qrtr-ns.patch +@@ -0,0 +1,976 @@ ++Index: linux-4.4.60/net/qrtr/ns.c ++=================================================================== ++--- /dev/null +++++ linux-4.4.60/net/qrtr/ns.c ++@@ -0,0 +1,760 @@ +++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +++/* +++ * Copyright (c) 2015, Sony Mobile Communications Inc. +++ * Copyright (c) 2013, The Linux Foundation. All rights reserved. +++ * Copyright (c) 2020, Linaro Ltd. +++ */ +++ +++#include +++#include +++#include +++#include +++ +++#include "qrtr.h" +++ +++#define CREATE_TRACE_POINTS +++#include +++ +++static RADIX_TREE(nodes, GFP_KERNEL); +++ +++static struct { +++ struct socket *sock; +++ struct sockaddr_qrtr bcast_sq; +++ struct list_head lookups; +++ struct workqueue_struct *workqueue; +++ struct work_struct work; +++ int local_node; +++} qrtr_ns; +++ +++static const char * const qrtr_ctrl_pkt_strings[] = { +++ [QRTR_TYPE_HELLO] = "hello", +++ [QRTR_TYPE_BYE] = "bye", +++ [QRTR_TYPE_NEW_SERVER] = "new-server", +++ [QRTR_TYPE_DEL_SERVER] = "del-server", +++ [QRTR_TYPE_DEL_CLIENT] = "del-client", +++ [QRTR_TYPE_RESUME_TX] = "resume-tx", +++ [QRTR_TYPE_EXIT] = "exit", +++ [QRTR_TYPE_PING] = "ping", +++ [QRTR_TYPE_NEW_LOOKUP] = "new-lookup", +++ [QRTR_TYPE_DEL_LOOKUP] = "del-lookup", +++}; +++ +++struct qrtr_server_filter { +++ unsigned int service; +++ unsigned int instance; +++ unsigned int ifilter; +++}; +++ +++struct qrtr_lookup { +++ unsigned int service; +++ unsigned int instance; +++ +++ struct sockaddr_qrtr sq; +++ struct list_head li; +++}; +++ +++struct qrtr_server { +++ unsigned int service; +++ unsigned int instance; +++ +++ unsigned int node; +++ unsigned int port; +++ +++ struct list_head qli; +++}; +++ +++struct qrtr_node { +++ unsigned int id; +++ struct radix_tree_root servers; +++}; +++ +++static struct qrtr_node *node_get(unsigned int node_id) +++{ +++ struct qrtr_node *node; +++ +++ node = radix_tree_lookup(&nodes, node_id); +++ if (node) +++ return node; +++ +++ /* If node didn't exist, allocate and insert it to the tree */ +++ node = kzalloc(sizeof(*node), GFP_KERNEL); +++ if (!node) +++ return NULL; +++ +++ node->id = node_id; +++ +++ radix_tree_insert(&nodes, node_id, node); +++ +++ return node; +++} +++ +++static int server_match(const struct qrtr_server *srv, +++ const struct qrtr_server_filter *f) +++{ +++ unsigned int ifilter = f->ifilter; +++ +++ if (f->service != 0 && srv->service != f->service) +++ return 0; +++ if (!ifilter && f->instance) +++ ifilter = ~0; +++ +++ return (srv->instance & ifilter) == f->instance; +++} +++ +++static int service_announce_new(struct sockaddr_qrtr *dest, +++ struct qrtr_server *srv) +++{ +++ struct qrtr_ctrl_pkt pkt; +++ struct msghdr msg = { }; +++ struct kvec iv; +++ +++ trace_qrtr_ns_service_announce_new(srv->service, srv->instance, +++ srv->node, srv->port); +++ +++ iv.iov_base = &pkt; +++ iv.iov_len = sizeof(pkt); +++ +++ memset(&pkt, 0, sizeof(pkt)); +++ pkt.cmd = cpu_to_le32(QRTR_TYPE_NEW_SERVER); +++ pkt.server.service = cpu_to_le32(srv->service); +++ pkt.server.instance = cpu_to_le32(srv->instance); +++ pkt.server.node = cpu_to_le32(srv->node); +++ pkt.server.port = cpu_to_le32(srv->port); +++ +++ msg.msg_name = (struct sockaddr *)dest; +++ msg.msg_namelen = sizeof(*dest); +++ +++ return kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt)); +++} +++ +++static int service_announce_del(struct sockaddr_qrtr *dest, +++ struct qrtr_server *srv) +++{ +++ struct qrtr_ctrl_pkt pkt; +++ struct msghdr msg = { }; +++ struct kvec iv; +++ int ret; +++ +++ trace_qrtr_ns_service_announce_del(srv->service, srv->instance, +++ srv->node, srv->port); +++ +++ iv.iov_base = &pkt; +++ iv.iov_len = sizeof(pkt); +++ +++ memset(&pkt, 0, sizeof(pkt)); +++ pkt.cmd = cpu_to_le32(QRTR_TYPE_DEL_SERVER); +++ pkt.server.service = cpu_to_le32(srv->service); +++ pkt.server.instance = cpu_to_le32(srv->instance); +++ pkt.server.node = cpu_to_le32(srv->node); +++ pkt.server.port = cpu_to_le32(srv->port); +++ +++ msg.msg_name = (struct sockaddr *)dest; +++ msg.msg_namelen = sizeof(*dest); +++ +++ ret = kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt)); +++ if (ret < 0) +++ pr_err("failed to announce del service\n"); +++ +++ return ret; +++} +++ +++static void lookup_notify(struct sockaddr_qrtr *to, struct qrtr_server *srv, +++ bool new) +++{ +++ struct qrtr_ctrl_pkt pkt; +++ struct msghdr msg = { }; +++ struct kvec iv; +++ int ret; +++ +++ iv.iov_base = &pkt; +++ iv.iov_len = sizeof(pkt); +++ +++ memset(&pkt, 0, sizeof(pkt)); +++ pkt.cmd = new ? cpu_to_le32(QRTR_TYPE_NEW_SERVER) : +++ cpu_to_le32(QRTR_TYPE_DEL_SERVER); +++ if (srv) { +++ pkt.server.service = cpu_to_le32(srv->service); +++ pkt.server.instance = cpu_to_le32(srv->instance); +++ pkt.server.node = cpu_to_le32(srv->node); +++ pkt.server.port = cpu_to_le32(srv->port); +++ } +++ +++ msg.msg_name = (struct sockaddr *)to; +++ msg.msg_namelen = sizeof(*to); +++ +++ ret = kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt)); +++ if (ret < 0) +++ pr_err("failed to send lookup notification\n"); +++} +++ +++static int announce_servers(struct sockaddr_qrtr *sq) +++{ +++ struct radix_tree_iter iter; +++ struct qrtr_server *srv; +++ struct qrtr_node *node; +++ void __rcu **slot; +++ int ret; +++ +++ node = node_get(qrtr_ns.local_node); +++ if (!node) +++ return 0; +++ +++ /* Announce the list of servers registered in this node */ +++ radix_tree_for_each_slot(slot, &node->servers, &iter, 0) { +++ srv = radix_tree_deref_slot(slot); +++ +++ ret = service_announce_new(sq, srv); +++ if (ret < 0) { +++ pr_err("failed to announce new service\n"); +++ return ret; +++ } +++ } +++ +++ return 0; +++} +++ +++static struct qrtr_server *server_add(unsigned int service, +++ unsigned int instance, +++ unsigned int node_id, +++ unsigned int port) +++{ +++ struct qrtr_server *srv; +++ struct qrtr_server *old; +++ struct qrtr_node *node; +++ +++ if (!service || !port) +++ return NULL; +++ +++ srv = kzalloc(sizeof(*srv), GFP_KERNEL); +++ if (!srv) +++ return NULL; +++ +++ srv->service = service; +++ srv->instance = instance; +++ srv->node = node_id; +++ srv->port = port; +++ +++ node = node_get(node_id); +++ if (!node) +++ goto err; +++ +++ /* Delete the old server on the same port */ +++ old = radix_tree_lookup(&node->servers, port); +++ if (old) { +++ radix_tree_delete(&node->servers, port); +++ kfree(old); +++ } +++ +++ radix_tree_insert(&node->servers, port, srv); +++ +++ trace_qrtr_ns_server_add(srv->service, srv->instance, +++ srv->node, srv->port); +++ +++ return srv; +++ +++err: +++ kfree(srv); +++ return NULL; +++} +++ +++static int server_del(struct qrtr_node *node, unsigned int port) +++{ +++ struct qrtr_lookup *lookup; +++ struct qrtr_server *srv; +++ struct list_head *li; +++ +++ srv = radix_tree_lookup(&node->servers, port); +++ if (!srv) +++ return -ENOENT; +++ +++ radix_tree_delete(&node->servers, port); +++ +++ /* Broadcast the removal of local servers */ +++ if (srv->node == qrtr_ns.local_node) +++ service_announce_del(&qrtr_ns.bcast_sq, srv); +++ +++ /* Announce the service's disappearance to observers */ +++ list_for_each(li, &qrtr_ns.lookups) { +++ lookup = container_of(li, struct qrtr_lookup, li); +++ if (lookup->service && lookup->service != srv->service) +++ continue; +++ if (lookup->instance && lookup->instance != srv->instance) +++ continue; +++ +++ lookup_notify(&lookup->sq, srv, false); +++ } +++ +++ kfree(srv); +++ +++ return 0; +++} +++ +++static int say_hello(struct sockaddr_qrtr *dest) +++{ +++ struct qrtr_ctrl_pkt pkt; +++ struct msghdr msg = { }; +++ struct kvec iv; +++ int ret; +++ +++ iv.iov_base = &pkt; +++ iv.iov_len = sizeof(pkt); +++ +++ memset(&pkt, 0, sizeof(pkt)); +++ pkt.cmd = cpu_to_le32(QRTR_TYPE_HELLO); +++ +++ msg.msg_name = (struct sockaddr *)dest; +++ msg.msg_namelen = sizeof(*dest); +++ +++ ret = kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt)); +++ if (ret < 0) +++ pr_err("failed to send hello msg\n"); +++ +++ return ret; +++} +++ +++/* Announce the list of servers registered on the local node */ +++static int ctrl_cmd_hello(struct sockaddr_qrtr *sq) +++{ +++ int ret; +++ +++ ret = say_hello(sq); +++ if (ret < 0) +++ return ret; +++ +++ return announce_servers(sq); +++} +++ +++static int ctrl_cmd_bye(struct sockaddr_qrtr *from) +++{ +++ struct qrtr_node *local_node; +++ struct radix_tree_iter iter; +++ struct qrtr_ctrl_pkt pkt; +++ struct qrtr_server *srv; +++ struct sockaddr_qrtr sq; +++ struct msghdr msg = { }; +++ struct qrtr_node *node; +++ void __rcu **slot; +++ struct kvec iv; +++ int ret; +++ +++ iv.iov_base = &pkt; +++ iv.iov_len = sizeof(pkt); +++ +++ node = node_get(from->sq_node); +++ if (!node) +++ return 0; +++ +++ /* Advertise removal of this client to all servers of remote node */ +++ radix_tree_for_each_slot(slot, &node->servers, &iter, 0) { +++ srv = radix_tree_deref_slot(slot); +++ server_del(node, srv->port); +++ } +++ +++ /* Advertise the removal of this client to all local servers */ +++ local_node = node_get(qrtr_ns.local_node); +++ if (!local_node) +++ return 0; +++ +++ memset(&pkt, 0, sizeof(pkt)); +++ pkt.cmd = cpu_to_le32(QRTR_TYPE_BYE); +++ pkt.client.node = cpu_to_le32(from->sq_node); +++ +++ radix_tree_for_each_slot(slot, &local_node->servers, &iter, 0) { +++ srv = radix_tree_deref_slot(slot); +++ +++ sq.sq_family = AF_QIPCRTR; +++ sq.sq_node = srv->node; +++ sq.sq_port = srv->port; +++ +++ msg.msg_name = (struct sockaddr *)&sq; +++ msg.msg_namelen = sizeof(sq); +++ +++ ret = kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt)); +++ if (ret < 0) { +++ pr_err("failed to send bye cmd\n"); +++ return ret; +++ } +++ } +++ +++ return 0; +++} +++ +++static int ctrl_cmd_del_client(struct sockaddr_qrtr *from, +++ unsigned int node_id, unsigned int port) +++{ +++ struct qrtr_node *local_node; +++ struct radix_tree_iter iter; +++ struct qrtr_lookup *lookup; +++ struct qrtr_ctrl_pkt pkt; +++ struct msghdr msg = { }; +++ struct qrtr_server *srv; +++ struct sockaddr_qrtr sq; +++ struct qrtr_node *node; +++ struct list_head *tmp; +++ struct list_head *li; +++ void __rcu **slot; +++ struct kvec iv; +++ int ret; +++ +++ iv.iov_base = &pkt; +++ iv.iov_len = sizeof(pkt); +++ +++ /* Don't accept spoofed messages */ +++ if (from->sq_node != node_id) +++ return -EINVAL; +++ +++ /* Local DEL_CLIENT messages comes from the port being closed */ +++ if (from->sq_node == qrtr_ns.local_node && from->sq_port != port) +++ return -EINVAL; +++ +++ /* Remove any lookups by this client */ +++ list_for_each_safe(li, tmp, &qrtr_ns.lookups) { +++ lookup = container_of(li, struct qrtr_lookup, li); +++ if (lookup->sq.sq_node != node_id) +++ continue; +++ if (lookup->sq.sq_port != port) +++ continue; +++ +++ list_del(&lookup->li); +++ kfree(lookup); +++ } +++ +++ /* Remove the server belonging to this port */ +++ node = node_get(node_id); +++ if (node) +++ server_del(node, port); +++ +++ /* Advertise the removal of this client to all local servers */ +++ local_node = node_get(qrtr_ns.local_node); +++ if (!local_node) +++ return 0; +++ +++ memset(&pkt, 0, sizeof(pkt)); +++ pkt.cmd = cpu_to_le32(QRTR_TYPE_DEL_CLIENT); +++ pkt.client.node = cpu_to_le32(node_id); +++ pkt.client.port = cpu_to_le32(port); +++ +++ radix_tree_for_each_slot(slot, &local_node->servers, &iter, 0) { +++ srv = radix_tree_deref_slot(slot); +++ +++ sq.sq_family = AF_QIPCRTR; +++ sq.sq_node = srv->node; +++ sq.sq_port = srv->port; +++ +++ msg.msg_name = (struct sockaddr *)&sq; +++ msg.msg_namelen = sizeof(sq); +++ +++ ret = kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt)); +++ if (ret < 0) { +++ pr_err("failed to send del client cmd\n"); +++ return ret; +++ } +++ } +++ +++ return 0; +++} +++ +++static int ctrl_cmd_new_server(struct sockaddr_qrtr *from, +++ unsigned int service, unsigned int instance, +++ unsigned int node_id, unsigned int port) +++{ +++ struct qrtr_lookup *lookup; +++ struct qrtr_server *srv; +++ struct list_head *li; +++ int ret = 0; +++ +++ /* Ignore specified node and port for local servers */ +++ if (from->sq_node == qrtr_ns.local_node) { +++ node_id = from->sq_node; +++ port = from->sq_port; +++ } +++ +++ /* Don't accept spoofed messages */ +++ if (from->sq_node != node_id) +++ return -EINVAL; +++ +++ srv = server_add(service, instance, node_id, port); +++ if (!srv) +++ return -EINVAL; +++ +++ if (srv->node == qrtr_ns.local_node) { +++ ret = service_announce_new(&qrtr_ns.bcast_sq, srv); +++ if (ret < 0) { +++ pr_err("failed to announce new service\n"); +++ return ret; +++ } +++ } +++ +++ /* Notify any potential lookups about the new server */ +++ list_for_each(li, &qrtr_ns.lookups) { +++ lookup = container_of(li, struct qrtr_lookup, li); +++ if (lookup->service && lookup->service != service) +++ continue; +++ if (lookup->instance && lookup->instance != instance) +++ continue; +++ +++ lookup_notify(&lookup->sq, srv, true); +++ } +++ +++ return ret; +++} +++ +++static int ctrl_cmd_del_server(struct sockaddr_qrtr *from, +++ unsigned int service, unsigned int instance, +++ unsigned int node_id, unsigned int port) +++{ +++ struct qrtr_node *node; +++ +++ /* Ignore specified node and port for local servers*/ +++ if (from->sq_node == qrtr_ns.local_node) { +++ node_id = from->sq_node; +++ port = from->sq_port; +++ } +++ +++ /* Don't accept spoofed messages */ +++ if (from->sq_node != node_id) +++ return -EINVAL; +++ +++ /* Local servers may only unregister themselves */ +++ if (from->sq_node == qrtr_ns.local_node && from->sq_port != port) +++ return -EINVAL; +++ +++ node = node_get(node_id); +++ if (!node) +++ return -ENOENT; +++ +++ return server_del(node, port); +++} +++ +++static int ctrl_cmd_new_lookup(struct sockaddr_qrtr *from, +++ unsigned int service, unsigned int instance) +++{ +++ struct radix_tree_iter node_iter; +++ struct qrtr_server_filter filter; +++ struct radix_tree_iter srv_iter; +++ struct qrtr_lookup *lookup; +++ struct qrtr_node *node; +++ void __rcu **node_slot; +++ void __rcu **srv_slot; +++ +++ /* Accept only local observers */ +++ if (from->sq_node != qrtr_ns.local_node) +++ return -EINVAL; +++ +++ lookup = kzalloc(sizeof(*lookup), GFP_KERNEL); +++ if (!lookup) +++ return -ENOMEM; +++ +++ lookup->sq = *from; +++ lookup->service = service; +++ lookup->instance = instance; +++ list_add_tail(&lookup->li, &qrtr_ns.lookups); +++ +++ memset(&filter, 0, sizeof(filter)); +++ filter.service = service; +++ filter.instance = instance; +++ +++ radix_tree_for_each_slot(node_slot, &nodes, &node_iter, 0) { +++ node = radix_tree_deref_slot(node_slot); +++ +++ radix_tree_for_each_slot(srv_slot, &node->servers, +++ &srv_iter, 0) { +++ struct qrtr_server *srv; +++ +++ srv = radix_tree_deref_slot(srv_slot); +++ if (!server_match(srv, &filter)) +++ continue; +++ +++ lookup_notify(from, srv, true); +++ } +++ } +++ +++ /* Empty notification, to indicate end of listing */ +++ lookup_notify(from, NULL, true); +++ +++ return 0; +++} +++ +++static void ctrl_cmd_del_lookup(struct sockaddr_qrtr *from, +++ unsigned int service, unsigned int instance) +++{ +++ struct qrtr_lookup *lookup; +++ struct list_head *tmp; +++ struct list_head *li; +++ +++ list_for_each_safe(li, tmp, &qrtr_ns.lookups) { +++ lookup = container_of(li, struct qrtr_lookup, li); +++ if (lookup->sq.sq_node != from->sq_node) +++ continue; +++ if (lookup->sq.sq_port != from->sq_port) +++ continue; +++ if (lookup->service != service) +++ continue; +++ if (lookup->instance && lookup->instance != instance) +++ continue; +++ +++ list_del(&lookup->li); +++ kfree(lookup); +++ } +++} +++ +++static void qrtr_ns_worker(struct work_struct *work) +++{ +++ const struct qrtr_ctrl_pkt *pkt; +++ size_t recv_buf_size = 4096; +++ struct sockaddr_qrtr sq; +++ struct msghdr msg = { }; +++ unsigned int cmd; +++ ssize_t msglen; +++ void *recv_buf; +++ struct kvec iv; +++ int ret; +++ +++ msg.msg_name = (struct sockaddr *)&sq; +++ msg.msg_namelen = sizeof(sq); +++ +++ recv_buf = kzalloc(recv_buf_size, GFP_KERNEL); +++ if (!recv_buf) +++ return; +++ +++ for (;;) { +++ iv.iov_base = recv_buf; +++ iv.iov_len = recv_buf_size; +++ +++ msglen = kernel_recvmsg(qrtr_ns.sock, &msg, &iv, 1, +++ iv.iov_len, MSG_DONTWAIT); +++ +++ if (msglen == -EAGAIN) +++ break; +++ +++ if (msglen < 0) { +++ pr_err("error receiving packet: %zd\n", msglen); +++ break; +++ } +++ +++ pkt = recv_buf; +++ cmd = le32_to_cpu(pkt->cmd); +++ if (cmd < ARRAY_SIZE(qrtr_ctrl_pkt_strings) && +++ qrtr_ctrl_pkt_strings[cmd]) +++ trace_qrtr_ns_message(qrtr_ctrl_pkt_strings[cmd], +++ sq.sq_node, sq.sq_port); +++ +++ ret = 0; +++ switch (cmd) { +++ case QRTR_TYPE_HELLO: +++ ret = ctrl_cmd_hello(&sq); +++ break; +++ case QRTR_TYPE_BYE: +++ ret = ctrl_cmd_bye(&sq); +++ break; +++ case QRTR_TYPE_DEL_CLIENT: +++ ret = ctrl_cmd_del_client(&sq, +++ le32_to_cpu(pkt->client.node), +++ le32_to_cpu(pkt->client.port)); +++ break; +++ case QRTR_TYPE_NEW_SERVER: +++ ret = ctrl_cmd_new_server(&sq, +++ le32_to_cpu(pkt->server.service), +++ le32_to_cpu(pkt->server.instance), +++ le32_to_cpu(pkt->server.node), +++ le32_to_cpu(pkt->server.port)); +++ break; +++ case QRTR_TYPE_DEL_SERVER: +++ ret = ctrl_cmd_del_server(&sq, +++ le32_to_cpu(pkt->server.service), +++ le32_to_cpu(pkt->server.instance), +++ le32_to_cpu(pkt->server.node), +++ le32_to_cpu(pkt->server.port)); +++ break; +++ case QRTR_TYPE_EXIT: +++ case QRTR_TYPE_PING: +++ case QRTR_TYPE_RESUME_TX: +++ break; +++ case QRTR_TYPE_NEW_LOOKUP: +++ ret = ctrl_cmd_new_lookup(&sq, +++ le32_to_cpu(pkt->server.service), +++ le32_to_cpu(pkt->server.instance)); +++ break; +++ case QRTR_TYPE_DEL_LOOKUP: +++ ctrl_cmd_del_lookup(&sq, +++ le32_to_cpu(pkt->server.service), +++ le32_to_cpu(pkt->server.instance)); +++ break; +++ } +++ +++ if (ret < 0) +++ pr_err("failed while handling packet from %d:%d", +++ sq.sq_node, sq.sq_port); +++ } +++ +++ kfree(recv_buf); +++} +++ +++static void qrtr_ns_data_ready(struct sock *sk) +++{ +++ queue_work(qrtr_ns.workqueue, &qrtr_ns.work); +++} +++ +++void qrtr_ns_init(void) +++{ +++ struct sockaddr_qrtr sq; +++ int sl = sizeof(sq); +++ int ret; +++ +++ INIT_LIST_HEAD(&qrtr_ns.lookups); +++ INIT_WORK(&qrtr_ns.work, qrtr_ns_worker); +++ +++ ret = sock_create_kern(&init_net, AF_QIPCRTR, SOCK_DGRAM, +++ PF_QIPCRTR, &qrtr_ns.sock); +++ if (ret < 0) +++ return; +++ +++ ret = kernel_getsockname(qrtr_ns.sock, (struct sockaddr *)&sq, &sl); +++ if (ret < 0) { +++ pr_err("failed to get socket name\n"); +++ goto err_sock; +++ } +++ +++ qrtr_ns.workqueue = alloc_workqueue("qrtr_ns_handler", WQ_UNBOUND, 1); +++ if (!qrtr_ns.workqueue) +++ goto err_sock; +++ +++ qrtr_ns.sock->sk->sk_data_ready = qrtr_ns_data_ready; +++ +++ sq.sq_port = QRTR_PORT_CTRL; +++ qrtr_ns.local_node = sq.sq_node; +++ +++ ret = kernel_bind(qrtr_ns.sock, (struct sockaddr *)&sq, sizeof(sq)); +++ if (ret < 0) { +++ pr_err("failed to bind to socket\n"); +++ goto err_wq; +++ } +++ +++ qrtr_ns.bcast_sq.sq_family = AF_QIPCRTR; +++ qrtr_ns.bcast_sq.sq_node = QRTR_NODE_BCAST; +++ qrtr_ns.bcast_sq.sq_port = QRTR_PORT_CTRL; +++ +++ ret = say_hello(&qrtr_ns.bcast_sq); +++ if (ret < 0) +++ goto err_wq; +++ +++ return; +++ +++err_wq: +++ destroy_workqueue(qrtr_ns.workqueue); +++err_sock: +++ sock_release(qrtr_ns.sock); +++} +++EXPORT_SYMBOL_GPL(qrtr_ns_init); +++ +++void qrtr_ns_remove(void) +++{ +++ cancel_work_sync(&qrtr_ns.work); +++ destroy_workqueue(qrtr_ns.workqueue); +++ sock_release(qrtr_ns.sock); +++} +++EXPORT_SYMBOL_GPL(qrtr_ns_remove); +++ +++MODULE_AUTHOR("Manivannan Sadhasivam "); +++MODULE_DESCRIPTION("Qualcomm IPC Router Nameservice"); +++MODULE_LICENSE("Dual BSD/GPL"); ++Index: linux-4.4.60/net/qrtr/qrtr.c ++=================================================================== ++--- linux-4.4.60.orig/net/qrtr/qrtr.c +++++ linux-4.4.60/net/qrtr/qrtr.c ++@@ -135,6 +135,8 @@ static DEFINE_IDR(qrtr_ports); ++ static DEFINE_MUTEX(qrtr_port_lock); ++ static DEFINE_MUTEX(qrtr_node_locking); ++ +++static struct delayed_work qrtr_ns_work; +++ ++ /** ++ * struct qrtr_node - endpoint node ++ * @ep_lock: lock for endpoint management and callbacks ++@@ -1765,33 +1767,6 @@ static int qrtr_create(struct net *net, ++ return 0; ++ } ++ ++-static const struct nla_policy qrtr_policy[IFA_MAX + 1] = { ++- [IFA_LOCAL] = { .type = NLA_U32 }, ++-}; ++- ++-static int qrtr_addr_doit(struct sk_buff *skb, struct nlmsghdr *nlh) ++-{ ++- struct nlattr *tb[IFA_MAX + 1]; ++- struct ifaddrmsg *ifm; ++- int rc; ++- ++- if (!netlink_capable(skb, CAP_NET_ADMIN)) ++- return -EPERM; ++- ++- ASSERT_RTNL(); ++- ++- rc = nlmsg_parse(nlh, sizeof(*ifm), tb, IFA_MAX, qrtr_policy); ++- if (rc < 0) ++- return rc; ++- ++- ifm = nlmsg_data(nlh); ++- if (!tb[IFA_LOCAL]) ++- return -EINVAL; ++- ++- qrtr_local_nid = nla_get_u32(tb[IFA_LOCAL]); ++- return 0; ++-} ++- ++ static const struct net_proto_family qrtr_family = { ++ .owner = THIS_MODULE, ++ .family = AF_QIPCRTR, ++@@ -1811,7 +1786,8 @@ static int __init qrtr_proto_init(void) ++ proto_unregister(&qrtr_proto); ++ return rc; ++ } ++- rtnl_register(PF_QIPCRTR, RTM_NEWADDR, qrtr_addr_doit, NULL, NULL); +++ +++ qrtr_ns_init(); ++ ++ return 0; ++ } ++@@ -1819,7 +1795,8 @@ postcore_initcall(qrtr_proto_init); ++ ++ static void __exit qrtr_proto_fini(void) ++ { ++- rtnl_unregister(PF_QIPCRTR, RTM_NEWADDR); +++ cancel_delayed_work_sync(&qrtr_ns_work); +++ qrtr_ns_remove(); ++ sock_unregister(qrtr_family.family); ++ proto_unregister(&qrtr_proto); ++ } ++Index: linux-4.4.60/net/qrtr/qrtr.h ++=================================================================== ++--- linux-4.4.60.orig/net/qrtr/qrtr.h +++++ linux-4.4.60/net/qrtr/qrtr.h ++@@ -33,4 +33,9 @@ void qrtr_endpoint_unregister(struct qrt ++ int qrtr_endpoint_post(struct qrtr_endpoint *ep, const void *data, size_t len); ++ ++ int qrtr_peek_pkt_size(const void *data); +++ +++void qrtr_ns_init(void); +++ +++void qrtr_ns_remove(void); +++ ++ #endif ++Index: linux-4.4.60/net/qrtr/Makefile ++=================================================================== ++--- linux-4.4.60.orig/net/qrtr/Makefile +++++ linux-4.4.60/net/qrtr/Makefile ++@@ -1,4 +1,4 @@ ++-obj-$(CONFIG_QRTR) := qrtr.o +++obj-$(CONFIG_QRTR) := qrtr.o ns.o ++ ++ obj-$(CONFIG_QRTR_SMD) += qrtr-smd.o ++ qrtr-smd-y := smd.o ++Index: linux-4.4.60/include/trace/events/qrtr.h ++=================================================================== ++--- /dev/null +++++ linux-4.4.60/include/trace/events/qrtr.h ++@@ -0,0 +1,115 @@ +++/* SPDX-License-Identifier: GPL-2.0 */ +++#undef TRACE_SYSTEM +++#define TRACE_SYSTEM qrtr +++ +++#if !defined(_TRACE_QRTR_H) || defined(TRACE_HEADER_MULTI_READ) +++#define _TRACE_QRTR_H +++ +++#include +++#include +++ +++TRACE_EVENT(qrtr_ns_service_announce_new, +++ +++ TP_PROTO(__le32 service, __le32 instance, __le32 node, __le32 port), +++ +++ TP_ARGS(service, instance, node, port), +++ +++ TP_STRUCT__entry( +++ __field(__le32, service) +++ __field(__le32, instance) +++ __field(__le32, node) +++ __field(__le32, port) +++ ), +++ +++ TP_fast_assign( +++ __entry->service = service; +++ __entry->instance = instance; +++ __entry->node = node; +++ __entry->port = port; +++ ), +++ +++ TP_printk("advertising new server [%d:%x]@[%d:%d]", +++ __entry->service, __entry->instance, __entry->node, +++ __entry->port +++ ) +++); +++ +++TRACE_EVENT(qrtr_ns_service_announce_del, +++ +++ TP_PROTO(__le32 service, __le32 instance, __le32 node, __le32 port), +++ +++ TP_ARGS(service, instance, node, port), +++ +++ TP_STRUCT__entry( +++ __field(__le32, service) +++ __field(__le32, instance) +++ __field(__le32, node) +++ __field(__le32, port) +++ ), +++ +++ TP_fast_assign( +++ __entry->service = service; +++ __entry->instance = instance; +++ __entry->node = node; +++ __entry->port = port; +++ ), +++ +++ TP_printk("advertising removal of server [%d:%x]@[%d:%d]", +++ __entry->service, __entry->instance, __entry->node, +++ __entry->port +++ ) +++); +++ +++TRACE_EVENT(qrtr_ns_server_add, +++ +++ TP_PROTO(__le32 service, __le32 instance, __le32 node, __le32 port), +++ +++ TP_ARGS(service, instance, node, port), +++ +++ TP_STRUCT__entry( +++ __field(__le32, service) +++ __field(__le32, instance) +++ __field(__le32, node) +++ __field(__le32, port) +++ ), +++ +++ TP_fast_assign( +++ __entry->service = service; +++ __entry->instance = instance; +++ __entry->node = node; +++ __entry->port = port; +++ ), +++ +++ TP_printk("add server [%d:%x]@[%d:%d]", +++ __entry->service, __entry->instance, __entry->node, +++ __entry->port +++ ) +++); +++ +++TRACE_EVENT(qrtr_ns_message, +++ +++ TP_PROTO(const char * const ctrl_pkt_str, __u32 sq_node, __u32 sq_port), +++ +++ TP_ARGS(ctrl_pkt_str, sq_node, sq_port), +++ +++ TP_STRUCT__entry( +++ __string(ctrl_pkt_str, ctrl_pkt_str) +++ __field(__u32, sq_node) +++ __field(__u32, sq_port) +++ ), +++ +++ TP_fast_assign( +++ __assign_str(ctrl_pkt_str, ctrl_pkt_str); +++ __entry->sq_node = sq_node; +++ __entry->sq_port = sq_port; +++ ), +++ +++ TP_printk("%s from %d:%d", +++ __get_str(ctrl_pkt_str), __entry->sq_node, __entry->sq_port +++ ) +++); +++ +++#endif /* _TRACE_QRTR_H */ +++ +++/* This part must be outside protection */ +++#include +diff --git a/target/linux/ipq807x/patches/101-squashfs.patch b/target/linux/ipq807x/patches/101-squashfs.patch +new file mode 100644 +index 0000000000..5744a2a5bf +--- /dev/null ++++ b/target/linux/ipq807x/patches/101-squashfs.patch +@@ -0,0 +1,16 @@ ++Index: linux-4.4.60/fs/squashfs/xz_wrapper.c ++=================================================================== ++--- linux-4.4.60.orig/fs/squashfs/xz_wrapper.c +++++ linux-4.4.60/fs/squashfs/xz_wrapper.c ++@@ -40,10 +40,8 @@ struct squashfs_xz { ++ }; ++ ++ struct disk_comp_opts { ++- __le32 flags; ++- __le16 bit_opts; ++- __le16 fb; ++ __le32 dictionary_size; +++ __le32 flags; ++ }; ++ ++ struct comp_opts { +diff --git a/target/linux/ipq807x/patches/102-cig-wf188.patch b/target/linux/ipq807x/patches/102-cig-wf188.patch +new file mode 100644 +index 0000000000..05c736dfd7 +--- /dev/null ++++ b/target/linux/ipq807x/patches/102-cig-wf188.patch +@@ -0,0 +1,869 @@ ++Index: linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/Makefile ++=================================================================== ++--- linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1.orig/arch/arm64/boot/dts/qcom/Makefile +++++ linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/Makefile ++@@ -30,6 +30,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \ ++ qcom-ipq6018-cp01-c4.dtb \ ++ qcom-ipq6018-cp02-c1.dtb \ ++ qcom-ipq6018-cp03-c1.dtb \ +++ qcom-ipq6018-cig-wf188.dts \ +++ qcom-ipq6018-cig-wf188n.dts \ ++ qcom-ipq807x-hk01.dtb \ ++ qcom-ipq807x-hk01.c2.dtb \ ++ qcom-ipq807x-hk01.c3.dtb \ ++Index: linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/qcom-ipq6018-cig-wf188.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/qcom-ipq6018-cig-wf188.dts ++@@ -0,0 +1,423 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++ +++#include "qcom-ipq6018.dtsi" +++#include "qcom-ipq6018-rpm-regulator.dtsi" +++#include "qcom-ipq6018-cpr-regulator.dtsi" +++#include "qcom-ipq6018-cp-cpu.dtsi" +++#include +++#include +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "Cigtech WF-188"; +++ compatible = "cig,wf188", "qcom,ipq6018-cp03", "qcom,ipq6018"; +++ interrupt-parent = <&intc>; +++ +++ aliases { +++ serial0 = &blsp1_uart3; +++ serial1 = &blsp1_uart2; +++ +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ ethernet1 = "/soc/dp2"; +++ +++ led-boot = &led_power; +++ led-failsafe = &led_power; +++ led-running = &led_power; +++ led-upgrade = &led_power; +++ }; +++ +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; +++ bootargs-append = " swiotlb=1 coherent_pool=2M"; +++ }; +++ +++ /* +++ * +=========+==============+========================+ +++ * | | | | +++ * | Region | Start Offset | Size | +++ * | | | | +++ * +--------+--------------+-------------------------+ +++ * | | | | +++ * | | | | +++ * | | | | +++ * | | | | +++ * | Linux | 0x41000000 | 139MB | +++ * | | | | +++ * | | | | +++ * | | | | +++ * +--------+--------------+-------------------------+ +++ * | TZ App | 0x49B00000 | 6MB | +++ * +--------+--------------+-------------------------+ +++ * +++ * From the available 145 MB for Linux in the first 256 MB, +++ * we are reserving 6 MB for TZAPP. +++ * +++ * Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi +++ * for memory layout. +++ */ +++ +++/* TZAPP is enabled only in default memory profile */ +++#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__) +++ reserved-memory { +++ tzapp:tzapp@49B00000 { /* TZAPPS */ +++ no-map; +++ reg = <0x0 0x49B00000 0x0 0x00600000>; +++ }; +++ }; +++#endif +++}; +++ +++&tlmm { +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio44", "gpio45"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ qpic_pad { +++ pins = "gpio1", "gpio3", "gpio4", +++ "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ button_pins: button_pins { +++ wps_button { +++ pins = "gpio22"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio64"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio65"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_2 { +++ pins = "gpio75"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ }; +++ +++ leds_pins: leds_pins { +++ led_5g { +++ pins = "gpio25"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_2g { +++ pins = "gpio24"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_eth { +++ pins = "gpio18"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_pwr { +++ pins = "gpio16"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ uart2_pins: uart2_pins { +++ mux { +++ pins = "gpio57", "gpio58"; +++ function = "blsp4_uart"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++}; +++ +++&soc { +++ mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 75 0>; +++ status = "ok"; +++ phy0: ethernet-phy@0 { +++ reg = <3>; +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <4>; +++ }; +++ }; +++ +++ +++ ess-switch@3a000000 { +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x08>; /* lan port bitmap */ +++ switch_wan_bmp = <0x10>; /* wan port bitmap */ +++ switch_inner_bmp = <0xc0>; /*inner port bitmap*/ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ +++ qcom,port_phyinfo { +++ port@3 { +++ port_id = <3>; +++ phy_address = <4>; +++ }; +++ port@4 { +++ port_id = <4>; +++ phy_address = <3>; +++ }; +++ }; +++ }; +++ +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <3>; +++ reg = <0x3a001400 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <4>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp2 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <4>; +++ reg = <0x3a001600 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <3>; +++ phy-mode = "sgmii"; +++ +++ }; +++ +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ wps { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&leds_pins>; +++ pinctrl-names = "default"; +++ +++ led@25 { +++ label = "green:wifi5"; +++ gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:5g"; +++ default-state = "off"; +++ }; +++ led@24 { +++ label = "green:wifi2"; +++ gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:2g"; +++ default-state = "off"; +++ }; +++ led@18 { +++ label = "green:wan"; +++ gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:eth"; +++ default-state = "off"; +++ }; +++ led_power: led@16 { +++ label = "green:power"; +++ gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:power"; +++ default-state = "off"; +++ }; +++ }; +++ +++ gpio-watchdog { +++ compatible = "linux,wdt-gpio"; +++ gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; +++ hw_algo = "toggle"; +++ hw_margin_ms = <5000>; +++ always-running; +++ }; +++}; +++ +++&blsp1_uart3 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&blsp1_uart2 { +++ pinctrl-0 = <&uart2_pins>; +++ pinctrl-names = "default"; +++ dmas = <&blsp_dma 2>, +++ <&blsp_dma 3>; +++ dma-names = "tx", "rx"; +++ status = "ok"; +++}; +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "disabled"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&usb3 { +++ status = "ok"; +++}; +++ +++&nss_crypto { +++ status = "ok"; +++}; +++ +++&cpu0_opp_table { +++ compatible = "operating-points-v2"; +++ opp-shared; +++ opp03 { +++ opp-hz = /bits/ 64 <1200000000>; +++ opp-microvolt = <3>; +++ clock-latency-ns = <200000>; +++ }; +++ /delete-node/ opp04; +++ /delete-node/ opp05; +++ /delete-node/ opp06; +++}; +++ +++/* TZAPP is enabled in default memory profile only */ +++#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__) +++&qseecom { +++ mem-start = <0x49B00000>; +++ mem-size = <0x600000>; +++ status = "ok"; +++}; +++#endif ++Index: linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/qcom-ipq6018-cig-wf188n.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/qcom-ipq6018-cig-wf188n.dts ++@@ -0,0 +1,423 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++ +++#include "qcom-ipq6018.dtsi" +++#include "qcom-ipq6018-rpm-regulator.dtsi" +++#include "qcom-ipq6018-cpr-regulator.dtsi" +++#include "qcom-ipq6018-cp-cpu.dtsi" +++#include +++#include +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "Cigtech WF-188n"; +++ compatible = "cig,wf188n", "qcom,ipq6018-cp03", "qcom,ipq6018"; +++ interrupt-parent = <&intc>; +++ +++ aliases { +++ serial0 = &blsp1_uart3; +++ serial1 = &blsp1_uart2; +++ +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ ethernet1 = "/soc/dp2"; +++ +++ led-boot = &led_power; +++ led-failsafe = &led_power; +++ led-running = &led_power; +++ led-upgrade = &led_power; +++ }; +++ +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; +++ bootargs-append = " swiotlb=1 coherent_pool=2M"; +++ }; +++ +++ /* +++ * +=========+==============+========================+ +++ * | | | | +++ * | Region | Start Offset | Size | +++ * | | | | +++ * +--------+--------------+-------------------------+ +++ * | | | | +++ * | | | | +++ * | | | | +++ * | | | | +++ * | Linux | 0x41000000 | 139MB | +++ * | | | | +++ * | | | | +++ * | | | | +++ * +--------+--------------+-------------------------+ +++ * | TZ App | 0x49B00000 | 6MB | +++ * +--------+--------------+-------------------------+ +++ * +++ * From the available 145 MB for Linux in the first 256 MB, +++ * we are reserving 6 MB for TZAPP. +++ * +++ * Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi +++ * for memory layout. +++ */ +++ +++/* TZAPP is enabled only in default memory profile */ +++#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__) +++ reserved-memory { +++ tzapp:tzapp@49B00000 { /* TZAPPS */ +++ no-map; +++ reg = <0x0 0x49B00000 0x0 0x00600000>; +++ }; +++ }; +++#endif +++}; +++ +++&tlmm { +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio44", "gpio45"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ qpic_pad { +++ pins = "gpio1", "gpio3", "gpio4", +++ "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ button_pins: button_pins { +++ wps_button { +++ pins = "gpio22"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio64"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio65"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_2 { +++ pins = "gpio75"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ }; +++ +++ leds_pins: leds_pins { +++ led_5g { +++ pins = "gpio25"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_2g { +++ pins = "gpio24"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_eth { +++ pins = "gpio18"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_pwr { +++ pins = "gpio16"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ uart2_pins: uart2_pins { +++ mux { +++ pins = "gpio57", "gpio58"; +++ function = "blsp4_uart"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++}; +++ +++&soc { +++ mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 75 0>; +++ status = "ok"; +++ phy0: ethernet-phy@0 { +++ reg = <3>; +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <4>; +++ }; +++ }; +++ +++ +++ ess-switch@3a000000 { +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x08>; /* lan port bitmap */ +++ switch_wan_bmp = <0x10>; /* wan port bitmap */ +++ switch_inner_bmp = <0xc0>; /*inner port bitmap*/ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ +++ qcom,port_phyinfo { +++ port@3 { +++ port_id = <3>; +++ phy_address = <4>; +++ }; +++ port@4 { +++ port_id = <4>; +++ phy_address = <3>; +++ }; +++ }; +++ }; +++ +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <3>; +++ reg = <0x3a001400 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <4>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp2 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <4>; +++ reg = <0x3a001600 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <3>; +++ phy-mode = "sgmii"; +++ +++ }; +++ +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ wps { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 22 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&leds_pins>; +++ pinctrl-names = "default"; +++ +++ led@25 { +++ label = "green:wifi5"; +++ gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:5g"; +++ default-state = "off"; +++ }; +++ led@24 { +++ label = "green:wifi2"; +++ gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:2g"; +++ default-state = "off"; +++ }; +++ led@18 { +++ label = "green:wan"; +++ gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:eth"; +++ default-state = "off"; +++ }; +++ led_power: led@16 { +++ label = "green:power"; +++ gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:power"; +++ default-state = "on"; +++ }; +++ }; +++ +++ gpio-watchdog { +++ compatible = "linux,wdt-gpio"; +++ gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; +++ hw_algo = "toggle"; +++ hw_margin_ms = <5000>; +++ always-running; +++ }; +++}; +++ +++&blsp1_uart3 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&blsp1_uart2 { +++ pinctrl-0 = <&uart2_pins>; +++ pinctrl-names = "default"; +++ dmas = <&blsp_dma 2>, +++ <&blsp_dma 3>; +++ dma-names = "tx", "rx"; +++ status = "ok"; +++}; +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&usb3 { +++ status = "ok"; +++}; +++ +++&nss_crypto { +++ status = "ok"; +++}; +++ +++&cpu0_opp_table { +++ compatible = "operating-points-v2"; +++ opp-shared; +++ opp03 { +++ opp-hz = /bits/ 64 <1200000000>; +++ opp-microvolt = <3>; +++ clock-latency-ns = <200000>; +++ }; +++ /delete-node/ opp04; +++ /delete-node/ opp05; +++ /delete-node/ opp06; +++}; +++ +++/* TZAPP is enabled in default memory profile only */ +++#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__) +++&qseecom { +++ mem-start = <0x49B00000>; +++ mem-size = <0x600000>; +++ status = "ok"; +++}; +++#endif +diff --git a/target/linux/ipq807x/patches/103-sercomm-wallaby.patch b/target/linux/ipq807x/patches/103-sercomm-wallaby.patch +new file mode 100644 +index 0000000000..c6d12fe963 +--- /dev/null ++++ b/target/linux/ipq807x/patches/103-sercomm-wallaby.patch +@@ -0,0 +1,816 @@ ++Index: linux-4.4.60-qsdk/arch/arm64/boot/dts/qcom/Makefile ++=================================================================== ++--- linux-4.4.60-qsdk.orig/arch/arm64/boot/dts/qcom/Makefile +++++ linux-4.4.60-qsdk/arch/arm64/boot/dts/qcom/Makefile ++@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ ++ qcom-ipq807x-ac04.dtb \ ++ qcom-ipq807x-oak02.dtb \ ++ qcom-ipq807x-oak03.dtb \ +++ qcom-ipq807x-sercomm-wallaby.dtb \ ++ qcom-ipq807x-db.hk01.dtb \ ++ qcom-ipq807x-db.hk02.dtb ++ ++Index: linux-4.4.60-qsdk/arch/arm64/boot/dts/qcom/qcom-ipq807x-sercomm-wallaby.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk/arch/arm64/boot/dts/qcom/qcom-ipq807x-sercomm-wallaby.dts ++@@ -0,0 +1,799 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++#include "qcom-ipq807x-soc.dtsi" +++#include "qcom-ipq807x-hk-cpu.dtsi" +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "Sercomm Wallaby"; +++ compatible = "sercomm,wallaby", "qcom,ipq807x-hk09", "qcom,ipq807x"; +++ qcom,msm-id = <0x156 0x0>; +++ interrupt-parent = <&intc>; +++ qcom,board-id = <0x8 0x0>; +++ qcom,pmic-id = <0x0 0x0 0x0 0x0>; +++ +++ aliases { +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet3 = "/soc/dp4"; +++ ethernet4 = "/soc/dp5"; +++ +++ led-boot = &led_green; +++ led-failsafe = &led_green; +++ led-running = &led_green; +++ led-upgrade = &led_blue; +++ }; +++}; +++ +++&tlmm { +++ pinctrl-0 = <&btcoex_pins>; +++ pinctrl-names = "default"; +++ +++ btcoex_pins: btcoex_pins { +++ mux_0 { +++ pins = "gpio64"; +++ function = "pta1_1"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_1 { +++ pins = "gpio65"; +++ function = "pta1_2"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_2 { +++ pins = "gpio66"; +++ function = "pta1_0"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio68"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio69"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_2 { +++ pins = "gpio25"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ mux_3 { +++ pins = "gpio44"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ }; +++ +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio23", "gpio24"; +++ function = "blsp4_uart1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_3_pins: spi_3_pins { +++ mux { +++ pins = "gpio50", "gpio52", "gpio53"; +++ function = "blsp3_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ spi_cs { +++ pins = "gpio22"; +++ function = "blsp3_spi2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ quartz_interrupt { +++ pins = "gpio47"; +++ function = "gpio"; +++ input; +++ bias-disable; +++ }; +++ quartz_reset { +++ pins = "gpio21"; +++ function = "gpio"; +++ output-low; +++ bias-disable; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ qpic_pad { +++ pins = "gpio1", "gpio3", "gpio4", +++ "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ hsuart_pins: hsuart_pins { +++ mux { +++ pins = "gpio46", "gpio47", "gpio48", "gpio49"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ button_pins: button_pins { +++ reset_button { +++ pins = "gpio33"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ led_pins: led_pins { +++ led_wan { +++ pins = "gpio31"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ +++ led_lan { +++ pins = "gpio32"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ +++ led_blue { +++ pins = "gpio60"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ +++ led_green { +++ pins = "gpio61"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ +++ led_red { +++ pins = "gpio62"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ usb_mux_sel_pins: usb_mux_pins { +++ mux { +++ pins = "gpio27"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ pcie0_pins: pcie_pins { +++ pcie0_rst { +++ pins = "gpio58"; +++ function = "pcie0_rst"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ pcie0_wake { +++ pins = "gpio59"; +++ function = "pcie0_wake"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++}; +++ +++&soc { +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ button@1 { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ }; +++ }; +++ +++ mdio: mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 37 0 &tlmm 25 1 &tlmm 44 1>; +++ compatible = "qcom,ipq40xx-mdio", "qcom,qca-mdio"; +++ phy3: ethernet-phy@3 { +++ reg = <3>; +++ }; +++ phy4: ethernet-phy@4 { +++ reg = <4>; +++ }; +++ }; +++ +++ ess-switch@3a000000 { +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x10>; /* lan port bitmap */ +++ switch_wan_bmp = <0x20>; /* wan port bitmap */ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ +++ bm_tick_mode = <0>; /* bm tick mode */ +++ tm_tick_mode = <0>; /* tm tick mode */ +++ qcom,port_phyinfo { +++ port@0 { +++ port_id = <1>; +++ phy_address = <0>; +++ }; +++ port@1 { +++ port_id = <2>; +++ phy_address = <1>; +++ }; +++ port@2 { +++ port_id = <3>; +++ phy_address = <2>; +++ }; +++ port@3 { +++ port_id = <4>; +++ phy_address = <3>; +++ }; +++ port@4 { +++ port_id = <5>; +++ phy_address = <4>; +++/* port_mac_sel = "QGMAC_PORT"; */ +++ }; +++/* port@5 { +++ port_id = <6>; +++ phy_address = <28>; +++ port_mac_sel = "QGMAC_PORT"; +++ };*/ +++ }; +++ port_scheduler_resource { +++ port@0 { +++ port_id = <0>; +++ ucast_queue = <0 143>; +++ mcast_queue = <256 271>; +++ l0sp = <0 35>; +++ l0cdrr = <0 47>; +++ l0edrr = <0 47>; +++ l1cdrr = <0 7>; +++ l1edrr = <0 7>; +++ }; +++ port@1 { +++ port_id = <1>; +++ ucast_queue = <144 159>; +++ mcast_queue = <272 275>; +++ l0sp = <36 39>; +++ l0cdrr = <48 63>; +++ l0edrr = <48 63>; +++ l1cdrr = <8 11>; +++ l1edrr = <8 11>; +++ }; +++ port@2 { +++ port_id = <2>; +++ ucast_queue = <160 175>; +++ mcast_queue = <276 279>; +++ l0sp = <40 43>; +++ l0cdrr = <64 79>; +++ l0edrr = <64 79>; +++ l1cdrr = <12 15>; +++ l1edrr = <12 15>; +++ }; +++ port@3 { +++ port_id = <3>; +++ ucast_queue = <176 191>; +++ mcast_queue = <280 283>; +++ l0sp = <44 47>; +++ l0cdrr = <80 95>; +++ l0edrr = <80 95>; +++ l1cdrr = <16 19>; +++ l1edrr = <16 19>; +++ }; +++ port@4 { +++ port_id = <4>; +++ ucast_queue = <192 207>; +++ mcast_queue = <284 287>; +++ l0sp = <48 51>; +++ l0cdrr = <96 111>; +++ l0edrr = <96 111>; +++ l1cdrr = <20 23>; +++ l1edrr = <20 23>; +++ }; +++ port@5 { +++ port_id = <5>; +++ ucast_queue = <208 223>; +++ mcast_queue = <288 291>; +++ l0sp = <52 55>; +++ l0cdrr = <112 127>; +++ l0edrr = <112 127>; +++ l1cdrr = <24 27>; +++ l1edrr = <24 27>; +++ }; +++ port@6 { +++ port_id = <6>; +++ ucast_queue = <224 239>; +++ mcast_queue = <292 295>; +++ l0sp = <56 59>; +++ l0cdrr = <128 143>; +++ l0edrr = <128 143>; +++ l1cdrr = <28 31>; +++ l1edrr = <28 31>; +++ }; +++ port@7 { +++ port_id = <7>; +++ ucast_queue = <240 255>; +++ mcast_queue = <296 299>; +++ l0sp = <60 63>; +++ l0cdrr = <144 159>; +++ l0edrr = <144 159>; +++ l1cdrr = <32 35>; +++ l1edrr = <32 35>; +++ }; +++ }; +++ port_scheduler_config { +++ port@0 { +++ port_id = <0>; +++ l1scheduler { +++ group@0 { +++ sp = <0 1>; /*L0 SPs*/ +++ /*cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ /*unicast queues*/ +++ ucast_queue = <0 4 8>; +++ /*multicast queues*/ +++ mcast_queue = <256 260>; +++ /*sp cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0 0>; +++ }; +++ group@1 { +++ ucast_queue = <1 5 9>; +++ mcast_queue = <257 261>; +++ cfg = <0 1 1 1 1>; +++ }; +++ group@2 { +++ ucast_queue = <2 6 10>; +++ mcast_queue = <258 262>; +++ cfg = <0 2 2 2 2>; +++ }; +++ group@3 { +++ ucast_queue = <3 7 11>; +++ mcast_queue = <259 263>; +++ cfg = <0 3 3 3 3>; +++ }; +++ }; +++ }; +++ port@1 { +++ port_id = <1>; +++ l1scheduler { +++ group@0 { +++ sp = <36>; +++ cfg = <0 8 0 8>; +++ }; +++ group@1 { +++ sp = <37>; +++ cfg = <1 9 1 9>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <144>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <272>; +++ mcast_loop_pri = <4>; +++ cfg = <36 0 48 0 48>; +++ }; +++ }; +++ }; +++ port@2 { +++ port_id = <2>; +++ l1scheduler { +++ group@0 { +++ sp = <40>; +++ cfg = <0 12 0 12>; +++ }; +++ group@1 { +++ sp = <41>; +++ cfg = <1 13 1 13>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <160>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <276>; +++ mcast_loop_pri = <4>; +++ cfg = <40 0 64 0 64>; +++ }; +++ }; +++ }; +++ port@3 { +++ port_id = <3>; +++ l1scheduler { +++ group@0 { +++ sp = <44>; +++ cfg = <0 16 0 16>; +++ }; +++ group@1 { +++ sp = <45>; +++ cfg = <1 17 1 17>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <176>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <280>; +++ mcast_loop_pri = <4>; +++ cfg = <44 0 80 0 80>; +++ }; +++ }; +++ }; +++ port@4 { +++ port_id = <4>; +++ l1scheduler { +++ group@0 { +++ sp = <48>; +++ cfg = <0 20 0 20>; +++ }; +++ group@1 { +++ sp = <49>; +++ cfg = <1 21 1 21>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <192>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <284>; +++ mcast_loop_pri = <4>; +++ cfg = <48 0 96 0 96>; +++ }; +++ }; +++ }; +++ port@5 { +++ port_id = <5>; +++ l1scheduler { +++ group@0 { +++ sp = <52>; +++ cfg = <0 24 0 24>; +++ }; +++ group@1 { +++ sp = <53>; +++ cfg = <1 25 1 25>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <208>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <288>; +++ mcast_loop_pri = <4>; +++ cfg = <52 0 112 0 112>; +++ }; +++ }; +++ }; +++ port@6 { +++ port_id = <6>; +++ l1scheduler { +++ group@0 { +++ sp = <56>; +++ cfg = <0 28 0 28>; +++ }; +++ group@1 { +++ sp = <57>; +++ cfg = <1 29 1 29>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <224>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <292>; +++ mcast_loop_pri = <4>; +++ cfg = <56 0 128 0 128>; +++ }; +++ }; +++ }; +++ port@7 { +++ port_id = <7>; +++ l1scheduler { +++ group@0 { +++ sp = <60>; +++ cfg = <0 32 0 32>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <240>; +++ mcast_queue = <296>; +++ cfg = <60 0 144 0 144>; +++ }; +++ }; +++ }; +++ }; +++ }; +++ +++ dp4 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <4>; +++ reg = <0x3a001600 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <3>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp5 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <5>; +++ reg = <0x3a003000 0x3fff>; +++ qcom,mactype = <1>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <4>; +++ phy-mode = "sgmii"; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&led_pins>; +++ pinctrl-names = "default"; +++ +++ led_wan { +++ label = "wallaby:green:wan"; +++ gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; +++ default-state = "off"; +++ }; +++ +++ led_lan { +++ label = "wallaby:green:lan"; +++ gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; +++ default-state = "off"; +++ }; +++ +++ led_blue: led_blue { +++ label = "wallaby:blue:status"; +++ gpio = <&tlmm 60 GPIO_ACTIVE_HIGH>; +++ default-state = "off"; +++ }; +++ +++ led_green: led_green { +++ label = "wallaby:green:status"; +++ gpio = <&tlmm 61 GPIO_ACTIVE_HIGH>; +++ default-state = "off"; +++ }; +++ +++ led_red { +++ label = "wallaby:red:status"; +++ gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>; +++ default-state = "off"; +++ }; +++ +++ }; +++ nss-macsec0 { +++ compatible = "qcom,nss-macsec"; +++ phy_addr = <0x18>; +++ phy_access_mode = <0>; +++ mdiobus = <&mdio>; +++ }; +++ nss-macsec1 { +++ compatible = "qcom,nss-macsec"; +++ phy_addr = <0x1c>; +++ phy_access_mode = <0>; +++ mdiobus = <&mdio>; +++ }; +++}; +++ +++&serial_blsp4 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { /* BLSP1 QUP1 */ +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&spi_4 { /* BLSP1 QUP3 */ +++ pinctrl-0 = <&spi_3_pins>; +++ pinctrl-names = "default"; +++ cs-select = <2>; +++ quartz-reset-gpio = <&tlmm 21 1>; +++ status = "ok"; +++ spidev3: spi@3 { +++ compatible = "qca,spidev"; +++ reg = <0>; +++ spi-max-frequency = <24000000>; +++ }; +++}; +++ +++&serial_blsp2 { +++ status = "disabled"; +++}; +++ +++&msm_imem { +++ status = "disabled"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&ssphy_1 { +++ status = "ok"; +++}; +++ +++&qusb_phy_1 { +++ status = "ok"; +++}; +++ +++&usb3_0 { +++ status = "ok"; +++}; +++ +++&usb3_1 { +++ status = "ok"; +++}; +++ +++&cryptobam { +++ status = "ok"; +++}; +++ +++&crypto { +++ status = "ok"; +++}; +++ +++&i2c_0 { +++ status = "disabled"; +++}; +++ +++&i2c_1 { +++ status = "disabled"; +++}; +++ +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&qpic_lcd { +++ status = "disabled"; +++}; +++ +++&qpic_lcd_panel { +++ status = "disabled"; +++}; +++ +++&ledc { +++ status = "disabled"; +++}; +++ +++&pcie0 { +++ status = "disabled"; +++}; +++ +++&pcie1 { +++ status = "disabled"; +++}; +++ +diff --git a/target/linux/ipq807x/patches/104-wf194c.patch b/target/linux/ipq807x/patches/104-wf194c.patch +new file mode 100644 +index 0000000000..05b1b18b6c +--- /dev/null ++++ b/target/linux/ipq807x/patches/104-wf194c.patch +@@ -0,0 +1,816 @@ ++Index: linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/Makefile ++=================================================================== ++--- linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1.orig/arch/arm64/boot/dts/qcom/Makefile +++++ linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/Makefile ++@@ -55,7 +55,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \ ++ qcom-ipq807x-oak03.dtb \ ++ qcom-ipq807x-sercomm-wallaby.dtb \ ++ qcom-ipq807x-db.hk01.dtb \ ++- qcom-ipq807x-db.hk02.dtb +++ qcom-ipq807x-db.hk02.dtb \ +++ qcom-ipq807x-wf194c.dtb ++ endif ++ ++ always := $(dtb-y) ++Index: linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/qcom-ipq807x-wf194c.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/arch/arm64/boot/dts/qcom/qcom-ipq807x-wf194c.dts ++@@ -0,0 +1,751 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++#include "qcom-ipq807x-soc.dtsi" +++#include "qcom-ipq807x-audio.dtsi" +++#include "qcom-ipq807x-hk-cpu.dtsi" +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "CIG WF194C"; +++ compatible = "cig,wf194c", "qcom,ipq807x"; +++ qcom,msm-id = <0x143 0x0>, <0x158 0x0>, <0x186 0x0>, <0x188 0x0>; +++ interrupt-parent = <&intc>; +++ qcom,board-id = <0x8 0x0>; +++ qcom,pmic-id = <0x0 0x0 0x0 0x0>; +++ +++ aliases { +++ sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ +++ sdhc2 = &sdhc_2; /* SDC2 SD slot */ +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ ethernet1 = "/soc/dp2"; +++ }; +++ +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw init=/init"; +++ #ifdef __IPQ_MEM_PROFILE_256_MB__ +++ bootargs-append = " swiotlb=1"; +++ #else +++ bootargs-append = " swiotlb=1 coherent_pool=2M"; +++ #endif +++ }; +++}; +++ +++&tlmm { +++ pinctrl-0 = <&btcoex_pins>; +++ pinctrl-names = "default"; +++ +++ btcoex_pins: btcoex_pins { +++ mux_0 { +++ pins = "gpio34"; +++ function = "gpio"; +++ drive-strength = <6>; +++ bias-pull-up; +++ output-high; +++ }; +++ mux_1 { +++ pins = "gpio62"; +++ function = "gpio"; +++ drive-strength = <6>; +++ bias-pull-up; +++ output-high; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio68"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio69"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio23", "gpio24"; +++ function = "blsp4_uart1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ i2c_0_pins: i2c_0_pinmux { +++ mux { +++ pins = "gpio42", "gpio43"; +++ function = "blsp1_i2c"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_8 { +++ pins = "gpio16"; +++ function = "qpic_pad8"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ qpic_pad { +++ pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", +++ "gpio9", "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ sd_pins: sd_pins { +++ mux { +++ pins = "gpio63"; +++ function = "sd_card"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ hsuart_pins: hsuart_pins { +++ mux { +++ pins = "gpio48", "gpio49"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ leds_pins: leds_pinmux { +++ led1_r { +++ pins = "gpio54"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led1_g { +++ pins = "gpio55"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led2_r { +++ pins = "gpio56"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led2_g { +++ pins = "gpio64"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ +++ }; +++ +++ button_pins: button_pins { +++ wps_button { +++ pins = "gpio67"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ uniphy_pins: uniphy_pinmux { +++ mux_2 { +++ pins = "gpio37"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_3 { +++ pins = "gpio44"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ pwm_pins: pwm_pinmux { +++ mux_1 { +++ pins = "gpio25"; +++ function = "pwm02"; +++ drive-strength = <8>; +++ }; +++ }; +++}; +++ +++&soc { +++ pwm { +++ pinctrl-0 = <&pwm_pins>; +++ pinctrl-names = "default"; +++ used-pwm-indices = <1>, <0>, <0>, <0>; +++ status = "disabled"; +++ }; +++ +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ button@1 { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 67 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&leds_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++ +++ led@54 { +++ label = "wf194c:red:lan"; +++ gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; +++ default-state = "off"; +++ }; +++ led@55 { +++ label = "wf194c:green:lan"; +++ gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; +++ default-state = "on"; +++ }; +++ led@56 { +++ label = "wf194c:red:wan"; +++ gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>; +++ default-state = "off"; +++ }; +++ led@64 { +++ label = "wf194c:green:wan"; +++ gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; +++ default-state = "on"; +++ }; +++ }; +++ mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 37 0 &tlmm 44 0>; +++ phy0: ethernet-phy@0 { +++ reg = <0xf>; /*<0>*/ +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <0xf>; +++ }; +++ phy2: ethernet-phy@2 { +++ reg = <0xf>; +++ }; +++ phy3: ethernet-phy@3 { +++ reg = <3>; +++ }; +++ phy4: ethernet-phy@4 { +++ reg = <4>; +++ }; +++ phy5: ethernet-phy@5 { +++ compatible ="ethernet-phy-ieee802.3-c45"; +++ reg = <0>; +++ }; +++ }; +++ +++ ess-switch@3a000000 { +++ pinctrl-0 = <&uniphy_pins>; +++ pinctrl-names = "default"; +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x30>; /*..0x3e lan port bitmap */ +++ switch_wan_bmp = <0x40>; /* wan port bitmap */ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/ +++ bm_tick_mode = <0>; /* bm tick mode */ +++ tm_tick_mode = <0>; /* tm tick mode */ +++ port_scheduler_resource { +++ port@0 { +++ port_id = <0>; +++ ucast_queue = <0 143>; +++ mcast_queue = <256 271>; +++ l0sp = <0 35>; +++ l0cdrr = <0 47>; +++ l0edrr = <0 47>; +++ l1cdrr = <0 7>; +++ l1edrr = <0 7>; +++ }; +++ port@1 { +++ port_id = <1>; +++ ucast_queue = <144 159>; +++ mcast_queue = <272 275>; +++ l0sp = <36 39>; +++ l0cdrr = <48 63>; +++ l0edrr = <48 63>; +++ l1cdrr = <8 11>; +++ l1edrr = <8 11>; +++ }; +++ port@2 { +++ port_id = <2>; +++ ucast_queue = <160 175>; +++ mcast_queue = <276 279>; +++ l0sp = <40 43>; +++ l0cdrr = <64 79>; +++ l0edrr = <64 79>; +++ l1cdrr = <12 15>; +++ l1edrr = <12 15>; +++ }; +++ port@3 { +++ port_id = <3>; +++ ucast_queue = <176 191>; +++ mcast_queue = <280 283>; +++ l0sp = <44 47>; +++ l0cdrr = <80 95>; +++ l0edrr = <80 95>; +++ l1cdrr = <16 19>; +++ l1edrr = <16 19>; +++ }; +++ port@4 { +++ port_id = <4>; +++ ucast_queue = <192 207>; +++ mcast_queue = <284 287>; +++ l0sp = <48 51>; +++ l0cdrr = <96 111>; +++ l0edrr = <96 111>; +++ l1cdrr = <20 23>; +++ l1edrr = <20 23>; +++ }; +++ port@5 { +++ port_id = <5>; +++ ucast_queue = <208 223>; +++ mcast_queue = <288 291>; +++ l0sp = <52 55>; +++ l0cdrr = <112 127>; +++ l0edrr = <112 127>; +++ l1cdrr = <24 27>; +++ l1edrr = <24 27>; +++ }; +++ port@6 { +++ port_id = <6>; +++ ucast_queue = <224 239>; +++ mcast_queue = <292 295>; +++ l0sp = <56 59>; +++ l0cdrr = <128 143>; +++ l0edrr = <128 143>; +++ l1cdrr = <28 31>; +++ l1edrr = <28 31>; +++ }; +++ port@7 { +++ port_id = <7>; +++ ucast_queue = <240 255>; +++ mcast_queue = <296 299>; +++ l0sp = <60 63>; +++ l0cdrr = <144 159>; +++ l0edrr = <144 159>; +++ l1cdrr = <32 35>; +++ l1edrr = <32 35>; +++ }; +++ }; +++ port_scheduler_config { +++ port@0 { +++ port_id = <0>; +++ l1scheduler { +++ group@0 { +++ sp = <0 1>; /*L0 SPs*/ +++ /*cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ /*unicast queues*/ +++ ucast_queue = <0 4 8>; +++ /*multicast queues*/ +++ mcast_queue = <256 260>; +++ /*sp cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0 0>; +++ }; +++ group@1 { +++ ucast_queue = <1 5 9>; +++ mcast_queue = <257 261>; +++ cfg = <0 1 1 1 1>; +++ }; +++ group@2 { +++ ucast_queue = <2 6 10>; +++ mcast_queue = <258 262>; +++ cfg = <0 2 2 2 2>; +++ }; +++ group@3 { +++ ucast_queue = <3 7 11>; +++ mcast_queue = <259 263>; +++ cfg = <0 3 3 3 3>; +++ }; +++ }; +++ }; +++ port@1 { +++ port_id = <1>; +++ l1scheduler { +++ group@0 { +++ sp = <36>; +++ cfg = <0 8 0 8>; +++ }; +++ group@1 { +++ sp = <37>; +++ cfg = <1 9 1 9>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <144>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <272>; +++ mcast_loop_pri = <4>; +++ cfg = <36 0 48 0 48>; +++ }; +++ }; +++ }; +++ port@2 { +++ port_id = <2>; +++ l1scheduler { +++ group@0 { +++ sp = <40>; +++ cfg = <0 12 0 12>; +++ }; +++ group@1 { +++ sp = <41>; +++ cfg = <1 13 1 13>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <160>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <276>; +++ mcast_loop_pri = <4>; +++ cfg = <40 0 64 0 64>; +++ }; +++ }; +++ }; +++ port@3 { +++ port_id = <3>; +++ l1scheduler { +++ group@0 { +++ sp = <44>; +++ cfg = <0 16 0 16>; +++ }; +++ group@1 { +++ sp = <45>; +++ cfg = <1 17 1 17>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <176>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <280>; +++ mcast_loop_pri = <4>; +++ cfg = <44 0 80 0 80>; +++ }; +++ }; +++ }; +++ port@4 { +++ port_id = <4>; +++ l1scheduler { +++ group@0 { +++ sp = <48>; +++ cfg = <0 20 0 20>; +++ }; +++ group@1 { +++ sp = <49>; +++ cfg = <1 21 1 21>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <192>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <284>; +++ mcast_loop_pri = <4>; +++ cfg = <48 0 96 0 96>; +++ }; +++ }; +++ }; +++ port@5 { +++ port_id = <5>; +++ l1scheduler { +++ group@0 { +++ sp = <52>; +++ cfg = <0 24 0 24>; +++ }; +++ group@1 { +++ sp = <53>; +++ cfg = <1 25 1 25>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <208>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <288>; +++ mcast_loop_pri = <4>; +++ cfg = <52 0 112 0 112>; +++ }; +++ }; +++ }; +++ port@6 { +++ port_id = <6>; +++ l1scheduler { +++ group@0 { +++ sp = <56>; +++ cfg = <0 28 0 28>; +++ }; +++ group@1 { +++ sp = <57>; +++ cfg = <1 29 1 29>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <224>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <292>; +++ mcast_loop_pri = <4>; +++ cfg = <56 0 128 0 128>; +++ }; +++ }; +++ }; +++ port@7 { +++ port_id = <7>; +++ l1scheduler { +++ group@0 { +++ sp = <60>; +++ cfg = <0 32 0 32>; +++ }; +++ group@1 { +++ sp = <61>; +++ cfg = <1 33 1 33>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <240>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <296>; +++ cfg = <60 0 144 0 144>; +++ }; +++ }; +++ }; +++ }; +++ }; +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <4>; +++ reg = <0x3a001600 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <3>; +++ phy-mode = "sgmii"; +++ }; +++ dp2 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <6>; +++ reg = <0x3a007000 0x3fff>; +++ qcom,mactype = <1>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <0>; +++ phy-mode = "sgmii"; +++ }; +++}; +++ +++&serial_blsp4 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { /* BLSP1 QUP1 */ +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&serial_blsp2 { +++ pinctrl-0 = <&hsuart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&msm_imem { +++ status = "enabled"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&ssphy_1 { +++ status = "ok"; +++}; +++ +++&qusb_phy_1 { +++ status = "ok"; +++}; +++ +++&usb3_0 { +++ status = "ok"; +++}; +++ +++&usb3_1 { +++ status = "ok"; +++}; +++ +++&cryptobam { +++ status = "ok"; +++}; +++ +++&crypto { +++ status = "ok"; +++}; +++ +++&i2c_0 { +++ pinctrl-0 = <&i2c_0_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&i2c_1 { +++ status = "disabled"; +++}; +++ +++&sdhc_1 { +++ qcom,clk-rates = <400000 25000000 50000000 100000000 \ +++ 192000000 384000000>; +++ qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; +++ qcom,nonremovable; +++ status = "ok"; +++}; +++ +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&sdhc_2 { +++ qcom,clk-rates = <400000 25000000 50000000 100000000 \ +++ 192000000>; +++ qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; +++ pinctrl-0 = <&sd_pins>; +++ pinctrl-names = "default"; +++ cd-gpios = <&tlmm 63 1>; +++ sd-ldo-gpios = <&tlmm 21 0>; +++ vqmmc-supply = <&ldo11>; +++ status = "ok"; +++}; +++ +++&qpic_lcd { +++ status = "ok"; +++}; +++ +++&qpic_lcd_panel { +++ status = "ok"; +++}; ++Index: linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/drivers/net/phy/aquantia.c ++=================================================================== ++--- linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1.orig/drivers/net/phy/aquantia.c +++++ linux-4.4.60-qsdk-ad8f8efb2edcd35cdb130466cfc1923c37ef7ec1/drivers/net/phy/aquantia.c ++@@ -32,6 +32,7 @@ ++ #define PHY_ID_AQR112 0x03a1b660 ++ #define PHY_ID_AQR113C 0x31c31C10 ++ #define PHY_ID_AQR112C 0x03a1b792 +++#define PHY_ID_AQR114C 0x31c31C22 ++ ++ #define AQ_PHY_MAX_VALID_MMD_REG 0xff01 ++ #define AQ_PHY_MAX_INVALID_MMD_REG 0xffff ++@@ -756,6 +757,25 @@ static struct phy_driver aquantia_driver ++ .update_link = aquantia_update_link, ++ .driver = { .owner = THIS_MODULE,}, ++ }, +++{ +++ .phy_id = PHY_ID_AQR114C, +++ .phy_id_mask = 0xfffffff0, +++ .name = "Aquantia AQR114C", +++ .features = PHY_AQUANTIA_FEATURES, +++ .flags = PHY_HAS_INTERRUPT, +++ .probe = aquantia_phy_probe, +++ .soft_reset = aquantia_soft_reset, +++ .config_init = aquantia_config_init, +++ .aneg_done = aquantia_aneg_done, +++ .config_aneg = aquantia_config_aneg, +++ .config_intr = aquantia_config_intr, +++ .ack_interrupt = aquantia_ack_interrupt, +++ .read_status = aquantia_read_status, +++ .suspend = aquantia_suspend, +++ .resume = aquantia_resume, +++ .update_link = aquantia_update_link, +++ .driver = { .owner = THIS_MODULE,}, +++}, ++ }; ++ ++ module_phy_driver(aquantia_driver); ++@@ -773,6 +793,7 @@ static struct mdio_device_id __maybe_unu ++ { PHY_ID_AQR112, 0xfffffff0 }, ++ { PHY_ID_AQR113C, 0xfffffff0 }, ++ { PHY_ID_AQR112C, 0xfffffff0 }, +++ { PHY_ID_AQR114C, 0xfffffff0 }, ++ { } ++ }; ++ +diff --git a/target/linux/ipq807x/patches/105-fix-dtc-gcc10-build.patch b/target/linux/ipq807x/patches/105-fix-dtc-gcc10-build.patch +new file mode 100644 +index 0000000000..f91601ec59 +--- /dev/null ++++ b/target/linux/ipq807x/patches/105-fix-dtc-gcc10-build.patch +@@ -0,0 +1,11 @@ ++--- a/scripts/dtc/dtc-lexer.lex.c_shipped +++++ b/scripts/dtc/dtc-lexer.lex.c_shipped ++@@ -637,7 +637,7 @@ char *yytext; ++ #include "srcpos.h" ++ #include "dtc-parser.tab.h" ++ ++-YYLTYPE yylloc; +++extern YYLTYPE yylloc; ++ extern bool treesource_error; ++ ++ /* CAUTION: this will stop working if we ever use yyless() or yyunput() */ +diff --git a/target/linux/ipq807x/patches/106-eap101.patch b/target/linux/ipq807x/patches/106-eap101.patch +new file mode 100644 +index 0000000000..188870b8dc +--- /dev/null ++++ b/target/linux/ipq807x/patches/106-eap101.patch +@@ -0,0 +1,993 @@ ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq6018-cp01-edgecore.dtsi ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq6018-cp01-edgecore.dtsi ++@@ -0,0 +1,542 @@ +++/* +++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++ +++#include "qcom-ipq6018.dtsi" +++#include +++#include +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ compatible = "qcom,ipq6018-cp01", "qcom,ipq6018"; +++ interrupt-parent = <&intc>; +++ qcom,msm-id = <0x192 0x0>, <0x193 0x0>; +++ +++ aliases { +++ serial0 = &blsp1_uart3; +++ serial1 = &blsp1_uart2; +++ sdhc2 = &sdhc_2; +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ ethernet1 = "/soc/dp2"; +++ ethernet2 = "/soc/dp3"; +++ +++ led-boot = &led_power; +++ led-failsafe = &led_power; +++ led-running = &led_power; +++ led-upgrade = &led_power; +++ }; +++ +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; +++#ifdef __IPQ_MEM_PROFILE_256_MB__ +++ bootargs-append = " swiotlb=1"; +++#else +++ bootargs-append = " swiotlb=1 coherent_pool=2M"; +++#endif +++ }; +++ +++}; +++ +++&tlmm { +++ pinctrl-0 = <&sd_ldo_pins>; +++ pinctrl-names = "default"; +++ +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio44", "gpio45"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ sd_ldo_pins: sd_ldo_pins { +++ mux { +++ pins = "gpio66"; +++ function = "gpio"; +++ drive-strength = <2>; +++ bias-disable; +++ output-low; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ spi_1_pins: spi_1_pins { +++ mux { +++ pins = "gpio69", "gpio71", "gpio72"; +++ function = "blsp1_spi"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ spi_cs { +++ pins = "gpio70"; +++ function = "blsp1_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ quartz_interrupt { +++ pins = "gpio78"; +++ function = "gpio"; +++ input; +++ bias-disable; +++ }; +++ quartz_reset { +++ pins = "gpio79"; +++ function = "gpio"; +++ output-low; +++ bias-disable; +++ }; +++ +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ qpic_pad { +++ pins = "gpio1", "gpio3", "gpio4", +++ "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ sd_pins: sd_pins { +++ mux { +++ pins = "gpio62"; +++ function = "sd_card"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ extcon_usb_pins: extcon_usb_pins { +++ mux { +++ pins = "gpio26"; +++ function = "gpio"; +++ drive-strength = <2>; +++ bias-pull-down; +++ }; +++ }; +++ +++ button_pins: button_pins { +++ wps_button { +++ pins = "gpio9"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ reset_button { +++ pins = "gpio19"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio64"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio65"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_2 { +++ pins = "gpio75"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ mux_3 { +++ pins = "gpio77"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ }; +++ +++ leds_pins: leds_pins { +++ led_pwr { +++ pins = "gpio74"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_5g { +++ pins = "gpio35"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_2g { +++ pins = "gpio37"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_wan { +++ pins = "gpio62"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_lan1 { +++ pins = "gpio61"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_lan2 { +++ pins = "gpio63"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_bt { +++ pins = "gpio73"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ hsuart_pins: hsuart_pins { +++ mux { +++ pins = "gpio71", "gpio72", "gpio69", "gpio70"; +++ function = "blsp1_uart"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ btcoex_pins: btcoex_pins { +++ mux_0 { +++ pins = "gpio51"; +++ function = "pta1_1"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_1 { +++ pins = "gpio53"; +++ function = "pta1_0"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_2 { +++ pins = "gpio52"; +++ function = "pta1_2"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ }; +++}; +++ +++&soc { +++ extcon_usb: extcon_usb { +++ pinctrl-0 = <&extcon_usb_pins>; +++ pinctrl-names = "default"; +++ id-gpio = <&tlmm 26 GPIO_ACTIVE_LOW>; +++ status = "ok"; +++ }; +++ +++ mdio: mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>; +++ status = "ok"; +++ phy0: ethernet-phy@0 { +++ reg = <0x1c>; +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <3>; +++ }; +++ phy2: ethernet-phy@2 { +++ reg = <4>; +++ }; +++ }; +++ +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <5>; +++ reg = <0x3a001000 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <28>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp2 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <4>; +++ reg = <0x3a001200 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <3>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp3 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <3>; +++ reg = <0x3a001400 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <4>; +++ phy-mode = "sgmii"; +++ }; +++ +++ +++ nss-macsec0 { +++ compatible = "qcom,nss-macsec"; +++ phy_addr = <0x1c>; +++ phy_access_mode = <0>; +++ mdiobus = <&mdio>; +++ }; +++ +++ ess-switch@3a000000 { +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x1e>; /* lan port bitmap */ +++ switch_wan_bmp = <0x20>; /* wan port bitmap */ +++ switch_inner_bmp = <0xc0>; /*inner port bitmap*/ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ +++ qcom,port_phyinfo { +++ port@2 { +++ port_id = <3>; +++ phy_address = <4>; +++ }; +++ port@1 { +++ port_id = <4>; +++ phy_address = <3>; +++ }; +++ port@0 { +++ port_id = <5>; +++ phy_address = <0x1c>; +++ port_mac_sel = "QGMAC_PORT"; +++ }; +++ }; +++ }; +++ +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ /*wps { +++ label = "wps"; +++ linux,code = ; +++ gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ };*/ +++ reset { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 19 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&leds_pins>; +++ pinctrl-names = "default"; +++ +++ led_power: led@74 { +++ label = "green:power"; +++ gpios = <&tlmm 74 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "led_pwr"; +++ default-state = "on"; +++ }; +++ led@35 { +++ label = "green:wifi5"; +++ gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "led_5g"; +++ default-state = "off"; +++ }; +++ led@37 { +++ label = "green:wifi2"; +++ gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "led_2g"; +++ default-state = "off"; +++ }; +++ }; +++}; +++ +++&blsp1_uart3 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&blsp1_uart2 { +++ pinctrl-0 = <&hsuart_pins &btcoex_pins>; +++ pinctrl-names = "default"; +++ dmas = <&blsp_dma 2>, +++ <&blsp_dma 3>; +++ dma-names = "tx", "rx"; +++ status = "ok"; +++}; +++ +++&spi_1 { /* BLSP1 QUP1 */ +++ pinctrl-0 = <&spi_1_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ quartz-reset-gpio = <&tlmm 79 1>; +++ status = "disabled"; +++ spidev1: spi@1 { +++ compatible = "qca,spidev"; +++ reg = <0>; +++ spi-max-frequency = <24000000>; +++ }; +++}; +++ +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_1 { +++ status = "ok"; +++}; +++ +++&usb2 { +++ status = "ok"; +++}; +++ +++&usb3 { +++ status = "ok"; +++}; +++ +++&nss_crypto { +++ status = "ok"; +++}; +++ +++&pcie_phy { +++ status = "ok"; +++}; +++ +++&pcie0 { +++ status = "ok"; +++}; +++ +++&qpic_lcd { +++ status = "ok"; +++}; +++ +++&qpic_lcd_panel { +++ status = "ok"; +++}; ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq6018-edgecore-eap101.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq6018-edgecore-eap101.dts ++@@ -0,0 +1,441 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2019, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++ +++#include "qcom-ipq6018.dtsi" +++#include "qcom-ipq6018-rpm-regulator.dtsi" +++#include "qcom-ipq6018-cpr-regulator.dtsi" +++#include "qcom-ipq6018-cp-cpu.dtsi" +++#include +++#include +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "EdgeCore EAP101"; +++ compatible = "edgecore,eap101", "qcom,ipq6018-cp01", "qcom,ipq6018"; +++ interrupt-parent = <&intc>; +++ +++ aliases { +++ serial0 = &blsp1_uart3; +++ serial1 = &blsp1_uart2; +++ +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ ethernet1 = "/soc/dp2"; +++ +++ led-boot = &led_power; +++ led-failsafe = &led_power; +++ led-running = &led_power; +++ led-upgrade = &led_power; +++ }; +++ +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; +++ bootargs-append = " console=ttyMSM0,115200,n8 swiotlb=1 coherent_pool=2M"; +++ }; +++ +++ /* +++ * +=========+==============+========================+ +++ * | | | | +++ * | Region | Start Offset | Size | +++ * | | | | +++ * +--------+--------------+-------------------------+ +++ * | | | | +++ * | | | | +++ * | | | | +++ * | | | | +++ * | Linux | 0x41000000 | 139MB | +++ * | | | | +++ * | | | | +++ * | | | | +++ * +--------+--------------+-------------------------+ +++ * | TZ App | 0x49B00000 | 6MB | +++ * +--------+--------------+-------------------------+ +++ * +++ * From the available 145 MB for Linux in the first 256 MB, +++ * we are reserving 6 MB for TZAPP. +++ * +++ * Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi +++ * for memory layout. +++ */ +++ +++/* TZAPP is enabled only in default memory profile */ +++#if !defined(__IPQ_MEM_PROFILE_256_MB__) && !defined(__IPQ_MEM_PROFILE_512_MB__) +++ reserved-memory { +++ tzapp:tzapp@49B00000 { /* TZAPPS */ +++ no-map; +++ reg = <0x0 0x49B00000 0x0 0x00600000>; +++ }; +++ }; +++#endif +++}; +++ +++&tlmm { +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio44", "gpio45"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ qpic_pad { +++ pins = "gpio1", "gpio3", "gpio4", +++ "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ extcon_usb_pins: extcon_usb_pins { +++ mux { +++ pins = "gpio26"; +++ function = "gpio"; +++ drive-strength = <2>; +++ bias-pull-down; +++ }; +++ }; +++ +++ button_pins: button_pins { +++ wps_button { +++ pins = "gpio19"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio64"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio65"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_2 { +++ pins = "gpio75"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ }; +++ +++ leds_pins: leds_pins { +++ led_pwr { +++ pins = "gpio74"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_5g { +++ pins = "gpio35"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led_2g { +++ pins = "gpio37"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ uart2_pins: uart2_pins { +++ mux { +++ pins = "gpio57", "gpio58"; +++ function = "blsp4_uart"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++}; +++ +++&soc { +++ extcon_usb: extcon_usb { +++ pinctrl-0 = <&extcon_usb_pins>; +++ pinctrl-names = "default"; +++ id-gpio = <&tlmm 26 GPIO_ACTIVE_LOW>; +++ status = "ok"; +++ }; +++ +++ mdio: mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>; +++ status = "ok"; +++ phy0: ethernet-phy@0 { +++ reg = <0x1c>; +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <3>; +++ }; +++ phy2: ethernet-phy@2 { +++ reg = <4>; +++ }; +++ }; +++ +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <5>; +++ reg = <0x3a001000 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <28>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp2 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <4>; +++ reg = <0x3a001200 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <3>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp3 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <3>; +++ reg = <0x3a001400 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <4>; +++ phy-mode = "sgmii"; +++ }; +++ +++ ess-switch@3a000000 { +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x1e>; /* lan port bitmap */ +++ switch_wan_bmp = <0x20>; /* wan port bitmap */ +++ switch_inner_bmp = <0xc0>; /*inner port bitmap*/ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ +++ qcom,port_phyinfo { +++ port@2 { +++ port_id = <3>; +++ phy_address = <4>; +++ }; +++ port@1 { +++ port_id = <4>; +++ phy_address = <3>; +++ }; +++ port@0 { +++ port_id = <5>; +++ phy_address = <0x1c>; +++ port_mac_sel = "QGMAC_PORT"; +++ }; +++ }; +++ }; +++ +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ wps { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 19 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&leds_pins>; +++ pinctrl-names = "default"; +++ +++ led@25 { +++ label = "green:wifi5"; +++ gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:5g"; +++ default-state = "off"; +++ }; +++ led@24 { +++ label = "green:wifi2"; +++ gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "wf188:green:2g"; +++ default-state = "off"; +++ }; +++ led_power: led@16 { +++ label = "green:led_pwr"; +++ gpios = <&tlmm 74 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "green:power"; +++ default-state = "off"; +++ }; +++ led@61 { +++ label = "green:lan1"; +++ gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "green:power"; +++ default-state = "off"; +++ }; +++ led@62 { +++ label = "green:wan"; +++ gpios = <&tlmm 62 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "green:power"; +++ default-state = "off"; +++ }; +++ led@63 { +++ label = "green:lan2"; +++ gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "green:power"; +++ default-state = "off"; +++ }; +++ }; +++}; +++ +++&blsp1_uart3 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&blsp1_uart2 { +++ pinctrl-0 = <&uart2_pins>; +++ pinctrl-names = "default"; +++ dmas = <&blsp_dma 2>, +++ <&blsp_dma 3>; +++ dma-names = "tx", "rx"; +++ status = "ok"; +++}; +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_1 { +++ status = "ok"; +++}; +++ +++&usb2 { +++ status = "ok"; +++}; +++ +++&usb3 { +++ status = "ok"; +++}; +++ +++&nss_crypto { +++ status = "ok"; +++}; +diff --git a/target/linux/ipq807x/patches/108-log-spam.patch b/target/linux/ipq807x/patches/108-log-spam.patch +new file mode 100644 +index 0000000000..94b2a3ffd5 +--- /dev/null ++++ b/target/linux/ipq807x/patches/108-log-spam.patch +@@ -0,0 +1,37 @@ ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/clk/qcom/clk-branch.c ++=================================================================== ++--- linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce.orig/drivers/clk/qcom/clk-branch.c +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/clk/qcom/clk-branch.c ++@@ -75,7 +75,7 @@ static int clk_branch_wait(const struct ++ bool (check_halt)(const struct clk_branch *, bool)) ++ { ++ bool voted = br->halt_check & BRANCH_VOTED; ++- const char *name = clk_hw_get_name(&br->clkr.hw); +++ //const char *name = clk_hw_get_name(&br->clkr.hw); ++ ++ /* Skip checking halt bit if the clock is in hardware gated mode */ ++ if (clk_branch_in_hwcg_mode(br)) ++@@ -93,8 +93,8 @@ static int clk_branch_wait(const struct ++ return 0; ++ udelay(1); ++ } ++- WARN(1, "%s status stuck at 'o%s'", name, ++- enabling ? "ff" : "n"); +++/* WARN(1, "%s status stuck at 'o%s'", name, +++ enabling ? "ff" : "n");*/ ++ return -EBUSY; ++ } ++ return 0; ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/usb/phy/phy-msm-qusb.c ++=================================================================== ++--- linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce.orig/drivers/usb/phy/phy-msm-qusb.c +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/usb/phy/phy-msm-qusb.c ++@@ -491,7 +491,7 @@ static int qusb_phy_init(struct usb_phy ++ dev_err(phy->dev, "QUSB PHY PLL LOCK fails:%x\n", ++ readb_relaxed(qphy->base ++ + QUSB2PHY_PLL_STATUS)); ++- WARN_ON(1); +++ //WARN_ON(1); ++ } ++ ++ /* Set OTG VBUS Valid from HSPHY to controller */ +diff --git a/target/linux/ipq807x/patches/109-tplink.patch b/target/linux/ipq807x/patches/109-tplink.patch +new file mode 100644 +index 0000000000..3ad3ffd99c +--- /dev/null ++++ b/target/linux/ipq807x/patches/109-tplink.patch +@@ -0,0 +1,1518 @@ ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq807x-ex227.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq807x-ex227.dts ++@@ -0,0 +1,754 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++#include "qcom-ipq807x-soc.dtsi" +++#include "qcom-ipq807x-hk-cpu.dtsi" +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "TP-Link EX227"; +++ compatible = "tplink,ex227", "qcom,ipq807x"; +++ qcom,msm-id = <0x143 0x0>; +++ interrupt-parent = <&intc>; +++ qcom,board-id = <0x8 0x0>; +++ qcom,pmic-id = <0x0 0x0 0x0 0x0>; +++ +++ aliases { +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ led-boot = &led_power; +++ led-failsafe = &led_power; +++ led-running = &led_power; +++ led-upgrade = &led_power; +++ }; +++ +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw \ +++ init=/init"; +++ bootargs-append = " swiotlb=1"; +++ }; +++}; +++ +++&tlmm { +++ pinctrl-0 = <&btcoex_pins>; +++ pinctrl-names = "default"; +++ +++ btcoex_pins: btcoex_pins { +++ mux_0 { +++ pins = "gpio64"; +++ function = "pta1_1"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_1 { +++ pins = "gpio65"; +++ function = "pta1_2"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_2 { +++ pins = "gpio66"; +++ function = "pta1_0"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio68"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio69"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_2 { +++ pins = "gpio25"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ mux_3 { +++ pins = "gpio37"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ }; +++ +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio23", "gpio24"; +++ function = "blsp4_uart1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_3_pins: spi_3_pins { +++ mux { +++ pins = "gpio52", "gpio53"; +++ function = "blsp3_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ spi_cs { +++ pins = "gpio22"; +++ function = "blsp3_spi2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ quartz_interrupt { +++ pins = "gpio47"; +++ function = "gpio"; +++ input; +++ bias-disable; +++ }; +++ quartz_reset { +++ pins = "gpio21"; +++ function = "gpio"; +++ output-low; +++ bias-disable; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ qpic_pad { +++ pins = "gpio1", "gpio3", "gpio4", +++ "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ hsuart_pins: hsuart_pins { +++ mux { +++ pins = "gpio46", "gpio47", "gpio48", "gpio49"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ /* POWER_LED, TP-Link */ +++ led_pins: led_pins { +++ led_power { +++ pins = "gpio42"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ /* BUTTON, TP-Link */ +++ button_pins: button_pins { +++ reset_button { +++ pins = "gpio50"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ usb_mux_sel_pins: usb_mux_pins { +++ mux { +++ pins = "gpio27"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ pcie0_pins: pcie_pins { +++ pcie0_rst { +++ pins = "gpio58"; +++ function = "pcie0_rst"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ pcie0_wake { +++ pins = "gpio59"; +++ function = "pcie0_wake"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++}; +++ +++&soc { +++ mdio: mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 37 0 &tlmm 25 1>; +++ compatible = "qcom,ipq40xx-mdio", "qcom,qca-mdio"; +++ phy0: ethernet-phy@0 { +++ reg = <0>; +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <1>; +++ }; +++ phy2: ethernet-phy@2 { +++ reg = <2>; +++ }; +++ phy3: ethernet-phy@3 { +++ reg = <3>; +++ }; +++ phy4: ethernet-phy@4 { +++ reg = <28>; +++ }; +++ phy5: ethernet-phy@5 { +++ reg = <4>; +++ }; +++ }; +++ +++ ess-switch@3a000000 { +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x3e>; /* lan port bitmap */ +++ switch_wan_bmp = <0x40>; /* wan port bitmap */ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/ +++ bm_tick_mode = <0>; /* bm tick mode */ +++ tm_tick_mode = <0>; /* tm tick mode */ +++ qcom,port_phyinfo { +++ port@0 { +++ port_id = <1>; +++ phy_address = <0>; +++ }; +++ port@1 { +++ port_id = <2>; +++ phy_address = <1>; +++ }; +++ port@2 { +++ port_id = <3>; +++ phy_address = <2>; +++ }; +++ port@3 { +++ port_id = <4>; +++ phy_address = <3>; +++ }; +++ port@4 { +++ port_id = <5>; +++ phy_address = <28>; +++ port_mac_sel = "QGMAC_PORT"; +++ }; +++ port@5 { +++ port_id = <6>; +++ phy_address = <4>; +++ }; +++ }; +++ port_scheduler_resource { +++ port@0 { +++ port_id = <0>; +++ ucast_queue = <0 143>; +++ mcast_queue = <256 271>; +++ l0sp = <0 35>; +++ l0cdrr = <0 47>; +++ l0edrr = <0 47>; +++ l1cdrr = <0 7>; +++ l1edrr = <0 7>; +++ }; +++ port@1 { +++ port_id = <1>; +++ ucast_queue = <144 159>; +++ mcast_queue = <272 275>; +++ l0sp = <36 39>; +++ l0cdrr = <48 63>; +++ l0edrr = <48 63>; +++ l1cdrr = <8 11>; +++ l1edrr = <8 11>; +++ }; +++ port@2 { +++ port_id = <2>; +++ ucast_queue = <160 175>; +++ mcast_queue = <276 279>; +++ l0sp = <40 43>; +++ l0cdrr = <64 79>; +++ l0edrr = <64 79>; +++ l1cdrr = <12 15>; +++ l1edrr = <12 15>; +++ }; +++ port@3 { +++ port_id = <3>; +++ ucast_queue = <176 191>; +++ mcast_queue = <280 283>; +++ l0sp = <44 47>; +++ l0cdrr = <80 95>; +++ l0edrr = <80 95>; +++ l1cdrr = <16 19>; +++ l1edrr = <16 19>; +++ }; +++ port@4 { +++ port_id = <4>; +++ ucast_queue = <192 207>; +++ mcast_queue = <284 287>; +++ l0sp = <48 51>; +++ l0cdrr = <96 111>; +++ l0edrr = <96 111>; +++ l1cdrr = <20 23>; +++ l1edrr = <20 23>; +++ }; +++ port@5 { +++ port_id = <5>; +++ ucast_queue = <208 223>; +++ mcast_queue = <288 291>; +++ l0sp = <52 55>; +++ l0cdrr = <112 127>; +++ l0edrr = <112 127>; +++ l1cdrr = <24 27>; +++ l1edrr = <24 27>; +++ }; +++ port@6 { +++ port_id = <6>; +++ ucast_queue = <224 239>; +++ mcast_queue = <292 295>; +++ l0sp = <56 59>; +++ l0cdrr = <128 143>; +++ l0edrr = <128 143>; +++ l1cdrr = <28 31>; +++ l1edrr = <28 31>; +++ }; +++ port@7 { +++ port_id = <7>; +++ ucast_queue = <240 255>; +++ mcast_queue = <296 299>; +++ l0sp = <60 63>; +++ l0cdrr = <144 159>; +++ l0edrr = <144 159>; +++ l1cdrr = <32 35>; +++ l1edrr = <32 35>; +++ }; +++ }; +++ port_scheduler_config { +++ port@0 { +++ port_id = <0>; +++ l1scheduler { +++ group@0 { +++ sp = <0 1>; /*L0 SPs*/ +++ /*cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ /*unicast queues*/ +++ ucast_queue = <0 4 8>; +++ /*multicast queues*/ +++ mcast_queue = <256 260>; +++ /*sp cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0 0>; +++ }; +++ group@1 { +++ ucast_queue = <1 5 9>; +++ mcast_queue = <257 261>; +++ cfg = <0 1 1 1 1>; +++ }; +++ group@2 { +++ ucast_queue = <2 6 10>; +++ mcast_queue = <258 262>; +++ cfg = <0 2 2 2 2>; +++ }; +++ group@3 { +++ ucast_queue = <3 7 11>; +++ mcast_queue = <259 263>; +++ cfg = <0 3 3 3 3>; +++ }; +++ }; +++ }; +++ port@1 { +++ port_id = <1>; +++ l1scheduler { +++ group@0 { +++ sp = <36>; +++ cfg = <0 8 0 8>; +++ }; +++ group@1 { +++ sp = <37>; +++ cfg = <1 9 1 9>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <144>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <272>; +++ mcast_loop_pri = <4>; +++ cfg = <36 0 48 0 48>; +++ }; +++ }; +++ }; +++ port@2 { +++ port_id = <2>; +++ l1scheduler { +++ group@0 { +++ sp = <40>; +++ cfg = <0 12 0 12>; +++ }; +++ group@1 { +++ sp = <41>; +++ cfg = <1 13 1 13>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <160>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <276>; +++ mcast_loop_pri = <4>; +++ cfg = <40 0 64 0 64>; +++ }; +++ }; +++ }; +++ port@3 { +++ port_id = <3>; +++ l1scheduler { +++ group@0 { +++ sp = <44>; +++ cfg = <0 16 0 16>; +++ }; +++ group@1 { +++ sp = <45>; +++ cfg = <1 17 1 17>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <176>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <280>; +++ mcast_loop_pri = <4>; +++ cfg = <44 0 80 0 80>; +++ }; +++ }; +++ }; +++ port@4 { +++ port_id = <4>; +++ l1scheduler { +++ group@0 { +++ sp = <48>; +++ cfg = <0 20 0 20>; +++ }; +++ group@1 { +++ sp = <49>; +++ cfg = <1 21 1 21>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <192>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <284>; +++ mcast_loop_pri = <4>; +++ cfg = <48 0 96 0 96>; +++ }; +++ }; +++ }; +++ port@5 { +++ port_id = <5>; +++ l1scheduler { +++ group@0 { +++ sp = <52>; +++ cfg = <0 24 0 24>; +++ }; +++ group@1 { +++ sp = <53>; +++ cfg = <1 25 1 25>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <208>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <288>; +++ mcast_loop_pri = <4>; +++ cfg = <52 0 112 0 112>; +++ }; +++ }; +++ }; +++ port@6 { +++ port_id = <6>; +++ l1scheduler { +++ group@0 { +++ sp = <56>; +++ cfg = <0 28 0 28>; +++ }; +++ group@1 { +++ sp = <57>; +++ cfg = <1 29 1 29>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <224>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <292>; +++ mcast_loop_pri = <4>; +++ cfg = <56 0 128 0 128>; +++ }; +++ }; +++ }; +++ port@7 { +++ port_id = <7>; +++ l1scheduler { +++ group@0 { +++ sp = <60>; +++ cfg = <0 32 0 32>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <240>; +++ mcast_queue = <296>; +++ cfg = <60 0 144 0 144>; +++ }; +++ }; +++ }; +++ }; +++ }; +++ +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <6>; +++ reg = <0x3a001000 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <4>; +++ phy-mode = "sgmii"; +++ }; +++ +++ /* POWER LED, TP-Link */ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&led_pins>; +++ pinctrl-names = "default"; +++ +++ led_power: led_power { +++ label = "blue:power"; +++ gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>; +++ default-state = "on"; +++ }; +++ }; +++ +++ /* BUTTON, TP-Link */ +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ button@1 { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ }; +++ }; +++ +++ nss-macsec0 { +++ compatible = "qcom,nss-macsec"; +++ phy_addr = <0x18>; +++ phy_access_mode = <0>; +++ mdiobus = <&mdio>; +++ }; +++ nss-macsec1 { +++ compatible = "qcom,nss-macsec"; +++ phy_addr = <0x1c>; +++ phy_access_mode = <0>; +++ mdiobus = <&mdio>; +++ }; +++}; +++ +++&serial_blsp4 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { /* BLSP1 QUP1 */ +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&spi_4 { /* BLSP1 QUP3 */ +++ pinctrl-0 = <&spi_3_pins>; +++ pinctrl-names = "default"; +++ cs-select = <2>; +++ quartz-reset-gpio = <&tlmm 21 1>; +++ status = "disabled"; +++ spidev3: spi@3 { +++ compatible = "qca,spidev"; +++ reg = <0>; +++ spi-max-frequency = <24000000>; +++ }; +++}; +++ +++&serial_blsp2 { +++ status = "disabled"; +++}; +++ +++&msm_imem { +++ status = "disabled"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&ssphy_1 { +++ status = "ok"; +++}; +++ +++&qusb_phy_1 { +++ status = "ok"; +++}; +++ +++&usb3_0 { +++ status = "ok"; +++}; +++ +++&usb3_1 { +++ status = "ok"; +++}; +++ +++&cryptobam { +++ status = "ok"; +++}; +++ +++&crypto { +++ status = "ok"; +++}; +++ +++&i2c_0 { +++ status = "disabled"; +++}; +++ +++&i2c_1 { +++ status = "disabled"; +++}; +++ +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&qpic_lcd { +++ status = "disabled"; +++}; +++ +++&qpic_lcd_panel { +++ status = "disabled"; +++}; +++ +++&ledc { +++ status = "disabled"; +++}; +++ +++&pcie0 { +++ status = "ok"; +++}; +++ +++&pcie1 { +++ status = "disabled"; +++}; +++ ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq807x-ex447.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq807x-ex447.dts ++@@ -0,0 +1,754 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++#include "qcom-ipq807x-soc.dtsi" +++#include "qcom-ipq807x-hk-cpu.dtsi" +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "TP-Link EX447"; +++ compatible = "tplink,ex447", "qcom,ipq807x"; +++ qcom,msm-id = <0x143 0x0>; +++ interrupt-parent = <&intc>; +++ qcom,board-id = <0x8 0x0>; +++ qcom,pmic-id = <0x0 0x0 0x0 0x0>; +++ +++ aliases { +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ }; +++ +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw \ +++ init=/init"; +++ bootargs-append = " swiotlb=1"; +++ led-boot = &led_power; +++ led-failsafe = &led_power; +++ led-running = &led_power; +++ led-upgrade = &led_power; +++ }; +++}; +++ +++&tlmm { +++ pinctrl-0 = <&btcoex_pins>; +++ pinctrl-names = "default"; +++ +++ btcoex_pins: btcoex_pins { +++ mux_0 { +++ pins = "gpio64"; +++ function = "pta1_1"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_1 { +++ pins = "gpio65"; +++ function = "pta1_2"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ mux_2 { +++ pins = "gpio66"; +++ function = "pta1_0"; +++ drive-strength = <6>; +++ bias-pull-down; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio68"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio69"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_2 { +++ pins = "gpio25"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ mux_3 { +++ pins = "gpio37"; +++ function = "gpio"; +++ bias-pull-up; +++ }; +++ }; +++ +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio23", "gpio24"; +++ function = "blsp4_uart1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_3_pins: spi_3_pins { +++ mux { +++ pins = "gpio52", "gpio53"; +++ function = "blsp3_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ spi_cs { +++ pins = "gpio22"; +++ function = "blsp3_spi2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ quartz_interrupt { +++ pins = "gpio47"; +++ function = "gpio"; +++ input; +++ bias-disable; +++ }; +++ quartz_reset { +++ pins = "gpio21"; +++ function = "gpio"; +++ output-low; +++ bias-disable; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ qpic_pad { +++ pins = "gpio1", "gpio3", "gpio4", +++ "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ hsuart_pins: hsuart_pins { +++ mux { +++ pins = "gpio46", "gpio47", "gpio48", "gpio49"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ /* POWER_LED, TP-Link */ +++ led_pins: led_pins { +++ led_power { +++ pins = "gpio42"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ /* BUTTON, TP-Link */ +++ button_pins: button_pins { +++ reset_button { +++ pins = "gpio50"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ usb_mux_sel_pins: usb_mux_pins { +++ mux { +++ pins = "gpio27"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ pcie0_pins: pcie_pins { +++ pcie0_rst { +++ pins = "gpio58"; +++ function = "pcie0_rst"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ pcie0_wake { +++ pins = "gpio59"; +++ function = "pcie0_wake"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++}; +++ +++&soc { +++ mdio: mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 37 0 &tlmm 25 1>; +++ compatible = "qcom,ipq40xx-mdio", "qcom,qca-mdio"; +++ phy0: ethernet-phy@0 { +++ reg = <0>; +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <1>; +++ }; +++ phy2: ethernet-phy@2 { +++ reg = <2>; +++ }; +++ phy3: ethernet-phy@3 { +++ reg = <3>; +++ }; +++ phy4: ethernet-phy@4 { +++ reg = <28>; +++ }; +++ phy5: ethernet-phy@5 { +++ reg = <4>; +++ }; +++ }; +++ +++ ess-switch@3a000000 { +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x3e>; /* lan port bitmap */ +++ switch_wan_bmp = <0x40>; /* wan port bitmap */ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/ +++ bm_tick_mode = <0>; /* bm tick mode */ +++ tm_tick_mode = <0>; /* tm tick mode */ +++ qcom,port_phyinfo { +++ port@0 { +++ port_id = <1>; +++ phy_address = <0>; +++ }; +++ port@1 { +++ port_id = <2>; +++ phy_address = <1>; +++ }; +++ port@2 { +++ port_id = <3>; +++ phy_address = <2>; +++ }; +++ port@3 { +++ port_id = <4>; +++ phy_address = <3>; +++ }; +++ port@4 { +++ port_id = <5>; +++ phy_address = <28>; +++ port_mac_sel = "QGMAC_PORT"; +++ }; +++ port@5 { +++ port_id = <6>; +++ phy_address = <4>; +++ }; +++ }; +++ port_scheduler_resource { +++ port@0 { +++ port_id = <0>; +++ ucast_queue = <0 143>; +++ mcast_queue = <256 271>; +++ l0sp = <0 35>; +++ l0cdrr = <0 47>; +++ l0edrr = <0 47>; +++ l1cdrr = <0 7>; +++ l1edrr = <0 7>; +++ }; +++ port@1 { +++ port_id = <1>; +++ ucast_queue = <144 159>; +++ mcast_queue = <272 275>; +++ l0sp = <36 39>; +++ l0cdrr = <48 63>; +++ l0edrr = <48 63>; +++ l1cdrr = <8 11>; +++ l1edrr = <8 11>; +++ }; +++ port@2 { +++ port_id = <2>; +++ ucast_queue = <160 175>; +++ mcast_queue = <276 279>; +++ l0sp = <40 43>; +++ l0cdrr = <64 79>; +++ l0edrr = <64 79>; +++ l1cdrr = <12 15>; +++ l1edrr = <12 15>; +++ }; +++ port@3 { +++ port_id = <3>; +++ ucast_queue = <176 191>; +++ mcast_queue = <280 283>; +++ l0sp = <44 47>; +++ l0cdrr = <80 95>; +++ l0edrr = <80 95>; +++ l1cdrr = <16 19>; +++ l1edrr = <16 19>; +++ }; +++ port@4 { +++ port_id = <4>; +++ ucast_queue = <192 207>; +++ mcast_queue = <284 287>; +++ l0sp = <48 51>; +++ l0cdrr = <96 111>; +++ l0edrr = <96 111>; +++ l1cdrr = <20 23>; +++ l1edrr = <20 23>; +++ }; +++ port@5 { +++ port_id = <5>; +++ ucast_queue = <208 223>; +++ mcast_queue = <288 291>; +++ l0sp = <52 55>; +++ l0cdrr = <112 127>; +++ l0edrr = <112 127>; +++ l1cdrr = <24 27>; +++ l1edrr = <24 27>; +++ }; +++ port@6 { +++ port_id = <6>; +++ ucast_queue = <224 239>; +++ mcast_queue = <292 295>; +++ l0sp = <56 59>; +++ l0cdrr = <128 143>; +++ l0edrr = <128 143>; +++ l1cdrr = <28 31>; +++ l1edrr = <28 31>; +++ }; +++ port@7 { +++ port_id = <7>; +++ ucast_queue = <240 255>; +++ mcast_queue = <296 299>; +++ l0sp = <60 63>; +++ l0cdrr = <144 159>; +++ l0edrr = <144 159>; +++ l1cdrr = <32 35>; +++ l1edrr = <32 35>; +++ }; +++ }; +++ port_scheduler_config { +++ port@0 { +++ port_id = <0>; +++ l1scheduler { +++ group@0 { +++ sp = <0 1>; /*L0 SPs*/ +++ /*cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ /*unicast queues*/ +++ ucast_queue = <0 4 8>; +++ /*multicast queues*/ +++ mcast_queue = <256 260>; +++ /*sp cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0 0>; +++ }; +++ group@1 { +++ ucast_queue = <1 5 9>; +++ mcast_queue = <257 261>; +++ cfg = <0 1 1 1 1>; +++ }; +++ group@2 { +++ ucast_queue = <2 6 10>; +++ mcast_queue = <258 262>; +++ cfg = <0 2 2 2 2>; +++ }; +++ group@3 { +++ ucast_queue = <3 7 11>; +++ mcast_queue = <259 263>; +++ cfg = <0 3 3 3 3>; +++ }; +++ }; +++ }; +++ port@1 { +++ port_id = <1>; +++ l1scheduler { +++ group@0 { +++ sp = <36>; +++ cfg = <0 8 0 8>; +++ }; +++ group@1 { +++ sp = <37>; +++ cfg = <1 9 1 9>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <144>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <272>; +++ mcast_loop_pri = <4>; +++ cfg = <36 0 48 0 48>; +++ }; +++ }; +++ }; +++ port@2 { +++ port_id = <2>; +++ l1scheduler { +++ group@0 { +++ sp = <40>; +++ cfg = <0 12 0 12>; +++ }; +++ group@1 { +++ sp = <41>; +++ cfg = <1 13 1 13>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <160>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <276>; +++ mcast_loop_pri = <4>; +++ cfg = <40 0 64 0 64>; +++ }; +++ }; +++ }; +++ port@3 { +++ port_id = <3>; +++ l1scheduler { +++ group@0 { +++ sp = <44>; +++ cfg = <0 16 0 16>; +++ }; +++ group@1 { +++ sp = <45>; +++ cfg = <1 17 1 17>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <176>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <280>; +++ mcast_loop_pri = <4>; +++ cfg = <44 0 80 0 80>; +++ }; +++ }; +++ }; +++ port@4 { +++ port_id = <4>; +++ l1scheduler { +++ group@0 { +++ sp = <48>; +++ cfg = <0 20 0 20>; +++ }; +++ group@1 { +++ sp = <49>; +++ cfg = <1 21 1 21>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <192>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <284>; +++ mcast_loop_pri = <4>; +++ cfg = <48 0 96 0 96>; +++ }; +++ }; +++ }; +++ port@5 { +++ port_id = <5>; +++ l1scheduler { +++ group@0 { +++ sp = <52>; +++ cfg = <0 24 0 24>; +++ }; +++ group@1 { +++ sp = <53>; +++ cfg = <1 25 1 25>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <208>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <288>; +++ mcast_loop_pri = <4>; +++ cfg = <52 0 112 0 112>; +++ }; +++ }; +++ }; +++ port@6 { +++ port_id = <6>; +++ l1scheduler { +++ group@0 { +++ sp = <56>; +++ cfg = <0 28 0 28>; +++ }; +++ group@1 { +++ sp = <57>; +++ cfg = <1 29 1 29>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <224>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <292>; +++ mcast_loop_pri = <4>; +++ cfg = <56 0 128 0 128>; +++ }; +++ }; +++ }; +++ port@7 { +++ port_id = <7>; +++ l1scheduler { +++ group@0 { +++ sp = <60>; +++ cfg = <0 32 0 32>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <240>; +++ mcast_queue = <296>; +++ cfg = <60 0 144 0 144>; +++ }; +++ }; +++ }; +++ }; +++ }; +++ +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <5>; +++ reg = <0x3a001000 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <28>; +++ phy-mode = "sgmii"; +++ }; +++ +++ /* POWER LED, TP-Link */ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&led_pins>; +++ pinctrl-names = "default"; +++ +++ led_power: led_power { +++ label = "power:blue"; +++ gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>; +++ default-state = "on"; +++ }; +++ }; +++ +++ /* BUTTON, TP-Link */ +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ button@1 { +++ label = "reset"; +++ linux,code = ; +++ gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ }; +++ }; +++ +++ nss-macsec0 { +++ compatible = "qcom,nss-macsec"; +++ phy_addr = <0x18>; +++ phy_access_mode = <0>; +++ mdiobus = <&mdio>; +++ }; +++ nss-macsec1 { +++ compatible = "qcom,nss-macsec"; +++ phy_addr = <0x1c>; +++ phy_access_mode = <0>; +++ mdiobus = <&mdio>; +++ }; +++}; +++ +++&serial_blsp4 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { /* BLSP1 QUP1 */ +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&spi_4 { /* BLSP1 QUP3 */ +++ pinctrl-0 = <&spi_3_pins>; +++ pinctrl-names = "default"; +++ cs-select = <2>; +++ quartz-reset-gpio = <&tlmm 21 1>; +++ status = "disabled"; +++ spidev3: spi@3 { +++ compatible = "qca,spidev"; +++ reg = <0>; +++ spi-max-frequency = <24000000>; +++ }; +++}; +++ +++&serial_blsp2 { +++ status = "disabled"; +++}; +++ +++&msm_imem { +++ status = "disabled"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&ssphy_1 { +++ status = "ok"; +++}; +++ +++&qusb_phy_1 { +++ status = "ok"; +++}; +++ +++&usb3_0 { +++ status = "ok"; +++}; +++ +++&usb3_1 { +++ status = "ok"; +++}; +++ +++&cryptobam { +++ status = "ok"; +++}; +++ +++&crypto { +++ status = "ok"; +++}; +++ +++&i2c_0 { +++ status = "disabled"; +++}; +++ +++&i2c_1 { +++ status = "disabled"; +++}; +++ +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&qpic_lcd { +++ status = "disabled"; +++}; +++ +++&qpic_lcd_panel { +++ status = "disabled"; +++}; +++ +++&ledc { +++ status = "disabled"; +++}; +++ +++&pcie0 { +++ status = "ok"; +++}; +++ +++&pcie1 { +++ status = "disabled"; +++}; +++ +diff --git a/target/linux/ipq807x/patches/110-add-esmt-nand.patch b/target/linux/ipq807x/patches/110-add-esmt-nand.patch +new file mode 100644 +index 0000000000..d47a4d0d16 +--- /dev/null ++++ b/target/linux/ipq807x/patches/110-add-esmt-nand.patch +@@ -0,0 +1,37 @@ ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/mtd/nand/nand_ids.c ++=================================================================== ++--- linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce.orig/drivers/mtd/nand/nand_ids.c +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/mtd/nand/nand_ids.c ++@@ -62,6 +62,12 @@ struct nand_flash_dev nand_flash_ids[] = ++ {"TH58NYG3S0H 8G 1.8V 8-bit", ++ { .id = {0x98, 0xa3, 0x91, 0x26} }, ++ SZ_4K, SZ_1K, SZ_256K, 0, 4, 256, NAND_ECC_INFO(8, SZ_512) }, +++ +++ {"F59D2G81KA 2G 1.8V 8-bit", +++ { .id = {0xc8, 0x5a, 0x90, 0x04} }, +++ SZ_2K, SZ_256, SZ_128K, 0, 4, 128, NAND_ECC_INFO(8, SZ_512) }, +++ +++ ++ LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), ++ LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS), ++ LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS), ++@@ -190,6 +196,7 @@ struct nand_manufacturers nand_manuf_ids ++ {NAND_MFR_SANDISK, "SanDisk"}, ++ {NAND_MFR_INTEL, "Intel"}, ++ {NAND_MFR_ATO, "ATO"}, +++ {NAND_MFR_ESMT, "ESMT"}, ++ {NAND_MFR_GIGA, "GigaDevice"}, ++ {NAND_MFR_ATO, "ATO"}, ++ {NAND_MFR_WINBOND, "Winbond"}, ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/include/linux/mtd/nand.h ++=================================================================== ++--- linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce.orig/include/linux/mtd/nand.h +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/include/linux/mtd/nand.h ++@@ -778,6 +778,7 @@ static inline struct mtd_info *nand_to_m ++ #define NAND_MFR_ATO 0x9b ++ #define NAND_MFR_WINBOND 0xef ++ #define NAND_MFR_FIDELIX 0xe5 +++#define NAND_MFR_ESMT 0xc8 ++ ++ /* The maximum expected count of bytes in the NAND ID sequence */ ++ #define NAND_MAX_ID_LEN 8 +diff --git a/target/linux/ipq807x/patches/111-eap106.patch b/target/linux/ipq807x/patches/111-eap106.patch +new file mode 100644 +index 0000000000..497742193e +--- /dev/null ++++ b/target/linux/ipq807x/patches/111-eap106.patch +@@ -0,0 +1,765 @@ ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap106.dts ++=================================================================== ++--- /dev/null +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/arch/arm64/boot/dts/qcom/qcom-ipq807x-eap106.dts ++@@ -0,0 +1,716 @@ +++/dts-v1/; +++/* +++ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. +++ * +++ * Permission to use, copy, modify, and/or distribute this software for any +++ * purpose with or without fee is hereby granted, provided that the above +++ * copyright notice and this permission notice appear in all copies. +++ * +++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +++ */ +++#include "qcom-ipq807x-soc.dtsi" +++#include "qcom-ipq807x-hk-cpu.dtsi" +++ +++/ { +++ #address-cells = <0x2>; +++ #size-cells = <0x2>; +++ model = "Edgecore EAP106"; +++ compatible = "edgecore,eap106", "qcom,ipq807x-hk02", "qcom,ipq807x"; +++ qcom,msm-id = <0x143 0x0>; +++ interrupt-parent = <&intc>; +++ qcom,board-id = <0x8 0x0>; +++ qcom,pmic-id = <0x0 0x0 0x0 0x0>; +++ +++ aliases { +++ /* +++ * Aliases as required by u-boot +++ * to patch MAC addresses +++ */ +++ ethernet0 = "/soc/dp1"; +++ ethernet1 = "/soc/dp2"; +++ }; +++ chosen { +++ bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw init=/init"; +++ #ifdef __IPQ_MEM_PROFILE_256_MB__ +++ bootargs-append = " swiotlb=1"; +++ #else +++ bootargs-append = " swiotlb=1 coherent_pool=2M"; +++ #endif +++ }; +++}; +++ +++&tlmm { +++ leds_pins: leds_pinmux { +++ +++ led1_yellow { +++ pins = "gpio25"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led1_green { +++ pins = "gpio28"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led2_amber { +++ pins = "gpio29"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ led2_blue { +++ pins = "gpio32"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-down; +++ }; +++ }; +++ +++ mdio_pins: mdio_pinmux { +++ mux_0 { +++ pins = "gpio68"; +++ function = "mdc"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ mux_1 { +++ pins = "gpio69"; +++ function = "mdio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ uart_pins: uart_pins { +++ mux { +++ pins = "gpio23", "gpio24"; +++ function = "blsp4_uart1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ i2c_0_pins: i2c_0_pinmux { +++ mux { +++ pins = "gpio42", "gpio43"; +++ function = "blsp1_i2c"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ spi_0_pins: spi_0_pins { +++ mux { +++ pins = "gpio38", "gpio39", "gpio40", "gpio41"; +++ function = "blsp0_spi"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ qpic_pins: qpic_pins { +++ data_0 { +++ pins = "gpio15"; +++ function = "qpic_pad0"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_1 { +++ pins = "gpio12"; +++ function = "qpic_pad1"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_2 { +++ pins = "gpio13"; +++ function = "qpic_pad2"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_3 { +++ pins = "gpio14"; +++ function = "qpic_pad3"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_4 { +++ pins = "gpio5"; +++ function = "qpic_pad4"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_5 { +++ pins = "gpio6"; +++ function = "qpic_pad5"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_6 { +++ pins = "gpio7"; +++ function = "qpic_pad6"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_7 { +++ pins = "gpio8"; +++ function = "qpic_pad7"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ data_8 { +++ pins = "gpio16"; +++ function = "qpic_pad8"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ qpic_pad { +++ pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", +++ "gpio9", "gpio10", "gpio11", "gpio17"; +++ function = "qpic_pad"; +++ drive-strength = <8>; +++ bias-disable; +++ }; +++ }; +++ +++ hsuart_pins: hsuart_pins { +++ mux { +++ pins = "gpio46", "gpio47", "gpio48", "gpio49"; +++ function = "blsp2_uart"; +++ drive-strength = <8>; +++ bias-disable; +++ output-low; +++ }; +++ mux_1 { +++ pins = "gpio51"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-disable; +++ output-high; +++ }; +++ }; +++ +++ button_pins: button_pins { +++ wps_button { +++ pins = "gpio57"; +++ function = "gpio"; +++ drive-strength = <8>; +++ bias-pull-up; +++ }; +++ }; +++ +++ uniphy_pins: uniphy_pinmux { +++ mux { +++ pins = "gpio60"; +++ function = "rx2"; +++ bias-disable; +++ }; +++ }; +++ cnss_wlan_en_active: cnss_wlan_en_active { +++ mux { +++ pins = "gpio57"; +++ function = "gpio"; +++ drive-strength = <16>; +++ output-high; +++ bias-pull-up; +++ }; +++ }; +++ +++ cnss_wlan_en_sleep: cnss_wlan_en_sleep { +++ mux { +++ pins = "gpio57"; +++ function = "gpio"; +++ drive-strength = <2>; +++ output-low; +++ bias-pull-down; +++ }; +++ }; +++}; +++ +++&soc { +++ gpio_keys { +++ compatible = "gpio-keys"; +++ pinctrl-0 = <&button_pins>; +++ pinctrl-names = "default"; +++ +++ button@1 { +++ label = "wps"; +++ linux,code = ; +++ gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; +++ linux,input-type = <1>; +++ debounce-interval = <60>; +++ }; +++ }; +++ +++ leds { +++ compatible = "gpio-leds"; +++ pinctrl-0 = <&leds_pins>; +++ pinctrl-names = "default"; +++ +++ led@25 { +++ label = "led1_yellow"; +++ gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "led1_yellow"; +++ default-state = "off"; +++ }; +++ +++ led@28 { +++ label = "led1_green"; +++ gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "led1_green"; +++ default-state = "off"; +++ }; +++ +++ led@29 { +++ label = "led2_amber"; +++ gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "led2_amber"; +++ default-state = "off"; +++ }; +++ +++ led@32 { +++ label = "led2_blue"; +++ gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; +++ linux,default-trigger = "led2_blue"; +++ default-state = "off"; +++ }; +++ }; +++ +++ mdio@90000 { +++ pinctrl-0 = <&mdio_pins>; +++ pinctrl-names = "default"; +++ phy-reset-gpio = <&tlmm 37 0>; +++ phy0: ethernet-phy@0 { +++ reg = <0>; +++ }; +++ phy1: ethernet-phy@1 { +++ reg = <1>; +++ }; +++ phy2: ethernet-phy@2 { +++ reg = <2>; +++ }; +++ phy3: ethernet-phy@3 { +++ reg = <3>; +++ }; +++ phy4: ethernet-phy@4 { +++ reg = <4>; +++ }; +++ phy5: ethernet-phy@5 { +++ compatible ="ethernet-phy-ieee802.3-c45"; +++ reg = <8>; +++ }; +++ }; +++ +++ ess-switch@3a000000 { +++ pinctrl-0 = <&uniphy_pins>; +++ pinctrl-names = "default"; +++ switch_cpu_bmp = <0x1>; /* cpu port bitmap */ +++ switch_lan_bmp = <0x30>; /* lan port bitmap */ +++ switch_wan_bmp = <0x40>; /* wan port bitmap */ +++ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ +++ switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/ +++ switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/ +++ bm_tick_mode = <0>; /* bm tick mode */ +++ tm_tick_mode = <0>; /* tm tick mode */ +++ port_scheduler_resource { +++ port@0 { +++ port_id = <0>; +++ ucast_queue = <0 143>; +++ mcast_queue = <256 271>; +++ l0sp = <0 35>; +++ l0cdrr = <0 47>; +++ l0edrr = <0 47>; +++ l1cdrr = <0 7>; +++ l1edrr = <0 7>; +++ }; +++ port@1 { +++ port_id = <1>; +++ ucast_queue = <144 159>; +++ mcast_queue = <272 275>; +++ l0sp = <36 39>; +++ l0cdrr = <48 63>; +++ l0edrr = <48 63>; +++ l1cdrr = <8 11>; +++ l1edrr = <8 11>; +++ }; +++ port@2 { +++ port_id = <2>; +++ ucast_queue = <160 175>; +++ mcast_queue = <276 279>; +++ l0sp = <40 43>; +++ l0cdrr = <64 79>; +++ l0edrr = <64 79>; +++ l1cdrr = <12 15>; +++ l1edrr = <12 15>; +++ }; +++ port@3 { +++ port_id = <3>; +++ ucast_queue = <176 191>; +++ mcast_queue = <280 283>; +++ l0sp = <44 47>; +++ l0cdrr = <80 95>; +++ l0edrr = <80 95>; +++ l1cdrr = <16 19>; +++ l1edrr = <16 19>; +++ }; +++ port@4 { +++ port_id = <4>; +++ ucast_queue = <192 207>; +++ mcast_queue = <284 287>; +++ l0sp = <48 51>; +++ l0cdrr = <96 111>; +++ l0edrr = <96 111>; +++ l1cdrr = <20 23>; +++ l1edrr = <20 23>; +++ }; +++ port@5 { +++ port_id = <5>; +++ ucast_queue = <208 223>; +++ mcast_queue = <288 291>; +++ l0sp = <52 55>; +++ l0cdrr = <112 127>; +++ l0edrr = <112 127>; +++ l1cdrr = <24 27>; +++ l1edrr = <24 27>; +++ }; +++ port@6 { +++ port_id = <6>; +++ ucast_queue = <224 239>; +++ mcast_queue = <292 295>; +++ l0sp = <56 59>; +++ l0cdrr = <128 143>; +++ l0edrr = <128 143>; +++ l1cdrr = <28 31>; +++ l1edrr = <28 31>; +++ }; +++ port@7 { +++ port_id = <7>; +++ ucast_queue = <240 255>; +++ mcast_queue = <296 299>; +++ l0sp = <60 63>; +++ l0cdrr = <144 159>; +++ l0edrr = <144 159>; +++ l1cdrr = <32 35>; +++ l1edrr = <32 35>; +++ }; +++ }; +++ port_scheduler_config { +++ port@0 { +++ port_id = <0>; +++ l1scheduler { +++ group@0 { +++ sp = <0 1>; /*L0 SPs*/ +++ /*cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ /*unicast queues*/ +++ ucast_queue = <0 4 8>; +++ /*multicast queues*/ +++ mcast_queue = <256 260>; +++ /*sp cpri cdrr epri edrr*/ +++ cfg = <0 0 0 0 0>; +++ }; +++ group@1 { +++ ucast_queue = <1 5 9>; +++ mcast_queue = <257 261>; +++ cfg = <0 1 1 1 1>; +++ }; +++ group@2 { +++ ucast_queue = <2 6 10>; +++ mcast_queue = <258 262>; +++ cfg = <0 2 2 2 2>; +++ }; +++ group@3 { +++ ucast_queue = <3 7 11>; +++ mcast_queue = <259 263>; +++ cfg = <0 3 3 3 3>; +++ }; +++ }; +++ }; +++ port@1 { +++ port_id = <1>; +++ l1scheduler { +++ group@0 { +++ sp = <36>; +++ cfg = <0 8 0 8>; +++ }; +++ group@1 { +++ sp = <37>; +++ cfg = <1 9 1 9>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <144>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <272>; +++ mcast_loop_pri = <4>; +++ cfg = <36 0 48 0 48>; +++ }; +++ }; +++ }; +++ port@2 { +++ port_id = <2>; +++ l1scheduler { +++ group@0 { +++ sp = <40>; +++ cfg = <0 12 0 12>; +++ }; +++ group@1 { +++ sp = <41>; +++ cfg = <1 13 1 13>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <160>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <276>; +++ mcast_loop_pri = <4>; +++ cfg = <40 0 64 0 64>; +++ }; +++ }; +++ }; +++ port@3 { +++ port_id = <3>; +++ l1scheduler { +++ group@0 { +++ sp = <44>; +++ cfg = <0 16 0 16>; +++ }; +++ group@1 { +++ sp = <45>; +++ cfg = <1 17 1 17>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <176>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <280>; +++ mcast_loop_pri = <4>; +++ cfg = <44 0 80 0 80>; +++ }; +++ }; +++ }; +++ port@4 { +++ port_id = <4>; +++ l1scheduler { +++ group@0 { +++ sp = <48>; +++ cfg = <0 20 0 20>; +++ }; +++ group@1 { +++ sp = <49>; +++ cfg = <1 21 1 21>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <192>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <284>; +++ mcast_loop_pri = <4>; +++ cfg = <48 0 96 0 96>; +++ }; +++ }; +++ }; +++ port@5 { +++ port_id = <5>; +++ l1scheduler { +++ group@0 { +++ sp = <52>; +++ cfg = <0 24 0 24>; +++ }; +++ group@1 { +++ sp = <53>; +++ cfg = <1 25 1 25>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <208>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <288>; +++ mcast_loop_pri = <4>; +++ cfg = <52 0 112 0 112>; +++ }; +++ }; +++ }; +++ port@6 { +++ port_id = <6>; +++ l1scheduler { +++ group@0 { +++ sp = <56>; +++ cfg = <0 28 0 28>; +++ }; +++ group@1 { +++ sp = <57>; +++ cfg = <1 29 1 29>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <224>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <292>; +++ mcast_loop_pri = <4>; +++ cfg = <56 0 128 0 128>; +++ }; +++ }; +++ }; +++ port@7 { +++ port_id = <7>; +++ l1scheduler { +++ group@0 { +++ sp = <60>; +++ cfg = <0 32 0 32>; +++ }; +++ group@1 { +++ sp = <61>; +++ cfg = <1 33 1 33>; +++ }; +++ }; +++ l0scheduler { +++ group@0 { +++ ucast_queue = <240>; +++ ucast_loop_pri = <16>; +++ mcast_queue = <296>; +++ cfg = <60 0 144 0 144>; +++ }; +++ }; +++ }; +++ }; +++ }; +++ +++ dp1 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <4>; +++ reg = <0x3a001600 0x200>; +++ qcom,mactype = <0>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <3>; +++ phy-mode = "sgmii"; +++ }; +++ +++ dp2 { +++ device_type = "network"; +++ compatible = "qcom,nss-dp"; +++ qcom,id = <6>; +++ reg = <0x3a007000 0x3fff>; +++ qcom,mactype = <1>; +++ local-mac-address = [000000000000]; +++ qcom,link-poll = <1>; +++ qcom,phy-mdio-addr = <8>; +++ phy-mode = "sgmii"; +++ }; +++ wifi3: wifi3@f00000 { +++ compatible = "qcom,cnss-qcn9000"; +++ wlan-en-gpio = <&tlmm 57 0>; +++ pinctrl-names = "wlan_en_active", "wlan_en_sleep"; +++ pinctrl-0 = <&cnss_wlan_en_active>; +++ pinctrl-1 = <&cnss_wlan_en_sleep>; +++ status = "disabled"; +++ }; +++}; +++ +++&serial_blsp4 { +++ pinctrl-0 = <&uart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&spi_0 { /* BLSP1 QUP1 */ +++ pinctrl-0 = <&spi_0_pins>; +++ pinctrl-names = "default"; +++ cs-select = <0>; +++ status = "ok"; +++ +++ m25p80@0 { +++ #address-cells = <1>; +++ #size-cells = <1>; +++ reg = <0>; +++ compatible = "n25q128a11"; +++ linux,modalias = "m25p80", "n25q128a11"; +++ spi-max-frequency = <50000000>; +++ use-default-sizes; +++ }; +++}; +++ +++&serial_blsp2 { +++ pinctrl-0 = <&hsuart_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&msm_imem { +++ status = "disabled"; +++}; +++ +++&ssphy_0 { +++ status = "ok"; +++}; +++ +++&qusb_phy_0 { +++ status = "ok"; +++}; +++ +++&ssphy_1 { +++ status = "ok"; +++}; +++ +++&qusb_phy_1 { +++ status = "ok"; +++}; +++ +++&usb3_0 { +++ status = "ok"; +++}; +++ +++&usb3_1 { +++ status = "ok"; +++}; +++ +++&cryptobam { +++ status = "ok"; +++}; +++ +++&crypto { +++ status = "ok"; +++}; +++ +++&i2c_0 { +++ pinctrl-0 = <&i2c_0_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&i2c_1 { +++ status = "disabled"; +++}; +++ +++&qpic_bam { +++ status = "ok"; +++}; +++ +++&nand { +++ pinctrl-0 = <&qpic_pins>; +++ pinctrl-names = "default"; +++ status = "ok"; +++}; +++ +++&pcie0 { +++ status = "disabled"; +++}; ++Index: linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/net/phy/aquantia.c ++=================================================================== ++--- linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce.orig/drivers/net/phy/aquantia.c +++++ linux-4.4.60-qsdk-10fd7d14853b7020b804acae690c8acec5d954ce/drivers/net/phy/aquantia.c ++@@ -29,6 +29,7 @@ ++ #define PHY_ID_AQR109 0x03a1b502 ++ #define PHY_ID_AQR111 0x03a1b610 ++ #define PHY_ID_AQR111B0 0x03a1b612 +++#define PHY_ID_AQR111C 0x03a1b7e2 ++ #define PHY_ID_AQR112 0x03a1b660 ++ #define PHY_ID_AQR113C 0x31c31C10 ++ #define PHY_ID_AQR112C 0x03a1b792 ++@@ -701,6 +702,23 @@ static struct phy_driver aquantia_driver ++ .driver = { .owner = THIS_MODULE,}, ++ }, ++ { +++ .phy_id = PHY_ID_AQR111C, +++ .phy_id_mask = 0xfffffff0, +++ .name = "Aquantia AQR111C", +++ .features = PHY_AQUANTIA_FEATURES, +++ .flags = PHY_HAS_INTERRUPT, +++ .probe = aquantia_phy_probe, +++ .soft_reset = aquantia_soft_reset, +++ .config_init = aquantia_config_init, +++ .aneg_done = aquantia_aneg_done, +++ .config_aneg = aquantia_config_aneg, +++ .config_intr = aquantia_config_intr, +++ .ack_interrupt = aquantia_ack_interrupt, +++ .read_status = aquantia_read_status, +++ .update_link = aquantia_update_link, +++ .driver = { .owner = THIS_MODULE,}, +++}, +++{ ++ .phy_id = PHY_ID_AQR112, ++ .phy_id_mask = 0xfffffff0, ++ .name = "Aquantia AQR112", ++@@ -790,6 +808,7 @@ static struct mdio_device_id __maybe_unu ++ { PHY_ID_AQR109, 0xfffffff0 }, ++ { PHY_ID_AQR111, 0xfffffff0 }, ++ { PHY_ID_AQR111B0, 0xfffffff0 }, +++ { PHY_ID_AQR111C, 0xfffffff0 }, ++ { PHY_ID_AQR112, 0xfffffff0 }, ++ { PHY_ID_AQR113C, 0xfffffff0 }, ++ { PHY_ID_AQR112C, 0xfffffff0 }, +diff --git a/target/linux/ipq807x/patches/112-pstore.patch b/target/linux/ipq807x/patches/112-pstore.patch +new file mode 100644 +index 0000000000..dc3960306d +--- /dev/null ++++ b/target/linux/ipq807x/patches/112-pstore.patch +@@ -0,0 +1,147 @@ ++Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi ++=================================================================== ++--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi +++++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi ++@@ -92,6 +92,12 @@ ++ reg = <0x0 0x40000000 0x0 0x00800000>; ++ }; ++ +++ ramoops@4A0f0000 { +++ compatible = "ramoops"; +++ reg = <0 0x4A0f0000 0 0x10000>; +++ record-size = <0x1000>; +++ }; +++ ++ uboot@4A100000 { ++ no-map; ++ reg = <0x0 0x4A100000 0x0 0x00400000>; ++@@ -211,6 +217,12 @@ ++ reg = <0x0 0x40000000 0x0 0x01000000>; ++ }; ++ +++ ramoops@4A0f0000 { +++ compatible = "ramoops"; +++ reg = <0 0x4A0f0000 0 0x10000>; +++ record-size = <0x1000>; +++ }; +++ ++ uboot@4A100000 { ++ no-map; ++ reg = <0x0 0x4A100000 0x0 0x00400000>; ++@@ -330,6 +342,12 @@ ++ reg = <0x0 0x40000000 0x0 0x01000000>; ++ }; ++ +++ ramoops@4A0f0000 { +++ compatible = "ramoops"; +++ reg = <0 0x4A0f0000 0 0x10000>; +++ record-size = <0x1000>; +++ }; +++ ++ uboot@4A100000 { ++ no-map; ++ reg = <0x0 0x4A100000 0x0 0x00400000>; ++Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/fs/pstore/ram.c ++=================================================================== ++--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/fs/pstore/ram.c +++++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/fs/pstore/ram.c ++@@ -466,15 +466,46 @@ static int ramoops_init_prz(struct devic ++ return 0; ++ } ++ +++static int ramoops_parse_dt(struct platform_device *pdev, +++ struct ramoops_platform_data *pdata) +++{ +++ struct resource *res; +++ +++ dev_dbg(&pdev->dev, "using Device Tree\n"); +++ +++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +++ if (!res) { +++ dev_err(&pdev->dev, +++ "failed to locate DT /reserved-memory resource\n"); +++ return -EINVAL; +++ } +++ +++ pdata->mem_size = resource_size(res); +++ pdata->mem_address = res->start; +++ pdata->dump_oops = true; +++ pdata->record_size = 0x1000; +++ return 0; +++} +++ ++ static int ramoops_probe(struct platform_device *pdev) ++ { ++ struct device *dev = &pdev->dev; ++ struct ramoops_platform_data *pdata = pdev->dev.platform_data; +++ struct ramoops_platform_data pdata_local; ++ struct ramoops_context *cxt = &oops_cxt; ++ size_t dump_mem_sz; ++ phys_addr_t paddr; ++ int err = -EINVAL; ++ +++ if (dev_of_node(dev) && !pdata) { +++ pdata = &pdata_local; +++ memset(pdata, 0, sizeof(*pdata)); +++ +++ err = ramoops_parse_dt(pdev, pdata); +++ if (err < 0) +++ goto fail_out; +++ } +++ ++ /* Only a single ramoops area allowed at a time, so fail extra ++ * probes. ++ */ ++@@ -603,11 +634,17 @@ static int ramoops_remove(struct platfor ++ return 0; ++ } ++ +++static const struct of_device_id dt_match[] = { +++ { .compatible = "ramoops" }, +++ {} +++}; +++ ++ static struct platform_driver ramoops_driver = { ++ .probe = ramoops_probe, ++ .remove = ramoops_remove, ++ .driver = { ++ .name = "ramoops", +++ .of_match_table = dt_match, ++ }, ++ }; ++ ++Index: linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/of/platform.c ++=================================================================== ++--- linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016.orig/drivers/of/platform.c +++++ linux-4.4.60-qsdk-11f09717303ecd83c3a64e9efe23f25921dc1016/drivers/of/platform.c ++@@ -53,6 +53,30 @@ struct platform_device *of_find_device_b ++ } ++ EXPORT_SYMBOL(of_find_device_by_node); ++ +++static const struct of_device_id reserved_mem_matches[] = { +++ { .compatible = "ramoops" }, +++ {} +++}; +++ +++static int __init of_platform_default_populate_init(void) +++{ +++ struct device_node *node; +++ +++ if (!of_have_populated_dt()) +++ return -ENODEV; +++ +++ /* +++ * Handle certain compatibles explicitly, since we don't want to create +++ * platform_devices for every node in /reserved-memory with a +++ * "compatible", +++ */ +++ for_each_matching_node(node, reserved_mem_matches) +++ of_platform_device_create(node, NULL, NULL); +++ +++ return 0; +++} +++arch_initcall_sync(of_platform_default_populate_init); +++ ++ #ifdef CONFIG_OF_ADDRESS ++ /* ++ * The following routines scan a subtree and registers a device for -- 2.25.1