porting 0004-FE-1.Add-temperature-settings-for-CPU-overheat-resta.patch

Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
This commit is contained in:
YenLin Pan
2025-07-08 09:34:29 +08:00
parent 8e0b1a3237
commit 66e5b21eba

View File

@@ -1,23 +1,23 @@
From 1a46aa106a50a06bfa4b669d87a8143c3d59f2f4 Mon Sep 17 00:00:00 2001
From f13f2e47f4a14443b4244672b3a6c71c21306806 Mon Sep 17 00:00:00 2001
From: YenLin Pan <yenlin.pan@zyxel.com.tw>
Date: Wed, 14 May 2025 14:14:22 +0800
Date: Wed, 9 Jul 2025 11:47:31 +0800
Subject: [PATCH] thermal: thermal setting
lv0 -100 -hi0 105 -off0 0
lv1 95 -hi1 110 -off1 75
lv2 100 -hi2 115 -off2 98
lv3 105 -hi3 120 -off3 100
lo0 -100 -hi0 105 -off0 0
lo1 95 -hi1 110 -off1 20
lo2 100 -hi2 115 -off2 60
lo3 105 -hi3 119 -off3 98
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
---
drivers/net/wireless/ath/ath12k/thermal.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
drivers/net/wireless/ath/ath12k/thermal.h | 28 +++++++++++------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
index 5c91906..a493cd5 100644
index 5c91906..db1f251 100644
--- a/drivers/net/wireless/ath/ath12k/thermal.h
+++ b/drivers/net/wireless/ath/ath12k/thermal.h
@@ -13,28 +13,28 @@
@@ -13,29 +13,29 @@
/* Below temperatures are in celsius */
#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
@@ -30,30 +30,37 @@ index 5c91906..a493cd5 100644
-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
-#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 119
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 119
#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 75
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 98
#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 20
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 60
+#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 98
#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
--
2.34.1