From 82a6e24e91c5ad8ad05442551cd88b839af19cf2 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 24 Mar 2025 07:36:09 +0100 Subject: [PATCH] qca-wifi-7: add RTK phy fixes from CIG Signed-off-by: John Crispin --- .../files-6.1/drivers/net/phy/rtk/rtk_phy.c | 11 +- ...l-flowctrl-and-modify-rtl-phy-driver.patch | 148 ++++++++++++++++++ 2 files changed, 158 insertions(+), 1 deletion(-) create mode 100644 feeds/qca-wifi-7/qca-ssdk-qca/patches/0004-del-flowctrl-and-modify-rtl-phy-driver.patch diff --git a/feeds/qca-wifi-7/ipq53xx/files-6.1/drivers/net/phy/rtk/rtk_phy.c b/feeds/qca-wifi-7/ipq53xx/files-6.1/drivers/net/phy/rtk/rtk_phy.c index d30019e09..94a8825e2 100755 --- a/feeds/qca-wifi-7/ipq53xx/files-6.1/drivers/net/phy/rtk/rtk_phy.c +++ b/feeds/qca-wifi-7/ipq53xx/files-6.1/drivers/net/phy/rtk/rtk_phy.c @@ -80,7 +80,7 @@ static int rtkphy_config_init(struct phy_device *phydev) case REALTEK_PHY_ID_RTL8261N: case REALTEK_PHY_ID_RTL8264B: phydev_info(phydev, "%s:%u [RTL8261N/RTL826XB] phy_id: 0x%X PHYAD:%d\n", __FUNCTION__, __LINE__, phydev->drv->phy_id, phydev->mdio.addr); - + phy_modify_mmd_changed(phydev, 7, 0x20, BIT(12), 0); #if 1 /* toggle reset */ phy_modify_mmd_changed(phydev, 30, 0x145, BIT(0) , 1); @@ -213,6 +213,7 @@ static int rtkphy_c45_aneg_done(struct phy_device *phydev) static int rtkphy_c45_read_status(struct phy_device *phydev) { int ret = 0, status = 0; + uint16_t local; phydev->speed = SPEED_UNKNOWN; phydev->duplex = DUPLEX_UNKNOWN; phydev->pause = 0; @@ -230,6 +231,9 @@ static int rtkphy_c45_read_status(struct phy_device *phydev) ret = genphy_c45_read_lpa(phydev); if (ret) return ret; + + phy_write_mmd(phydev, 7, 0x20, 0x181); + local = phy_read_mmd(phydev, 7, 0x20); status = phy_read_mmd(phydev, 31, 0xA414); if (status < 0) @@ -238,6 +242,11 @@ static int rtkphy_c45_read_status(struct phy_device *phydev) phydev->lp_advertising, status & BIT(11)); phy_resolve_aneg_linkmode(phydev); + if((phydev->speed == 10000) && (local == 0x181)) + { + phydev->speed = 5000; + phydev->duplex = DUPLEX_FULL; + } } else { diff --git a/feeds/qca-wifi-7/qca-ssdk-qca/patches/0004-del-flowctrl-and-modify-rtl-phy-driver.patch b/feeds/qca-wifi-7/qca-ssdk-qca/patches/0004-del-flowctrl-and-modify-rtl-phy-driver.patch new file mode 100644 index 000000000..965a07288 --- /dev/null +++ b/feeds/qca-wifi-7/qca-ssdk-qca/patches/0004-del-flowctrl-and-modify-rtl-phy-driver.patch @@ -0,0 +1,148 @@ +From 784f7597a8202dd925e9486560a5b791f37d65b9 Mon Sep 17 00:00:00 2001 +From: ruanyaoyu +Date: Thu, 20 Mar 2025 10:17:41 +0800 +Subject: [PATCH] del flowctrl and modify rtl phy driver + +--- + src/hsl/phy/rtl826xb_phy.c | 51 +++++++++++-------- + src/init/ssdk_init.c | 7 --- + 2 files changed, 29 insertions(+), 29 deletions(-) + +diff --git a/src/hsl/phy/rtl826xb_phy.c b/src/hsl/phy/rtl826xb_phy.c +index 3dc56091d5..a336348aa9 100644 +--- a/src/hsl/phy/rtl826xb_phy.c ++++ b/src/hsl/phy/rtl826xb_phy.c +@@ -1089,6 +1089,7 @@ a_uint32_t + _phy_826xb_an_restart(a_uint32_t unit, a_uint32_t port) + { + a_uint16_t phyData = 0; ++ hsl_phy_phydev_autoneg_update(unit, port, A_TRUE, 0); + phyData = phy_common_general_reg_mmd_get(unit, port, PHY_MMD_AN, 0); + + if (phyData & 0x1000) /*AN is enabled*/ +@@ -1152,6 +1153,8 @@ sw_error_t rtl826x_phy_get_status(a_uint32_t dev_id, a_uint32_t phy_id, struct p + phy_status->link_status = phy_826x_linkStatus_get(dev_id, phy_id); + if(phy_status->link_status != A_TRUE) + { ++ phy_status->rx_flowctrl = A_FALSE; ++ phy_status->tx_flowctrl = A_FALSE; + return SW_OK; + } + phyData = phy_common_general_reg_mmd_get(dev_id, phy_id, PHY_MMD_VEND2, 0xA434); +@@ -1194,9 +1197,9 @@ sw_error_t rtl826x_phy_get_status(a_uint32_t dev_id, a_uint32_t phy_id, struct p + + phy_status->duplex = (phyData & 0x8) ? FAL_FULL_DUPLEX : FAL_HALF_DUPLEX; + +- phy_status->rx_flowctrl = A_FALSE; ++ phy_status->rx_flowctrl = A_TRUE; + +- phy_status->tx_flowctrl = A_FALSE; ++ phy_status->tx_flowctrl = A_TRUE; + + return SW_OK; + } +@@ -1275,23 +1278,27 @@ phy_826xb_autoNegoAbility_set(a_uint32_t dev_id, a_uint32_t phy_id, a_uint32_t a + return RT_ERR_INPUT; + } + +- ++ hsl_phy_phydev_autoneg_update(dev_id, phy_id, A_TRUE, autoneg); ++ + phyData = phy_common_general_reg_mmd_get(dev_id, phy_id, PHY_MMD_AN, 16); + + phyData &= (~(0x0020 | 0x0040 | 0x0080 | 0x0100 | 0x0400 | 0x0800)); ++ phyData |= ((autoneg & 1 << 1)) ? (0x0040) : (0); + phyData |= ((autoneg & 1 << 2)) ? (0x0080) : (0); + phyData |= ((autoneg & 1 << 3)) ? (0x0100) : (0); +- phyData |= ((autoneg & 1 << 9)) ? (0x0400) : (0); +- phyData |= ((autoneg & 1 << 10)) ? (0x0800) : (0); ++ phyData |= ((autoneg & 1 << 4)) ? (0x0400) : (0); ++ phyData |= ((autoneg & 1 << 5)) ? (0x0800) : (0); ++// phyData |= ((autoneg & 1 << 9)) ? (0x0400) : (0); ++// phyData |= ((autoneg & 1 << 10)) ? (0x0800) : (0); + + phy_common_general_reg_mmd_set(dev_id, phy_id, PHY_MMD_AN, 16, phyData); + + phyData = phy_common_general_reg_mmd_get(dev_id, phy_id, PHY_MMD_AN, 32); + +- phyData &= (~(0x0080 | 0x0100 | 0x1000)); +- phyData |= (autoneg & 1 << 6) ? (0x0080) : (0); +- phyData |= (autoneg & 1 << 7) ? (0x0100) : (0); +- phyData |= (autoneg & 1 << 8) ? (0x1000) : (0); ++ phyData &= (~(0x4000 | 0x2000 | 0x1000)); ++ phyData |= (autoneg & 1 << 12) ? (0x0080) : (0); ++ phyData |= (autoneg & 1 << 13) ? (0x0100) : (0); ++ phyData |= (autoneg & 1 << 14) ? (0x1000) : (0); + + phy_common_general_reg_mmd_set(dev_id, phy_id, PHY_MMD_AN, 32, phyData); + +@@ -1300,8 +1307,8 @@ phy_826xb_autoNegoAbility_set(a_uint32_t dev_id, a_uint32_t phy_id, a_uint32_t a + + + phyData &= (~(0x0100 | 0x0200)); +- phyData |= (autoneg & 1 << 4) ? (0x0100) : (0); +- phyData |= (autoneg & 1 << 5) ? (0x0200) : (0); ++ phyData |= (autoneg & 1 << 9) ? (0x0200) : (0); ++// phyData |= (autoneg & 1 << 5) ? (0x0200) : (0); + + phy_common_general_reg_mmd_set(dev_id, phy_id, PHY_MMD_VEND2, 0xA412, phyData); + +@@ -1317,17 +1324,17 @@ phy_common_c45_autoNegoAbility_get(a_uint32_t unit, a_uint32_t port, a_uint32_t + a_uint16_t phyData = 0; + phyData = phy_common_general_reg_mmd_get(unit, port, PHY_MMD_AN, 16); + +- *autoneg |= (phyData & 0x0020) ? (1) : (0); +- *autoneg |= (phyData & 0x0040) ? (1) : (0); +- *autoneg |= (phyData & 0x0080) ? (1) : (0); +- *autoneg |= (phyData & 0x0100) ? (1) : (0); +- *autoneg |= (phyData & 0x0400) ? (1) : (0); +- *autoneg |= (phyData & 0x0800) ? (1) : (0); ++ *autoneg |= (phyData & 0x0020) ? (FAL_PHY_ADV_10T_HD) : (0); ++ *autoneg |= (phyData & 0x0040) ? (FAL_PHY_ADV_10T_FD) : (0); ++ *autoneg |= (phyData & 0x0080) ? (FAL_PHY_ADV_100TX_HD) : (0); ++ *autoneg |= (phyData & 0x0100) ? (FAL_PHY_ADV_100TX_FD) : (0); ++ *autoneg |= (phyData & 0x0400) ? (FAL_PHY_ADV_PAUSE) : (0); ++ *autoneg |= (phyData & 0x0800) ? (FAL_PHY_ADV_ASY_PAUSE) : (0); + phyData = phy_common_general_reg_mmd_get(unit, port, PHY_MMD_AN, 32); + +- *autoneg |= (phyData & 0x0080) ? (1) : (0); +- *autoneg |= (phyData & 0x0100) ? (1) : (0); +- *autoneg |= (phyData & 0x1000) ? (1) : (0); ++ *autoneg |= (phyData & 0x0080) ? (FAL_PHY_ADV_2500T_FD) : (0); ++ *autoneg |= (phyData & 0x0100) ? (FAL_PHY_ADV_5000T_FD) : (0); ++ *autoneg |= (phyData & 0x1000) ? (FAL_PHY_ADV_10000T_FD) : (0); + + return ret; + } +@@ -1342,8 +1349,8 @@ phy_826x_autoNegoAbility_get(a_uint32_t unit, a_uint32_t port, a_uint32_t *auton + + phyData = phy_common_general_reg_mmd_get(unit, port, PHY_MMD_VEND2, 0xA412); + +- *autoneg = (phyData & 0x0100) ? (1) : (0); +- *autoneg = (phyData & 0x0200) ? (1) : (0); ++ // *autoneg = (phyData & 0x0100) ? (1) : (0); ++ *autoneg |= (phyData & 0x0200) ? (FAL_PHY_ADV_1000T_FD) : (0); + + phy_common_c45_autoNegoAbility_get(unit, port, autoneg); + +diff --git a/src/init/ssdk_init.c b/src/init/ssdk_init.c +index de9cb7d90b..59f5fc43c0 100644 +--- a/src/init/ssdk_init.c ++++ b/src/init/ssdk_init.c +@@ -483,13 +483,6 @@ qca_switch_init(a_uint32_t dev_id) + case CHIP_SHIVA: + return SW_OK; + case CHIP_APPE: +- SSDK_DEBUG("set APPE port 2 flowctrl force mode & flowctrl enable\n"); +- if(2 == i) +- { +- fal_port_flowctrl_forcemode_set(dev_id, i, A_TRUE); +- fal_port_flowctrl_set(dev_id, i, A_TRUE); +- } +- break; + case CHIP_ISISC: + case CHIP_ISIS: + #if defined(ISISC) || defined(ISIS) +-- +2.34.1 +