diff --git a/feeds/mediatek-sdk/mt76/Makefile b/feeds/mediatek-sdk/mt76/Makefile index 24fdd5178..4c5796a7e 100644 --- a/feeds/mediatek-sdk/mt76/Makefile +++ b/feeds/mediatek-sdk/mt76/Makefile @@ -10,7 +10,7 @@ PKG_SOURCE_URL:=https://github.com/openwrt/mt76 PKG_SOURCE_PROTO:=git PKG_SOURCE_DATE:=2024-04-03 PKG_SOURCE_VERSION:=1e336a8582dce2ef32ddd440d423e9afef961e71 -PKG_MIRROR_HASH:=276613540603dc6ece9d2474ae1899b6aaa6ca93bd27824056c9689c725f5890 +PKG_MIRROR_HASH:=48e787bcf0c526d9511375a8a3a77c850de9deca79f6177d2eeea7ca8bd798e2 PKG_MAINTAINER:=Felix Fietkau PKG_USE_NINJA:=0 diff --git a/feeds/mediatek-sdk/mt76/mt76/Makefile b/feeds/mediatek-sdk/mt76/mt76/Makefile deleted file mode 100644 index 24fdd5178..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/Makefile +++ /dev/null @@ -1,748 +0,0 @@ -include $(TOPDIR)/rules.mk - -PKG_NAME:=mt76 -PKG_RELEASE=1 - -PKG_LICENSE:=GPLv2 -PKG_LICENSE_FILES:= - -PKG_SOURCE_URL:=https://github.com/openwrt/mt76 -PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2024-04-03 -PKG_SOURCE_VERSION:=1e336a8582dce2ef32ddd440d423e9afef961e71 -PKG_MIRROR_HASH:=276613540603dc6ece9d2474ae1899b6aaa6ca93bd27824056c9689c725f5890 - -PKG_MAINTAINER:=Felix Fietkau -PKG_USE_NINJA:=0 -PKG_BUILD_PARALLEL:=1 - -PKG_CONFIG_DEPENDS += \ - CONFIG_PACKAGE_kmod-mt76-usb \ - CONFIG_PACKAGE_kmod-mt76x02-common \ - CONFIG_PACKAGE_kmod-mt76x0-common \ - CONFIG_PACKAGE_kmod-mt76x0u \ - CONFIG_PACKAGE_kmod-mt76x2-common \ - CONFIG_PACKAGE_kmod-mt76x2 \ - CONFIG_PACKAGE_kmod-mt76x2u \ - CONFIG_PACKAGE_kmod-mt7603 \ - CONFIG_PACKAGE_CFG80211_TESTMODE - -STAMP_CONFIGURED_DEPENDS := $(STAGING_DIR)/usr/include/mac80211-backport/backport/autoconf.h - -include $(INCLUDE_DIR)/kernel.mk -include $(INCLUDE_DIR)/package.mk -include $(INCLUDE_DIR)/cmake.mk - -CMAKE_SOURCE_DIR:=$(PKG_BUILD_DIR)/tools -CMAKE_BINARY_DIR:=$(PKG_BUILD_DIR)/tools - -define KernelPackage/mt76-default - SUBMENU:=Wireless Drivers - DEPENDS:= \ - +kmod-mac80211 \ - +@DRIVER_11AC_SUPPORT \ - +@KERNEL_PAGE_POOL -endef - -define KernelPackage/mt76 - SUBMENU:=Wireless Drivers - TITLE:=MediaTek MT76x2/MT7603 wireless driver (metapackage) - DEPENDS:= \ - +kmod-mt76-core +kmod-mt76x2 +kmod-mt7603 -endef - -define KernelPackage/mt76-core - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76xx wireless driver - HIDDEN:=1 - FILES:=\ - $(PKG_BUILD_DIR)/mt76.ko -endef - -define KernelPackage/mt76-usb - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76xx wireless driver USB support - DEPENDS += +kmod-usb-core +kmod-mt76-core - HIDDEN:=1 - FILES:=\ - $(PKG_BUILD_DIR)/mt76-usb.ko -endef - -define KernelPackage/mt76x02-usb - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x0/MT76x2 USB wireless driver common code - DEPENDS+=+kmod-mt76-usb +kmod-mt76x02-common - HIDDEN:=1 - FILES:=$(PKG_BUILD_DIR)/mt76x02-usb.ko -endef - -define KernelPackage/mt76x02-common - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x0/MT76x2 wireless driver common code - DEPENDS+=+kmod-mt76-core - HIDDEN:=1 - FILES:=$(PKG_BUILD_DIR)/mt76x02-lib.ko -endef - -define KernelPackage/mt76x0-common - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x0 wireless driver common code - DEPENDS+=+kmod-mt76x02-common - HIDDEN:=1 - FILES:=$(PKG_BUILD_DIR)/mt76x0/mt76x0-common.ko -endef - -define KernelPackage/mt76x0e - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x0E wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt76x0-common - FILES:=\ - $(PKG_BUILD_DIR)/mt76x0/mt76x0e.ko - AUTOLOAD:=$(call AutoProbe,mt76x0e) -endef - -define KernelPackage/mt76x0u - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x0U wireless driver - DEPENDS+=+kmod-mt76x0-common +kmod-mt76x02-usb - FILES:=\ - $(PKG_BUILD_DIR)/mt76x0/mt76x0u.ko - AUTOLOAD:=$(call AutoProbe,mt76x0u) -endef - -define KernelPackage/mt76x2-common - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x2 wireless driver common code - DEPENDS+=+kmod-mt76-core +kmod-mt76x02-common - HIDDEN:=1 - FILES:=$(PKG_BUILD_DIR)/mt76x2/mt76x2-common.ko -endef - -define KernelPackage/mt76x2u - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x2U wireless driver - DEPENDS+=+kmod-mt76x2-common +kmod-mt76x02-usb - FILES:=\ - $(PKG_BUILD_DIR)/mt76x2/mt76x2u.ko - AUTOLOAD:=$(call AutoProbe,mt76x2u) -endef - -define KernelPackage/mt76x2 - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT76x2 wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt76x2-common - FILES:=\ - $(PKG_BUILD_DIR)/mt76x2/mt76x2e.ko - AUTOLOAD:=$(call AutoProbe,mt76x2e) -endef - -define KernelPackage/mt7603 - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7603 wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt76-core - FILES:=\ - $(PKG_BUILD_DIR)/mt7603/mt7603e.ko - AUTOLOAD:=$(call AutoProbe,mt7603e) -endef - -define KernelPackage/mt76-connac - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7615/MT79xx wireless driver common code - HIDDEN:=1 - DEPENDS+=+kmod-mt76-core - FILES:= $(PKG_BUILD_DIR)/mt76-connac-lib.ko -endef - -define KernelPackage/mt76-sdio - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7615/MT79xx SDIO driver common code - HIDDEN:=1 - DEPENDS+=+kmod-mt76-core +kmod-mmc - FILES:= $(PKG_BUILD_DIR)/mt76-sdio.ko -endef - -define KernelPackage/mt7615-common - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7615 wireless driver common code - HIDDEN:=1 - DEPENDS+=@PCI_SUPPORT +kmod-mt76-core +kmod-mt76-connac +kmod-hwmon-core - FILES:= $(PKG_BUILD_DIR)/mt7615/mt7615-common.ko -endef - -define KernelPackage/mt7615-firmware - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7615e firmware - DEPENDS+=+kmod-mt7615e -endef - -define KernelPackage/mt7615e - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7615e wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt7615-common - FILES:= $(PKG_BUILD_DIR)/mt7615/mt7615e.ko - AUTOLOAD:=$(call AutoProbe,mt7615e) -endef - -define KernelPackage/mt7622-firmware - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7622 firmware - DEPENDS+=+kmod-mt7615e -endef - -define KernelPackage/mt7663-firmware-ap - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7663e firmware (optimized for AP) -endef - -define KernelPackage/mt7663-firmware-sta - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7663e firmware (client mode offload) -endef - -define KernelPackage/mt7663-usb-sdio - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7663 USB/SDIO shared code - DEPENDS+=+kmod-mt7615-common - HIDDEN:=1 - FILES:= \ - $(PKG_BUILD_DIR)/mt7615/mt7663-usb-sdio-common.ko -endef - -define KernelPackage/mt7663s - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7663s wireless driver - DEPENDS+=+kmod-mt76-sdio +kmod-mt7615-common +kmod-mt7663-usb-sdio - FILES:= \ - $(PKG_BUILD_DIR)/mt7615/mt7663s.ko - AUTOLOAD:=$(call AutoProbe,mt7663s) -endef - -define KernelPackage/mt7663u - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7663u wireless driver - DEPENDS+=+kmod-mt76-usb +kmod-mt7615-common +kmod-mt7663-usb-sdio - FILES:= $(PKG_BUILD_DIR)/mt7615/mt7663u.ko - AUTOLOAD:=$(call AutoProbe,mt7663u) -endef - -define KernelPackage/mt7915-firmware - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7915 firmware - DEPENDS+=+kmod-mt7915e -endef - -define KernelPackage/mt7915e - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7915e/MT7986/MT7916 wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt76-connac +kmod-hwmon-core +kmod-thermal +@DRIVER_11AX_SUPPORT +@KERNEL_RELAY - FILES:= $(PKG_BUILD_DIR)/mt7915/mt7915e.ko - AUTOLOAD:=$(call AutoProbe,mt7915e) -endef - -define KernelPackage/mt7916-firmware - $(KernelPackage/mt76-default) - DEPENDS+=+kmod-mt7915e - TITLE:=MediaTek MT7916 firmware -endef - -define KernelPackage/mt7981-firmware - $(KernelPackage/mt76-default) - DEPENDS:=+@TARGET_mediatek_mt7981 - TITLE:=MediaTek MT7981 firmware -endef - -define KernelPackage/mt7986-firmware - $(KernelPackage/mt76-default) - DEPENDS:=+@TARGET_mediatek_mt7986 - TITLE:=MediaTek MT7986 firmware -endef - -define KernelPackage/mt7921-firmware - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7921 firmware -endef - -define KernelPackage/mt7922-firmware - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7922 firmware -endef - -define KernelPackage/mt792x-common - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT792x wireless driver common code - HIDDEN:=1 - DEPENDS+=+kmod-mt76-connac +@DRIVER_11AX_SUPPORT - FILES:= $(PKG_BUILD_DIR)/mt792x-lib.ko -endef - -define KernelPackage/mt792x-usb - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT792x wireless driver USB code - HIDDEN:=1 - DEPENDS+=+kmod-mt792x-common +kmod-mt76-usb +@DRIVER_11AX_SUPPORT - FILES:= $(PKG_BUILD_DIR)/mt792x-usb.ko -endef - -define KernelPackage/mt7921-common - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7921 wireless driver common code - HIDDEN:=1 - DEPENDS+=+kmod-mt792x-common +kmod-mt7921-firmware +@DRIVER_11AX_SUPPORT +kmod-hwmon-core - FILES:= $(PKG_BUILD_DIR)/mt7921/mt7921-common.ko -endef - -define KernelPackage/mt7921u - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7921U wireless driver - DEPENDS+=+kmod-mt792x-usb +kmod-mt7921-common - FILES:= $(PKG_BUILD_DIR)/mt7921/mt7921u.ko - AUTOLOAD:=$(call AutoProbe,mt7921u) -endef - -define KernelPackage/mt7921s - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7921S wireless driver - DEPENDS+=+kmod-mt76-sdio +kmod-mt7921-common - FILES:= $(PKG_BUILD_DIR)/mt7921/mt7921s.ko - AUTOLOAD:=$(call AutoProbe,mt7921s) -endef - -define KernelPackage/mt7921e - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7921e wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt7921-common - FILES:= $(PKG_BUILD_DIR)/mt7921/mt7921e.ko - AUTOLOAD:=$(call AutoProbe,mt7921e) -endef - -define KernelPackage/mt7996e - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7996/MT7995/MT7919 wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt76-core +kmod-mt76-connac +kmod-hwmon-core +kmod-thermal +@DRIVER_11AX_SUPPORT +@DRIVER_11BE_SUPPORT - FILES:= $(PKG_BUILD_DIR)/mt7996/mt7996e.ko - AUTOLOAD:=$(call AutoProbe,mt7996e) -endef - -define KernelPackage/mt7996-firmware - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7996 firmware - DEPENDS+=+kmod-mt7996e -endef - -define KernelPackage/mt7925-common - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7925 wireless driver common code - HIDDEN:=1 - DEPENDS+=+kmod-mt792x-common +@DRIVER_11AX_SUPPORT +kmod-hwmon-core - FILES:= $(PKG_BUILD_DIR)/mt7925/mt7925-common.ko -endef - -define KernelPackage/mt7925u - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7925U wireless driver - DEPENDS+=+kmod-mt792x-usb +kmod-mt7925-common - FILES:= $(PKG_BUILD_DIR)/mt7925/mt7925u.ko - AUTOLOAD:=$(call AutoProbe,mt7921u) -endef - -define KernelPackage/mt7925e - $(KernelPackage/mt76-default) - TITLE:=MediaTek MT7925e wireless driver - DEPENDS+=@PCI_SUPPORT +kmod-mt7925-common - FILES:= $(PKG_BUILD_DIR)/mt7925/mt7925e.ko - AUTOLOAD:=$(call AutoProbe,mt7921e) -endef - -define Package/mt76-test - SECTION:=devel - CATEGORY:=Development - TITLE:=mt76 testmode CLI - DEPENDS:=kmod-mt76-core +libnl-tiny -endef - -TARGET_CFLAGS += -I$(STAGING_DIR)/usr/include/libnl-tiny - -NOSTDINC_FLAGS := \ - $(KERNEL_NOSTDINC_FLAGS) \ - -I$(PKG_BUILD_DIR) \ - -I$(STAGING_DIR)/usr/include/mac80211-backport/uapi \ - -I$(STAGING_DIR)/usr/include/mac80211-backport \ - -I$(STAGING_DIR)/usr/include/mac80211/uapi \ - -I$(STAGING_DIR)/usr/include/mac80211 \ - -include backport/autoconf.h \ - -include backport/backport.h - -ifdef CONFIG_PACKAGE_MAC80211_MESH - NOSTDINC_FLAGS += -DCONFIG_MAC80211_MESH -endif - -ifdef CONFIG_PACKAGE_MAC80211_DEBUGFS - NOSTDINC_FLAGS += -DCONFIG_MAC80211_DEBUGFS - PKG_MAKE_FLAGS += CONFIG_MAC80211_DEBUGFS=y -endif - -ifdef CONFIG_PACKAGE_CFG80211_TESTMODE - NOSTDINC_FLAGS += -DCONFIG_NL80211_TESTMODE - PKG_MAKE_FLAGS += CONFIG_NL80211_TESTMODE=y -endif - -ifdef CONFIG_PACKAGE_kmod-mt76-usb - PKG_MAKE_FLAGS += CONFIG_MT76_USB=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x02-common - PKG_MAKE_FLAGS += CONFIG_MT76x02_LIB=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x02-usb - PKG_MAKE_FLAGS += CONFIG_MT76x02_USB=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x0-common - PKG_MAKE_FLAGS += CONFIG_MT76x0_COMMON=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x0e - PKG_MAKE_FLAGS += CONFIG_MT76x0E=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x0u - PKG_MAKE_FLAGS += CONFIG_MT76x0U=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x2-common - PKG_MAKE_FLAGS += CONFIG_MT76x2_COMMON=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x2 - PKG_MAKE_FLAGS += CONFIG_MT76x2E=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76x2u - PKG_MAKE_FLAGS += CONFIG_MT76x2U=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7603 - PKG_MAKE_FLAGS += CONFIG_MT7603E=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76-connac - PKG_MAKE_FLAGS += CONFIG_MT76_CONNAC_LIB=m -endif -ifdef CONFIG_PACKAGE_kmod-mt76-sdio - PKG_MAKE_FLAGS += CONFIG_MT76_SDIO=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7615-common - PKG_MAKE_FLAGS += CONFIG_MT7615_COMMON=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7615e - PKG_MAKE_FLAGS += CONFIG_MT7615E=m - ifdef CONFIG_TARGET_mediatek_mt7622 - PKG_MAKE_FLAGS += CONFIG_MT7622_WMAC=y - NOSTDINC_FLAGS += -DCONFIG_MT7622_WMAC - endif -endif -ifdef CONFIG_PACKAGE_kmod-mt7663-usb-sdio - PKG_MAKE_FLAGS += CONFIG_MT7663_USB_SDIO_COMMON=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7663s - PKG_MAKE_FLAGS += CONFIG_MT7663S=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7663u - PKG_MAKE_FLAGS += CONFIG_MT7663U=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7915e - PKG_MAKE_FLAGS += CONFIG_MT7915E=m - ifdef CONFIG_TARGET_mediatek_mt7986 - PKG_MAKE_FLAGS += CONFIG_MT798X_WMAC=y - NOSTDINC_FLAGS += -DCONFIG_MT798X_WMAC - endif - ifdef CONFIG_TARGET_mediatek_mt7981 - PKG_MAKE_FLAGS += CONFIG_MT798X_WMAC=y - NOSTDINC_FLAGS += -DCONFIG_MT798X_WMAC - endif -endif -ifdef CONFIG_PACKAGE_kmod-mt792x-common - PKG_MAKE_FLAGS += CONFIG_MT792x_LIB=m -endif -ifdef CONFIG_PACKAGE_kmod-mt792x-usb - PKG_MAKE_FLAGS += CONFIG_MT792x_USB=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7921-common - PKG_MAKE_FLAGS += CONFIG_MT7921_COMMON=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7921u - PKG_MAKE_FLAGS += CONFIG_MT7921U=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7921s - PKG_MAKE_FLAGS += CONFIG_MT7921S=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7921e - PKG_MAKE_FLAGS += CONFIG_MT7921E=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7996e - PKG_MAKE_FLAGS += CONFIG_MT7996E=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7925-common - PKG_MAKE_FLAGS += CONFIG_MT7925_COMMON=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7925u - PKG_MAKE_FLAGS += CONFIG_MT7925U=m -endif -ifdef CONFIG_PACKAGE_kmod-mt7925e - PKG_MAKE_FLAGS += CONFIG_MT7925E=m -endif - -define Build/Compile - +$(MAKE) $(PKG_JOBS) -C "$(LINUX_DIR)" \ - $(KERNEL_MAKE_FLAGS) \ - $(PKG_MAKE_FLAGS) \ - M="$(PKG_BUILD_DIR)" \ - NOSTDINC_FLAGS="$(NOSTDINC_FLAGS)" \ - modules - $(MAKE) -C $(PKG_BUILD_DIR)/tools -endef - -define Build/Install - : -endef - -define Package/kmod-mt76/install - true -endef - -define KernelPackage/mt76x0-common/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7610e.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt76x2-common/install - $(INSTALL_DIR) $(1)/lib/firmware - cp \ - $(PKG_BUILD_DIR)/firmware/mt7662_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7662.bin \ - $(1)/lib/firmware -endef - -define KernelPackage/mt76x0u/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - ln -sf mt7610e.bin $(1)/lib/firmware/mediatek/mt7610u.bin -endef - -define KernelPackage/mt76x2u/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - ln -sf ../mt7662.bin $(1)/lib/firmware/mediatek/mt7662u.bin - ln -sf ../mt7662_rom_patch.bin $(1)/lib/firmware/mediatek/mt7662u_rom_patch.bin -endef - -define KernelPackage/mt7603/install - $(INSTALL_DIR) $(1)/lib/firmware - cp $(if $(CONFIG_TARGET_ramips_mt76x8), \ - $(PKG_BUILD_DIR)/firmware/mt7628_e1.bin \ - $(PKG_BUILD_DIR)/firmware/mt7628_e2.bin \ - ,\ - $(PKG_BUILD_DIR)/firmware/mt7603_e1.bin \ - $(PKG_BUILD_DIR)/firmware/mt7603_e2.bin \ - ) \ - $(1)/lib/firmware -endef - -define KernelPackage/mt7615-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7615_cr4.bin \ - $(PKG_BUILD_DIR)/firmware/mt7615_n9.bin \ - $(PKG_BUILD_DIR)/firmware/mt7615_rom_patch.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7622-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7622_n9.bin \ - $(PKG_BUILD_DIR)/firmware/mt7622_rom_patch.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7663-firmware-ap/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7663_n9_rebb.bin \ - $(PKG_BUILD_DIR)/firmware/mt7663pr2h_rebb.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7663-firmware-sta/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7663_n9_v3.bin \ - $(PKG_BUILD_DIR)/firmware/mt7663pr2h.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7915-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7915_wa.bin \ - $(PKG_BUILD_DIR)/firmware/mt7915_wm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7915_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7915_eeprom.bin \ - $(PKG_BUILD_DIR)/firmware/mt7915_eeprom_dbdc.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7916-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7916_wa.bin \ - $(PKG_BUILD_DIR)/firmware/mt7916_wm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7916_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7916_eeprom.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7981-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7981_wa.bin \ - $(PKG_BUILD_DIR)/firmware/mt7981_wm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7981_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7981_eeprom_mt7976_dbdc.bin \ - $(1)/lib/firmware/mediatek -ifdef CONFIG_NET_MEDIATEK_SOC_WED - cp \ - $(PKG_BUILD_DIR)/firmware/mt7981_wo.bin \ - $(1)/lib/firmware/mediatek -endif -endef - -define KernelPackage/mt7986-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/mt7986_wa.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_wm_mt7975.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_wm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_rom_patch_mt7975.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_eeprom_mt7975_dual.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_eeprom_mt7976_dual.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_eeprom_mt7975.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_eeprom_mt7976.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_eeprom_mt7976_dbdc.bin \ - $(1)/lib/firmware/mediatek -ifdef CONFIG_NET_MEDIATEK_SOC_WED - cp \ - $(PKG_BUILD_DIR)/firmware/mt7986_wo_0.bin \ - $(PKG_BUILD_DIR)/firmware/mt7986_wo_1.bin \ - $(1)/lib/firmware/mediatek -endif -endef - -ifdef CONFIG_PACKAGE_kmod-mt7996e -define KernelPackage/mt7996e/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek/mt7996 - cp \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wa.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wm_tm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_dsp.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wa_233.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wm_233.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wm_tm_233.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_rom_patch_233.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_eeprom.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_eeprom_2i5i6i.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_eeprom_233.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_eeprom_dual_404.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wa.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wm_tm.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_dsp.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_eeprom_2i5i.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_eeprom_2i5e.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_eeprom_2e5e.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wa_23.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wm_23.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wm_tm_23.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_rom_patch_23.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_dsp_23.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_eeprom_23_2i5i.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_eeprom_23_2e5e.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wa_24.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wm_24.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_wm_tm_24.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_rom_patch_24.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_dsp_24.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7992_eeprom_24_2i5i.bin \ - $(1)/lib/firmware/mediatek/mt7996 -endef -endif - -define KernelPackage/mt7921-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/WIFI_MT7961_patch_mcu_1_2_hdr.bin \ - $(PKG_BUILD_DIR)/firmware/WIFI_RAM_CODE_MT7961_1.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7922-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek - cp \ - $(PKG_BUILD_DIR)/firmware/WIFI_MT7922_patch_mcu_1_1_hdr.bin \ - $(PKG_BUILD_DIR)/firmware/WIFI_RAM_CODE_MT7922_1.bin \ - $(1)/lib/firmware/mediatek -endef - -define KernelPackage/mt7996-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/mediatek/mt7996 - cp \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_dsp.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_eeprom.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_rom_patch.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wa.bin \ - $(PKG_BUILD_DIR)/firmware/mt7996/mt7996_wm.bin \ - $(1)/lib/firmware/mediatek/mt7996 -endef - -define Package/mt76-test/install - mkdir -p $(1)/usr/sbin - $(INSTALL_BIN) $(PKG_BUILD_DIR)/tools/mt76-test $(1)/usr/sbin -endef - -$(eval $(call KernelPackage,mt76-core)) -$(eval $(call KernelPackage,mt76-usb)) -$(eval $(call KernelPackage,mt76x02-usb)) -$(eval $(call KernelPackage,mt76x02-common)) -$(eval $(call KernelPackage,mt76x0-common)) -$(eval $(call KernelPackage,mt76x0e)) -$(eval $(call KernelPackage,mt76x0u)) -$(eval $(call KernelPackage,mt76x2-common)) -$(eval $(call KernelPackage,mt76x2u)) -$(eval $(call KernelPackage,mt76x2)) -$(eval $(call KernelPackage,mt7603)) -$(eval $(call KernelPackage,mt76-connac)) -$(eval $(call KernelPackage,mt76-sdio)) -$(eval $(call KernelPackage,mt7615-common)) -$(eval $(call KernelPackage,mt7615-firmware)) -$(eval $(call KernelPackage,mt7622-firmware)) -$(eval $(call KernelPackage,mt7615e)) -$(eval $(call KernelPackage,mt7663-firmware-ap)) -$(eval $(call KernelPackage,mt7663-firmware-sta)) -$(eval $(call KernelPackage,mt7663-usb-sdio)) -$(eval $(call KernelPackage,mt7663u)) -$(eval $(call KernelPackage,mt7663s)) -$(eval $(call KernelPackage,mt7915-firmware)) -$(eval $(call KernelPackage,mt7915e)) -$(eval $(call KernelPackage,mt7916-firmware)) -$(eval $(call KernelPackage,mt7981-firmware)) -$(eval $(call KernelPackage,mt7986-firmware)) -$(eval $(call KernelPackage,mt7921-firmware)) -$(eval $(call KernelPackage,mt7922-firmware)) -$(eval $(call KernelPackage,mt792x-common)) -$(eval $(call KernelPackage,mt792x-usb)) -$(eval $(call KernelPackage,mt7921-common)) -$(eval $(call KernelPackage,mt7925-common)) -$(eval $(call KernelPackage,mt7921u)) -$(eval $(call KernelPackage,mt7921s)) -$(eval $(call KernelPackage,mt7921e)) -$(eval $(call KernelPackage,mt7925u)) -$(eval $(call KernelPackage,mt7925e)) -$(eval $(call KernelPackage,mt7996e)) -$(eval $(call KernelPackage,mt7996-firmware)) -$(eval $(call KernelPackage,mt76)) -$(eval $(call BuildPackage,mt76-test)) diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0001-wifi-mt76-fix-incorrect-HE-TX-GI-report.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0001-wifi-mt76-fix-incorrect-HE-TX-GI-report.patch deleted file mode 100644 index 1c9624e72..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0001-wifi-mt76-fix-incorrect-HE-TX-GI-report.patch +++ /dev/null @@ -1,501 +0,0 @@ -From e9f5961a07a895d18b6158a94d74633c07eab50f Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Thu, 18 May 2023 18:11:37 +0800 -Subject: [PATCH 01/14] wifi: mt76: fix incorrect HE TX GI report - -Change GI reporting source from static capability to rate-tuning module. - -Signed-off-by: Benjamin Lin ---- - mt76.h | 4 ++ - mt7915/init.c | 4 ++ - mt7915/mac.c | 64 ++++++++++++------- - mt7915/main.c | 7 +++ - mt7915/mcu.c | 161 ++++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/mcu.h | 58 +++++++++++++++++ - mt7915/mt7915.h | 6 ++ - 7 files changed, 282 insertions(+), 22 deletions(-) - -diff --git a/mt76.h b/mt76.h -index 2cbea73..92acba9 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -282,12 +282,16 @@ struct mt76_queue_ops { - void (*reset_q)(struct mt76_dev *dev, struct mt76_queue *q); - }; - -+#define MT_PHY_TYPE_LEGACY GENMASK(2, 0) -+#define MT_PHY_TYPE_EXT GENMASK(7, 3) -+ - enum mt76_phy_type { - MT_PHY_TYPE_CCK, - MT_PHY_TYPE_OFDM, - MT_PHY_TYPE_HT, - MT_PHY_TYPE_HT_GF, - MT_PHY_TYPE_VHT, -+ MT_PHY_TYPE_HE_REMAP, - MT_PHY_TYPE_HE_SU = 8, - MT_PHY_TYPE_HE_EXT_SU, - MT_PHY_TYPE_HE_TB, -diff --git a/mt7915/init.c b/mt7915/init.c -index eee1879..edf83c4 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -673,6 +673,8 @@ mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy) - struct mt76_phy *mphy = phy->mt76; - int ret; - -+ INIT_LIST_HEAD(&phy->stats_list); -+ spin_lock_init(&phy->stats_lock); - INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work); - - mt7915_eeprom_parse_hw_cap(dev, phy); -@@ -1206,6 +1208,8 @@ int mt7915_register_device(struct mt7915_dev *dev) - dev->phy.dev = dev; - dev->phy.mt76 = &dev->mt76.phy; - dev->mt76.phy.priv = &dev->phy; -+ INIT_LIST_HEAD(&dev->phy.stats_list); -+ spin_lock_init(&dev->phy.stats_lock); - INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work); - INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work); - INIT_LIST_HEAD(&dev->sta_rc_list); -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 8008ce3..b915201 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -180,15 +180,7 @@ static void mt7915_mac_sta_poll(struct mt7915_dev *dev) - rx_cur); - } - -- /* -- * We don't support reading GI info from txs packets. -- * For accurate tx status reporting and AQL improvement, -- * we need to make sure that flags match so polling GI -- * from per-sta counters directly. -- */ - rate = &msta->wcid.rate; -- addr = mt7915_mac_wtbl_lmac_addr(dev, idx, 7); -- val = mt76_rr(dev, addr); - - switch (rate->bw) { - case RATE_INFO_BW_160: -@@ -205,18 +197,6 @@ static void mt7915_mac_sta_poll(struct mt7915_dev *dev) - break; - } - -- if (rate->flags & RATE_INFO_FLAGS_HE_MCS) { -- u8 offs = 24 + 2 * bw; -- -- rate->he_gi = (val & (0x3 << offs)) >> offs; -- } else if (rate->flags & -- (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) { -- if (val & BIT(12 + bw)) -- rate->flags |= RATE_INFO_FLAGS_SHORT_GI; -- else -- rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; -- } -- - /* get signal strength of resp frames (CTS/BA/ACK) */ - addr = mt7915_mac_wtbl_lmac_addr(dev, idx, 30); - val = mt76_rr(dev, addr); -@@ -918,6 +898,7 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) - info = le32_to_cpu(*cur_info); - if (info & MT_TX_FREE_PAIR) { - struct mt7915_sta *msta; -+ struct mt7915_phy *phy; - u16 idx; - - idx = FIELD_GET(MT_TX_FREE_WLAN_ID, info); -@@ -927,11 +908,18 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) - continue; - - msta = container_of(wcid, struct mt7915_sta, wcid); -- spin_lock_bh(&mdev->sta_poll_lock); -+ phy = msta->vif->phy; -+ spin_lock_bh(&dev->mt76.sta_poll_lock); - if (list_empty(&msta->wcid.poll_list)) - list_add_tail(&msta->wcid.poll_list, - &mdev->sta_poll_list); -- spin_unlock_bh(&mdev->sta_poll_lock); -+ spin_unlock_bh(&dev->mt76.sta_poll_lock); -+ -+ spin_lock_bh(&phy->stats_lock); -+ if (list_empty(&msta->stats_list)) -+ list_add_tail(&msta->stats_list, &phy->stats_list); -+ spin_unlock_bh(&phy->stats_lock); -+ - continue; - } - -@@ -1010,6 +998,7 @@ mt7915_mac_tx_free_v0(struct mt7915_dev *dev, void *data, int len) - static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data) - { - struct mt7915_sta *msta = NULL; -+ struct mt7915_phy *phy; - struct mt76_wcid *wcid; - __le32 *txs_data = data; - u16 wcidx; -@@ -1045,6 +1034,11 @@ static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data) - list_add_tail(&msta->wcid.poll_list, &dev->mt76.sta_poll_list); - spin_unlock_bh(&dev->mt76.sta_poll_lock); - -+ phy = msta->vif->phy; -+ spin_lock_bh(&phy->stats_lock); -+ if (list_empty(&msta->stats_list)) -+ list_add_tail(&msta->stats_list, &phy->stats_list); -+ spin_unlock_bh(&phy->stats_lock); - out: - rcu_read_unlock(); - } -@@ -1952,6 +1946,27 @@ static void mt7915_mac_severe_check(struct mt7915_phy *phy) - phy->trb_ts = trb; - } - -+static void mt7915_mac_sta_stats_work(struct mt7915_phy *phy) -+{ -+ struct mt7915_sta *sta; -+ LIST_HEAD(list); -+ -+ spin_lock_bh(&phy->stats_lock); -+ list_splice_init(&phy->stats_list, &list); -+ -+ while (!list_empty(&list)) { -+ sta = list_first_entry(&list, struct mt7915_sta, stats_list); -+ list_del_init(&sta->stats_list); -+ spin_unlock_bh(&phy->stats_lock); -+ -+ mt7915_mcu_get_tx_rate(phy, sta->wcid.idx); -+ -+ spin_lock_bh(&phy->stats_lock); -+ } -+ -+ spin_unlock_bh(&phy->stats_lock); -+} -+ - void mt7915_mac_sta_rc_work(struct work_struct *work) - { - struct mt7915_dev *dev = container_of(work, struct mt7915_dev, rc_work); -@@ -2010,6 +2025,11 @@ void mt7915_mac_work(struct work_struct *work) - mt7915_mcu_muru_debug_get(phy); - } - -+ if (++phy->stats_work_count == 10) { -+ phy->stats_work_count = 0; -+ mt7915_mac_sta_stats_work(phy); -+ } -+ - mutex_unlock(&mphy->dev->mutex); - - mt76_tx_status_check(mphy->dev, false); -diff --git a/mt7915/main.c b/mt7915/main.c -index b16a633..e61041d 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -752,6 +752,7 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, - - INIT_LIST_HEAD(&msta->rc_list); - INIT_LIST_HEAD(&msta->wcid.poll_list); -+ INIT_LIST_HEAD(&msta->stats_list); - msta->vif = mvif; - msta->wcid.sta = 1; - msta->wcid.idx = idx; -@@ -779,6 +780,7 @@ void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, - { - struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); - struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; -+ struct mt7915_phy *phy = msta->vif->phy; - int i; - - mt7915_mcu_add_sta(dev, vif, sta, false); -@@ -795,6 +797,11 @@ void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, - if (!list_empty(&msta->rc_list)) - list_del_init(&msta->rc_list); - spin_unlock_bh(&mdev->sta_poll_lock); -+ -+ spin_lock_bh(&phy->stats_lock); -+ if (!list_empty(&msta->stats_list)) -+ list_del_init(&msta->stats_list); -+ spin_unlock_bh(&phy->stats_lock); - } - - static void mt7915_tx(struct ieee80211_hw *hw, -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index fe54a2f..7df2162 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -3793,6 +3793,167 @@ out: - return ret; - } - -+static int -+mt7915_mcu_parse_tx_gi(struct mt76_dev *dev, u8 mode, u8 gi, u8 bw, -+ struct rate_info *rate) -+{ -+ /* Legacy drivers only use 3 bits for PHY mode. For backward -+ * compatibility, HE and newer PHY mode indices are remapped -+ * to the extended bits. -+ */ -+ if (u8_get_bits(mode, MT_PHY_TYPE_LEGACY) == MT_PHY_TYPE_HE_REMAP) -+ mode = u8_get_bits(mode, MT_PHY_TYPE_EXT); -+ -+ switch (mode) { -+ case MT_PHY_TYPE_CCK: -+ case MT_PHY_TYPE_OFDM: -+ break; -+ case MT_PHY_TYPE_HT: -+ case MT_PHY_TYPE_HT_GF: -+ case MT_PHY_TYPE_VHT: -+ if (gi) -+ rate->flags |= RATE_INFO_FLAGS_SHORT_GI; -+ break; -+ case MT_PHY_TYPE_HE_SU: -+ case MT_PHY_TYPE_HE_EXT_SU: -+ case MT_PHY_TYPE_HE_TB: -+ case MT_PHY_TYPE_HE_MU: -+ if (!is_mt7915(dev)) { -+ switch (bw) { -+ case MCU_PHY_BW_20: -+ gi = u8_get_bits(gi, HE_GI_BW_20); -+ break; -+ case MCU_PHY_BW_40: -+ gi = u8_get_bits(gi, HE_GI_BW_40); -+ break; -+ case MCU_PHY_BW_80: -+ gi = u8_get_bits(gi, HE_GI_BW_80); -+ break; -+ case MCU_PHY_BW_160: -+ gi = u8_get_bits(gi, HE_GI_BW_160); -+ break; -+ default: -+ return -EINVAL; -+ } -+ } -+ -+ if (gi > NL80211_RATE_INFO_HE_GI_3_2) -+ return -EINVAL; -+ -+ rate->he_gi = gi; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+int mt7915_mcu_get_tx_rate_v1(struct mt7915_phy *phy, u16 wcidx) -+{ -+ struct mt7915_mcu_ra_info_v1 *rate; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_phy *mphy = phy->mt76; -+ struct mt76_wcid *wcid; -+ struct sk_buff *skb; -+ int ret; -+ -+ struct { -+ __le32 category; -+ u8 wcidx_lo; -+ u8 band; -+ u8 wcidx_hi; -+ u8 rsv[5]; -+ } req = { -+ .category = cpu_to_le32(MCU_GET_TX_RATE), -+ .wcidx_lo = to_wcid_lo(wcidx), -+ .band = mphy->band_idx, -+ .wcidx_hi = to_wcid_hi(wcidx) -+ }; -+ -+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(GET_TX_STAT), -+ &req, sizeof(req), true, &skb); -+ if (ret) -+ return ret; -+ -+ rate = (struct mt7915_mcu_ra_info_v1 *)skb->data; -+ if ((rate->wcidx_hi << 8 | rate->wcidx_lo) != wcidx) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ rcu_read_lock(); -+ wcid = rcu_dereference(dev->mt76.wcid[wcidx]); -+ if (!wcid) { -+ ret = -EINVAL; -+ goto unlock; -+ } -+ -+ ret = mt7915_mcu_parse_tx_gi(mphy->dev, rate->mode, rate->gi, -+ rate->bw, &wcid->rate); -+unlock: -+ rcu_read_unlock(); -+out: -+ dev_kfree_skb(skb); -+ -+ return ret; -+} -+ -+int mt7915_mcu_get_tx_rate_v2(struct mt7915_phy *phy, u16 wcidx) -+{ -+ struct mt7915_mcu_ra_info_v2 *rate; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_phy *mphy = phy->mt76; -+ struct mt76_wcid *wcid; -+ struct sk_buff *skb; -+ int ret; -+ -+ struct { -+ u8 category; -+ u8 band; -+ __le16 wcidx; -+ } req = { -+ .category = MCU_GET_TX_RATE, -+ .band = mphy->band_idx, -+ .wcidx = cpu_to_le16(wcidx) -+ }; -+ -+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(GET_TX_STAT), -+ &req, sizeof(req), true, &skb); -+ if (ret) -+ return ret; -+ -+ rate = (struct mt7915_mcu_ra_info_v2 *)skb->data; -+ if (le16_to_cpu(rate->wcidx) != wcidx) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ rcu_read_lock(); -+ wcid = rcu_dereference(dev->mt76.wcid[wcidx]); -+ if (!wcid) { -+ ret = -EINVAL; -+ goto unlock; -+ } -+ -+ ret = mt7915_mcu_parse_tx_gi(mphy->dev, rate->mode, rate->gi, -+ rate->bw, &wcid->rate); -+unlock: -+ rcu_read_unlock(); -+out: -+ dev_kfree_skb(skb); -+ -+ return ret; -+} -+ -+int mt7915_mcu_get_tx_rate(struct mt7915_phy *phy, u16 wcidx) -+{ -+ if (is_mt7915(&phy->dev->mt76)) -+ return mt7915_mcu_get_tx_rate_v1(phy, wcidx); -+ else -+ return mt7915_mcu_get_tx_rate_v2(phy, wcidx); -+} -+ - int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif, - struct cfg80211_he_bss_color *he_bss_color) - { -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index b41ac4a..8f36546 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -152,6 +152,61 @@ struct mt7915_mcu_eeprom_info { - u8 data[16]; - } __packed; - -+enum { -+ MCU_PHY_BW_20 = 0, -+ MCU_PHY_BW_40, -+ MCU_PHY_BW_80, -+ MCU_PHY_BW_160, -+ MCU_PHY_BW_10, -+ MCU_PHY_BW_5, -+ MCU_PHY_BW_8080, -+ MCU_PHY_BW_320, -+ MCU_PHY_BW_NUM -+}; -+ -+#define HE_GI_BW_20 GENMASK(1, 0) -+#define HE_GI_BW_40 GENMASK(3, 2) -+#define HE_GI_BW_80 GENMASK(5, 4) -+#define HE_GI_BW_160 GENMASK(7, 6) -+ -+struct mt7915_mcu_ra_info_v1 { -+ u8 wcidx_lo; -+ u8 band; -+ u8 wcidx_hi; -+ u8 rsv1[46]; -+ -+ u8 mode; -+ u8 flags; -+ u8 stbc; -+ u8 gi; -+ u8 bw; -+ u8 ldpc; -+ u8 mcs; -+ u8 nss; -+ u8 ltf; -+ -+ u8 rsv2[8]; -+}; -+ -+struct mt7915_mcu_ra_info_v2 { -+ u8 category; -+ u8 rsv1; -+ __le16 num; -+ __le16 wcidx; -+ -+ u8 mode; -+ u8 flags; -+ u8 stbc; -+ u8 gi; -+ u8 bw; -+ u8 ldpc; -+ u8 mcs; -+ u8 nss; -+ u8 ltf; -+ -+ u8 rsv2; -+}; -+ - struct mt7915_mcu_phy_rx_info { - u8 category; - u8 rate; -@@ -527,4 +582,7 @@ mt7915_get_power_bound(struct mt7915_phy *phy, s8 txpower) - return txpower; - } - -+enum { -+ MCU_GET_TX_RATE = 4 -+}; - #endif -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index a30d08e..aee30c7 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -137,6 +137,7 @@ struct mt7915_sta { - struct mt7915_vif *vif; - - struct list_head rc_list; -+ struct list_head stats_list; - u32 airtime_ac[8]; - - int ack_signal; -@@ -224,6 +225,10 @@ struct mt7915_phy { - struct mt76_mib_stats mib; - struct mt76_channel_state state_ts; - -+ u8 stats_work_count; -+ struct list_head stats_list; -+ spinlock_t stats_lock; -+ - #ifdef CONFIG_NL80211_TESTMODE - struct { - u32 *reg_backup; -@@ -499,6 +504,7 @@ int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch); - int mt7915_mcu_get_temperature(struct mt7915_phy *phy); - int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state); - int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy); -+int mt7915_mcu_get_tx_rate(struct mt7915_phy *phy, u16 wcidx); - int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, struct rate_info *rate); - int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0002-wifi-mt76-mt7915-add-pc-stack-dump-for-WM-s-coredump.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0002-wifi-mt76-mt7915-add-pc-stack-dump-for-WM-s-coredump.patch deleted file mode 100644 index 651281ca2..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0002-wifi-mt76-mt7915-add-pc-stack-dump-for-WM-s-coredump.patch +++ /dev/null @@ -1,641 +0,0 @@ -From c7b5350668962272203b878cfc1ae2754c807d56 Mon Sep 17 00:00:00 2001 -From: Bo Jiao -Date: Mon, 22 May 2023 13:49:37 +0800 -Subject: [PATCH 02/14] wifi: mt76: mt7915: add pc stack dump for WM's - coredump. - -Signed-off-by: Bo Jiao ---- - mt76.h | 11 +++ - mt76_connac_mcu.c | 9 +++ - mt7915/coredump.c | 169 +++++++++++++++++++++++++++++++--------------- - mt7915/coredump.h | 34 +++++++--- - mt7915/mac.c | 33 ++++++--- - mt7915/mt7915.h | 2 +- - mt7915/regs.h | 20 ++++++ - 7 files changed, 207 insertions(+), 71 deletions(-) - -diff --git a/mt76.h b/mt76.h -index 92acba9..ee14425 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -32,6 +32,8 @@ - - #define MT76_TOKEN_FREE_THR 64 - -+#define MT76_BUILD_TIME_LEN 24 -+ - #define MT_QFLAG_WED_RING GENMASK(1, 0) - #define MT_QFLAG_WED_TYPE GENMASK(4, 2) - #define MT_QFLAG_WED BIT(5) -@@ -66,6 +68,12 @@ enum mt76_bus_type { - MT76_BUS_SDIO, - }; - -+enum mt76_ram_type { -+ MT76_RAM_TYPE_WM, -+ MT76_RAM_TYPE_WA, -+ __MT76_RAM_TYPE_MAX, -+}; -+ - enum mt76_wed_type { - MT76_WED_Q_TX, - MT76_WED_Q_TXFREE, -@@ -838,6 +846,9 @@ struct mt76_dev { - struct device *dma_dev; - - struct mt76_mcu mcu; -+ struct mt76_connac2_patch_hdr *patch_hdr; -+ struct mt76_connac2_fw_trailer *wm_hdr; -+ struct mt76_connac2_fw_trailer *wa_hdr; - - struct net_device napi_dev; - struct net_device tx_napi_dev; -diff --git a/mt76_connac_mcu.c b/mt76_connac_mcu.c -index b35acf8..1ea9798 100644 ---- a/mt76_connac_mcu.c -+++ b/mt76_connac_mcu.c -@@ -2941,6 +2941,9 @@ int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, - goto out; - } - -+ dev->wm_hdr = devm_kzalloc(dev->dev, sizeof(*hdr), GFP_KERNEL); -+ memcpy(dev->wm_hdr, hdr, sizeof(*hdr)); -+ - snprintf(dev->hw->wiphy->fw_version, - sizeof(dev->hw->wiphy->fw_version), - "%.10s-%.15s", hdr->fw_ver, hdr->build_date); -@@ -2970,6 +2973,9 @@ int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, - goto out; - } - -+ dev->wa_hdr = devm_kzalloc(dev->dev, sizeof(*hdr), GFP_KERNEL); -+ memcpy(dev->wa_hdr, hdr, sizeof(*hdr)); -+ - snprintf(dev->hw->wiphy->fw_version, - sizeof(dev->hw->wiphy->fw_version), - "%.10s-%.15s", hdr->fw_ver, hdr->build_date); -@@ -3040,6 +3046,9 @@ int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name) - dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n", - be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); - -+ dev->patch_hdr = devm_kzalloc(dev->dev, sizeof(*hdr), GFP_KERNEL); -+ memcpy(dev->patch_hdr, hdr, sizeof(*hdr)); -+ - for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { - struct mt76_connac2_patch_sec *sec; - u32 len, addr, mode; -diff --git a/mt7915/coredump.c b/mt7915/coredump.c -index 5daf225..298c1ca 100644 ---- a/mt7915/coredump.c -+++ b/mt7915/coredump.c -@@ -7,7 +7,7 @@ - #include - #include "coredump.h" - --static bool coredump_memdump; -+static bool coredump_memdump = true; - module_param(coredump_memdump, bool, 0644); - MODULE_PARM_DESC(coredump_memdump, "Optional ability to dump firmware memory"); - -@@ -86,8 +86,11 @@ static const struct mt7915_mem_region mt798x_mem_regions[] = { - }; - - const struct mt7915_mem_region* --mt7915_coredump_get_mem_layout(struct mt7915_dev *dev, u32 *num) -+mt7915_coredump_get_mem_layout(struct mt7915_dev *dev, u8 type, u32 *num) - { -+ if (type == MT76_RAM_TYPE_WA) -+ return NULL; -+ - switch (mt76_chip(&dev->mt76)) { - case 0x7915: - *num = ARRAY_SIZE(mt7915_mem_regions); -@@ -104,14 +107,14 @@ mt7915_coredump_get_mem_layout(struct mt7915_dev *dev, u32 *num) - } - } - --static int mt7915_coredump_get_mem_size(struct mt7915_dev *dev) -+static int mt7915_coredump_get_mem_size(struct mt7915_dev *dev, u8 type) - { - const struct mt7915_mem_region *mem_region; - size_t size = 0; - u32 num; - int i; - -- mem_region = mt7915_coredump_get_mem_layout(dev, &num); -+ mem_region = mt7915_coredump_get_mem_layout(dev, type, &num); - if (!mem_region) - return 0; - -@@ -128,9 +131,9 @@ static int mt7915_coredump_get_mem_size(struct mt7915_dev *dev) - return size; - } - --struct mt7915_crash_data *mt7915_coredump_new(struct mt7915_dev *dev) -+struct mt7915_crash_data *mt7915_coredump_new(struct mt7915_dev *dev, u8 type) - { -- struct mt7915_crash_data *crash_data = dev->coredump.crash_data; -+ struct mt7915_crash_data *crash_data = dev->coredump.crash_data[type]; - - lockdep_assert_held(&dev->dump_mutex); - -@@ -141,12 +144,15 @@ struct mt7915_crash_data *mt7915_coredump_new(struct mt7915_dev *dev) - } - - static void --mt7915_coredump_fw_state(struct mt7915_dev *dev, struct mt7915_coredump *dump, -+mt7915_coredump_fw_state(struct mt7915_dev *dev, u8 type, struct mt7915_coredump *dump, - bool *exception) - { -- u32 state, count, type; -+ u32 state, count, category; -+ -+ if (type == MT76_RAM_TYPE_WA) -+ return; - -- type = (u32)mt76_get_field(dev, MT_FW_EXCEPT_TYPE, GENMASK(7, 0)); -+ category = (u32)mt76_get_field(dev, MT_FW_EXCEPT_TYPE, GENMASK(7, 0)); - state = (u32)mt76_get_field(dev, MT_FW_ASSERT_STAT, GENMASK(7, 0)); - count = is_mt7915(&dev->mt76) ? - (u32)mt76_get_field(dev, MT_FW_EXCEPT_COUNT, GENMASK(15, 8)) : -@@ -155,7 +161,7 @@ mt7915_coredump_fw_state(struct mt7915_dev *dev, struct mt7915_coredump *dump, - /* normal mode: driver can manually trigger assert for detail info */ - if (!count) - strscpy(dump->fw_state, "normal", sizeof(dump->fw_state)); -- else if (state > 1 && (count == 1) && type == 5) -+ else if (state > 1 && (count == 1) && category == 5) - strscpy(dump->fw_state, "assert", sizeof(dump->fw_state)); - else if ((state > 1 && count == 1) || count > 1) - strscpy(dump->fw_state, "exception", sizeof(dump->fw_state)); -@@ -164,11 +170,14 @@ mt7915_coredump_fw_state(struct mt7915_dev *dev, struct mt7915_coredump *dump, - } - - static void --mt7915_coredump_fw_trace(struct mt7915_dev *dev, struct mt7915_coredump *dump, -+mt7915_coredump_fw_trace(struct mt7915_dev *dev, u8 type, struct mt7915_coredump *dump, - bool exception) - { - u32 n, irq, sch, base = MT_FW_EINT_INFO; - -+ if (type == MT76_RAM_TYPE_WA) -+ return; -+ - /* trap or run? */ - dump->last_msg_id = mt76_rr(dev, MT_FW_LAST_MSG_ID); - -@@ -221,31 +230,61 @@ mt7915_coredump_fw_trace(struct mt7915_dev *dev, struct mt7915_coredump *dump, - } - - static void --mt7915_coredump_fw_stack(struct mt7915_dev *dev, struct mt7915_coredump *dump, -+mt7915_coredump_fw_stack(struct mt7915_dev *dev, u8 type, struct mt7915_coredump *dump, - bool exception) - { -- u32 oldest, i, idx; -+ u32 reg, i; -+ -+ if (type == MT76_RAM_TYPE_WA) -+ return; -+ -+ /* read current PC */ -+ mt76_rmw_field(dev, MT_CONN_DBG_CTL_LOG_SEL, -+ MT_CONN_DBG_CTL_PC_LOG_SEL, 0x22); -+ for (i = 0; i < 10; i++) { -+ dump->pc_cur[i] = mt76_rr(dev, MT_CONN_DBG_CTL_PC_LOG); -+ usleep_range(100, 500); -+ } - - /* stop call stack record */ -- if (!exception) -- mt76_clear(dev, 0x89050200, BIT(0)); -+ if (!exception) { -+ mt76_clear(dev, MT_MCU_WM_EXCP_PC_CTRL, BIT(0)); -+ mt76_clear(dev, MT_MCU_WM_EXCP_LR_CTRL, BIT(0)); -+ } - -- oldest = (u32)mt76_get_field(dev, 0x89050200, GENMASK(20, 16)) + 2; -- for (i = 0; i < 16; i++) { -- idx = ((oldest + 2 * i + 1) % 32); -- dump->call_stack[i] = mt76_rr(dev, 0x89050204 + idx * 4); -+ /* read PC log */ -+ dump->pc_dbg_ctrl = mt76_rr(dev, MT_MCU_WM_EXCP_PC_CTRL); -+ dump->pc_cur_idx = FIELD_GET(MT_MCU_WM_EXCP_PC_CTRL_IDX_STATUS, -+ dump->pc_dbg_ctrl); -+ for (i = 0; i < 32; i++) { -+ reg = MT_MCU_WM_EXCP_PC_LOG + i * 4; -+ dump->pc_stack[i] = mt76_rr(dev, reg); -+ } -+ -+ /* read LR log */ -+ dump->lr_dbg_ctrl = mt76_rr(dev, MT_MCU_WM_EXCP_LR_CTRL); -+ dump->lr_cur_idx = FIELD_GET(MT_MCU_WM_EXCP_LR_CTRL_IDX_STATUS, -+ dump->lr_dbg_ctrl); -+ for (i = 0; i < 32; i++) { -+ reg = MT_MCU_WM_EXCP_LR_LOG + i * 4; -+ dump->lr_stack[i] = mt76_rr(dev, reg); - } - - /* start call stack record */ -- if (!exception) -- mt76_set(dev, 0x89050200, BIT(0)); -+ if (!exception) { -+ mt76_set(dev, MT_MCU_WM_EXCP_PC_CTRL, BIT(0)); -+ mt76_set(dev, MT_MCU_WM_EXCP_LR_CTRL, BIT(0)); -+ } - } - - static void --mt7915_coredump_fw_task(struct mt7915_dev *dev, struct mt7915_coredump *dump) -+mt7915_coredump_fw_task(struct mt7915_dev *dev, u8 type, struct mt7915_coredump *dump) - { - u32 offs = is_mt7915(&dev->mt76) ? 0xe0 : 0x170; - -+ if (type == MT76_RAM_TYPE_WA) -+ return; -+ - strscpy(dump->task_qid, "(task queue id) read, write", - sizeof(dump->task_qid)); - -@@ -266,10 +305,13 @@ mt7915_coredump_fw_task(struct mt7915_dev *dev, struct mt7915_coredump *dump) - } - - static void --mt7915_coredump_fw_context(struct mt7915_dev *dev, struct mt7915_coredump *dump) -+mt7915_coredump_fw_context(struct mt7915_dev *dev, u8 type, struct mt7915_coredump *dump) - { - u32 count, idx, id; - -+ if (type == MT76_RAM_TYPE_WA) -+ return; -+ - count = mt76_rr(dev, MT_FW_CIRQ_COUNT); - - /* current context */ -@@ -299,9 +341,10 @@ mt7915_coredump_fw_context(struct mt7915_dev *dev, struct mt7915_coredump *dump) - } - } - --static struct mt7915_coredump *mt7915_coredump_build(struct mt7915_dev *dev) -+static struct mt7915_coredump *mt7915_coredump_build(struct mt7915_dev *dev, u8 type) - { -- struct mt7915_crash_data *crash_data = dev->coredump.crash_data; -+ struct mt76_dev *mdev = &dev->mt76; -+ struct mt7915_crash_data *crash_data = dev->coredump.crash_data[type]; - struct mt7915_coredump *dump; - struct mt7915_coredump_mem *dump_mem; - size_t len, sofar = 0, hdr_len = sizeof(*dump); -@@ -326,23 +369,34 @@ static struct mt7915_coredump *mt7915_coredump_build(struct mt7915_dev *dev) - - dump = (struct mt7915_coredump *)(buf); - dump->len = len; -+ dump->hdr_len = hdr_len; - - /* plain text */ - strscpy(dump->magic, "mt76-crash-dump", sizeof(dump->magic)); - strscpy(dump->kernel, init_utsname()->release, sizeof(dump->kernel)); -- strscpy(dump->fw_ver, dev->mt76.hw->wiphy->fw_version, -+ strscpy(dump->fw_ver, mdev->hw->wiphy->fw_version, - sizeof(dump->fw_ver)); -+ strscpy(dump->fw_type, ((type == MT76_RAM_TYPE_WA) ? "WA" : "WM"), -+ sizeof(dump->fw_type)); -+ strscpy(dump->fw_patch_date, mdev->patch_hdr->build_date, -+ sizeof(dump->fw_patch_date)); -+ strscpy(dump->fw_ram_date[MT76_RAM_TYPE_WM], -+ mdev->wm_hdr->build_date, -+ sizeof(mdev->wm_hdr->build_date)); -+ strscpy(dump->fw_ram_date[MT76_RAM_TYPE_WA], -+ mdev->wa_hdr->build_date, -+ sizeof(mdev->wa_hdr->build_date)); - - guid_copy(&dump->guid, &crash_data->guid); - dump->tv_sec = crash_data->timestamp.tv_sec; - dump->tv_nsec = crash_data->timestamp.tv_nsec; - dump->device_id = mt76_chip(&dev->mt76); - -- mt7915_coredump_fw_state(dev, dump, &exception); -- mt7915_coredump_fw_trace(dev, dump, exception); -- mt7915_coredump_fw_task(dev, dump); -- mt7915_coredump_fw_context(dev, dump); -- mt7915_coredump_fw_stack(dev, dump, exception); -+ mt7915_coredump_fw_state(dev, type, dump, &exception); -+ mt7915_coredump_fw_trace(dev, type, dump, exception); -+ mt7915_coredump_fw_task(dev, type, dump); -+ mt7915_coredump_fw_context(dev, type, dump); -+ mt7915_coredump_fw_stack(dev, type, dump, exception); - - /* gather memory content */ - dump_mem = (struct mt7915_coredump_mem *)(buf + sofar); -@@ -356,17 +410,19 @@ static struct mt7915_coredump *mt7915_coredump_build(struct mt7915_dev *dev) - return dump; - } - --int mt7915_coredump_submit(struct mt7915_dev *dev) -+int mt7915_coredump_submit(struct mt7915_dev *dev, u8 type) - { - struct mt7915_coredump *dump; - -- dump = mt7915_coredump_build(dev); -+ dump = mt7915_coredump_build(dev, type); - if (!dump) { - dev_warn(dev->mt76.dev, "no crash dump data found\n"); - return -ENODATA; - } - - dev_coredumpv(dev->mt76.dev, dump, dump->len, GFP_KERNEL); -+ dev_info(dev->mt76.dev, "%s coredump completed\n", -+ wiphy_name(dev->mt76.hw->wiphy)); - - return 0; - } -@@ -374,23 +430,26 @@ int mt7915_coredump_submit(struct mt7915_dev *dev) - int mt7915_coredump_register(struct mt7915_dev *dev) - { - struct mt7915_crash_data *crash_data; -+ int i; - -- crash_data = vzalloc(sizeof(*dev->coredump.crash_data)); -- if (!crash_data) -- return -ENOMEM; -+ for (i = 0; i < __MT76_RAM_TYPE_MAX; i++) { -+ crash_data = vzalloc(sizeof(*dev->coredump.crash_data[i])); -+ if (!crash_data) -+ return -ENOMEM; - -- dev->coredump.crash_data = crash_data; -+ dev->coredump.crash_data[i] = crash_data; - -- if (coredump_memdump) { -- crash_data->memdump_buf_len = mt7915_coredump_get_mem_size(dev); -- if (!crash_data->memdump_buf_len) -- /* no memory content */ -- return 0; -+ if (coredump_memdump) { -+ crash_data->memdump_buf_len = mt7915_coredump_get_mem_size(dev, i); -+ if (!crash_data->memdump_buf_len) -+ /* no memory content */ -+ return 0; - -- crash_data->memdump_buf = vzalloc(crash_data->memdump_buf_len); -- if (!crash_data->memdump_buf) { -- vfree(crash_data); -- return -ENOMEM; -+ crash_data->memdump_buf = vzalloc(crash_data->memdump_buf_len); -+ if (!crash_data->memdump_buf) { -+ vfree(crash_data); -+ return -ENOMEM; -+ } - } - } - -@@ -399,13 +458,17 @@ int mt7915_coredump_register(struct mt7915_dev *dev) - - void mt7915_coredump_unregister(struct mt7915_dev *dev) - { -- if (dev->coredump.crash_data->memdump_buf) { -- vfree(dev->coredump.crash_data->memdump_buf); -- dev->coredump.crash_data->memdump_buf = NULL; -- dev->coredump.crash_data->memdump_buf_len = 0; -- } -+ int i; - -- vfree(dev->coredump.crash_data); -- dev->coredump.crash_data = NULL; -+ for (i = 0; i < __MT76_RAM_TYPE_MAX; i++) { -+ if (dev->coredump.crash_data[i]->memdump_buf) { -+ vfree(dev->coredump.crash_data[i]->memdump_buf); -+ dev->coredump.crash_data[i]->memdump_buf = NULL; -+ dev->coredump.crash_data[i]->memdump_buf_len = 0; -+ } -+ -+ vfree(dev->coredump.crash_data[i]); -+ dev->coredump.crash_data[i] = NULL; -+ } - } - -diff --git a/mt7915/coredump.h b/mt7915/coredump.h -index 709f8e9..809ccbd 100644 ---- a/mt7915/coredump.h -+++ b/mt7915/coredump.h -@@ -4,6 +4,7 @@ - #ifndef _COREDUMP_H_ - #define _COREDUMP_H_ - -+#include "../mt76_connac_mcu.h" - #include "mt7915.h" - - struct trace { -@@ -15,6 +16,7 @@ struct mt7915_coredump { - char magic[16]; - - u32 len; -+ u32 hdr_len; - - guid_t guid; - -@@ -26,12 +28,28 @@ struct mt7915_coredump { - char kernel[64]; - /* firmware version */ - char fw_ver[ETHTOOL_FWVERS_LEN]; -+ char fw_patch_date[MT76_BUILD_TIME_LEN]; -+ char fw_ram_date[__MT76_RAM_TYPE_MAX][MT76_BUILD_TIME_LEN]; - - u32 device_id; - -+ /* fw type */ -+ char fw_type[8]; - /* exception state */ - char fw_state[12]; - -+ /* program counters */ -+ u32 pc_dbg_ctrl; -+ u32 pc_cur_idx; -+ u32 pc_cur[10]; -+ /* PC registers */ -+ u32 pc_stack[32]; -+ -+ u32 lr_dbg_ctrl; -+ u32 lr_cur_idx; -+ /* LR registers */ -+ u32 lr_stack[32]; -+ - u32 last_msg_id; - u32 eint_info_idx; - u32 irq_info_idx; -@@ -70,9 +88,6 @@ struct mt7915_coredump { - u32 handler; - } context; - -- /* link registers calltrace */ -- u32 call_stack[16]; -- - /* memory content */ - u8 data[]; - } __packed; -@@ -83,6 +98,7 @@ struct mt7915_coredump_mem { - } __packed; - - struct mt7915_mem_hdr { -+ char name[64]; - u32 start; - u32 len; - u8 data[]; -@@ -98,26 +114,26 @@ struct mt7915_mem_region { - #ifdef CONFIG_DEV_COREDUMP - - const struct mt7915_mem_region * --mt7915_coredump_get_mem_layout(struct mt7915_dev *dev, u32 *num); --struct mt7915_crash_data *mt7915_coredump_new(struct mt7915_dev *dev); --int mt7915_coredump_submit(struct mt7915_dev *dev); -+mt7915_coredump_get_mem_layout(struct mt7915_dev *dev, u8 type, u32 *num); -+struct mt7915_crash_data *mt7915_coredump_new(struct mt7915_dev *dev, u8 type); -+int mt7915_coredump_submit(struct mt7915_dev *dev, u8 type); - int mt7915_coredump_register(struct mt7915_dev *dev); - void mt7915_coredump_unregister(struct mt7915_dev *dev); - - #else /* CONFIG_DEV_COREDUMP */ - - static inline const struct mt7915_mem_region * --mt7915_coredump_get_mem_layout(struct mt7915_dev *dev, u32 *num) -+mt7915_coredump_get_mem_layout(struct mt7915_dev *dev, u8 type, u32 *num) - { - return NULL; - } - --static inline int mt7915_coredump_submit(struct mt7915_dev *dev) -+static inline int mt7915_coredump_submit(struct mt7915_dev *dev, u8 type) - { - return 0; - } - --static inline struct mt7915_crash_data *mt7915_coredump_new(struct mt7915_dev *dev) -+static inline struct mt7915_crash_data *mt7915_coredump_new(struct mt7915_dev *dev, u8 type) - { - return NULL; - } -diff --git a/mt7915/mac.c b/mt7915/mac.c -index b915201..0f6b806 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1597,28 +1597,31 @@ void mt7915_mac_reset_work(struct work_struct *work) - } - - /* firmware coredump */ --void mt7915_mac_dump_work(struct work_struct *work) -+static void mt7915_mac_fw_coredump(struct mt7915_dev *dev, u8 type) - { - const struct mt7915_mem_region *mem_region; - struct mt7915_crash_data *crash_data; -- struct mt7915_dev *dev; - struct mt7915_mem_hdr *hdr; - size_t buf_len; - int i; - u32 num; - u8 *buf; - -- dev = container_of(work, struct mt7915_dev, dump_work); -+ if (type != MT76_RAM_TYPE_WM) { -+ dev_warn(dev->mt76.dev, "%s currently only supports WM coredump!\n", -+ wiphy_name(dev->mt76.hw->wiphy)); -+ return; -+ } - - mutex_lock(&dev->dump_mutex); - -- crash_data = mt7915_coredump_new(dev); -+ crash_data = mt7915_coredump_new(dev, type); - if (!crash_data) { - mutex_unlock(&dev->dump_mutex); -- goto skip_coredump; -+ return; - } - -- mem_region = mt7915_coredump_get_mem_layout(dev, &num); -+ mem_region = mt7915_coredump_get_mem_layout(dev, type, &num); - if (!mem_region || !crash_data->memdump_buf_len) { - mutex_unlock(&dev->dump_mutex); - goto skip_memdump; -@@ -1628,6 +1631,9 @@ void mt7915_mac_dump_work(struct work_struct *work) - buf_len = crash_data->memdump_buf_len; - - /* dumping memory content... */ -+ dev_info(dev->mt76.dev, "%s start coredump for %s\n", -+ wiphy_name(dev->mt76.hw->wiphy), -+ ((type == MT76_RAM_TYPE_WA) ? "WA" : "WM")); - memset(buf, 0, buf_len); - for (i = 0; i < num; i++) { - if (mem_region->len > buf_len) { -@@ -1645,6 +1651,7 @@ void mt7915_mac_dump_work(struct work_struct *work) - mt7915_memcpy_fromio(dev, buf, mem_region->start, - mem_region->len); - -+ strscpy(hdr->name, mem_region->name, sizeof(mem_region->name)); - hdr->start = mem_region->start; - hdr->len = mem_region->len; - -@@ -1661,8 +1668,18 @@ void mt7915_mac_dump_work(struct work_struct *work) - mutex_unlock(&dev->dump_mutex); - - skip_memdump: -- mt7915_coredump_submit(dev); --skip_coredump: -+ mt7915_coredump_submit(dev, type); -+} -+ -+void mt7915_mac_dump_work(struct work_struct *work) -+{ -+ struct mt7915_dev *dev; -+ -+ dev = container_of(work, struct mt7915_dev, dump_work); -+ -+ if (READ_ONCE(dev->recovery.state) & MT_MCU_CMD_WM_WDT) -+ mt7915_mac_fw_coredump(dev, MT76_RAM_TYPE_WM); -+ - queue_work(dev->mt76.wq, &dev->reset_work); - } - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index aee30c7..5cd2b33 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -286,7 +286,7 @@ struct mt7915_dev { - struct mutex dump_mutex; - #ifdef CONFIG_DEV_COREDUMP - struct { -- struct mt7915_crash_data *crash_data; -+ struct mt7915_crash_data *crash_data[__MT76_RAM_TYPE_MAX]; - } coredump; - #endif - -diff --git a/mt7915/regs.h b/mt7915/regs.h -index 89ac8e6..7515b23 100644 ---- a/mt7915/regs.h -+++ b/mt7915/regs.h -@@ -1219,4 +1219,24 @@ enum offs_rev { - #define MT_MCU_WM_CIRQ_EINT_MASK_CLR_ADDR MT_MCU_WM_CIRQ(0x108) - #define MT_MCU_WM_CIRQ_EINT_SOFT_ADDR MT_MCU_WM_CIRQ(0x118) - -+/* CONN DBG */ -+#define MT_CONN_DBG_CTL_BASE 0x18060000 -+#define MT_CONN_DBG_CTL(ofs) (MT_CONN_DBG_CTL_BASE + (ofs)) -+#define MT_CONN_DBG_CTL_LOG_SEL MT_CONN_DBG_CTL(0x090) -+#define MT_CONN_DBG_CTL_PC_LOG_SEL GENMASK(7, 2) -+#define MT_CONN_DBG_CTL_GPR_LOG_SEL GENMASK(13, 8) -+#define MT_CONN_DBG_CTL_PC_LOG MT_CONN_DBG_CTL(0x204) -+#define MT_CONN_DBG_CTL_GPR_LOG MT_CONN_DBG_CTL(0x204) -+ -+/* CONN MCU EXCP CON */ -+#define MT_MCU_WM_EXCP_BASE 0x89050000 -+ -+#define MT_MCU_WM_EXCP(ofs) (MT_MCU_WM_EXCP_BASE + (ofs)) -+#define MT_MCU_WM_EXCP_PC_CTRL MT_MCU_WM_EXCP(0x100) -+#define MT_MCU_WM_EXCP_PC_CTRL_IDX_STATUS GENMASK(20, 16) -+#define MT_MCU_WM_EXCP_PC_LOG MT_MCU_WM_EXCP(0x104) -+#define MT_MCU_WM_EXCP_LR_CTRL MT_MCU_WM_EXCP(0x200) -+#define MT_MCU_WM_EXCP_LR_CTRL_IDX_STATUS GENMASK(20, 16) -+#define MT_MCU_WM_EXCP_LR_LOG MT_MCU_WM_EXCP(0x204) -+ - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0003-wifi-mt76-mt7915-move-temperature-margin-check-to-mt.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0003-wifi-mt76-mt7915-move-temperature-margin-check-to-mt.patch deleted file mode 100644 index 2e4c7d0f8..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0003-wifi-mt76-mt7915-move-temperature-margin-check-to-mt.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 5201efd8c8527bf4f7f60c8be5d558f847b8c4e4 Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Thu, 13 Jul 2023 15:50:00 +0800 -Subject: [PATCH 03/14] wifi: mt76: mt7915: move temperature margin check to - mt7915_thermal_temp_store() - -Originally, we would reduce the 10-degree margin to the restore -temperature, but the user would not be aware of this when setting it. -Moving the margin reduction to the user setting check allows the user to -clearly understand that there is a 10-degree difference between the -restore and trigger temperature. - -Signed-off-by: Howard Hsu ---- - mt7915/init.c | 7 ++++--- - mt7915/mcu.c | 3 +-- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/mt7915/init.c b/mt7915/init.c -index edf83c4..9fe0524 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -83,12 +83,13 @@ static ssize_t mt7915_thermal_temp_store(struct device *dev, - mutex_lock(&phy->dev->mt76.mutex); - val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 60, 130); - -+ /* add a safety margin ~10 */ - if ((i - 1 == MT7915_CRIT_TEMP_IDX && -- val > phy->throttle_temp[MT7915_MAX_TEMP_IDX]) || -+ val > phy->throttle_temp[MT7915_MAX_TEMP_IDX] - 10) || - (i - 1 == MT7915_MAX_TEMP_IDX && -- val < phy->throttle_temp[MT7915_CRIT_TEMP_IDX])) { -+ val - 10 < phy->throttle_temp[MT7915_CRIT_TEMP_IDX])) { - dev_err(phy->dev->mt76.dev, -- "temp1_max shall be greater than temp1_crit."); -+ "temp1_max shall be 10 degrees greater than temp1_crit."); - mutex_unlock(&phy->dev->mt76.mutex); - return -EINVAL; - } -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 7df2162..6e9970c 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -3226,8 +3226,7 @@ int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy) - - /* set high-temperature trigger threshold */ - req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE; -- /* add a safety margin ~10 */ -- req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10); -+ req.restore_temp = cpu_to_le32(phy->throttle_temp[0]); - req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]); - req.sustain_time = cpu_to_le16(10); - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0004-wifi-mt76-mt7915-fix-txpower-issues.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0004-wifi-mt76-mt7915-fix-txpower-issues.patch deleted file mode 100644 index 06dbcd824..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0004-wifi-mt76-mt7915-fix-txpower-issues.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 81f7cb7c452f3e3cce7818bfd0547fc57c280dce Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Sat, 29 Jul 2023 04:53:47 +0800 -Subject: [PATCH 04/14] wifi: mt76: mt7915: fix txpower issues - ---- - eeprom.c | 2 +- - mt7915/debugfs.c | 48 ++++++++++++++++++++++++++---------------------- - mt7915/main.c | 1 + - 3 files changed, 28 insertions(+), 23 deletions(-) - -diff --git a/eeprom.c b/eeprom.c -index 0bc66cc..ecd09c0 100644 ---- a/eeprom.c -+++ b/eeprom.c -@@ -343,7 +343,7 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy, - u32 ru_rates = ARRAY_SIZE(dest->ru[0]); - char band; - size_t len; -- s8 max_power = 0; -+ s8 max_power = -127; - s8 txs_delta; - - if (!mcs_rates) -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 5780138..894e2cd 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -951,9 +951,9 @@ mt7915_xmit_queues_show(struct seq_file *file, void *data) - - DEFINE_SHOW_ATTRIBUTE(mt7915_xmit_queues); - --#define mt7915_txpower_puts(rate) \ -+#define mt7915_txpower_puts(rate, _len) \ - ({ \ -- len += scnprintf(buf + len, sz - len, "%-16s:", #rate " (TMAC)"); \ -+ len += scnprintf(buf + len, sz - len, "%-*s:", _len, #rate " (TMAC)"); \ - for (i = 0; i < mt7915_sku_group_len[SKU_##rate]; i++, offs++) \ - len += scnprintf(buf + len, sz - len, " %6d", txpwr[offs]); \ - len += scnprintf(buf + len, sz - len, "\n"); \ -@@ -995,43 +995,47 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf, - len += scnprintf(buf + len, sz - len, - "\nPhy%d Tx power table (channel %d)\n", - phy != &dev->phy, phy->mt76->chandef.chan->hw_value); -- len += scnprintf(buf + len, sz - len, "%-16s %6s %6s %6s %6s\n", -+ len += scnprintf(buf + len, sz - len, "%-23s %6s %6s %6s %6s\n", - " ", "1m", "2m", "5m", "11m"); -- mt7915_txpower_puts(CCK); -+ mt7915_txpower_puts(CCK, 23); - - len += scnprintf(buf + len, sz - len, -- "%-16s %6s %6s %6s %6s %6s %6s %6s %6s\n", -+ "%-23s %6s %6s %6s %6s %6s %6s %6s %6s\n", - " ", "6m", "9m", "12m", "18m", "24m", "36m", "48m", - "54m"); -- mt7915_txpower_puts(OFDM); -+ mt7915_txpower_puts(OFDM, 23); - - len += scnprintf(buf + len, sz - len, -- "%-16s %6s %6s %6s %6s %6s %6s %6s %6s\n", -+ "%-23s %6s %6s %6s %6s %6s %6s %6s %6s\n", - " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", - "mcs5", "mcs6", "mcs7"); -- mt7915_txpower_puts(HT_BW20); -+ mt7915_txpower_puts(HT_BW20, 23); - - len += scnprintf(buf + len, sz - len, -- "%-16s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n", -+ "%-23s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n", - " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5", - "mcs6", "mcs7", "mcs32"); -- mt7915_txpower_puts(HT_BW40); -+ mt7915_txpower_puts(HT_BW40, 23); - - len += scnprintf(buf + len, sz - len, -- "%-16s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n", -+ "%-23s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s %6s\n", - " ", "mcs0", "mcs1", "mcs2", "mcs3", "mcs4", "mcs5", - "mcs6", "mcs7", "mcs8", "mcs9", "mcs10", "mcs11"); -- mt7915_txpower_puts(VHT_BW20); -- mt7915_txpower_puts(VHT_BW40); -- mt7915_txpower_puts(VHT_BW80); -- mt7915_txpower_puts(VHT_BW160); -- mt7915_txpower_puts(HE_RU26); -- mt7915_txpower_puts(HE_RU52); -- mt7915_txpower_puts(HE_RU106); -- mt7915_txpower_puts(HE_RU242); -- mt7915_txpower_puts(HE_RU484); -- mt7915_txpower_puts(HE_RU996); -- mt7915_txpower_puts(HE_RU2x996); -+ mt7915_txpower_puts(VHT_BW20, 23); -+ mt7915_txpower_puts(VHT_BW40, 23); -+ mt7915_txpower_puts(VHT_BW80, 23); -+ mt7915_txpower_puts(VHT_BW160, 23); -+ mt7915_txpower_puts(HE_RU26, 23); -+ mt7915_txpower_puts(HE_RU52, 23); -+ mt7915_txpower_puts(HE_RU106, 23); -+ len += scnprintf(buf + len, sz - len, "BW20/"); -+ mt7915_txpower_puts(HE_RU242, 18); -+ len += scnprintf(buf + len, sz - len, "BW40/"); -+ mt7915_txpower_puts(HE_RU484, 18); -+ len += scnprintf(buf + len, sz - len, "BW80/"); -+ mt7915_txpower_puts(HE_RU996, 18); -+ len += scnprintf(buf + len, sz - len, "BW160/"); -+ mt7915_txpower_puts(HE_RU2x996, 17); - - reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_TPC_CTRL_STAT(band) : - MT_WF_PHY_TPC_CTRL_STAT_MT7916(band); -diff --git a/mt7915/main.c b/mt7915/main.c -index e61041d..1903db4 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -1080,6 +1080,7 @@ mt7915_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) - mt76_set_stream_caps(phy->mt76, true); - mt7915_set_stream_vht_txbf_caps(phy); - mt7915_set_stream_he_caps(phy); -+ mt7915_mcu_set_txpower_sku(phy); - - mutex_unlock(&dev->mt76.mutex); - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0005-wifi-mt76-mt7915-Fixed-null-pointer-dereference-issu.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0005-wifi-mt76-mt7915-Fixed-null-pointer-dereference-issu.patch deleted file mode 100644 index a30ec46ff..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0005-wifi-mt76-mt7915-Fixed-null-pointer-dereference-issu.patch +++ /dev/null @@ -1,42 +0,0 @@ -From d4b6226c74988932d9df8f1a6b5afbcea7effc38 Mon Sep 17 00:00:00 2001 -From: MeiChia Chiu -Date: Thu, 26 Oct 2023 21:11:05 +0800 -Subject: [PATCH 05/14] wifi: mt76: mt7915: Fixed null pointer dereference - issue - -Without this patch, when the station is still in Authentication stage and -sends a "Notify bandwidth change action frame" to AP at the same time, -there will be a race condition that causes a crash to occur because the AP -access "msta->vif" that has not been fully initialized. - -Signed-off-by: Bo Jiao -Signed-off-by: Money Wang -Signed-off-by: MeiChia Chiu ---- - mt7915/main.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/mt7915/main.c b/mt7915/main.c -index 1903db4..61a1dbb 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -1170,9 +1170,16 @@ static void mt7915_sta_rc_update(struct ieee80211_hw *hw, - struct ieee80211_sta *sta, - u32 changed) - { -+ struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; - struct mt7915_phy *phy = mt7915_hw_phy(hw); - struct mt7915_dev *dev = phy->dev; - -+ if (!msta->vif) { -+ dev_warn(dev->mt76.dev, "Un-initialized STA %pM wcid %d in rc_work\n", -+ sta->addr, msta->wcid.idx); -+ return; -+ } -+ - mt7915_sta_rc_work(&changed, sta); - ieee80211_queue_work(hw, &dev->rc_work); - } --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0006-wifi-mt76-ACS-channel-time-too-long-on-duty-channel.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0006-wifi-mt76-ACS-channel-time-too-long-on-duty-channel.patch deleted file mode 100644 index 114ee03bb..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0006-wifi-mt76-ACS-channel-time-too-long-on-duty-channel.patch +++ /dev/null @@ -1,51 +0,0 @@ -From dbc2448c773d6c2e8a36513a0c855ff0775f5ec4 Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Sat, 18 Nov 2023 07:36:45 +0800 -Subject: [PATCH 06/14] wifi: mt76: ACS channel time too long on duty channel - -Issue: -There's a chance that the channel time for duty channel is zero in ACS -scan. - -Root cause: -The chan_stat may be reset when restore to duty channel. -Mac80211 will notify to hostapd when scan done and then restore to duty -channel. -And mt76 will clear scan flag after restore done. -If hostapd get the chan_stat before channel_restore, will get the -correct channel time; -If hostapd get the chan_stat after channel_restore, will get zero -channel time; - -Solution: -When channel switch, will check the mac80211 scan state but not the mt76 scan flag. -Mac80211 scan state will be set in scanning, and will be reset after -scan done and before restore to duty channel. ---- - mac80211.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/mac80211.c b/mac80211.c -index e7b763b..bc20f60 100644 ---- a/mac80211.c -+++ b/mac80211.c -@@ -927,6 +927,7 @@ void mt76_set_channel(struct mt76_phy *phy) - struct cfg80211_chan_def *chandef = &hw->conf.chandef; - bool offchannel = hw->conf.flags & IEEE80211_CONF_OFFCHANNEL; - int timeout = HZ / 5; -+ unsigned long was_scanning = ieee80211_get_scanning(hw); - - wait_event_timeout(dev->tx_wait, !mt76_has_tx_pending(phy), timeout); - mt76_update_survey(phy); -@@ -941,7 +942,7 @@ void mt76_set_channel(struct mt76_phy *phy) - if (!offchannel) - phy->main_chan = chandef->chan; - -- if (chandef->chan != phy->main_chan) -+ if (chandef->chan != phy->main_chan || was_scanning) - memset(phy->chan_state, 0, sizeof(*phy->chan_state)); - } - EXPORT_SYMBOL_GPL(mt76_set_channel); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0007-wifi-mt76-mt7915-add-post-channel-switch-for-DFS-cha.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0007-wifi-mt76-mt7915-add-post-channel-switch-for-DFS-cha.patch deleted file mode 100644 index 1151befcf..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0007-wifi-mt76-mt7915-add-post-channel-switch-for-DFS-cha.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 72e729e50f4b162db845e988275b91db2d558ef1 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Thu, 16 Nov 2023 14:41:54 +0800 -Subject: [PATCH 07/14] wifi: mt76: mt7915: add post channel switch for DFS - channel switching - -Signed-off-by: StanleyYP Wang ---- - mt7915/main.c | 22 ++++++++++++++++++++++ - 1 file changed, 22 insertions(+) - -diff --git a/mt7915/main.c b/mt7915/main.c -index 61a1dbb..71e0d55 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -736,6 +736,27 @@ mt7915_channel_switch_beacon(struct ieee80211_hw *hw, - mutex_unlock(&dev->mt76.mutex); - } - -+static int -+mt7915_post_channel_switch(struct ieee80211_hw *hw, struct ieee80211_vif *vif) -+{ -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct cfg80211_chan_def *chandef = &phy->mt76->chandef; -+ int ret; -+ -+ ret = cfg80211_chandef_dfs_required(hw->wiphy, chandef, NL80211_IFTYPE_AP); -+ if (ret <= 0) -+ goto out; -+ -+ ieee80211_stop_queues(hw); -+ ret = mt7915_set_channel(phy); -+ if (ret) -+ goto out; -+ ieee80211_wake_queues(hw); -+ -+out: -+ return ret; -+} -+ - int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) - { -@@ -1701,6 +1722,7 @@ const struct ieee80211_ops mt7915_ops = { - .get_txpower = mt76_get_txpower, - .set_sar_specs = mt7915_set_sar_specs, - .channel_switch_beacon = mt7915_channel_switch_beacon, -+ .post_channel_switch = mt7915_post_channel_switch, - .get_stats = mt7915_get_stats, - .get_et_sset_count = mt7915_get_et_sset_count, - .get_et_stats = mt7915_get_et_stats, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0008-wifi-mt76-mt7915-add-support-for-realtime-Rx-rate-up.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0008-wifi-mt76-mt7915-add-support-for-realtime-Rx-rate-up.patch deleted file mode 100644 index c17f0f461..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0008-wifi-mt76-mt7915-add-support-for-realtime-Rx-rate-up.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 0e87f52e13e654b144c12e3aad968fbc3da5ac1b Mon Sep 17 00:00:00 2001 -From: "Henry.Yen" -Date: Mon, 8 Jan 2024 17:19:01 +0800 -Subject: [PATCH 08/14] wifi: mt76: mt7915: add support for realtime Rx rate - updates - -Add support for realtime Rx rate updates. - -Currently, Rx rate is updated according to packet-triggered RxV -parsing flow, i.e., mt76_connac2_mac_fill_rx_rate(). However, whenever -the session enters hardware acceleration, driver layer won't have -any clue about what the current Rx rate is. So we make use of MCU -CMD to obtain Rx rate instead. - -Signed-off-by: Henry.Yen ---- - mt76_connac.h | 6 ++++++ - mt7915/main.c | 2 +- - 2 files changed, 7 insertions(+), 1 deletion(-) - -diff --git a/mt76_connac.h b/mt76_connac.h -index 91987bd..4871857 100644 ---- a/mt76_connac.h -+++ b/mt76_connac.h -@@ -260,6 +260,12 @@ static inline bool is_connac_v1(struct mt76_dev *dev) - return is_mt7615(dev) || is_mt7663(dev) || is_mt7622(dev); - } - -+static inline bool is_connac_v2(struct mt76_dev *dev) -+{ -+ return is_mt7915(dev) || is_mt7916(dev) || -+ is_mt7981(dev) || is_mt7986(dev); -+} -+ - static inline bool is_mt76_fw_txp(struct mt76_dev *dev) - { - switch (mt76_chip(dev)) { -diff --git a/mt7915/main.c b/mt7915/main.c -index 71e0d55..5d31f5a 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -1118,7 +1118,7 @@ static void mt7915_sta_statistics(struct ieee80211_hw *hw, - struct rate_info *txrate = &msta->wcid.rate; - struct rate_info rxrate = {}; - -- if (is_mt7915(&phy->dev->mt76) && -+ if (is_connac_v2(&phy->dev->mt76) && - !mt7915_mcu_get_rx_rate(phy, vif, sta, &rxrate)) { - sinfo->rxrate = rxrate; - sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BITRATE); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0009-wifi-mt76-mt7915-remove-redundant-argument-in-add_be.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0009-wifi-mt76-mt7915-remove-redundant-argument-in-add_be.patch deleted file mode 100644 index 2d608c693..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0009-wifi-mt76-mt7915-remove-redundant-argument-in-add_be.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 995dd81673e89e6b387d256e26a0cf07e2ccb0e5 Mon Sep 17 00:00:00 2001 -From: MeiChia Chiu -Date: Wed, 24 Jan 2024 15:04:33 +0800 -Subject: [PATCH 09/14] wifi: mt76: mt7915: remove redundant argument in - add_beacon function - -Remove redundant argument "changed". - -Signed-off-by: MeiChia Chiu ---- - mt7915/mac.c | 3 +-- - mt7915/main.c | 4 ++-- - mt7915/mcu.c | 3 +-- - mt7915/mt7915.h | 2 +- - 4 files changed, 5 insertions(+), 7 deletions(-) - -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 0f6b806..ada3a7f 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1285,8 +1285,7 @@ mt7915_update_vif_beacon(void *priv, u8 *mac, struct ieee80211_vif *vif) - case NL80211_IFTYPE_MESH_POINT: - case NL80211_IFTYPE_ADHOC: - case NL80211_IFTYPE_AP: -- mt7915_mcu_add_beacon(hw, vif, vif->bss_conf.enable_beacon, -- BSS_CHANGED_BEACON_ENABLED); -+ mt7915_mcu_add_beacon(hw, vif, vif->bss_conf.enable_beacon); - break; - default: - break; -diff --git a/mt7915/main.c b/mt7915/main.c -index 5d31f5a..9eeca39 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -659,7 +659,7 @@ static void mt7915_bss_info_changed(struct ieee80211_hw *hw, - - if (changed & (BSS_CHANGED_BEACON | - BSS_CHANGED_BEACON_ENABLED)) -- mt7915_mcu_add_beacon(hw, vif, info->enable_beacon, changed); -+ mt7915_mcu_add_beacon(hw, vif, info->enable_beacon); - - if (changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP | - BSS_CHANGED_FILS_DISCOVERY)) -@@ -732,7 +732,7 @@ mt7915_channel_switch_beacon(struct ieee80211_hw *hw, - struct mt7915_dev *dev = mt7915_hw_dev(hw); - - mutex_lock(&dev->mt76.mutex); -- mt7915_mcu_add_beacon(hw, vif, true, BSS_CHANGED_BEACON); -+ mt7915_mcu_add_beacon(hw, vif, true); - mutex_unlock(&dev->mt76.mutex); - } - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 6e9970c..84ffe07 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -1970,8 +1970,7 @@ mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif, - MCU_EXT_CMD(BSS_INFO_UPDATE), true); - } - --int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, -- int en, u32 changed) -+int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, int en) - { - struct mt7915_dev *dev = mt7915_hw_dev(hw); - struct mt7915_phy *phy = mt7915_hw_phy(hw); -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 5cd2b33..e1801d5 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -461,7 +461,7 @@ int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vi - int mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif, - u32 changed); - int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, -- int enable, u32 changed); -+ int enable); - int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif, - struct ieee80211_he_obss_pd *he_obss_pd); - int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0010-wifi-mt76-mt7915-add-support-for-WMM-PBC-configurati.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0010-wifi-mt76-mt7915-add-support-for-WMM-PBC-configurati.patch deleted file mode 100644 index b4c617944..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0010-wifi-mt76-mt7915-add-support-for-WMM-PBC-configurati.patch +++ /dev/null @@ -1,243 +0,0 @@ -From 9c7177584089b98089142568514af4b23e0d4e72 Mon Sep 17 00:00:00 2001 -From: Benjamin Lin -Date: Mon, 29 Jan 2024 11:28:41 +0800 -Subject: [PATCH 10/14] wifi: mt76: mt7915: add support for WMM PBC - configuration - ---- - mt76_connac_mcu.h | 2 ++ - mt7915/init.c | 2 ++ - mt7915/mac.c | 14 ++++++++ - mt7915/mcu.c | 90 +++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/mcu.h | 15 ++++++++ - mt7915/mt7915.h | 4 +++ - 6 files changed, 127 insertions(+) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 67be14d..1dd8244 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1025,6 +1025,7 @@ enum { - MCU_EXT_EVENT_ASSERT_DUMP = 0x23, - MCU_EXT_EVENT_RDD_REPORT = 0x3a, - MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, -+ MCU_EXT_EVENT_BSS_ACQ_PKT_CNT = 0x52, - MCU_EXT_EVENT_WA_TX_STAT = 0x74, - MCU_EXT_EVENT_BCC_NOTIFY = 0x75, - MCU_EXT_EVENT_MURU_CTRL = 0x9f, -@@ -1220,6 +1221,7 @@ enum { - MCU_EXT_CMD_TXDPD_CAL = 0x60, - MCU_EXT_CMD_CAL_CACHE = 0x67, - MCU_EXT_CMD_RED_ENABLE = 0x68, -+ MCU_EXT_CMD_PKT_BUDGET_CTRL = 0x6c, - MCU_EXT_CMD_CP_SUPPORT = 0x75, - MCU_EXT_CMD_SET_RADAR_TH = 0x7c, - MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, -diff --git a/mt7915/init.c b/mt7915/init.c -index 9fe0524..f81a2f2 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -1221,6 +1221,8 @@ int mt7915_register_device(struct mt7915_dev *dev) - INIT_WORK(&dev->dump_work, mt7915_mac_dump_work); - mutex_init(&dev->dump_mutex); - -+ INIT_WORK(&dev->wmm_pbc_work, mt7915_mcu_wmm_pbc_work); -+ - dev->dbdc_support = mt7915_band_config(dev); - - phy2 = mt7915_alloc_ext_phy(dev); -diff --git a/mt7915/mac.c b/mt7915/mac.c -index ada3a7f..e167e7b 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -2032,6 +2032,8 @@ void mt7915_mac_work(struct work_struct *work) - - mt76_update_survey(mphy); - if (++mphy->mac_work_count == 5) { -+ int i; -+ - mphy->mac_work_count = 0; - - mt7915_mac_update_stats(phy); -@@ -2039,6 +2041,18 @@ void mt7915_mac_work(struct work_struct *work) - - if (phy->dev->muru_debug) - mt7915_mcu_muru_debug_get(phy); -+ -+ /* Update DEV-wise information only in -+ * the MAC work of the first band running. -+ */ -+ for (i = MT_BAND0; i <= mphy->band_idx; ++i) { -+ if (i == mphy->band_idx) { -+ if (mt7915_mcu_wa_cmd(phy->dev, MCU_WA_PARAM_CMD(QUERY), MCU_WA_PARAM_BSS_ACQ_PKT_CNT, -+ BSS_ACQ_PKT_CNT_BSS_BITMAP_ALL | BSS_ACQ_PKT_CNT_READ_CLR, 0)) -+ dev_err(mphy->dev->dev, "Failed to query per-AC-queue packet counts.\n"); -+ } else if (test_bit(MT76_STATE_RUNNING, &mphy->dev->phys[i]->state)) -+ break; -+ } - } - - if (++phy->stats_work_count == 10) { -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 84ffe07..446c512 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -354,6 +354,93 @@ mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb) - mt7915_mcu_cca_finish, mphy->hw); - } - -+void mt7915_mcu_wmm_pbc_work(struct work_struct *work) -+{ -+#define WMM_PBC_QUEUE_NUM 5 -+#define WMM_PBC_BSS_ALL 0xff -+#define WMM_PBC_WLAN_IDX_ALL 0xffff -+#define WMM_PBC_BOUND_DEFAULT 0xffff -+#define WMM_PBC_UP_BOUND_BAND0_VO 950 -+#define WMM_PBC_UP_BOUND_BAND0_VI 950 -+#define WMM_PBC_UP_BOUND_BAND0_BE 750 -+#define WMM_PBC_UP_BOUND_BAND0_BK 450 -+#define WMM_PBC_UP_BOUND_BAND1_VO 1900 -+#define WMM_PBC_UP_BOUND_BAND1_VI 1900 -+#define WMM_PBC_UP_BOUND_BAND1_BE 1500 -+#define WMM_PBC_UP_BOUND_BAND1_BK 900 -+#define WMM_PBC_UP_BOUND_MGMT 32 -+ struct mt7915_dev *dev = container_of(work, struct mt7915_dev, wmm_pbc_work); -+ struct { -+ u8 bss_idx; -+ u8 queue_num; -+ __le16 wlan_idx; -+ u8 __rsv[4]; -+ struct { -+ __le16 low; -+ __le16 up; -+ } __packed bound[WMM_PBC_QUEUE_NUM * 2]; -+ } __packed req = { -+ .bss_idx = WMM_PBC_BSS_ALL, -+ .queue_num = WMM_PBC_QUEUE_NUM * 2, -+ .wlan_idx = cpu_to_le16(WMM_PBC_WLAN_IDX_ALL), -+ }; -+ int i; -+ -+#define pbc_acq_up_bound_config(_band, _ac, _bound) \ -+ req.bound[_band * WMM_PBC_QUEUE_NUM + mt76_connac_lmac_mapping(_ac)].up = dev->wmm_pbc_enable \ -+ ? cpu_to_le16(_bound) \ -+ : cpu_to_le16(WMM_PBC_BOUND_DEFAULT) -+ pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_VO, WMM_PBC_UP_BOUND_BAND0_VO); -+ pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_VI, WMM_PBC_UP_BOUND_BAND0_VI); -+ pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_BE, WMM_PBC_UP_BOUND_BAND0_BE); -+ pbc_acq_up_bound_config(MT_BAND0, IEEE80211_AC_BK, WMM_PBC_UP_BOUND_BAND0_BK); -+ req.bound[MT_BAND0 * WMM_PBC_QUEUE_NUM + 4].up = dev->wmm_pbc_enable -+ ? cpu_to_le16(WMM_PBC_UP_BOUND_MGMT) -+ : cpu_to_le16(WMM_PBC_BOUND_DEFAULT); -+ pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_VO, WMM_PBC_UP_BOUND_BAND1_VO); -+ pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_VI, WMM_PBC_UP_BOUND_BAND1_VI); -+ pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_BE, WMM_PBC_UP_BOUND_BAND1_BE); -+ pbc_acq_up_bound_config(MT_BAND1, IEEE80211_AC_BK, WMM_PBC_UP_BOUND_BAND1_BK); -+ req.bound[MT_BAND1 * WMM_PBC_QUEUE_NUM + 4].up = dev->wmm_pbc_enable -+ ? cpu_to_le16(WMM_PBC_UP_BOUND_MGMT) -+ : cpu_to_le16(WMM_PBC_BOUND_DEFAULT); -+ -+ for (i = 0; i < WMM_PBC_QUEUE_NUM * 2; ++i) -+ req.bound[i].low = cpu_to_le16(WMM_PBC_BOUND_DEFAULT); -+ -+ if (mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(PKT_BUDGET_CTRL), -+ &req, sizeof(req), true)) -+ dev_err(dev->mt76.dev, "Failed to configure WMM PBC.\n"); -+} -+ -+static void -+mt7915_mcu_rx_bss_acq_pkt_cnt(struct mt7915_dev *dev, struct sk_buff * skb) -+{ -+ struct mt7915_mcu_bss_acq_pkt_cnt_event *event = (struct mt7915_mcu_bss_acq_pkt_cnt_event *)skb->data; -+ u32 bitmap = le32_to_cpu(event->bss_bitmap); -+ u64 sum[IEEE80211_NUM_ACS] = {0}; -+ u8 ac_cnt = 0; -+ int i, j; -+ -+ for (i = 0; (i < BSS_ACQ_PKT_CNT_BSS_NUM) && (bitmap & (1 << i)); ++i) { -+ for (j = IEEE80211_AC_VO; j < IEEE80211_NUM_ACS; ++j) -+ sum[j] += le32_to_cpu(event->bss[i].cnt[mt76_connac_lmac_mapping(j)]); -+ } -+ -+ for (i = IEEE80211_AC_VO; i < IEEE80211_NUM_ACS; ++i) { -+ if (sum[i] > WMM_PKT_THRESHOLD) -+ ++ac_cnt; -+ } -+ -+ if (ac_cnt > 1 && !dev->wmm_pbc_enable) { -+ dev->wmm_pbc_enable = true; -+ queue_work(dev->mt76.wq, &dev->wmm_pbc_work); -+ } else if (ac_cnt <= 1 && dev->wmm_pbc_enable) { -+ dev->wmm_pbc_enable = false; -+ queue_work(dev->mt76.wq, &dev->wmm_pbc_work); -+ } -+} -+ - static void - mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - { -@@ -376,6 +463,9 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - case MCU_EXT_EVENT_BCC_NOTIFY: - mt7915_mcu_rx_bcc_notify(dev, skb); - break; -+ case MCU_EXT_EVENT_BSS_ACQ_PKT_CNT: -+ mt7915_mcu_rx_bss_acq_pkt_cnt(dev, skb); -+ break; - default: - break; - } -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 8f36546..fa0847d 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -329,10 +329,25 @@ enum { - MCU_WA_PARAM_CMD_DEBUG, - }; - -+#define BSS_ACQ_PKT_CNT_BSS_NUM 24 -+#define BSS_ACQ_PKT_CNT_BSS_BITMAP_ALL 0x00ffffff -+#define BSS_ACQ_PKT_CNT_READ_CLR BIT(31) -+#define WMM_PKT_THRESHOLD 50 -+ -+struct mt7915_mcu_bss_acq_pkt_cnt_event { -+ struct mt76_connac2_mcu_rxd rxd; -+ -+ __le32 bss_bitmap; -+ struct { -+ __le32 cnt[IEEE80211_NUM_ACS]; -+ } __packed bss[BSS_ACQ_PKT_CNT_BSS_NUM]; -+} __packed; -+ - enum { - MCU_WA_PARAM_PDMA_RX = 0x04, - MCU_WA_PARAM_CPU_UTIL = 0x0b, - MCU_WA_PARAM_RED = 0x0e, -+ MCU_WA_PARAM_BSS_ACQ_PKT_CNT = 0x12, - MCU_WA_PARAM_RED_SETTING = 0x40, - }; - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index e1801d5..89156f3 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -326,6 +326,9 @@ struct mt7915_dev { - struct reset_control *rstc; - void __iomem *dcm; - void __iomem *sku; -+ -+ bool wmm_pbc_enable; -+ struct work_struct wmm_pbc_work; - }; - - enum { -@@ -516,6 +519,7 @@ int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); - int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); - void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_exit(struct mt7915_dev *dev); -+void mt7915_mcu_wmm_pbc_work(struct work_struct *work); - - static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) - { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0011-wifi-mt76-fix-tx-statistics-about-tx-retry-and-tx-fa.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0011-wifi-mt76-fix-tx-statistics-about-tx-retry-and-tx-fa.patch deleted file mode 100644 index 04b333264..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0011-wifi-mt76-fix-tx-statistics-about-tx-retry-and-tx-fa.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 3bbf19ff34cd0d7ef3371b49101bbcaf9d068668 Mon Sep 17 00:00:00 2001 -From: Peter Chiu -Date: Mon, 29 Jan 2024 11:02:06 +0800 -Subject: [PATCH 11/14] wifi: mt76: fix tx statistics about tx retry and tx - fail - -The tx retry and tx failed are reported by PPDU TxS. - -Signed-off-by: Peter Chiu ---- - mt76_connac_mac.c | 3 --- - mt7915/mac.c | 2 +- - 2 files changed, 1 insertion(+), 4 deletions(-) - -diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c -index b841bf6..630c640 100644 ---- a/mt76_connac_mac.c -+++ b/mt76_connac_mac.c -@@ -716,9 +716,6 @@ bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid, - struct sk_buff_head list; - struct sk_buff *skb; - -- if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) == MT_TXS_PPDU_FMT) -- return false; -- - mt76_tx_status_lock(dev, &list); - skb = mt76_tx_status_skb_get(dev, wcid, pid, &list); - if (skb) { -diff --git a/mt7915/mac.c b/mt7915/mac.c -index e167e7b..a5d0b09 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1021,7 +1021,7 @@ static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data) - - msta = container_of(wcid, struct mt7915_sta, wcid); - -- if (pid == MT_PACKET_ID_WED) -+ if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) == MT_TXS_PPDU_FMT) - mt76_connac2_mac_fill_txs(&dev->mt76, wcid, txs_data); - else - mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0012-wifi-mt76-add-sanity-check-to-prevent-kernel-crash.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0012-wifi-mt76-add-sanity-check-to-prevent-kernel-crash.patch deleted file mode 100644 index 034e354b5..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0012-wifi-mt76-add-sanity-check-to-prevent-kernel-crash.patch +++ /dev/null @@ -1,35 +0,0 @@ -From fa15f886fd427e2de3e09ef5c93743e611483adf Mon Sep 17 00:00:00 2001 -From: Peter Chiu -Date: Mon, 29 Jan 2024 15:33:24 +0800 -Subject: [PATCH 12/14] wifi: mt76: add sanity check to prevent kernel crash - -wcid may not be initialized when mac80211 calls mt76.tx and it would lead to -kernel crash. - -Signed-off-by: Peter Chiu ---- - tx.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/tx.c b/tx.c -index 5cf6ede..ab42f69 100644 ---- a/tx.c -+++ b/tx.c -@@ -345,6 +345,14 @@ mt76_tx(struct mt76_phy *phy, struct ieee80211_sta *sta, - - info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, phy->band_idx); - -+ if (!wcid->tx_pending.prev || !wcid->tx_pending.next) { -+ dev_warn(phy->dev->dev, "Un-initialized STA %pM wcid %d in mt76_tx\n", -+ sta->addr, wcid->idx); -+ -+ ieee80211_free_txskb(phy->hw, skb); -+ return; -+ } -+ - spin_lock_bh(&wcid->tx_pending.lock); - __skb_queue_tail(&wcid->tx_pending, skb); - spin_unlock_bh(&wcid->tx_pending.lock); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0013-wifi-mt76-mt7915-limit-per-band-token-count.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0013-wifi-mt76-mt7915-limit-per-band-token-count.patch deleted file mode 100644 index ee848e6a4..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0013-wifi-mt76-mt7915-limit-per-band-token-count.patch +++ /dev/null @@ -1,231 +0,0 @@ -From ef9b267adeee3803ae8ee3073d2ebcbd3e1c95f9 Mon Sep 17 00:00:00 2001 -From: Peter Chiu -Date: Mon, 29 Jan 2024 15:33:24 +0800 -Subject: [PATCH] wifi: mt76: mt7915: limit per-band token count - -Add a threshold for per-band token count to prevent a band from interfering -with the other band. - -Signed-off-by: Peter Chiu - -diff --git a/mt76.h b/mt76.h -index ee14425d..b83456b4 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -407,6 +407,8 @@ struct mt76_txwi_cache { - struct list_head list; - dma_addr_t dma_addr; - -+ u8 phy_idx; -+ - union { - struct sk_buff *skb; - void *ptr; -@@ -819,6 +821,7 @@ struct mt76_phy { - bool al; - u8 pin; - } leds; -+ int tokens; - }; - - struct mt76_dev { -@@ -872,6 +875,8 @@ struct mt76_dev { - u16 wed_token_count; - u16 token_count; - u16 token_size; -+ u16 token_threshold; -+ u8 num_phy; - - spinlock_t rx_token_lock; - struct idr rx_token; -@@ -1662,7 +1667,8 @@ static inline bool mt76_queue_is_wed_rx(struct mt76_queue *q) - - struct mt76_txwi_cache * - mt76_token_release(struct mt76_dev *dev, int token, bool *wake); --int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi); -+int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi, -+ u8 phy_idx); - void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked); - struct mt76_txwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token); - int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr, -diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c -index 630c6402..a92c261d 100644 ---- a/mt76_connac_mac.c -+++ b/mt76_connac_mac.c -@@ -1178,6 +1178,8 @@ void mt76_connac2_tx_token_put(struct mt76_dev *dev) - idr_for_each_entry(&dev->token, txwi, id) { - mt76_connac2_txwi_free(dev, txwi, NULL, NULL); - dev->token_count--; -+ if (dev->num_phy > 1 && dev->phys[txwi->phy_idx]) -+ dev->phys[txwi->phy_idx]->tokens--; - } - spin_unlock_bh(&dev->token_lock); - idr_destroy(&dev->token); -diff --git a/mt7915/init.c b/mt7915/init.c -index f81a2f2f..3ec9eab7 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -1225,6 +1225,8 @@ int mt7915_register_device(struct mt7915_dev *dev) - - dev->dbdc_support = mt7915_band_config(dev); - -+ dev->mt76.num_phy = 1 + !!dev->dbdc_support; -+ - phy2 = mt7915_alloc_ext_phy(dev); - if (IS_ERR(phy2)) - return PTR_ERR(phy2); -@@ -1257,6 +1259,7 @@ int mt7915_register_device(struct mt7915_dev *dev) - } - - dev->recovery.hw_init_done = true; -+ dev->mt76.token_threshold = dev->mt76.token_size / dev->mt76.num_phy; - - ret = mt7915_init_debugfs(&dev->phy); - if (ret) -diff --git a/mt7915/mac.c b/mt7915/mac.c -index a5d0b096..4604a682 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -738,6 +738,7 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - struct mt76_connac_fw_txp *txp; - struct mt76_txwi_cache *t; - int id, i, nbuf = tx_info->nbuf - 1; -+ u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2; - u8 *txwi = (u8 *)txwi_ptr; - int pid; - -@@ -761,7 +762,7 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); - t->skb = tx_info->skb; - -- id = mt76_token_consume(mdev, &t); -+ id = mt76_token_consume(mdev, &t, phy_idx); - if (id < 0) - return id; - -diff --git a/mt7921/pci_mac.c b/mt7921/pci_mac.c -index 031ba9aa..4c69c55c 100644 ---- a/mt7921/pci_mac.c -+++ b/mt7921/pci_mac.c -@@ -27,7 +27,7 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); - t->skb = tx_info->skb; - -- id = mt76_token_consume(mdev, &t); -+ id = mt76_token_consume(mdev, &t, 0); - if (id < 0) - return id; - -diff --git a/mt7925/pci_mac.c b/mt7925/pci_mac.c -index 9fca8879..f1d615c0 100644 ---- a/mt7925/pci_mac.c -+++ b/mt7925/pci_mac.c -@@ -27,7 +27,7 @@ int mt7925e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); - t->skb = tx_info->skb; - -- id = mt76_token_consume(mdev, &t); -+ id = mt76_token_consume(mdev, &t, 0); - if (id < 0) - return id; - -diff --git a/mt7996/init.c b/mt7996/init.c -index 9aa97e4a..7549a108 100644 ---- a/mt7996/init.c -+++ b/mt7996/init.c -@@ -634,6 +634,8 @@ static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy, - mtk_wed_device_start(&dev->mt76.mmio.wed_hif2, irq_mask); - } - -+ dev->mt76.num_phy++; -+ - return 0; - - error: -@@ -1330,6 +1332,8 @@ int mt7996_register_device(struct mt7996_dev *dev) - if (ret) - return ret; - -+ dev->mt76.num_phy = 1; -+ - ret = mt7996_register_phy(dev, mt7996_phy2(dev), MT_BAND1); - if (ret) - return ret; -@@ -1342,6 +1346,7 @@ int mt7996_register_device(struct mt7996_dev *dev) - - dev->recovery.hw_init_done = true; - -+ dev->mt76.token_threshold = dev->mt76.token_size / dev->mt76.num_phy; - ret = mt7996_init_debugfs(&dev->phy); - if (ret) - goto error; -diff --git a/mt7996/mac.c b/mt7996/mac.c -index bc7111a7..aa19120b 100644 ---- a/mt7996/mac.c -+++ b/mt7996/mac.c -@@ -922,6 +922,7 @@ int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - struct mt76_txwi_cache *t; - int id, i, pid, nbuf = tx_info->nbuf - 1; - bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; -+ u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2; - u8 *txwi = (u8 *)txwi_ptr; - - if (unlikely(tx_info->skb->len <= ETH_HLEN)) -@@ -933,7 +934,7 @@ int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); - t->skb = tx_info->skb; - -- id = mt76_token_consume(mdev, &t); -+ id = mt76_token_consume(mdev, &t, phy_idx); - if (id < 0) - return id; - -diff --git a/tx.c b/tx.c -index ab42f69b..0fdf7d83 100644 ---- a/tx.c -+++ b/tx.c -@@ -825,16 +825,30 @@ void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked) - } - EXPORT_SYMBOL_GPL(__mt76_set_tx_blocked); - --int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi) -+int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi, -+ u8 phy_idx) - { -+ struct mt76_phy *phy = phy_idx < __MT_MAX_BAND ? dev->phys[phy_idx] : NULL; - int token; - - spin_lock_bh(&dev->token_lock); - -+ if (dev->num_phy > 1 && phy && phy->tokens > dev->token_threshold) { -+ spin_unlock_bh(&dev->token_lock); -+ -+ return -EINVAL; -+ } -+ - token = idr_alloc(&dev->token, *ptxwi, 0, dev->token_size, GFP_ATOMIC); -- if (token >= 0) -+ if (token >= 0) { - dev->token_count++; - -+ if (dev->num_phy > 1 && phy) { -+ (*ptxwi)->phy_idx = phy_idx; -+ phy->tokens++; -+ } -+ } -+ - #ifdef CONFIG_NET_MEDIATEK_SOC_WED - if (mtk_wed_device_active(&dev->mmio.wed) && - token >= dev->mmio.wed.wlan.token_start) -@@ -878,6 +892,8 @@ mt76_token_release(struct mt76_dev *dev, int token, bool *wake) - txwi = idr_remove(&dev->token, token); - if (txwi) { - dev->token_count--; -+ if (dev->num_phy > 1 && dev->phys[txwi->phy_idx]) -+ dev->phys[txwi->phy_idx]->tokens--; - - #ifdef CONFIG_NET_MEDIATEK_SOC_WED - if (mtk_wed_device_active(&dev->mmio.wed) && --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0014-wifi-mt76-mt7915-update-power-on-sequence.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0014-wifi-mt76-mt7915-update-power-on-sequence.patch deleted file mode 100644 index 4c2f703b2..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0014-wifi-mt76-mt7915-update-power-on-sequence.patch +++ /dev/null @@ -1,147 +0,0 @@ -From c3b0d9d6116df31a11d18e42e7227bf516c104f9 Mon Sep 17 00:00:00 2001 -From: Peter Chiu -Date: Thu, 14 Mar 2024 17:55:12 +0800 -Subject: [PATCH 14/14] wifi: mt76: mt7915: update power on sequence - -Update power on sequence to prevent unexpected behavior. - -Signed-off-by: Peter Chiu ---- - mt7915/mt7915.h | 1 + - mt7915/regs.h | 2 ++ - mt7915/soc.c | 47 +++++++++++++++++++++++++++++++++++++++++++++-- - 3 files changed, 48 insertions(+), 2 deletions(-) - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 89156f3..74cd8ca 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -329,6 +329,7 @@ struct mt7915_dev { - - bool wmm_pbc_enable; - struct work_struct wmm_pbc_work; -+ u32 adie_type; - }; - - enum { -diff --git a/mt7915/regs.h b/mt7915/regs.h -index 7515b23..3452a7e 100644 ---- a/mt7915/regs.h -+++ b/mt7915/regs.h -@@ -775,6 +775,7 @@ enum offs_rev { - #define MT_TOP_RGU_SYSRAM_PDN (MT_TOP_RGU_BASE + 0x050) - #define MT_TOP_RGU_SYSRAM_SLP (MT_TOP_RGU_BASE + 0x054) - #define MT_TOP_WFSYS_PWR (MT_TOP_RGU_BASE + 0x010) -+#define MT_TOP_BGFYS_PWR (MT_TOP_RGU_BASE + 0x020) - #define MT_TOP_PWR_EN_MASK BIT(7) - #define MT_TOP_PWR_ACK_MASK BIT(6) - #define MT_TOP_PWR_KEY_MASK GENMASK(31, 16) -@@ -886,6 +887,7 @@ enum offs_rev { - #define MT_ADIE_SLP_CTRL(_band, ofs) (MT_ADIE_SLP_CTRL_BASE(_band) + (ofs)) - - #define MT_ADIE_SLP_CTRL_CK0(_band) MT_ADIE_SLP_CTRL(_band, 0x120) -+#define MT_ADIE_SLP_CTRL_CK1(_band) MT_ADIE_SLP_CTRL(_band, 0x124) - - /* ADIE */ - #define MT_ADIE_CHIP_ID 0x02c -diff --git a/mt7915/soc.c b/mt7915/soc.c -index 92d8d71..bb3468a 100644 ---- a/mt7915/soc.c -+++ b/mt7915/soc.c -@@ -260,6 +260,7 @@ static int mt7986_wmac_consys_lockup(struct mt7915_dev *dev, bool enable) - MT_INFRACFG_TX_EN_MASK, - FIELD_PREP(MT_INFRACFG_TX_EN_MASK, enable)); - -+ usleep_range(1000, 2000); - return 0; - } - -@@ -844,6 +845,10 @@ static void mt7986_wmac_subsys_setting(struct mt7915_dev *dev) - MT_CONN_INFRA_OSC_STB_TIME_MASK, 0x80706); - - /* prevent subsys from power on/of in a short time interval */ -+ mt76_rmw(dev, MT_TOP_BGFYS_PWR, -+ MT_TOP_PWR_ACK_MASK | MT_TOP_PWR_KEY_MASK, -+ (0x42540000)); -+ - mt76_rmw(dev, MT_TOP_WFSYS_PWR, - MT_TOP_PWR_ACK_MASK | MT_TOP_PWR_KEY_MASK, - MT_TOP_PWR_KEY); -@@ -914,7 +919,7 @@ static void mt7986_wmac_clock_enable(struct mt7915_dev *dev, u32 adie_type) - - read_poll_timeout(mt76_rr, cur, !(cur & MT_SLP_CTRL_BSY_MASK), - USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, -- dev, MT_ADIE_SLP_CTRL_CK0(0)); -+ dev, MT_ADIE_SLP_CTRL_CK0(1)); - } - mt76_wmac_spi_unlock(dev); - -@@ -1154,12 +1159,14 @@ int mt7986_wmac_enable(struct mt7915_dev *dev) - if (ret) - return ret; - -+ dev->adie_type = adie_type; -+ - return mt7986_wmac_sku_update(dev, adie_type); - } - - void mt7986_wmac_disable(struct mt7915_dev *dev) - { -- u32 cur; -+ u32 cur, i; - - mt7986_wmac_top_wfsys_wakeup(dev, true); - -@@ -1178,6 +1185,20 @@ void mt7986_wmac_disable(struct mt7915_dev *dev) - mt76_rmw_field(dev, MT_AFE_DIG_EN_02(0), MT_AFE_MCU_BPLL_CFG_MASK, 0x2); - mt76_rmw_field(dev, MT_AFE_DIG_EN_02(0), MT_AFE_WPLL_CFG_MASK, 0x2); - -+ /* Disable adie top clock */ -+ mt76_wmac_spi_lock(dev); -+ for (i = 0; i < 2; i++) { -+ if (is_7975(dev, i, dev->adie_type) || is_7976(dev, i, dev->adie_type)) { -+ mt76_rmw_field(dev, MT_ADIE_SLP_CTRL_CK1(i), -+ MT_SLP_CTRL_EN_MASK, 0x0); -+ -+ read_poll_timeout(mt76_rr, cur, !(cur & MT_SLP_CTRL_BSY_MASK), -+ USEC_PER_MSEC, 50 * USEC_PER_MSEC, -+ false, dev, MT_ADIE_SLP_CTRL_CK1(i)); -+ } -+ } -+ mt76_wmac_spi_unlock(dev); -+ - /* Reset EMI */ - mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, - MT_CONN_INFRA_EMI_REQ_MASK, 0x1); -@@ -1189,6 +1210,28 @@ void mt7986_wmac_disable(struct mt7915_dev *dev) - MT_CONN_INFRA_INFRA_REQ_MASK, 0x0); - - mt7986_wmac_top_wfsys_wakeup(dev, false); -+ -+ mt76_rmw(dev, MT_TOP_CONN_INFRA_WAKEUP, -+ MT_TOP_CONN_INFRA_WAKEUP_MASK, 0x1); -+ -+ usleep_range(1000, 1100); -+ -+ mt76_wmac_spi_lock(dev); -+ for (i = 0; i < 2; i++) { -+ if (is_7975(dev, i, dev->adie_type) || is_7976(dev, i, dev->adie_type)) { -+ mt76_rmw_field(dev, MT_ADIE_SLP_CTRL_CK0(i), -+ MT_SLP_CTRL_EN_MASK, 0x0); -+ -+ read_poll_timeout(mt76_rr, cur, !(cur & MT_SLP_CTRL_BSY_MASK), -+ USEC_PER_MSEC, 50 * USEC_PER_MSEC, -+ false, dev, MT_ADIE_SLP_CTRL_CK0(i)); -+ } -+ } -+ mt76_wmac_spi_unlock(dev); -+ -+ mt76_rmw(dev, MT_TOP_CONN_INFRA_WAKEUP, -+ MT_TOP_CONN_INFRA_WAKEUP_MASK, 0x0); -+ - mt7986_wmac_consys_lockup(dev, true); - mt7986_wmac_consys_reset(dev, false); - } --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0015-wifi-mt76-mt7915-add-support-for-IEEE-802.11-fragmen.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0015-wifi-mt76-mt7915-add-support-for-IEEE-802.11-fragmen.patch deleted file mode 100644 index ab924eb94..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0015-wifi-mt76-mt7915-add-support-for-IEEE-802.11-fragmen.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 7b7d9e3ef08ce5526d43d657cb717b471002b087 Mon Sep 17 00:00:00 2001 -From: Benjamin Lin -Date: Wed, 3 Apr 2024 14:05:59 +0800 -Subject: [PATCH] wifi: mt76: mt7915: add support for IEEE 802.11 fragmentation - -Add fragmentation index into TXD.DW2 to support IEEE 802.11 fragmentation. - -Signed-off-by: Benjamin Lin ---- - mt76_connac2_mac.h | 7 +++++++ - mt76_connac_mac.c | 10 +++++++++- - 2 files changed, 16 insertions(+), 1 deletion(-) - -diff --git a/mt76_connac2_mac.h b/mt76_connac2_mac.h -index 5f13211..eb47653 100644 ---- a/mt76_connac2_mac.h -+++ b/mt76_connac2_mac.h -@@ -355,4 +355,11 @@ enum tx_port_idx { - MT_TX_PORT_IDX_MCU - }; - -+enum tx_frag_idx { -+ MT_TX_FRAG_NONE, -+ MT_TX_FRAG_FIRST, -+ MT_TX_FRAG_MID, -+ MT_TX_FRAG_LAST -+}; -+ - #endif /* __MT76_CONNAC2_MAC_H */ -diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c -index 630c640..d7d602a 100644 ---- a/mt76_connac_mac.c -+++ b/mt76_connac_mac.c -@@ -391,6 +391,7 @@ mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, - bool multicast = is_multicast_ether_addr(hdr->addr1); - u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; - __le16 fc = hdr->frame_control; -+ __le16 sc = hdr->seq_ctrl; - u8 fc_type, fc_stype; - u32 val; - -@@ -432,6 +433,13 @@ mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, - info->flags & IEEE80211_TX_CTL_USE_MINRATE) - val |= MT_TXD2_FIX_RATE; - -+ if (ieee80211_has_morefrags(fc) && ieee80211_is_first_frag(sc)) -+ val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_FIRST); -+ else if (ieee80211_has_morefrags(fc) && !ieee80211_is_first_frag(sc)) -+ val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_MID); -+ else if (!ieee80211_has_morefrags(fc) && !ieee80211_is_first_frag(sc)) -+ val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_LAST); -+ - txwi[2] |= cpu_to_le32(val); - - if (ieee80211_is_beacon(fc)) { -@@ -440,7 +448,7 @@ mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, - } - - if (info->flags & IEEE80211_TX_CTL_INJECTED) { -- u16 seqno = le16_to_cpu(hdr->seq_ctrl); -+ u16 seqno = le16_to_cpu(sc); - - if (ieee80211_is_back_req(hdr->frame_control)) { - struct ieee80211_bar *bar; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0016-wifi-mt76-mt7915-add-dummy-HW-offload-of-IEEE-802.11.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0016-wifi-mt76-mt7915-add-dummy-HW-offload-of-IEEE-802.11.patch deleted file mode 100644 index b062d4055..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0016-wifi-mt76-mt7915-add-dummy-HW-offload-of-IEEE-802.11.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 239f1a1bb8eedd9f24dd3abcb801dceac7fe7ffb Mon Sep 17 00:00:00 2001 -From: Benjamin Lin -Date: Wed, 17 Apr 2024 10:47:08 +0800 -Subject: [PATCH] wifi: mt76: mt7915: add dummy HW offload of IEEE 802.11 - fragmentation - -Currently, CONNAC2 series do not support encryption for fragmented Tx frames. -Therefore, add dummy function mt7915_set_frag_threshold() to prevent SW IEEE 802.11 fragmentation. - -Signed-off-by: Benjamin Lin ---- - mt7915/init.c | 1 + - mt7915/main.c | 7 +++++++ - 2 files changed, 8 insertions(+) - -diff --git a/mt7915/init.c b/mt7915/init.c -index 3ec9eab..19a68c5 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -398,6 +398,7 @@ mt7915_init_wiphy(struct mt7915_phy *phy) - ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); - ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); - ieee80211_hw_set(hw, WANT_MONITOR_VIF); -+ ieee80211_hw_set(hw, SUPPORTS_TX_FRAG); - - hw->max_tx_fragments = 4; - -diff --git a/mt7915/main.c b/mt7915/main.c -index 9eeca39..5224d83 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -1614,6 +1614,12 @@ mt7915_twt_teardown_request(struct ieee80211_hw *hw, - mutex_unlock(&dev->mt76.mutex); - } - -+static int -+mt7915_set_frag_threshold(struct ieee80211_hw *hw, u32 val) -+{ -+ return 0; -+} -+ - static int - mt7915_set_radar_background(struct ieee80211_hw *hw, - struct cfg80211_chan_def *chandef) -@@ -1741,6 +1747,7 @@ const struct ieee80211_ops mt7915_ops = { - .sta_set_decap_offload = mt7915_sta_set_decap_offload, - .add_twt_setup = mt7915_mac_add_twt_setup, - .twt_teardown_request = mt7915_twt_teardown_request, -+ .set_frag_threshold = mt7915_set_frag_threshold, - CFG80211_TESTMODE_CMD(mt76_testmode_cmd) - CFG80211_TESTMODE_DUMP(mt76_testmode_dump) - #ifdef CONFIG_MAC80211_DEBUGFS --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0016-wifi-mt76-mt7915-fix-rx-filter-setting-for-bfee-func.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0016-wifi-mt76-mt7915-fix-rx-filter-setting-for-bfee-func.patch deleted file mode 100644 index f223d89e0..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0016-wifi-mt76-mt7915-fix-rx-filter-setting-for-bfee-func.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 1a9953c39a08407607e5ef9d2ca4fefa77b5eaea Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Fri, 12 Apr 2024 11:33:08 +0800 -Subject: [PATCH] wifi: mt76: mt7915: fix rx filter setting for bfee - functionality - -Fix rx filter setting to prevent dropping NDPA frames. Without this -commit, bfee functionality may behave abnormally. - -Fixes: e57b7901469f ("mt76: add mac80211 driver for MT7915 PCIe-based chipsets") -Signed-off-by: Howard Hsu ---- - mt7915/main.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/mt7915/main.c b/mt7915/main.c -index 9eeca39..6674c27 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -564,8 +564,7 @@ static void mt7915_configure_filter(struct ieee80211_hw *hw, - - MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS | - MT_WF_RFCR_DROP_RTS | -- MT_WF_RFCR_DROP_CTL_RSV | -- MT_WF_RFCR_DROP_NDPA); -+ MT_WF_RFCR_DROP_CTL_RSV); - - *total_flags = flags; - rxfilter = phy->rxfilter; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0017-wifi-mt76-mt7915-fix-inconsistent-QoS-mapping-betwee.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0017-wifi-mt76-mt7915-fix-inconsistent-QoS-mapping-betwee.patch deleted file mode 100644 index d4d3d2e82..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0017-wifi-mt76-mt7915-fix-inconsistent-QoS-mapping-betwee.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 9c6e5082d5552ac2cefe5b4857da4b29b0c76685 Mon Sep 17 00:00:00 2001 -From: Benjamin Lin -Date: Thu, 25 Apr 2024 17:17:13 +0800 -Subject: [PATCH] wifi: mt76: mt7915: fix inconsistent QoS mapping between SW - and HW - -The mapping from IP DSCP to IEEE 802.11 user priority may be customized. -Therefore, driver needs to pass the mapping to HW, so that the QoS type of traffic can be mapped in a consistent manner for both SW and HW paths. - -Signed-off-by: Benjamin Lin ---- - mt76_connac_mcu.h | 1 + - mt7915/main.c | 3 +++ - mt7915/mcu.c | 37 +++++++++++++++++++++++++++++++++++++ - mt7915/mt7915.h | 1 + - 4 files changed, 42 insertions(+) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 1dd8244..0936c1c 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1236,6 +1236,7 @@ enum { - MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, - MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, - MCU_EXT_CMD_PHY_STAT_INFO = 0xad, -+ MCU_EXT_CMD_SET_QOS_MAP = 0xb4, - }; - - enum { -diff --git a/mt7915/main.c b/mt7915/main.c -index 5ed84bc..26f9a5a 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -646,6 +646,9 @@ static void mt7915_bss_info_changed(struct ieee80211_hw *hw, - } - } - -+ if (changed & BSS_CHANGED_QOS) -+ mt7915_mcu_set_qos_map(dev, vif); -+ - /* ensure that enable txcmd_mode after bss_info */ - if (changed & (BSS_CHANGED_QOS | BSS_CHANGED_BEACON_ENABLED)) - mt7915_mcu_set_tx(dev, vif); -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 446c512..3d7fc6d 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -4212,3 +4212,40 @@ int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set) - - return 0; - } -+ -+int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) -+{ -+#define IP_DSCP_NUM 64 -+ struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; -+ struct { -+ u8 bss_idx; -+ u8 qos_map_enable; -+ u8 __rsv[2]; -+ s8 qos_map[IP_DSCP_NUM]; -+ } __packed req = { -+ .bss_idx = mvif->mt76.idx, -+ .qos_map_enable = false, -+ }; -+ struct cfg80211_qos_map *qos_map; -+ -+ rcu_read_lock(); -+ qos_map = ieee80211_get_qos_map(vif); -+ if (qos_map) { -+ struct cfg80211_dscp_range *dscp_range = qos_map->up; -+ s8 up; -+ -+ req.qos_map_enable = true; -+ for (up = 0; up < IEEE80211_NUM_UPS; ++up) { -+ u8 low = dscp_range[up].low, high = dscp_range[up].high; -+ -+ if (low >= IP_DSCP_NUM || high >= IP_DSCP_NUM || low > high) -+ continue; -+ -+ memset(req.qos_map + low, up, high - low + 1); -+ } -+ } -+ rcu_read_unlock(); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(SET_QOS_MAP), &req, -+ sizeof(req), true); -+} -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 74cd8ca..66d87d7 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -521,6 +521,7 @@ int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); - void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_exit(struct mt7915_dev *dev); - void mt7915_mcu_wmm_pbc_work(struct work_struct *work); -+int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif); - - static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) - { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/0999-wifi-mt76-mt7915-build-pass-for-Linux-Kernel-5.4-fix.patch b/feeds/mediatek-sdk/mt76/mt76/patches/0999-wifi-mt76-mt7915-build-pass-for-Linux-Kernel-5.4-fix.patch deleted file mode 100644 index 60b0e2da9..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/0999-wifi-mt76-mt7915-build-pass-for-Linux-Kernel-5.4-fix.patch +++ /dev/null @@ -1,882 +0,0 @@ -From 4300f1a6eb91cc3291d73e415ae32cbd120f6bc6 Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Sat, 1 Apr 2023 08:18:17 +0800 -Subject: [PATCH 0999/1053] wifi: mt76: mt7915: build pass for Linux Kernel 5.4 - fixes - ---- - debugfs.c | 2 ++ - dma.c | 73 ++++++++++++++++++++++++----------------------- - dma.h | 3 +- - eeprom.c | 8 +++++- - mac80211.c | 56 ------------------------------------ - mcu.c | 1 + - mt76.h | 27 +----------------- - mt7615/mcu.c | 1 + - mt76_connac.h | 2 -- - mt76_connac_mcu.c | 47 +----------------------------- - mt76_connac_mcu.h | 4 --- - mt7915/main.c | 25 +++++++--------- - mt7915/mcu.c | 1 + - usb.c | 43 ++++++++++++++-------------- - wed.c | 62 +++++++++++++++++++++++++--------------- - 15 files changed, 123 insertions(+), 232 deletions(-) - -diff --git a/debugfs.c b/debugfs.c -index c4649ba..1c8328d 100644 ---- a/debugfs.c -+++ b/debugfs.c -@@ -33,8 +33,10 @@ mt76_napi_threaded_set(void *data, u64 val) - if (!mt76_is_mmio(dev)) - return -EOPNOTSUPP; - -+#if 0 /* disable in backport 5.15 */ - if (dev->napi_dev.threaded != val) - return dev_set_threaded(&dev->napi_dev, val); -+#endif - - return 0; - } -diff --git a/dma.c b/dma.c -index f4f88c4..ccdd564 100644 ---- a/dma.c -+++ b/dma.c -@@ -178,7 +178,7 @@ mt76_free_pending_rxwi(struct mt76_dev *dev) - local_bh_disable(); - while ((t = __mt76_get_rxwi(dev)) != NULL) { - if (t->ptr) -- mt76_put_page_pool_buf(t->ptr, false); -+ skb_free_frag(t->ptr); - kfree(t); - } - local_bh_enable(); -@@ -450,9 +450,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, - if (!t) - return NULL; - -- dma_sync_single_for_cpu(dev->dma_dev, t->dma_addr, -- SKB_WITH_OVERHEAD(q->buf_size), -- page_pool_get_dma_dir(q->page_pool)); -+ dma_unmap_single(dev->dma_dev, t->dma_addr, -+ SKB_WITH_OVERHEAD(q->buf_size), -+ DMA_FROM_DEVICE); - - buf = t->ptr; - t->dma_addr = 0; -@@ -462,9 +462,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, - if (drop) - *drop |= !!(buf1 & MT_DMA_CTL_WO_DROP); - } else { -- dma_sync_single_for_cpu(dev->dma_dev, e->dma_addr[0], -- SKB_WITH_OVERHEAD(q->buf_size), -- page_pool_get_dma_dir(q->page_pool)); -+ dma_unmap_single(dev->dma_dev, e->dma_addr[0], -+ SKB_WITH_OVERHEAD(q->buf_size), -+ DMA_FROM_DEVICE); - } - - done: -@@ -631,11 +631,11 @@ free_skb: - return ret; - } - --int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, -- bool allow_direct) -+int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q) - { - int len = SKB_WITH_OVERHEAD(q->buf_size); -- int frames = 0; -+ int frames = 0, offset = q->buf_offset; -+ dma_addr_t addr; - - if (!q->ndesc) - return 0; -@@ -643,30 +643,30 @@ int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, - spin_lock_bh(&q->lock); - - while (q->queued < q->ndesc - 1) { -- struct mt76_queue_buf qbuf = {}; -- enum dma_data_direction dir; -- dma_addr_t addr; -- int offset; -+ struct mt76_queue_buf qbuf; - void *buf = NULL; - - if (mt76_queue_is_wed_rro_ind(q)) - goto done; - -- buf = mt76_get_page_pool_buf(q, &offset, q->buf_size); -+ buf = page_frag_alloc(&q->rx_page, q->buf_size, GFP_ATOMIC); - if (!buf) - break; - -- addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset; -- dir = page_pool_get_dma_dir(q->page_pool); -- dma_sync_single_for_device(dev->dma_dev, addr, len, dir); -+ addr = dma_map_single(dev->dma_dev, buf, len, DMA_FROM_DEVICE); -+ if (unlikely(dma_mapping_error(dev->dma_dev, addr))) { -+ skb_free_frag(buf); -+ break; -+ } - -- qbuf.addr = addr + q->buf_offset; -+ qbuf.addr = addr + offset; - done: -- qbuf.len = len - q->buf_offset; -+ qbuf.len = len - offset; - qbuf.skip_unmap = false; - if (mt76_dma_add_rx_buf(dev, q, &qbuf, buf) < 0) { -- mt76_put_page_pool_buf(buf, allow_direct); -- break; -+ dma_unmap_single(dev->dma_dev, addr, len, -+ DMA_FROM_DEVICE); -+ skb_free_frag(buf); - } - frames++; - } -@@ -719,10 +719,6 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q, - if (!q->entry) - return -ENOMEM; - -- ret = mt76_create_page_pool(dev, q); -- if (ret) -- return ret; -- - ret = mt76_wed_dma_setup(dev, q, false); - if (ret) - return ret; -@@ -741,6 +737,7 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q, - static void - mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q) - { -+ struct page *page; - void *buf; - bool more; - -@@ -756,7 +753,7 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q) - break; - - if (!mt76_queue_is_wed_rro(q)) -- mt76_put_page_pool_buf(buf, false); -+ skb_free_frag(buf); - } while (1); - - spin_lock_bh(&q->lock); -@@ -766,6 +763,13 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q) - } - - spin_unlock_bh(&q->lock); -+ -+ if (!q->rx_page.va) -+ return; -+ -+ page = virt_to_page(q->rx_page.va); -+ __page_frag_cache_drain(page, q->rx_page.pagecnt_bias); -+ memset(&q->rx_page, 0, sizeof(q->rx_page)); - } - - static void -@@ -796,7 +800,7 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid) - return; - - mt76_dma_sync_idx(dev, q); -- mt76_dma_rx_fill(dev, q, false); -+ mt76_dma_rx_fill(dev, q); - } - - static void -@@ -813,7 +817,7 @@ mt76_add_fragment(struct mt76_dev *dev, struct mt76_queue *q, void *data, - - skb_add_rx_frag(skb, nr_frags, page, offset, len, q->buf_size); - } else { -- mt76_put_page_pool_buf(data, allow_direct); -+ skb_free_frag(data); - } - - if (more) -@@ -883,12 +887,11 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget) - !(dev->drv->rx_check(dev, data, len))) - goto free_frag; - -- skb = napi_build_skb(data, q->buf_size); -+ skb = build_skb(data, q->buf_size); - if (!skb) - goto free_frag; - - skb_reserve(skb, q->buf_offset); -- skb_mark_for_recycle(skb); - - *(u32 *)skb->cb = info; - -@@ -904,10 +907,10 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget) - continue; - - free_frag: -- mt76_put_page_pool_buf(data, allow_direct); -+ skb_free_frag(data); - } - -- mt76_dma_rx_fill(dev, q, true); -+ mt76_dma_rx_fill(dev, q); - return done; - } - -@@ -952,7 +955,7 @@ mt76_dma_init(struct mt76_dev *dev, - - mt76_for_each_q_rx(dev, i) { - netif_napi_add(&dev->napi_dev, &dev->napi[i], poll); -- mt76_dma_rx_fill(dev, &dev->q_rx[i], false); -+ mt76_dma_rx_fill(dev, &dev->q_rx[i]); - napi_enable(&dev->napi[i]); - } - -@@ -1007,8 +1010,6 @@ void mt76_dma_cleanup(struct mt76_dev *dev) - - netif_napi_del(&dev->napi[i]); - mt76_dma_rx_cleanup(dev, q); -- -- page_pool_destroy(q->page_pool); - } - - if (mtk_wed_device_active(&dev->mmio.wed)) -diff --git a/dma.h b/dma.h -index 1de5a2b..619dc0f 100644 ---- a/dma.h -+++ b/dma.h -@@ -79,8 +79,7 @@ enum mt76_dma_wed_ind_reason { - int mt76_dma_rx_poll(struct napi_struct *napi, int budget); - void mt76_dma_attach(struct mt76_dev *dev); - void mt76_dma_cleanup(struct mt76_dev *dev); --int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, -- bool allow_direct); -+int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q); - void __mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q, - bool reset_idx); - void mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q); -diff --git a/eeprom.c b/eeprom.c -index ecd09c0..a267397 100644 ---- a/eeprom.c -+++ b/eeprom.c -@@ -163,9 +163,15 @@ void - mt76_eeprom_override(struct mt76_phy *phy) - { - struct mt76_dev *dev = phy->dev; -+#ifdef CONFIG_OF - struct device_node *np = dev->dev->of_node; -+ const u8 *mac = NULL; - -- of_get_mac_address(np, phy->macaddr); -+ if (np) -+ mac = of_get_mac_address(np); -+ if (!IS_ERR_OR_NULL(mac)) -+ ether_addr_copy(phy->macaddr, mac); -+#endif - - if (!is_valid_ether_addr(phy->macaddr)) { - eth_random_addr(phy->macaddr); -diff --git a/mac80211.c b/mac80211.c -index bc20f60..b30a74e 100644 ---- a/mac80211.c -+++ b/mac80211.c -@@ -577,47 +577,6 @@ void mt76_unregister_phy(struct mt76_phy *phy) - } - EXPORT_SYMBOL_GPL(mt76_unregister_phy); - --int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q) --{ -- struct page_pool_params pp_params = { -- .order = 0, -- .flags = PP_FLAG_PAGE_FRAG, -- .nid = NUMA_NO_NODE, -- .dev = dev->dma_dev, -- }; -- int idx = q - dev->q_rx; -- -- switch (idx) { -- case MT_RXQ_MAIN: -- case MT_RXQ_BAND1: -- case MT_RXQ_BAND2: -- pp_params.pool_size = 256; -- break; -- default: -- pp_params.pool_size = 16; -- break; -- } -- -- if (mt76_is_mmio(dev)) { -- /* rely on page_pool for DMA mapping */ -- pp_params.flags |= PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV; -- pp_params.dma_dir = DMA_FROM_DEVICE; -- pp_params.max_len = PAGE_SIZE; -- pp_params.offset = 0; -- } -- -- q->page_pool = page_pool_create(&pp_params); -- if (IS_ERR(q->page_pool)) { -- int err = PTR_ERR(q->page_pool); -- -- q->page_pool = NULL; -- return err; -- } -- -- return 0; --} --EXPORT_SYMBOL_GPL(mt76_create_page_pool); -- - struct mt76_dev * - mt76_alloc_device(struct device *pdev, unsigned int size, - const struct ieee80211_ops *ops, -@@ -1817,21 +1776,6 @@ void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi, - } - EXPORT_SYMBOL_GPL(mt76_ethtool_worker); - --void mt76_ethtool_page_pool_stats(struct mt76_dev *dev, u64 *data, int *index) --{ --#ifdef CONFIG_PAGE_POOL_STATS -- struct page_pool_stats stats = {}; -- int i; -- -- mt76_for_each_q_rx(dev, i) -- page_pool_get_stats(dev->q_rx[i].page_pool, &stats); -- -- page_pool_ethtool_stats_get(data, &stats); -- *index += page_pool_ethtool_stats_get_count(); --#endif --} --EXPORT_SYMBOL_GPL(mt76_ethtool_page_pool_stats); -- - enum mt76_dfs_state mt76_phy_dfs_state(struct mt76_phy *phy) - { - struct ieee80211_hw *hw = phy->hw; -diff --git a/mcu.c b/mcu.c -index a8cafa3..fa4b054 100644 ---- a/mcu.c -+++ b/mcu.c -@@ -4,6 +4,7 @@ - */ - - #include "mt76.h" -+#include - - struct sk_buff * - __mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, -diff --git a/mt76.h b/mt76.h -index b83456b..a07c7df 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -15,11 +15,6 @@ - #include - #include - #include --#if LINUX_VERSION_CODE < KERNEL_VERSION(6,6,0) --#include --#else --#include --#endif - #include "util.h" - #include "testmode.h" - -@@ -238,7 +233,7 @@ struct mt76_queue { - - dma_addr_t desc_dma; - struct sk_buff *rx_head; -- struct page_pool *page_pool; -+ struct page_frag_cache rx_page; - }; - - struct mt76_mcu_ops { -@@ -1527,7 +1522,6 @@ mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, - return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout); - } - --void mt76_ethtool_page_pool_stats(struct mt76_dev *dev, u64 *data, int *index); - void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi, - struct mt76_sta_stats *stats, bool eht); - int mt76_skb_adjust_pad(struct sk_buff *skb, int pad); -@@ -1673,25 +1667,6 @@ void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked); - struct mt76_txwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token); - int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr, - struct mt76_txwi_cache *r, dma_addr_t phys); --int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q); --static inline void mt76_put_page_pool_buf(void *buf, bool allow_direct) --{ -- struct page *page = virt_to_head_page(buf); -- -- page_pool_put_full_page(page->pp, page, allow_direct); --} -- --static inline void * --mt76_get_page_pool_buf(struct mt76_queue *q, u32 *offset, u32 size) --{ -- struct page *page; -- -- page = page_pool_dev_alloc_frag(q->page_pool, offset, size); -- if (!page) -- return NULL; -- -- return page_address(page) + *offset; --} - - static inline void mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked) - { -diff --git a/mt7615/mcu.c b/mt7615/mcu.c -index ae34d01..c9444c6 100644 ---- a/mt7615/mcu.c -+++ b/mt7615/mcu.c -@@ -10,6 +10,7 @@ - #include "mcu.h" - #include "mac.h" - #include "eeprom.h" -+#include - - static bool prefer_offload_fw = true; - module_param(prefer_offload_fw, bool, 0644); -diff --git a/mt76_connac.h b/mt76_connac.h -index 4871857..8e7068c 100644 ---- a/mt76_connac.h -+++ b/mt76_connac.h -@@ -56,7 +56,6 @@ enum { - CMD_CBW_10MHZ, - CMD_CBW_5MHZ, - CMD_CBW_8080MHZ, -- CMD_CBW_320MHZ, - - CMD_HE_MCS_BW80 = 0, - CMD_HE_MCS_BW160, -@@ -292,7 +291,6 @@ static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef) - [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ, - [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ, - [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ, -- [NL80211_CHAN_WIDTH_320] = CMD_CBW_320MHZ, - }; - - if (chandef->width >= ARRAY_SIZE(width_to_bw)) -diff --git a/mt76_connac_mcu.c b/mt76_connac_mcu.c -index 1ea9798..a8f097d 100644 ---- a/mt76_connac_mcu.c -+++ b/mt76_connac_mcu.c -@@ -4,6 +4,7 @@ - #include - #include "mt76_connac2_mac.h" - #include "mt76_connac_mcu.h" -+#include - - int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option) - { -@@ -1357,40 +1358,6 @@ u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, - } - EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode); - --u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif, -- enum nl80211_band band) --{ -- const struct ieee80211_sta_eht_cap *eht_cap; -- struct ieee80211_supported_band *sband; -- u8 mode = 0; -- -- if (band == NL80211_BAND_6GHZ) -- mode |= PHY_MODE_AX_6G; -- -- sband = phy->hw->wiphy->bands[band]; -- eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type); -- -- if (!eht_cap || !eht_cap->has_eht || !vif->bss_conf.eht_support) -- return mode; -- -- switch (band) { -- case NL80211_BAND_6GHZ: -- mode |= PHY_MODE_BE_6G; -- break; -- case NL80211_BAND_5GHZ: -- mode |= PHY_MODE_BE_5G; -- break; -- case NL80211_BAND_2GHZ: -- mode |= PHY_MODE_BE_24G; -- break; -- default: -- break; -- } -- -- return mode; --} --EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_ext); -- - const struct ieee80211_sta_he_cap * - mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) - { -@@ -1406,18 +1373,6 @@ mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) - } - EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap); - --const struct ieee80211_sta_eht_cap * --mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) --{ -- enum nl80211_band band = phy->chandef.chan->band; -- struct ieee80211_supported_band *sband; -- -- sband = phy->hw->wiphy->bands[band]; -- -- return ieee80211_get_eht_iftype_cap(sband, vif->type); --} --EXPORT_SYMBOL_GPL(mt76_connac_get_eht_phy_cap); -- - #define DEFAULT_HE_PE_DURATION 4 - #define DEFAULT_HE_DURATION_RTS_THRES 1023 - static void -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 1dd8244..61ca241 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1984,12 +1984,8 @@ void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); - - const struct ieee80211_sta_he_cap * - mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); --const struct ieee80211_sta_eht_cap * --mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); - u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, - enum nl80211_band band, struct ieee80211_sta *sta); --u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif, -- enum nl80211_band band); - - int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, - struct mt76_connac_sta_key_conf *sta_key_conf, -diff --git a/mt7915/main.c b/mt7915/main.c -index 9eeca39..407da07 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -1438,22 +1438,20 @@ void mt7915_get_et_strings(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - u32 sset, u8 *data) - { -- if (sset != ETH_SS_STATS) -- return; -+ if (sset == ETH_SS_STATS) -+ memcpy(data, *mt7915_gstrings_stats, -+ sizeof(mt7915_gstrings_stats)); - -- memcpy(data, mt7915_gstrings_stats, sizeof(mt7915_gstrings_stats)); -- data += sizeof(mt7915_gstrings_stats); -- page_pool_ethtool_stats_get_strings(data); - } - - static - int mt7915_get_et_sset_count(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, int sset) - { -- if (sset != ETH_SS_STATS) -- return 0; -+ if (sset == ETH_SS_STATS) -+ return MT7915_SSTATS_LEN; - -- return MT7915_SSTATS_LEN + page_pool_ethtool_stats_get_count(); -+ return 0; - } - - static void mt7915_ethtool_worker(void *wi_data, struct ieee80211_sta *sta) -@@ -1481,7 +1479,7 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, - .idx = mvif->mt76.idx, - }; - /* See mt7915_ampdu_stat_read_phy, etc */ -- int i, ei = 0, stats_size; -+ int i, ei = 0; - - mutex_lock(&dev->mt76.mutex); - -@@ -1593,12 +1591,9 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, - return; - - ei += wi.worker_stat_count; -- -- mt76_ethtool_page_pool_stats(&dev->mt76, &data[ei], &ei); -- -- stats_size = MT7915_SSTATS_LEN + page_pool_ethtool_stats_get_count(); -- if (ei != stats_size) -- dev_err(dev->mt76.dev, "ei: %d size: %d", ei, stats_size); -+ if (ei != MT7915_SSTATS_LEN) -+ dev_err(dev->mt76.dev, "ei: %d MT7915_SSTATS_LEN: %d", -+ ei, (int)MT7915_SSTATS_LEN); - } - - static void -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 446c512..8f6bc6e 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -6,6 +6,7 @@ - #include "mcu.h" - #include "mac.h" - #include "eeprom.h" -+#include - - #define fw_name(_dev, name, ...) ({ \ - char *_fw; \ -diff --git a/usb.c b/usb.c -index dc690d1..058f2d1 100644 ---- a/usb.c -+++ b/usb.c -@@ -319,27 +319,29 @@ mt76u_set_endpoints(struct usb_interface *intf, - - static int - mt76u_fill_rx_sg(struct mt76_dev *dev, struct mt76_queue *q, struct urb *urb, -- int nsgs) -+ int nsgs, gfp_t gfp) - { - int i; - - for (i = 0; i < nsgs; i++) { -+ struct page *page; - void *data; - int offset; - -- data = mt76_get_page_pool_buf(q, &offset, q->buf_size); -+ data = page_frag_alloc(&q->rx_page, q->buf_size, gfp); - if (!data) - break; - -- sg_set_page(&urb->sg[i], virt_to_head_page(data), q->buf_size, -- offset); -+ page = virt_to_head_page(data); -+ offset = data - page_address(page); -+ sg_set_page(&urb->sg[i], page, q->buf_size, offset); - } - - if (i < nsgs) { - int j; - - for (j = nsgs; j < urb->num_sgs; j++) -- mt76_put_page_pool_buf(sg_virt(&urb->sg[j]), false); -+ skb_free_frag(sg_virt(&urb->sg[j])); - urb->num_sgs = i; - } - -@@ -352,16 +354,15 @@ mt76u_fill_rx_sg(struct mt76_dev *dev, struct mt76_queue *q, struct urb *urb, - - static int - mt76u_refill_rx(struct mt76_dev *dev, struct mt76_queue *q, -- struct urb *urb, int nsgs) -+ struct urb *urb, int nsgs, gfp_t gfp) - { - enum mt76_rxq_id qid = q - &dev->q_rx[MT_RXQ_MAIN]; -- int offset; - - if (qid == MT_RXQ_MAIN && dev->usb.sg_en) -- return mt76u_fill_rx_sg(dev, q, urb, nsgs); -+ return mt76u_fill_rx_sg(dev, q, urb, nsgs, gfp); - - urb->transfer_buffer_length = q->buf_size; -- urb->transfer_buffer = mt76_get_page_pool_buf(q, &offset, q->buf_size); -+ urb->transfer_buffer = page_frag_alloc(&q->rx_page, q->buf_size, gfp); - - return urb->transfer_buffer ? 0 : -ENOMEM; - } -@@ -399,7 +400,7 @@ mt76u_rx_urb_alloc(struct mt76_dev *dev, struct mt76_queue *q, - if (err) - return err; - -- return mt76u_refill_rx(dev, q, e->urb, sg_size); -+ return mt76u_refill_rx(dev, q, e->urb, sg_size, GFP_KERNEL); - } - - static void mt76u_urb_free(struct urb *urb) -@@ -407,10 +408,10 @@ static void mt76u_urb_free(struct urb *urb) - int i; - - for (i = 0; i < urb->num_sgs; i++) -- mt76_put_page_pool_buf(sg_virt(&urb->sg[i]), false); -+ skb_free_frag(sg_virt(&urb->sg[i])); - - if (urb->transfer_buffer) -- mt76_put_page_pool_buf(urb->transfer_buffer, false); -+ skb_free_frag(urb->transfer_buffer); - - usb_free_urb(urb); - } -@@ -546,8 +547,6 @@ mt76u_process_rx_entry(struct mt76_dev *dev, struct urb *urb, - len -= data_len; - nsgs++; - } -- -- skb_mark_for_recycle(skb); - dev->drv->rx_skb(dev, MT_RXQ_MAIN, skb, NULL); - - return nsgs; -@@ -613,7 +612,7 @@ mt76u_process_rx_queue(struct mt76_dev *dev, struct mt76_queue *q) - - count = mt76u_process_rx_entry(dev, urb, q->buf_size); - if (count > 0) { -- err = mt76u_refill_rx(dev, q, urb, count); -+ err = mt76u_refill_rx(dev, q, urb, count, GFP_ATOMIC); - if (err < 0) - break; - } -@@ -664,10 +663,6 @@ mt76u_alloc_rx_queue(struct mt76_dev *dev, enum mt76_rxq_id qid) - struct mt76_queue *q = &dev->q_rx[qid]; - int i, err; - -- err = mt76_create_page_pool(dev, q); -- if (err) -- return err; -- - spin_lock_init(&q->lock); - q->entry = devm_kcalloc(dev->dev, - MT_NUM_RX_ENTRIES, sizeof(*q->entry), -@@ -696,6 +691,7 @@ EXPORT_SYMBOL_GPL(mt76u_alloc_mcu_queue); - static void - mt76u_free_rx_queue(struct mt76_dev *dev, struct mt76_queue *q) - { -+ struct page *page; - int i; - - for (i = 0; i < q->ndesc; i++) { -@@ -705,8 +701,13 @@ mt76u_free_rx_queue(struct mt76_dev *dev, struct mt76_queue *q) - mt76u_urb_free(q->entry[i].urb); - q->entry[i].urb = NULL; - } -- page_pool_destroy(q->page_pool); -- q->page_pool = NULL; -+ -+ if (!q->rx_page.va) -+ return; -+ -+ page = virt_to_page(q->rx_page.va); -+ __page_frag_cache_drain(page, q->rx_page.pagecnt_bias); -+ memset(&q->rx_page, 0, sizeof(q->rx_page)); - } - - static void mt76u_free_rx(struct mt76_dev *dev) -diff --git a/wed.c b/wed.c -index f89e453..f7a3f1b 100644 ---- a/wed.c -+++ b/wed.c -@@ -9,8 +9,12 @@ - void mt76_wed_release_rx_buf(struct mtk_wed_device *wed) - { - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); -+ u32 length; - int i; - -+ length = SKB_DATA_ALIGN(NET_SKB_PAD + wed->wlan.rx_size + -+ sizeof(struct skb_shared_info)); -+ - for (i = 0; i < dev->rx_token_size; i++) { - struct mt76_txwi_cache *t; - -@@ -18,7 +22,9 @@ void mt76_wed_release_rx_buf(struct mtk_wed_device *wed) - if (!t || !t->ptr) - continue; - -- mt76_put_page_pool_buf(t->ptr, false); -+ dma_unmap_single(dev->dma_dev, t->dma_addr, -+ wed->wlan.rx_size, DMA_FROM_DEVICE); -+ __free_pages(virt_to_page(t->ptr), get_order(length)); - t->ptr = NULL; - - mt76_put_rxwi(dev, t); -@@ -33,39 +39,51 @@ u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size) - { - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); - struct mtk_wed_bm_desc *desc = wed->rx_buf_ring.desc; -- struct mt76_queue *q = &dev->q_rx[MT_RXQ_MAIN]; -- int i, len = SKB_WITH_OVERHEAD(q->buf_size); -- struct mt76_txwi_cache *t = NULL; -+ u32 length; -+ int i; -+ -+ length = SKB_DATA_ALIGN(NET_SKB_PAD + wed->wlan.rx_size + -+ sizeof(struct skb_shared_info)); - - for (i = 0; i < size; i++) { -- enum dma_data_direction dir; -- dma_addr_t addr; -- u32 offset; -+ struct mt76_txwi_cache *t = mt76_get_rxwi(dev); -+ dma_addr_t phy_addr; -+ struct page *page; - int token; -- void *buf; -+ void *ptr; - -- t = mt76_get_rxwi(dev); - if (!t) - goto unmap; - -- buf = mt76_get_page_pool_buf(q, &offset, q->buf_size); -- if (!buf) -+ page = __dev_alloc_pages(GFP_KERNEL, get_order(length)); -+ if (!page) { -+ mt76_put_rxwi(dev, t); - goto unmap; -+ } - -- addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset; -- dir = page_pool_get_dma_dir(q->page_pool); -- dma_sync_single_for_device(dev->dma_dev, addr, len, dir); -+ ptr = page_address(page); -+ phy_addr = dma_map_single(dev->dma_dev, ptr, -+ wed->wlan.rx_size, -+ DMA_TO_DEVICE); -+ if (unlikely(dma_mapping_error(dev->dev, phy_addr))) { -+ __free_pages(page, get_order(length)); -+ mt76_put_rxwi(dev, t); -+ goto unmap; -+ } - -- desc->buf0 = cpu_to_le32(addr); -- token = mt76_rx_token_consume(dev, buf, t, addr); -+ desc->buf0 = cpu_to_le32(phy_addr); -+ token = mt76_rx_token_consume(dev, ptr, t, phy_addr); - if (token < 0) { -- mt76_put_page_pool_buf(buf, false); -+ dma_unmap_single(dev->dma_dev, phy_addr, -+ wed->wlan.rx_size, DMA_TO_DEVICE); -+ __free_pages(page, get_order(length)); -+ mt76_put_rxwi(dev, t); - goto unmap; - } - - token = FIELD_PREP(MT_DMA_CTL_TOKEN, token); - #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT -- token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, addr >> 32); -+ token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, phy_addr >> 32); - #endif - desc->token |= cpu_to_le32(token); - desc++; -@@ -74,8 +92,6 @@ u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size) - return 0; - - unmap: -- if (t) -- mt76_put_rxwi(dev, t); - mt76_wed_release_rx_buf(wed); - - return -ENOMEM; -@@ -123,7 +139,7 @@ int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) - /* WED txfree queue needs ring to be initialized before setup */ - q->flags = 0; - mt76_dma_queue_reset(dev, q); -- mt76_dma_rx_fill(dev, q, false); -+ mt76_dma_rx_fill(dev, q); - - ret = mtk_wed_device_txfree_ring_setup(q->wed, q->regs); - if (!ret) -@@ -144,7 +160,7 @@ int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) - break; - case MT76_WED_RRO_Q_MSDU_PG: - q->flags &= ~MT_QFLAG_WED; -- __mt76_dma_queue_reset(dev, q, false); -+ __mt76_dma_queue_reset(dev, q); - mtk_wed_device_msdu_pg_rx_ring_setup(q->wed, ring, q->regs); - q->head = q->ndesc - 1; - q->queued = q->head; -@@ -152,7 +168,7 @@ int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) - case MT76_WED_RRO_Q_IND: - q->flags &= ~MT_QFLAG_WED; - mt76_dma_queue_reset(dev, q); -- mt76_dma_rx_fill(dev, q, false); -+ mt76_dma_rx_fill(dev, q); - mtk_wed_device_ind_rx_ring_setup(q->wed, q->regs); - break; - default: --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1000-wifi-mt76-mt7915-add-mtk-internal-debug-tools-for-mt.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1000-wifi-mt76-mt7915-add-mtk-internal-debug-tools-for-mt.patch deleted file mode 100644 index a03665bb1..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1000-wifi-mt76-mt7915-add-mtk-internal-debug-tools-for-mt.patch +++ /dev/null @@ -1,5880 +0,0 @@ -From ae5f0852b50290e0aaf2ff9d5dd8f9bd2b97bbb6 Mon Sep 17 00:00:00 2001 -From: Shayne Chen -Date: Wed, 22 Jun 2022 10:39:47 +0800 -Subject: [PATCH] wifi: mt76: mt7915: add mtk internal debug tools for mt76 - ---- - mt76_connac_mcu.h | 6 + - mt7915/Makefile | 2 +- - mt7915/debugfs.c | 89 +- - mt7915/mac.c | 14 + - mt7915/main.c | 5 + - mt7915/mcu.c | 48 +- - mt7915/mcu.h | 4 + - mt7915/mt7915.h | 56 + - mt7915/mt7915_debug.h | 1442 ++++++++++++++++ - mt7915/mtk_debugfs.c | 3750 +++++++++++++++++++++++++++++++++++++++++ - mt7915/mtk_mcu.c | 51 + - mt7915/soc.c | 7 + - tools/fwlog.c | 44 +- - 13 files changed, 5499 insertions(+), 19 deletions(-) - create mode 100644 mt7915/mt7915_debug.h - create mode 100644 mt7915/mtk_debugfs.c - create mode 100644 mt7915/mtk_mcu.c - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 99cdd1b..a8690cd 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1195,6 +1195,7 @@ enum { - MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11, - MCU_EXT_CMD_FW_LOG_2_HOST = 0x13, - MCU_EXT_CMD_TXBF_ACTION = 0x1e, -+ MCU_EXT_CMD_MEC_CTRL = 0x1f, - MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21, - MCU_EXT_CMD_THERMAL_PROT = 0x23, - MCU_EXT_CMD_STA_REC_UPDATE = 0x25, -@@ -1218,6 +1219,11 @@ enum { - MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, - MCU_EXT_CMD_RXDCOC_CAL = 0x59, - MCU_EXT_CMD_GET_MIB_INFO = 0x5a, -+#ifdef MTK_DEBUG -+ MCU_EXT_CMD_RED_SHOW_STA = 0x69, -+ MCU_EXT_CMD_RED_TARGET_DELAY = 0x6A, -+ MCU_EXT_CMD_RED_TX_RPT = 0x6B, -+#endif - MCU_EXT_CMD_TXDPD_CAL = 0x60, - MCU_EXT_CMD_CAL_CACHE = 0x67, - MCU_EXT_CMD_RED_ENABLE = 0x68, -diff --git a/mt7915/Makefile b/mt7915/Makefile -index c4dca9c..fd71141 100644 ---- a/mt7915/Makefile -+++ b/mt7915/Makefile -@@ -4,7 +4,7 @@ EXTRA_CFLAGS += -DCONFIG_MT76_LEDS - obj-$(CONFIG_MT7915E) += mt7915e.o - - mt7915e-y := pci.o init.o dma.o eeprom.o main.o mcu.o mac.o \ -- debugfs.o mmio.o -+ debugfs.o mmio.o mtk_debugfs.o mtk_mcu.o - - mt7915e-$(CONFIG_NL80211_TESTMODE) += testmode.o - mt7915e-$(CONFIG_MT798X_WMAC) += soc.o -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 894e2cd..2661386 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -8,6 +8,9 @@ - #include "mac.h" - - #define FW_BIN_LOG_MAGIC 0x44e98caf -+#ifdef MTK_DEBUG -+#define FW_BIN_LOG_MAGIC_V2 0x44d9c99a -+#endif - - /** global debugfs **/ - -@@ -496,6 +499,9 @@ mt7915_fw_debug_wm_set(void *data, u64 val) - int ret; - - dev->fw.debug_wm = val ? MCU_FW_LOG_TO_HOST : 0; -+#ifdef MTK_DEBUG -+ dev->fw.debug_wm = val; -+#endif - - if (dev->fw.debug_bin) - val = 16; -@@ -520,6 +526,9 @@ mt7915_fw_debug_wm_set(void *data, u64 val) - if (ret) - goto out; - } -+#ifdef MTK_DEBUG -+ mt7915_mcu_fw_dbg_ctrl(dev, 68, !!val); -+#endif - - /* WM CPU info record control */ - mt76_clear(dev, MT_CPU_UTIL_CTRL, BIT(0)); -@@ -528,6 +537,12 @@ mt7915_fw_debug_wm_set(void *data, u64 val) - mt76_wr(dev, MT_MCU_WM_CIRQ_IRQ_MASK_CLR_ADDR, BIT(5)); - mt76_wr(dev, MT_MCU_WM_CIRQ_IRQ_SOFT_ADDR, BIT(5)); - -+#ifdef MTK_DEBUG -+ if (dev->fw.debug_bin & BIT(3)) -+ /* use bit 7 to indicate v2 magic number */ -+ dev->fw.debug_wm |= BIT(7); -+#endif -+ - out: - if (ret) - dev->fw.debug_wm = 0; -@@ -540,7 +555,11 @@ mt7915_fw_debug_wm_get(void *data, u64 *val) - { - struct mt7915_dev *dev = data; - -- *val = dev->fw.debug_wm; -+#ifdef MTK_DEBUG -+ *val = dev->fw.debug_wm & ~BIT(7); -+#else -+ val = dev->fw.debug_wm; -+#endif - - return 0; - } -@@ -615,16 +634,30 @@ mt7915_fw_debug_bin_set(void *data, u64 val) - }; - struct mt7915_dev *dev = data; - -- if (!dev->relay_fwlog) -+ if (!dev->relay_fwlog && val) { - dev->relay_fwlog = relay_open("fwlog_data", dev->debugfs_dir, - 1500, 512, &relay_cb, NULL); -- if (!dev->relay_fwlog) -- return -ENOMEM; -+ if (!dev->relay_fwlog) -+ return -ENOMEM; -+ } - - dev->fw.debug_bin = val; - - relay_reset(dev->relay_fwlog); - -+#ifdef MTK_DEBUG -+ dev->dbg.dump_mcu_pkt = val & BIT(4) ? true : false; -+ dev->dbg.dump_txd = val & BIT(5) ? true : false; -+ dev->dbg.dump_tx_pkt = val & BIT(6) ? true : false; -+ dev->dbg.dump_rx_pkt = val & BIT(7) ? true : false; -+ dev->dbg.dump_rx_raw = val & BIT(8) ? true : false; -+#endif -+ -+ if (dev->relay_fwlog && !val) { -+ relay_close(dev->relay_fwlog); -+ dev->relay_fwlog = NULL; -+ } -+ - return mt7915_fw_debug_wm_set(dev, dev->fw.debug_wm); - } - -@@ -1254,6 +1287,11 @@ int mt7915_init_debugfs(struct mt7915_phy *phy) - if (!ext_phy) - dev->debugfs_dir = dir; - -+#ifdef MTK_DEBUG -+ debugfs_create_u16("wlan_idx", 0600, dir, &dev->wlan_idx); -+ mt7915_mtk_init_debugfs(phy, dir); -+#endif -+ - return 0; - } - -@@ -1266,6 +1304,12 @@ mt7915_debugfs_write_fwlog(struct mt7915_dev *dev, const void *hdr, int hdrlen, - void *dest; - - spin_lock_irqsave(&lock, flags); -+ -+ if (!dev->relay_fwlog) { -+ spin_unlock_irqrestore(&lock, flags); -+ return; -+ } -+ - dest = relay_reserve(dev->relay_fwlog, hdrlen + len + 4); - if (dest) { - *(u32 *)dest = hdrlen + len; -@@ -1294,17 +1338,50 @@ void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int - .msg_type = cpu_to_le16(PKT_TYPE_RX_FW_MONITOR), - }; - -- if (!dev->relay_fwlog) -- return; -+#ifdef MTK_DEBUG -+ struct { -+ __le32 magic; -+ u8 version; -+ u8 _rsv; -+ __le16 serial_id; -+ __le32 timestamp; -+ __le16 msg_type; -+ __le16 len; -+ } hdr2 = { -+ .version = 0x1, -+ .magic = cpu_to_le32(FW_BIN_LOG_MAGIC_V2), -+ .msg_type = PKT_TYPE_RX_FW_MONITOR, -+ }; -+#endif - -+#ifdef MTK_DEBUG -+ /* old magic num */ -+ if (!(dev->fw.debug_wm & BIT(7))) { -+ hdr.timestamp = mt76_rr(dev, MT_LPON_FRCR(0)); -+ hdr.len = *(__le16 *)data; -+ mt7915_debugfs_write_fwlog(dev, &hdr, sizeof(hdr), data, len); -+ } else { -+ hdr2.serial_id = dev->dbg.fwlog_seq++; -+ hdr2.timestamp = mt76_rr(dev, MT_LPON_FRCR(0)); -+ hdr2.len = *(__le16 *)data; -+ mt7915_debugfs_write_fwlog(dev, &hdr2, sizeof(hdr2), data, len); -+ } -+#else - hdr.timestamp = cpu_to_le32(mt76_rr(dev, MT_LPON_FRCR(0))); - hdr.len = *(__le16 *)data; - mt7915_debugfs_write_fwlog(dev, &hdr, sizeof(hdr), data, len); -+#endif - } - - bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len) - { -+#ifdef MTK_DEBUG -+ if (get_unaligned_le32(data) != FW_BIN_LOG_MAGIC && -+ get_unaligned_le32(data) != FW_BIN_LOG_MAGIC_V2 && -+ get_unaligned_le32(data) != PKT_BIN_DEBUG_MAGIC) -+#else - if (get_unaligned_le32(data) != FW_BIN_LOG_MAGIC) -+#endif - return false; - - if (dev->relay_fwlog) -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 4604a68..d99864f 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -282,6 +282,10 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb, - __le16 fc = 0; - int idx; - -+#ifdef MTK_DEBUG -+ if (dev->dbg.dump_rx_raw) -+ mt7915_packet_log_to_host(dev, skb->data, skb->len, PKT_BIN_DEBUG_RX_RAW, 0); -+#endif - memset(status, 0, sizeof(*status)); - - if ((rxd1 & MT_RXD1_NORMAL_BAND_IDX) && !phy->mt76->band_idx) { -@@ -466,6 +470,10 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb, - } - - hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad; -+#ifdef MTK_DEBUG -+ if (dev->dbg.dump_rx_pkt) -+ mt7915_packet_log_to_host(dev, skb->data, skb->len, PKT_BIN_DEBUG_RX, hdr_gap); -+#endif - if (hdr_trans && ieee80211_has_morefrags(fc)) { - struct ieee80211_vif *vif; - int err; -@@ -804,6 +812,12 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - tx_info->buf[1].skip_unmap = true; - tx_info->nbuf = MT_CT_DMA_BUF_NUM; - -+#ifdef MTK_DEBUG -+ if (dev->dbg.dump_txd) -+ mt7915_packet_log_to_host(dev, txwi, MT_TXD_SIZE, PKT_BIN_DEBUG_TXD, 0); -+ if (dev->dbg.dump_tx_pkt) -+ mt7915_packet_log_to_host(dev, t->skb->data, t->skb->len, PKT_BIN_DEBUG_TX, 0); -+#endif - return 0; - } - -diff --git a/mt7915/main.c b/mt7915/main.c -index e10cdb3..3ac3df3 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -73,7 +73,11 @@ int mt7915_run(struct ieee80211_hw *hw) - if (ret) - goto out; - -+#ifdef MTK_DEBUG -+ ret = mt7915_mcu_set_sku_en(phy, !dev->dbg.sku_disable); -+#else - ret = mt7915_mcu_set_sku_en(phy, true); -+#endif - if (ret) - goto out; - -@@ -254,6 +258,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, - mvif->sta.wcid.hw_key_idx = -1; - mvif->sta.wcid.tx_info |= MT_WCID_TX_INFO_SET; - mt76_wcid_init(&mvif->sta.wcid); -+ mvif->sta.vif = mvif; - - mt7915_mac_wtbl_update(dev, idx, - MT_WTBL_UPDATE_ADM_COUNT_CLEAR); -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 3e3d57c..1a3647a 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -205,6 +205,11 @@ mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, - else - qid = MT_MCUQ_WM; - -+#ifdef MTK_DEBUG -+ if (dev->dbg.dump_mcu_pkt) -+ mt7915_packet_log_to_host(dev, skb->data, skb->len, PKT_BIN_DEBUG_MCU, 0); -+#endif -+ - return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0); - } - -@@ -2385,7 +2390,10 @@ static int mt7915_red_set_watermark(struct mt7915_dev *dev) - sizeof(req), false); - } - --static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled) -+#ifndef MTK_DEBUG -+static -+#endif -+int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled) - { - #define RED_DISABLE 0 - #define RED_BY_WA_ENABLE 2 -@@ -3519,6 +3527,8 @@ int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable) - .sku_enable = enable, - }; - -+ pr_info("%s: enable = %d\n", __func__, enable); -+ - return mt76_mcu_send_msg(&dev->mt76, - MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, - sizeof(req), true); -@@ -4185,6 +4195,23 @@ out: - return ret; - } - -+#ifdef MTK_DEBUG -+int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp) -+{ -+ struct { -+ __le32 args[3]; -+ } req = { -+ .args = { -+ cpu_to_le32(a1), -+ cpu_to_le32(a2), -+ cpu_to_le32(a3), -+ }, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), wait_resp); -+} -+#endif -+ - int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set) - { - struct { -@@ -4214,6 +4241,25 @@ int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set) - return 0; - } - -+#ifdef MTK_DEBUG -+int mt7915_mcu_set_amsdu_algo(struct mt7915_dev *dev, u16 wcid, u8 enable) -+{ -+ struct { -+ u16 action; -+ u8 _rsv1[2]; -+ u16 wcid; -+ u8 enable; -+ u8 _rsv2[5]; -+ } __packed req = { -+ .action = cpu_to_le16(1), -+ .wcid = cpu_to_le16(wcid), -+ .enable = enable, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MEC_CTRL), &req, sizeof(req), true); -+} -+#endif -+ - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) - { - #define IP_DSCP_NUM 64 -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index fa0847d..9ae0f07 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -347,6 +347,10 @@ enum { - MCU_WA_PARAM_PDMA_RX = 0x04, - MCU_WA_PARAM_CPU_UTIL = 0x0b, - MCU_WA_PARAM_RED = 0x0e, -+#ifdef MTK_DEBUG -+ MCU_WA_PARAM_RED_SHOW_STA = 0xf, -+ MCU_WA_PARAM_RED_TARGET_DELAY = 0x10, -+#endif - MCU_WA_PARAM_BSS_ACQ_PKT_CNT = 0x12, - MCU_WA_PARAM_RED_SETTING = 0x40, - }; -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 66d87d7..398f851 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -9,6 +9,7 @@ - #include "../mt76_connac.h" - #include "regs.h" - -+#define MTK_DEBUG 1 - #define MT7915_MAX_INTERFACES 19 - #define MT7915_WTBL_SIZE 288 - #define MT7916_WTBL_SIZE 544 -@@ -244,6 +245,14 @@ struct mt7915_phy { - #endif - }; - -+#ifdef MTK_DEBUG -+enum { -+ ADIE0, -+ ADIE1, -+ ADIE_MAX_CNT, -+}; -+#endif -+ - struct mt7915_dev { - union { /* must be first */ - struct mt76_dev mt76; -@@ -327,6 +336,33 @@ struct mt7915_dev { - void __iomem *dcm; - void __iomem *sku; - -+#ifdef MTK_DEBUG -+ u16 wlan_idx; -+ struct { -+ u32 fixed_rate; -+ u32 l1debugfs_reg; -+ u32 l2debugfs_reg; -+ u32 mac_reg; -+ u32 fw_dbg_module; -+ u8 fw_dbg_lv; -+ u32 bcn_total_cnt[2]; -+ u16 fwlog_seq; -+ bool dump_mcu_pkt; -+ bool dump_txd; -+ bool dump_tx_pkt; -+ bool dump_rx_pkt; -+ bool dump_rx_raw; -+ u32 token_idx; -+ u8 sku_disable; -+ } dbg; -+ const struct mt7915_dbg_reg_desc *dbg_reg; -+ -+ struct { -+ u16 id; -+ u16 version; -+ } adie[ADIE_MAX_CNT]; -+#endif -+ - bool wmm_pbc_enable; - struct work_struct wmm_pbc_work; - u32 adie_type; -@@ -611,4 +647,24 @@ void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, - bool pci, int *irq); - -+#ifdef MTK_DEBUG -+int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); -+int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp); -+int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled); -+void mt7915_dump_tmac_info(u8 *tmac_info); -+int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level); -+void mt7915_packet_log_to_host(struct mt7915_dev *dev, const void *data, int len, int type, int des_len); -+int mt7915_mcu_set_amsdu_algo(struct mt7915_dev *dev, u16 wcid, u8 enable); -+ -+#define PKT_BIN_DEBUG_MAGIC 0xc8763123 -+enum { -+ PKT_BIN_DEBUG_MCU, -+ PKT_BIN_DEBUG_TXD, -+ PKT_BIN_DEBUG_TX, -+ PKT_BIN_DEBUG_RX, -+ PKT_BIN_DEBUG_RX_RAW, -+}; -+ -+#endif -+ - #endif -diff --git a/mt7915/mt7915_debug.h b/mt7915/mt7915_debug.h -new file mode 100644 -index 0000000..1ec8de9 ---- /dev/null -+++ b/mt7915/mt7915_debug.h -@@ -0,0 +1,1442 @@ -+#ifndef __MT7915_DEBUG_H -+#define __MT7915_DEBUG_H -+ -+#ifdef MTK_DEBUG -+ -+#define DBG_INVALID_BASE 0xffffffff -+#define DBG_INVALID_OFFSET 0x0 -+ -+struct __dbg_map { -+ u32 phys; -+ u32 maps; -+ u32 size; -+}; -+ -+struct __dbg_reg { -+ u32 base; -+ u32 offs; -+}; -+ -+struct __dbg_mask { -+ u32 end; -+ u32 start; -+}; -+ -+enum dbg_base_rev { -+ MT_DBG_WFDMA0_BASE, -+ MT_DBG_WFDMA1_BASE, -+ MT_DBG_WFDMA0_PCIE1_BASE, -+ MT_DBG_WFDMA1_PCIE1_BASE, -+ MT_DBG_WFDMA_EXT_CSR_BASE, -+ MT_DBG_SWDEF_BASE, -+ __MT_DBG_BASE_REV_MAX, -+}; -+ -+enum dbg_reg_rev { -+ DBG_INT_SOURCE_CSR, -+ DBG_INT_MASK_CSR, -+ DBG_INT1_SOURCE_CSR, -+ DBG_INT1_MASK_CSR, -+ DBG_TX_RING_BASE, -+ DBG_RX_EVENT_RING_BASE, -+ DBG_RX_STS_RING_BASE, -+ DBG_RX_DATA_RING_BASE, -+ DBG_DMA_ICSC_FR0, -+ DBG_DMA_ICSC_FR1, -+ DBG_TMAC_ICSCR0, -+ DBG_RMAC_RXICSRPT, -+ DBG_MIB_M0SDR0, -+ DBG_MIB_M0SDR3, -+ DBG_MIB_M0SDR4, -+ DBG_MIB_M0SDR5, -+ DBG_MIB_M0SDR7, -+ DBG_MIB_M0SDR8, -+ DBG_MIB_M0SDR9, -+ DBG_MIB_M0SDR10, -+ DBG_MIB_M0SDR11, -+ DBG_MIB_M0SDR12, -+ DBG_MIB_M0SDR14, -+ DBG_MIB_M0SDR15, -+ DBG_MIB_M0SDR16, -+ DBG_MIB_M0SDR17, -+ DBG_MIB_M0SDR18, -+ DBG_MIB_M0SDR19, -+ DBG_MIB_M0SDR20, -+ DBG_MIB_M0SDR21, -+ DBG_MIB_M0SDR22, -+ DBG_MIB_M0SDR23, -+ DBG_MIB_M0DR0, -+ DBG_MIB_M0DR1, -+ DBG_MIB_MUBF, -+ DBG_MIB_M0DR6, -+ DBG_MIB_M0DR7, -+ DBG_MIB_M0DR8, -+ DBG_MIB_M0DR9, -+ DBG_MIB_M0DR10, -+ DBG_MIB_M0DR11, -+ DBG_MIB_M0DR12, -+ DBG_WTBLON_WDUCR, -+ DBG_UWTBL_WDUCR, -+ DBG_PLE_DRR_TABLE_CTRL, -+ DBG_PLE_DRR_TABLE_RDATA, -+ DBG_PLE_PBUF_CTRL, -+ DBG_PLE_QUEUE_EMPTY, -+ DBG_PLE_FREEPG_CNT, -+ DBG_PLE_FREEPG_HEAD_TAIL, -+ DBG_PLE_PG_HIF_GROUP, -+ DBG_PLE_HIF_PG_INFO, -+ DBG_PLE_PG_HIF_TXCMD_GROUP, -+ DBG_PLE_HIF_TXCMD_PG_INFO, -+ DBG_PLE_PG_CPU_GROUP, -+ DBG_PLE_CPU_PG_INFO, -+ DBG_PLE_FL_QUE_CTRL, -+ DBG_PLE_NATIVE_TXCMD_Q_EMPTY, -+ DBG_PLE_TXCMD_Q_EMPTY, -+ DBG_PLE_AC_QEMPTY, -+ DBG_PLE_AC_OFFSET, -+ DBG_PLE_STATION_PAUSE, -+ DBG_PLE_DIS_STA_MAP, -+ DBG_PSE_PBUF_CTRL, -+ DBG_PSE_FREEPG_CNT, -+ DBG_PSE_FREEPG_HEAD_TAIL, -+ DBG_PSE_HIF0_PG_INFO, -+ DBG_PSE_PG_HIF1_GROUP, -+ DBG_PSE_HIF1_PG_INFO, -+ DBG_PSE_PG_CPU_GROUP, -+ DBG_PSE_CPU_PG_INFO, -+ DBG_PSE_PG_PLE_GROUP, -+ DBG_PSE_PLE_PG_INFO, -+ DBG_PSE_PG_LMAC0_GROUP, -+ DBG_PSE_LMAC0_PG_INFO, -+ DBG_PSE_PG_LMAC1_GROUP, -+ DBG_PSE_LMAC1_PG_INFO, -+ DBG_PSE_PG_LMAC2_GROUP, -+ DBG_PSE_LMAC2_PG_INFO, -+ DBG_PSE_PG_LMAC3_GROUP, -+ DBG_PSE_LMAC3_PG_INFO, -+ DBG_PSE_PG_MDP_GROUP, -+ DBG_PSE_MDP_PG_INFO, -+ DBG_PSE_PG_PLE1_GROUP, -+ DBG_PSE_PLE1_PG_INFO, -+ DBG_AGG_AALCR0, -+ DBG_AGG_AALCR1, -+ DBG_AGG_AALCR2, -+ DBG_AGG_AALCR3, -+ DBG_AGG_AALCR4, -+ DBG_AGG_B0BRR0, -+ DBG_AGG_B1BRR0, -+ DBG_AGG_B2BRR0, -+ DBG_AGG_B3BRR0, -+ DBG_AGG_AWSCR0, -+ DBG_AGG_PCR0, -+ DBG_AGG_TTCR0, -+ DBG_MIB_M0ARNG0, -+ DBG_MIB_M0DR2, -+ DBG_MIB_M0DR13, -+ DBG_WFDMA_WED_TX_CTRL, -+ DBG_WFDMA_WED_RX_CTRL, -+ __MT_DBG_REG_REV_MAX, -+}; -+ -+enum dbg_mask_rev { -+ DBG_MIB_M0SDR10_RX_MDRDY_COUNT, -+ DBG_MIB_M0SDR14_AMPDU, -+ DBG_MIB_M0SDR15_AMPDU_ACKED, -+ DBG_MIB_RX_FCS_ERROR_COUNT, -+ __MT_DBG_MASK_REV_MAX, -+}; -+ -+enum dbg_bit_rev { -+ __MT_DBG_BIT_REV_MAX, -+}; -+ -+static const u32 mt7915_dbg_base[] = { -+ [MT_DBG_WFDMA0_BASE] = 0xd4000, -+ [MT_DBG_WFDMA1_BASE] = 0xd5000, -+ [MT_DBG_WFDMA0_PCIE1_BASE] = 0xd8000, -+ [MT_DBG_WFDMA1_PCIE1_BASE] = 0xd9000, -+ [MT_DBG_WFDMA_EXT_CSR_BASE] = 0xd7000, -+ [MT_DBG_SWDEF_BASE] = 0x41f200, -+}; -+ -+static const u32 mt7916_dbg_base[] = { -+ [MT_DBG_WFDMA0_BASE] = 0xd4000, -+ [MT_DBG_WFDMA1_BASE] = 0xd5000, -+ [MT_DBG_WFDMA0_PCIE1_BASE] = 0xd8000, -+ [MT_DBG_WFDMA1_PCIE1_BASE] = 0xd9000, -+ [MT_DBG_WFDMA_EXT_CSR_BASE] = 0xd7000, -+ [MT_DBG_SWDEF_BASE] = 0x411400, -+}; -+ -+static const u32 mt7981_dbg_base[] = { -+ [MT_DBG_WFDMA0_BASE] = 0x24000, -+ [MT_DBG_WFDMA1_BASE] = 0x25000, -+ [MT_DBG_WFDMA0_PCIE1_BASE] = 0x28000, -+ [MT_DBG_WFDMA1_PCIE1_BASE] = 0x29000, -+ [MT_DBG_WFDMA_EXT_CSR_BASE] = 0x27000, -+ [MT_DBG_SWDEF_BASE] = 0x411400, -+}; -+ -+static const u32 mt7986_dbg_base[] = { -+ [MT_DBG_WFDMA0_BASE] = 0x24000, -+ [MT_DBG_WFDMA1_BASE] = 0x25000, -+ [MT_DBG_WFDMA0_PCIE1_BASE] = 0x28000, -+ [MT_DBG_WFDMA1_PCIE1_BASE] = 0x29000, -+ [MT_DBG_WFDMA_EXT_CSR_BASE] = 0x27000, -+ [MT_DBG_SWDEF_BASE] = 0x411400, -+}; -+ -+/* mt7915 regs with different base and offset */ -+static const struct __dbg_reg mt7915_dbg_reg[] = { -+ [DBG_WFDMA_WED_TX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x300 }, -+ [DBG_WFDMA_WED_RX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x400 }, -+ [DBG_INT_SOURCE_CSR] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x10 }, -+ [DBG_INT_MASK_CSR] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x14 }, -+ [DBG_INT1_SOURCE_CSR] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x88 }, -+ [DBG_INT1_MASK_CSR] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x8c }, -+ [DBG_TX_RING_BASE] = { MT_DBG_WFDMA1_BASE, 0x400 }, -+ [DBG_RX_EVENT_RING_BASE] = { MT_DBG_WFDMA1_BASE, 0x500 }, -+ [DBG_RX_STS_RING_BASE] = { MT_DBG_WFDMA1_BASE, 0x510 }, -+ [DBG_RX_DATA_RING_BASE] = { MT_DBG_WFDMA0_BASE, 0x500 }, -+ [DBG_DMA_ICSC_FR0] = { DBG_INVALID_BASE, 0x0f0 }, -+ [DBG_DMA_ICSC_FR1] = { DBG_INVALID_BASE, 0x0f4 }, -+ [DBG_TMAC_ICSCR0] = { DBG_INVALID_BASE, 0x200 }, -+ [DBG_RMAC_RXICSRPT] = { DBG_INVALID_BASE, 0x618}, -+ [DBG_MIB_M0SDR0] = { DBG_INVALID_BASE, 0x010}, -+ [DBG_MIB_M0SDR3] = { DBG_INVALID_BASE, 0x014}, -+ [DBG_MIB_M0SDR4] = { DBG_INVALID_BASE, 0x018}, -+ [DBG_MIB_M0SDR5] = { DBG_INVALID_BASE, 0x01c}, -+ [DBG_MIB_M0SDR7] = { DBG_INVALID_BASE, 0x024}, -+ [DBG_MIB_M0SDR8] = { DBG_INVALID_BASE, 0x028}, -+ [DBG_MIB_M0SDR9] = { DBG_INVALID_BASE, 0x02C}, -+ [DBG_MIB_M0SDR10] = { DBG_INVALID_BASE, 0x030}, -+ [DBG_MIB_M0SDR11] = { DBG_INVALID_BASE, 0x034}, -+ [DBG_MIB_M0SDR12] = { DBG_INVALID_BASE, 0x038}, -+ [DBG_MIB_M0SDR14] = { DBG_INVALID_BASE, 0x040}, -+ [DBG_MIB_M0SDR15] = { DBG_INVALID_BASE, 0x044}, -+ [DBG_MIB_M0SDR16] = { DBG_INVALID_BASE, 0x048}, -+ [DBG_MIB_M0SDR17] = { DBG_INVALID_BASE, 0x04c}, -+ [DBG_MIB_M0SDR18] = { DBG_INVALID_BASE, 0x050}, -+ [DBG_MIB_M0SDR19] = { DBG_INVALID_BASE, 0x054}, -+ [DBG_MIB_M0SDR20] = { DBG_INVALID_BASE, 0x058}, -+ [DBG_MIB_M0SDR21] = { DBG_INVALID_BASE, 0x05c}, -+ [DBG_MIB_M0SDR22] = { DBG_INVALID_BASE, 0x060}, -+ [DBG_MIB_M0SDR23] = { DBG_INVALID_BASE, 0x064}, -+ [DBG_MIB_M0DR0] = { DBG_INVALID_BASE, 0x0a0}, -+ [DBG_MIB_M0DR1] = { DBG_INVALID_BASE, 0x0a4}, -+ [DBG_MIB_MUBF] = { DBG_INVALID_BASE, 0x090}, -+ [DBG_MIB_M0DR6] = { DBG_INVALID_BASE, 0x0b8}, -+ [DBG_MIB_M0DR7] = { DBG_INVALID_BASE, 0x0bc}, -+ [DBG_MIB_M0DR8] = { DBG_INVALID_BASE, 0x0c0}, -+ [DBG_MIB_M0DR9] = { DBG_INVALID_BASE, 0x0c4}, -+ [DBG_MIB_M0DR10] = { DBG_INVALID_BASE, 0x0c8}, -+ [DBG_MIB_M0DR11] = { DBG_INVALID_BASE, 0x0cc}, -+ [DBG_MIB_M0DR12] = { DBG_INVALID_BASE, 0x160}, -+ [DBG_WTBLON_WDUCR] = { DBG_INVALID_BASE, 0x0}, -+ [DBG_UWTBL_WDUCR] = { DBG_INVALID_BASE, 0x0}, -+ [DBG_PLE_DRR_TABLE_CTRL] = { DBG_INVALID_BASE, 0x388}, -+ [DBG_PLE_DRR_TABLE_RDATA] = { DBG_INVALID_BASE, 0x350}, -+ [DBG_PLE_PBUF_CTRL] = { DBG_INVALID_BASE, 0x014}, -+ [DBG_PLE_QUEUE_EMPTY] = { DBG_INVALID_BASE, 0x0b0}, -+ [DBG_PLE_FREEPG_CNT] = { DBG_INVALID_BASE, 0x100}, -+ [DBG_PLE_FREEPG_HEAD_TAIL] = { DBG_INVALID_BASE, 0x104}, -+ [DBG_PLE_PG_HIF_GROUP] = { DBG_INVALID_BASE, 0x110}, -+ [DBG_PLE_HIF_PG_INFO] = { DBG_INVALID_BASE, 0x114}, -+ [DBG_PLE_PG_HIF_TXCMD_GROUP] = { DBG_INVALID_BASE, 0x120}, -+ [DBG_PLE_HIF_TXCMD_PG_INFO] = { DBG_INVALID_BASE, 0x124}, -+ [DBG_PLE_PG_CPU_GROUP] = { DBG_INVALID_BASE, 0x150}, -+ [DBG_PLE_CPU_PG_INFO] = { DBG_INVALID_BASE, 0x154}, -+ [DBG_PLE_FL_QUE_CTRL] = { DBG_INVALID_BASE, 0x1b0}, -+ [DBG_PLE_NATIVE_TXCMD_Q_EMPTY] = { DBG_INVALID_BASE, 0x22c}, -+ [DBG_PLE_TXCMD_Q_EMPTY] = { DBG_INVALID_BASE, 0x230}, -+ [DBG_PLE_AC_QEMPTY] = { DBG_INVALID_BASE, 0x500}, -+ [DBG_PLE_AC_OFFSET] = { DBG_INVALID_BASE, 0x040}, -+ [DBG_PLE_STATION_PAUSE] = { DBG_INVALID_BASE, 0x400}, -+ [DBG_PLE_DIS_STA_MAP] = { DBG_INVALID_BASE, 0x440}, -+ [DBG_PSE_PBUF_CTRL] = { DBG_INVALID_BASE, 0x014}, -+ [DBG_PSE_FREEPG_CNT] = { DBG_INVALID_BASE, 0x100}, -+ [DBG_PSE_FREEPG_HEAD_TAIL] = { DBG_INVALID_BASE, 0x104}, -+ [DBG_PSE_HIF0_PG_INFO] = { DBG_INVALID_BASE, 0x114}, -+ [DBG_PSE_PG_HIF1_GROUP] = { DBG_INVALID_BASE, 0x118}, -+ [DBG_PSE_HIF1_PG_INFO] = { DBG_INVALID_BASE, 0x11c}, -+ [DBG_PSE_PG_CPU_GROUP] = { DBG_INVALID_BASE, 0x150}, -+ [DBG_PSE_CPU_PG_INFO] = { DBG_INVALID_BASE, 0x154}, -+ [DBG_PSE_PG_PLE_GROUP] = { DBG_INVALID_BASE, 0x160}, -+ [DBG_PSE_PLE_PG_INFO] = { DBG_INVALID_BASE, 0x164}, -+ [DBG_PSE_PG_LMAC0_GROUP] = { DBG_INVALID_BASE, 0x170}, -+ [DBG_PSE_LMAC0_PG_INFO] = { DBG_INVALID_BASE, 0x174}, -+ [DBG_PSE_PG_LMAC1_GROUP] = { DBG_INVALID_BASE, 0x178}, -+ [DBG_PSE_LMAC1_PG_INFO] = { DBG_INVALID_BASE, 0x17c}, -+ [DBG_PSE_PG_LMAC2_GROUP] = { DBG_INVALID_BASE, 0x180}, -+ [DBG_PSE_LMAC2_PG_INFO] = { DBG_INVALID_BASE, 0x184}, -+ [DBG_PSE_PG_LMAC3_GROUP] = { DBG_INVALID_BASE, 0x188}, -+ [DBG_PSE_LMAC3_PG_INFO] = { DBG_INVALID_BASE, 0x18c}, -+ [DBG_PSE_PG_MDP_GROUP] = { DBG_INVALID_BASE, 0x198}, -+ [DBG_PSE_MDP_PG_INFO] = { DBG_INVALID_BASE, 0x19c}, -+ [DBG_PSE_PG_PLE1_GROUP] = { DBG_INVALID_BASE, 0x168}, -+ [DBG_PSE_PLE1_PG_INFO] = { DBG_INVALID_BASE, 0x16c}, -+ [DBG_AGG_AALCR0] = { DBG_INVALID_BASE, 0x048}, -+ [DBG_AGG_AALCR1] = { DBG_INVALID_BASE, 0x04c}, -+ [DBG_AGG_AALCR2] = { DBG_INVALID_BASE, 0x050}, -+ [DBG_AGG_AALCR3] = { DBG_INVALID_BASE, 0x054}, -+ [DBG_AGG_AALCR4] = { DBG_INVALID_BASE, 0x058}, -+ [DBG_AGG_B0BRR0] = { DBG_INVALID_BASE, 0x100}, -+ [DBG_AGG_B1BRR0] = { DBG_INVALID_BASE, 0x104}, -+ [DBG_AGG_B2BRR0] = { DBG_INVALID_BASE, 0x108}, -+ [DBG_AGG_B3BRR0] = { DBG_INVALID_BASE, 0x10c}, -+ [DBG_AGG_AWSCR0] = { DBG_INVALID_BASE, 0x030}, -+ [DBG_AGG_PCR0] = { DBG_INVALID_BASE, 0x040}, -+ [DBG_AGG_TTCR0] = { DBG_INVALID_BASE, 0x04c}, -+ [DBG_MIB_M0ARNG0] = { DBG_INVALID_BASE, 0x4b8}, -+ [DBG_MIB_M0DR2] = { DBG_INVALID_BASE, 0x0a8}, -+ [DBG_MIB_M0DR13] = { DBG_INVALID_BASE, 0x164}, -+}; -+ -+/* mt7986/mt7916 regs with different base and offset */ -+static const struct __dbg_reg mt7916_dbg_reg[] = { -+ [DBG_WFDMA_WED_TX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x300 }, -+ [DBG_WFDMA_WED_RX_CTRL] = { MT_DBG_WFDMA_EXT_CSR_BASE, 0x400 }, -+ [DBG_INT_SOURCE_CSR] = { MT_DBG_WFDMA0_BASE, 0x200 }, -+ [DBG_INT_MASK_CSR] = { MT_DBG_WFDMA0_BASE, 0x204 }, -+ [DBG_INT1_SOURCE_CSR] = { MT_DBG_WFDMA0_PCIE1_BASE, 0x200 }, -+ [DBG_INT1_MASK_CSR] = { MT_DBG_WFDMA0_PCIE1_BASE, 0x204 }, -+ [DBG_TX_RING_BASE] = { MT_DBG_WFDMA0_BASE, 0x400 }, -+ [DBG_RX_EVENT_RING_BASE] = { MT_DBG_WFDMA0_BASE, 0x500 }, -+ [DBG_RX_STS_RING_BASE] = { MT_DBG_WFDMA0_BASE, 0x520 }, -+ [DBG_RX_DATA_RING_BASE] = { MT_DBG_WFDMA0_BASE, 0x540 }, -+ [DBG_DMA_ICSC_FR0] = { DBG_INVALID_BASE, 0x05c }, -+ [DBG_DMA_ICSC_FR1] = { DBG_INVALID_BASE, 0x060 }, -+ [DBG_TMAC_ICSCR0] = { DBG_INVALID_BASE, 0x120 }, -+ [DBG_RMAC_RXICSRPT] = { DBG_INVALID_BASE, 0xd0 }, -+ [DBG_MIB_M0SDR0] = { DBG_INVALID_BASE, 0x7d8}, -+ [DBG_MIB_M0SDR3] = { DBG_INVALID_BASE, 0x698}, -+ [DBG_MIB_M0SDR4] = { DBG_INVALID_BASE, 0x788}, -+ [DBG_MIB_M0SDR5] = { DBG_INVALID_BASE, 0x780}, -+ [DBG_MIB_M0SDR7] = { DBG_INVALID_BASE, 0x5a8}, -+ [DBG_MIB_M0SDR8] = { DBG_INVALID_BASE, 0x78c}, -+ [DBG_MIB_M0SDR9] = { DBG_INVALID_BASE, 0x024}, -+ [DBG_MIB_M0SDR10] = { DBG_INVALID_BASE, 0x76c}, -+ [DBG_MIB_M0SDR11] = { DBG_INVALID_BASE, 0x790}, -+ [DBG_MIB_M0SDR12] = { DBG_INVALID_BASE, 0x558}, -+ [DBG_MIB_M0SDR14] = { DBG_INVALID_BASE, 0x564}, -+ [DBG_MIB_M0SDR15] = { DBG_INVALID_BASE, 0x564}, -+ [DBG_MIB_M0SDR16] = { DBG_INVALID_BASE, 0x7fc}, -+ [DBG_MIB_M0SDR17] = { DBG_INVALID_BASE, 0x800}, -+ [DBG_MIB_M0SDR18] = { DBG_INVALID_BASE, 0x030}, -+ [DBG_MIB_M0SDR19] = { DBG_INVALID_BASE, 0x5ac}, -+ [DBG_MIB_M0SDR20] = { DBG_INVALID_BASE, 0x5b0}, -+ [DBG_MIB_M0SDR21] = { DBG_INVALID_BASE, 0x5b4}, -+ [DBG_MIB_M0SDR22] = { DBG_INVALID_BASE, 0x770}, -+ [DBG_MIB_M0SDR23] = { DBG_INVALID_BASE, 0x774}, -+ [DBG_MIB_M0DR0] = { DBG_INVALID_BASE, 0x594}, -+ [DBG_MIB_M0DR1] = { DBG_INVALID_BASE, 0x598}, -+ [DBG_MIB_MUBF] = { DBG_INVALID_BASE, 0x7ac}, -+ [DBG_MIB_M0DR6] = { DBG_INVALID_BASE, 0x658}, -+ [DBG_MIB_M0DR7] = { DBG_INVALID_BASE, 0x65c}, -+ [DBG_MIB_M0DR8] = { DBG_INVALID_BASE, 0x56c}, -+ [DBG_MIB_M0DR9] = { DBG_INVALID_BASE, 0x570}, -+ [DBG_MIB_M0DR10] = { DBG_INVALID_BASE, 0x578}, -+ [DBG_MIB_M0DR11] = { DBG_INVALID_BASE, 0x574}, -+ [DBG_MIB_M0DR12] = { DBG_INVALID_BASE, 0x654}, -+ [DBG_WTBLON_WDUCR] = { DBG_INVALID_BASE, 0x200}, -+ [DBG_UWTBL_WDUCR] = { DBG_INVALID_BASE, 0x094}, -+ [DBG_PLE_DRR_TABLE_CTRL] = { DBG_INVALID_BASE, 0x490}, -+ [DBG_PLE_DRR_TABLE_RDATA] = { DBG_INVALID_BASE, 0x470}, -+ [DBG_PLE_PBUF_CTRL] = { DBG_INVALID_BASE, 0x004}, -+ [DBG_PLE_QUEUE_EMPTY] = { DBG_INVALID_BASE, 0x360}, -+ [DBG_PLE_FREEPG_CNT] = { DBG_INVALID_BASE, 0x380}, -+ [DBG_PLE_FREEPG_HEAD_TAIL] = { DBG_INVALID_BASE, 0x384}, -+ [DBG_PLE_PG_HIF_GROUP] = { DBG_INVALID_BASE, 0x00c}, -+ [DBG_PLE_HIF_PG_INFO] = { DBG_INVALID_BASE, 0x388}, -+ [DBG_PLE_PG_HIF_TXCMD_GROUP] = { DBG_INVALID_BASE, 0x014}, -+ [DBG_PLE_HIF_TXCMD_PG_INFO] = { DBG_INVALID_BASE, 0x390}, -+ [DBG_PLE_PG_CPU_GROUP] = { DBG_INVALID_BASE, 0x018}, -+ [DBG_PLE_CPU_PG_INFO] = { DBG_INVALID_BASE, 0x394}, -+ [DBG_PLE_FL_QUE_CTRL] = { DBG_INVALID_BASE, 0x3e0}, -+ [DBG_PLE_NATIVE_TXCMD_Q_EMPTY] = { DBG_INVALID_BASE, 0x370}, -+ [DBG_PLE_TXCMD_Q_EMPTY] = { DBG_INVALID_BASE, 0x36c}, -+ [DBG_PLE_AC_QEMPTY] = { DBG_INVALID_BASE, 0x600}, -+ [DBG_PLE_AC_OFFSET] = { DBG_INVALID_BASE, 0x080}, -+ [DBG_PLE_STATION_PAUSE] = { DBG_INVALID_BASE, 0x100}, -+ [DBG_PLE_DIS_STA_MAP] = { DBG_INVALID_BASE, 0x180}, -+ [DBG_PSE_PBUF_CTRL] = { DBG_INVALID_BASE, 0x004}, -+ [DBG_PSE_FREEPG_CNT] = { DBG_INVALID_BASE, 0x380}, -+ [DBG_PSE_FREEPG_HEAD_TAIL] = { DBG_INVALID_BASE, 0x384}, -+ [DBG_PSE_HIF0_PG_INFO] = { DBG_INVALID_BASE, 0x150}, -+ [DBG_PSE_PG_HIF1_GROUP] = { DBG_INVALID_BASE, 0x154}, -+ [DBG_PSE_HIF1_PG_INFO] = { DBG_INVALID_BASE, 0x160}, -+ [DBG_PSE_PG_CPU_GROUP] = { DBG_INVALID_BASE, 0x118}, -+ [DBG_PSE_CPU_PG_INFO] = { DBG_INVALID_BASE, 0x158}, -+ [DBG_PSE_PG_PLE_GROUP] = { DBG_INVALID_BASE, 0x11c}, -+ [DBG_PSE_PLE_PG_INFO] = { DBG_INVALID_BASE, 0x15c}, -+ [DBG_PSE_PG_LMAC0_GROUP] = { DBG_INVALID_BASE, 0x124}, -+ [DBG_PSE_LMAC0_PG_INFO] = { DBG_INVALID_BASE, 0x164}, -+ [DBG_PSE_PG_LMAC1_GROUP] = { DBG_INVALID_BASE, 0x128}, -+ [DBG_PSE_LMAC1_PG_INFO] = { DBG_INVALID_BASE, 0x168}, -+ [DBG_PSE_PG_LMAC2_GROUP] = { DBG_INVALID_BASE, 0x12c}, -+ [DBG_PSE_LMAC2_PG_INFO] = { DBG_INVALID_BASE, 0x16c}, -+ [DBG_PSE_PG_LMAC3_GROUP] = { DBG_INVALID_BASE, 0x130}, -+ [DBG_PSE_LMAC3_PG_INFO] = { DBG_INVALID_BASE, 0x17c}, -+ [DBG_PSE_PG_MDP_GROUP] = { DBG_INVALID_BASE, 0x134}, -+ [DBG_PSE_MDP_PG_INFO] = { DBG_INVALID_BASE, 0x174}, -+ [DBG_PSE_PG_PLE1_GROUP] = { DBG_INVALID_BASE, 0x120}, -+ [DBG_PSE_PLE1_PG_INFO] = { DBG_INVALID_BASE, 0x160}, -+ [DBG_AGG_AALCR0] = { DBG_INVALID_BASE, 0x028}, -+ [DBG_AGG_AALCR1] = { DBG_INVALID_BASE, 0x144}, -+ [DBG_AGG_AALCR2] = { DBG_INVALID_BASE, 0x14c}, -+ [DBG_AGG_AALCR3] = { DBG_INVALID_BASE, 0x154}, -+ [DBG_AGG_AALCR4] = { DBG_INVALID_BASE, 0x02c}, -+ [DBG_AGG_B0BRR0] = { DBG_INVALID_BASE, 0x08c}, -+ [DBG_AGG_B1BRR0] = { DBG_INVALID_BASE, 0x148}, -+ [DBG_AGG_B2BRR0] = { DBG_INVALID_BASE, 0x150}, -+ [DBG_AGG_B3BRR0] = { DBG_INVALID_BASE, 0x158}, -+ [DBG_AGG_AWSCR0] = { DBG_INVALID_BASE, 0x05c}, -+ [DBG_AGG_PCR0] = { DBG_INVALID_BASE, 0x06c}, -+ [DBG_AGG_TTCR0] = { DBG_INVALID_BASE, 0x07c}, -+ [DBG_MIB_M0ARNG0] = { DBG_INVALID_BASE, 0x0b0}, -+ [DBG_MIB_M0DR2] = { DBG_INVALID_BASE, 0x7dc}, -+ [DBG_MIB_M0DR13] = { DBG_INVALID_BASE, 0x7ec}, -+}; -+ -+static const struct __dbg_mask mt7915_dbg_mask[] = { -+ [DBG_MIB_M0SDR10_RX_MDRDY_COUNT]= {25, 0}, -+ [DBG_MIB_M0SDR14_AMPDU] = {23, 0}, -+ [DBG_MIB_M0SDR15_AMPDU_ACKED] = {23, 0}, -+ [DBG_MIB_RX_FCS_ERROR_COUNT] = {15, 0}, -+}; -+ -+static const struct __dbg_mask mt7916_dbg_mask[] = { -+ [DBG_MIB_M0SDR10_RX_MDRDY_COUNT]= {31, 0}, -+ [DBG_MIB_M0SDR14_AMPDU] = {31, 0}, -+ [DBG_MIB_M0SDR15_AMPDU_ACKED] = {31, 0}, -+ [DBG_MIB_RX_FCS_ERROR_COUNT] = {31, 16}, -+}; -+ -+/* used to differentiate between generations */ -+struct mt7915_dbg_reg_desc { -+ const u32 id; -+ const u32 *base_rev; -+ const struct __dbg_reg *reg_rev; -+ const struct __dbg_mask *mask_rev; -+}; -+ -+static const struct mt7915_dbg_reg_desc dbg_reg_s[] = { -+ { 0x7915, -+ mt7915_dbg_base, -+ mt7915_dbg_reg, -+ mt7915_dbg_mask -+ }, -+ { 0x7906, -+ mt7916_dbg_base, -+ mt7916_dbg_reg, -+ mt7916_dbg_mask -+ }, -+ { 0x7981, -+ mt7981_dbg_base, -+ mt7916_dbg_reg, -+ mt7916_dbg_mask -+ }, -+ { 0x7986, -+ mt7986_dbg_base, -+ mt7916_dbg_reg, -+ mt7916_dbg_mask -+ }, -+}; -+ -+struct bin_debug_hdr { -+ __le32 magic_num; -+ __le16 serial_id; -+ __le16 msg_type; -+ __le16 len; -+ __le16 des_len; /* descriptor len for rxd */ -+} __packed; -+ -+/* fw wm info related strcture */ -+struct cos_msg_trace_t { -+ u32 dest_id; -+ u8 msg_id; -+ u32 pcount; -+ u32 qread; -+ u32 ts_enq; -+ u32 ts_deq; -+ u32 ts_finshq; -+}; -+ -+struct cos_task_info_struct { -+ u32 task_name_ptr; -+ u32 task_qname_ptr; -+ u32 task_priority; -+ u16 task_stack_size; -+ u8 task_ext_qsize; -+ u32 task_id; -+ u32 task_ext_qid; -+ u32 task_main_func; -+ u32 task_init_func; -+}; -+ -+struct cos_program_trace_t{ -+ u32 _dest_id; -+ u32 _msg_id; -+ u32 _msg_sn; -+ u32 _ts_gpt2; -+ u32 _LP; -+ char _name[12]; -+} ; -+ -+struct mt7915_cos_program_trace_t{ -+ u32 _dest_id; -+ u32 _msg_id; -+ u32 _msg_sn; -+ u32 _ts_gpt2; -+ u32 _ts_gpt4; -+ u32 _LP; -+ char _name[12]; -+} ; -+ -+struct cos_msg_type { -+ u32 finish_cnt; -+ u32 exe_time; -+ u32 exe_peak; -+}; -+ -+struct cos_task_type{ -+ u32 tc_stack_start; -+ u32 tc_stack_end; -+ u32 tc_stack_pointer; -+ u32 tc_stack_size; -+ u32 tc_schedule_count; -+ u8 tc_status; -+ u8 tc_priority; -+ u8 tc_weight; -+ u8 RSVD[28]; -+ u32 tc_entry_func; -+ u32 tc_exe_start; -+ u32 tc_exe_time; -+ u32 tc_exe_peak; -+ u32 tc_pcount; -+}; -+ -+#define __DBG_REG_MAP(_dev, id, ofs) ((_dev)->dbg_reg->base_rev[(id)] + (ofs)) -+#define __DBG_REG_BASE(_dev, id) ((_dev)->dbg_reg->reg_rev[(id)].base) -+#define __DBG_REG_OFFS(_dev, id) ((_dev)->dbg_reg->reg_rev[(id)].offs) -+ -+#define __DBG_MASK(_dev, id) GENMASK((_dev)->dbg_reg->mask_rev[(id)].end, \ -+ (_dev)->dbg_reg->mask_rev[(id)].start) -+#define __DBG_REG(_dev, id) __DBG_REG_MAP((_dev), __DBG_REG_BASE((_dev), (id)), \ -+ __DBG_REG_OFFS((_dev), (id))) -+ -+#define __DBG_FIELD_GET(id, _reg) (((_reg) & __DBG_MASK(dev, (id))) >> \ -+ dev->dbg_reg->mask_rev[(id)].start) -+#define __DBG_FIELD_PREP(id, _reg) (((_reg) << dev->dbg_reg->mask_rev[(id)].start) & \ -+ __DBG_MASK(dev, (id))) -+ -+ -+#define MT_DBG_TX_RING_BASE __DBG_REG(dev, DBG_TX_RING_BASE) -+#define MT_DBG_RX_EVENT_RING_BASE __DBG_REG(dev, DBG_RX_EVENT_RING_BASE) -+#define MT_DBG_RX_STS_RING_BASE __DBG_REG(dev, DBG_RX_STS_RING_BASE) -+#define MT_DBG_RX_DATA_RING_BASE __DBG_REG(dev, DBG_RX_DATA_RING_BASE) -+#define MT_DBG_WFDMA_WED_TX_CTRL_BASE __DBG_REG(dev, DBG_WFDMA_WED_TX_CTRL) -+#define MT_DBG_WFDMA_WED_RX_CTRL_BASE __DBG_REG(dev, DBG_WFDMA_WED_RX_CTRL) -+ -+#define MT_DBG_TX_RING_CTRL(n) (MT_DBG_TX_RING_BASE + (0x10 * (n))) -+#define MT_DBG_RX_DATA_RING_CTRL(n) (MT_DBG_RX_DATA_RING_BASE + (0x10 * (n))) -+#define MT_DBG_RX_EVENT_RING_CTRL(n) (MT_DBG_RX_EVENT_RING_BASE + (0x10 * (n))) -+ -+#define MT_DBG_WFDMA_WED_TX_CTRL(n) (MT_DBG_WFDMA_WED_TX_CTRL_BASE + (0x10 * (n))) -+#define MT_DBG_WFDMA_WED_RX_CTRL(n) (MT_DBG_WFDMA_WED_RX_CTRL_BASE + (0x10 * (n))) -+/* WFDMA COMMON */ -+#define MT_DBG_INT_SOURCE_CSR __DBG_REG(dev, DBG_INT_SOURCE_CSR) -+#define MT_DBG_INT_MASK_CSR __DBG_REG(dev, DBG_INT_MASK_CSR) -+#define MT_DBG_INT1_SOURCE_CSR __DBG_REG(dev, DBG_INT1_SOURCE_CSR) -+#define MT_DBG_INT1_MASK_CSR __DBG_REG(dev, DBG_INT1_MASK_CSR) -+ -+/* WFDMA0 */ -+#define MT_DBG_WFDMA0(_ofs) __DBG_REG_MAP(dev, MT_DBG_WFDMA0_BASE, (_ofs)) -+ -+#define MT_DBG_WFDMA0_INT_SOURCE_CSR MT_DBG_WFDMA0(0x200) -+#define MT_DBG_WFDMA0_INT_MASK_CSR MT_DBG_WFDMA0(0x204) -+ -+#define MT_DBG_WFDMA0_GLO_CFG MT_DBG_WFDMA0(0x208) -+#define MT_DBG_WFDMA0_GLO_CFG_TX_DMA_EN BIT(0) -+#define MT_DBG_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2) -+#define MT_DBG_WFDMA0_GLO_CFG_TX_BUSY_MASK BIT(1) -+#define MT_DBG_WFDMA0_GLO_CFG_RX_BUSY_MASK BIT(3) -+ -+ -+/* WFDMA1 */ -+#define MT_DBG_WFDMA1(_ofs) __DBG_REG_MAP(dev, MT_DBG_WFDMA1_BASE, (_ofs)) -+#define MT_DBG_WFDMA1_INT_SOURCE_CSR MT_DBG_WFDMA1(0x200) -+#define MT_DBG_WFDMA1_INT_MASK_CSR MT_DBG_WFDMA1(0x204) -+ -+#define MT_DBG_WFDMA1_GLO_CFG MT_DBG_WFDMA1(0x208) -+ -+#define MT_DBG_WFDMA1_GLO_CFG_TX_DMA_EN BIT(0) -+#define MT_DBG_WFDMA1_GLO_CFG_RX_DMA_EN BIT(2) -+#define MT_DBG_WFDMA1_GLO_CFG_TX_BUSY_MASK BIT(1) -+#define MT_DBG_WFDMA1_GLO_CFG_RX_BUSY_MASK BIT(3) -+ -+/* WFDMA0 PCIE1 */ -+#define MT_DBG_WFDMA0_PCIE1(_ofs) __DBG_REG_MAP(dev, MT_DBG_WFDMA0_PCIE1_BASE, (_ofs)) -+ -+#define MT_DBG_WFDMA0_PCIE1_INT_SOURCE_CSR MT_DBG_WFDMA0_PCIE1(0x200) -+#define MT_DBG_WFDMA0_PCIE1_INT_MASK_CSR MT_DBG_WFDMA0_PCIE1(0x204) -+#define MT_DBG_WFDMA0_PCIE1_GLO_CFG MT_DBG_WFDMA0_PCIE1(0x208) -+#define MT_DBG_WFDMA0_PCIE1_RX1_CTRL0 MT_DBG_WFDMA1_PCIE1(0x510) -+ -+#define MT_DBG_WFDMA0_PCIE1_GLO_CFG_TX_DMA_EN BIT(0) -+#define MT_DBG_WFDMA0_PCIE1_GLO_CFG_TX_BUSY_MASK BIT(1) -+#define MT_DBG_WFDMA0_PCIE1_GLO_CFG_RX_DMA_EN BIT(2) -+#define MT_DBG_WFDMA0_PCIE1_GLO_CFG_RX_BUSY_MASK BIT(3) -+ -+/* WFDMA1 PCIE1 */ -+#define MT_DBG_WFDMA1_PCIE1(_ofs) __DBG_REG_MAP(dev, MT_DBG_WFDMA1_PCIE1_BASE, (_ofs)) -+#define MT_DBG_WFDMA1_PCIE1_INT_SOURCE_CSR MT_DBG_WFDMA1_PCIE1(0x200) -+#define MT_DBG_WFDMA1_PCIE1_INT_MASK_CSR MT_DBG_WFDMA1_PCIE1(0x204) -+#define MT_DBG_WFDMA1_PCIE1_GLO_CFG MT_DBG_WFDMA1_PCIE1(0x208) -+#define MT_DBG_WFDMA1_PCIE1_TX19_CTRL0 MT_DBG_WFDMA1_PCIE1(0x330) -+#define MT_DBG_WFDMA1_PCIE1_RX2_CTRL0 MT_DBG_WFDMA1_PCIE1(0x520) -+ -+#define MT_DBG_WFDMA1_PCIE1_GLO_CFG_TX_DMA_EN BIT(0) -+#define MT_DBG_WFDMA1_PCIE1_GLO_CFG_TX_BUSY_MASK BIT(1) -+#define MT_DBG_WFDMA1_PCIE1_GLO_CFG_RX_DMA_EN BIT(2) -+#define MT_DBG_WFDMA1_PCIE1_GLO_CFG_RX_BUSY_MASK BIT(3) -+ -+#define MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_RX_DMA_EN_MASK BIT(2) -+#define MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_TX_DMA_EN_MASK BIT(0) -+#define MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_RX_DMA_BUSY_MASK BIT(3) -+#define MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_TX_DMA_BUSY_MASK BIT(1) -+ -+ -+/* WF DMA TOP: band 0(0x820E7000),band 1(0x820F7000) */ -+#define MT_DBG_WF_DMA_BASE(_band) ((_band) ? 0x820F7000 : 0x820E7000) -+#define MT_DBG_WF_DMA(_band, ofs) (MT_WF_DMA_BASE(_band) + (ofs)) -+ -+#define MT_DBG_DMA_DCR0(_band) MT_DBG_WF_DMA((_band), 0x000) -+#define MT_DBG_DMA_DCR0_MAX_RX_LEN GENMASK(15, 3) -+#define MT_DBG_DMA_DCR0_RXD_G5_EN BIT(23) -+ -+#define MT_DBG_DMA_ICSC_FR0(_band) MT_DBG_WF_DMA((_band), __DBG_REG_OFFS(dev, DBG_DMA_ICSC_FR0)) -+#define MT_DBG_DMA_ICSC_FR0_RXBF_EN BIT(25) -+#define MT_DBG_DMA_ICSC_FR0_EN BIT(24) -+#define MT_DBG_DMA_ICSC_FR0_TOUT_MASK GENMASK(23, 16) -+#define MT_DBG_DMA_ICSC_FR0_PID_MASK GENMASK(9, 8) -+#define MT_DBG_DMA_ICSC_FR0_QID_MASK GENMASK(6, 0) -+ -+#define MT_DBG_DMA_ICSC_FR1(_band) MT_DBG_WF_DMA((_band), __DBG_REG_OFFS(dev, DBG_DMA_ICSC_FR1)) -+#define MT_DBG_DMA_ICSC_FR1_AGG_SIZE_MASK GENMASK(26, 16) -+#define MT_DBG_DMA_ICSC_FR1_MAX_FRAME_SIZE_MASK GENMASK(10, 0) -+ -+/* TMAC: band 0(0x820e4000), band 1(0x820f4000) */ -+#define MT_DBG_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000) -+#define MT_DBG_WF_TMAC(_band, ofs) (MT_DBG_WF_TMAC_BASE(_band) + (ofs)) -+ -+#define MT_DBG_TMAC_ICSCR0(_band) MT_DBG_WF_TMAC((_band), __DBG_REG_OFFS(dev, DBG_TMAC_ICSCR0)) -+#define MT_DBG_TMAC_ICSCR0_ICSRPT_EN BIT(0) -+ -+/* RMAC: band 0(0x820E5000), band 1(0x820f5000) */ -+#define MT_DBG_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820E5000) -+#define MT_DBG_WF_RMAC(_band, ofs) (MT_DBG_WF_RMAC_BASE(_band) + (ofs)) -+ -+#define MT_DBG_RMAC_RXICSRPT(_band) MT_DBG_WF_RMAC((_band), __DBG_REG_OFFS(dev, DBG_RMAC_RXICSRPT)) -+#define MT_DBG_RMAC_RXICSRPT_ICSRPT_EN BIT(0) -+ -+/* MIB: band 0(0x820ed000), band 1(0x820fd000) */ -+#define MT_DBG_MIB_BASE(_band) ((_band) ? 0x820fd000 : 0x820ed000) -+#define MT_DBG_MIB(_band, ofs) (MT_DBG_MIB_BASE(_band) + (ofs)) -+ -+ -+#define MT_DBG_MIB_M0SCR0(_band) MT_DBG_MIB((_band), 0x00) -+#define MT_DBG_MIB_M0PBSCR(_band) MT_DBG_MIB((_band), 0x04) -+ -+#define MT_DBG_MIB_M0SDR0(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR0)) -+#define MT_DBG_MIB_M0SDR3(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR3)) -+#define MT_DBG_MIB_RX_FCS_ERROR_COUNT_MASK __DBG_MASK(dev, DBG_MIB_RX_FCS_ERROR_COUNT) -+#define MT_DBG_MIB_M0SDR4(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR4)) -+#define MT_DBG_MIB_M0SDR5(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR5)) -+#define MT_DBG_MIB_M0SDR6(_band) MT_DBG_MIB((_band), 0x20) -+#define MT_DBG_MIB_M0SDR7(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR7)) -+#define MT_DBG_MIB_M0SDR8(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR8)) -+#define MT_DBG_MIB_M0SDR9(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR9)) -+#define MT_DBG_MIB_M0SDR10(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR10)) -+#define MT_DBG_MIB_M0SDR10_RX_MDRDY_COUNT_MASK __DBG_MASK(dev, DBG_MIB_M0SDR10_RX_MDRDY_COUNT) -+#define MT_DBG_MIB_M0SDR11(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR11)) -+ -+#define MT_DBG_MIB_M0SDR12(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR12)) -+ -+#define MT_DBG_MIB_M0SDR14(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR14)) -+#define MT_DBG_MIB_M0SDR14_AMPDU_MASK __DBG_MASK(dev, DBG_MIB_M0SDR14_AMPDU) -+#define MT_DBG_MIB_M0SDR15(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR15)) -+#define MT_DBG_MIB_M0SDR15_AMPDU_ACKED_MASK __DBG_MASK(dev, DBG_MIB_M0SDR15_AMPDU_ACKED) -+#define MT_DBG_MIB_M0SDR16(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR16)) -+#define MT_DBG_MIB_M0SDR17(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR17)) -+#define MT_DBG_MIB_M0SDR18(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR18)) -+#define MT_DBG_MIB_M0SDR19(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR19)) -+#define MT_DBG_MIB_M0SDR20(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR20)) -+#define MT_DBG_MIB_M0SDR21(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR21)) -+#define MT_DBG_MIB_M0SDR22(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR22)) -+#define MT_DBG_MIB_M0SDR23(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0SDR23)) -+#define MT_DBG_MIB_M0DR0(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR0)) -+#define MT_DBG_MIB_M0DR1(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR1)) -+ -+#define MT_DBG_MIB_MUBF(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_MUBF)) -+#define MT_DBG_MIB_M0DR6(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR6)) -+#define MT_DBG_MIB_M0DR7(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR7)) -+#define MT_DBG_MIB_M0DR8(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR8)) -+#define MT_DBG_MIB_M0DR9(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR9)) -+#define MT_DBG_MIB_M0DR10(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR10)) -+#define MT_DBG_MIB_M0DR11(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR11)) -+ #define MT_DBG_MIB_M0DR12(_band) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR12)) -+ -+/* WTBLON TOP: 0x820D4000/pcie(0x34000) rbus(0x434000) */ -+#define MT_DBG_WTBLON_TOP_BASE 0x820D4000 -+#define MT_DBG_WTBLON_TOP(ofs) (MT_WTBLON_TOP_BASE + (ofs)) -+#define MT_DBG_WTBLON_TOP_WDUCR MT_DBG_WTBLON_TOP(__DBG_REG_OFFS(dev, DBG_WTBLON_WDUCR)) -+#define MT_DBG_WTBLON_TOP_WDUCR_GROUP GENMASK(2, 0) -+ -+#define WF_WTBLON_TOP_B0BTCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1000) // 5000 -+#define WF_WTBLON_TOP_B0BTBCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1010) // 5010 -+#define WF_WTBLON_TOP_B0BRCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1020) // 5020 -+#define WF_WTBLON_TOP_B0BRBCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1030) // 5030 -+#define WF_WTBLON_TOP_B0BTDCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1040) // 5040 -+#define WF_WTBLON_TOP_B0BRDCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1050) // 5050 -+#define WF_WTBLON_TOP_B0MBTCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1100) // 5100 -+#define WF_WTBLON_TOP_B0MBTBCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1140) // 5140 -+#define WF_WTBLON_TOP_B0MBRCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1180) // 5180 -+#define WF_WTBLON_TOP_B0MBRBCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x11C0) // 51C0 -+ -+#define WF_WTBLON_TOP_B1BTCRn_ADDR (MT_DBG_WTBLON_TOP_BASE + 0x1800) // 5800 -+ -+/* WTBLON TOP: 0x820C4000/pcie(0xa8000) rbus(0x4a8000) */ -+#define MT_DBG_UWTBL_TOP_BASE 0x820C4000 -+#define MT_DBG_UWTBL_TOP(ofs) (MT_DBG_UWTBL_TOP_BASE + (ofs)) -+ -+#define MT_DBG_UWTBL_TOP_WDUCR MT_DBG_UWTBL_TOP(__DBG_REG_OFFS(dev, DBG_UWTBL_WDUCR)) -+ -+#define MT_UWTBL_TOP_WDUCR_TARGET BIT(31) -+#define MT_UWTBL_TOP_WDUCR_GROUP GENMASK(3, 0) -+ -+ -+/* WTBL : 0x820D8000/pcie(0x38000) rbus(0x438000) */ -+#define MT_DBG_WTBL_BASE 0x820D8000 -+ -+/* PLE related CRs. */ -+#define MT_DBG_PLE_BASE 0x820C0000 -+#define MT_DBG_PLE(ofs) (MT_DBG_PLE_BASE + (ofs)) -+ -+#define MT_DBG_PLE_DRR_TAB_CTRL MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_DRR_TABLE_CTRL)) -+#define MT_DBG_PLE_DRR_TAB_RD_OFS __DBG_REG_OFFS(dev, DBG_PLE_DRR_TABLE_RDATA) -+ -+#define MT_DBG_PLE_DRR_TABLE_RDATA0 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS + 0x0) -+#define MT_DBG_PLE_DRR_TABLE_RDATA1 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS + 0x4) -+#define MT_DBG_PLE_DRR_TABLE_RDATA2 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS + 0x8) -+#define MT_DBG_PLE_DRR_TABLE_RDATA3 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS + 0xc) -+#define MT_DBG_PLE_DRR_TABLE_RDATA4 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS + 0x10) -+#define MT_DBG_PLE_DRR_TABLE_RDATA5 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS + 0x14) -+#define MT_DBG_PLE_DRR_TABLE_RDATA6 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS + 0x18) -+#define MT_DBG_PLE_DRR_TABLE_RDATA7 MT_DBG_PLE(MT_DBG_PLE_DRR_TAB_RD_OFS+ 0x1c) -+ -+#define MT_DBG_PLE_PBUF_CTRL_ADDR MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_PBUF_CTRL)) -+#define MT_DBG_PLE_QUEUE_EMPTY MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_QUEUE_EMPTY)) -+#define MT_DBG_PLE_FREEPG_CNT MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_FREEPG_CNT)) -+#define MT_DBG_PLE_FREEPG_HEAD_TAIL MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_FREEPG_HEAD_TAIL)) -+#define MT_DBG_PLE_PG_HIF_GROUP MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_PG_HIF_GROUP)) -+#define MT_DBG_PLE_HIF_PG_INFO MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_HIF_PG_INFO)) -+#define MT_DBG_PLE_PG_HIF_TXCMD_GROUP MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_PG_HIF_TXCMD_GROUP)) -+#define MT_DBG_PLE_HIF_TXCMD_PG_INFO MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_HIF_TXCMD_PG_INFO)) -+#define MT_DBG_PLE_PG_CPU_GROUP MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_PG_CPU_GROUP)) -+#define MT_DBG_PLE_CPU_PG_INFO MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_CPU_PG_INFO)) -+#define PLE_FL_QUE_CTRL_OFFSET __DBG_REG_OFFS(dev, DBG_PLE_FL_QUE_CTRL) -+#define MT_DBG_PLE_FL_QUE_CTRL0 MT_DBG_PLE(PLE_FL_QUE_CTRL_OFFSET + 0x0) -+#define MT_DBG_PLE_FL_QUE_CTRL1 MT_DBG_PLE(PLE_FL_QUE_CTRL_OFFSET + 0x4) -+#define MT_DBG_PLE_FL_QUE_CTRL2 MT_DBG_PLE(PLE_FL_QUE_CTRL_OFFSET + 0x8) -+#define MT_DBG_PLE_FL_QUE_CTRL3 MT_DBG_PLE(PLE_FL_QUE_CTRL_OFFSET + 0xc) -+#define MT_DBG_PLE_NATIVE_TXCMD_Q_EMPTY MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_NATIVE_TXCMD_Q_EMPTY)) -+#define MT_DBG_PLE_TXCMD_Q_EMPTY MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_TXCMD_Q_EMPTY)) -+ -+#define MT_DBG_PLE_PBUF_CTRL_PAGE_SIZE_MASK BIT(31) -+#define MT_DBG_PLE_PBUF_CTRL_OFFSET_MASK GENMASK(25, 17) -+#define MT_DBG_PLE_PBUF_CTRL_TOTAL_PAGE_NUM_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_FREEPG_CNT_FREEPG_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PLE_FREEPG_CNT_FFA_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_FREEPG_HEAD_TAIL_FREEPG_TAIL_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_FREEPG_HEAD_TAIL_FREEPG_HEAD_MASK GENMASK(11, 0) -+#define MT_DBG_PLE_PG_HIF_GROUP_HIF_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_PG_HIF_GROUP_HIF_MIN_QUOTA_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_HIF_PG_INFO_HIF_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_HIF_PG_INFO_HIF_RSV_CNT_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_PG_HIF_TXCMD_GROUP_HIF_TXCMD_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_PG_HIF_TXCMD_GROUP_HIF_TXCMD_MIN_QUOTA_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_HIF_TXCMD_PG_INFO_HIF_TXCMD_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_HIF_TXCMD_PG_INFO_HIF_TXCMD_RSV_CNT_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_TXCMD_PG_INFO_HIF_TXCMD_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_TXCMD_PG_INFO_HIF_TXCMD_RSV_CNT_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_PG_CPU_GROUP_CPU_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_PG_CPU_GROUP_CPU_MIN_QUOTA_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_CPU_PG_INFO_CPU_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_CPU_PG_INFO_CPU_RSV_CNT_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_Q_EMPTY_ALL_AC_EMPTY_MASK BIT(24) -+#define MT_DBG_PLE_FL_QUE_CTRL0_EXECUTE_MASK BIT(31) -+#define MT_DBG_PLE_FL_QUE_CTRL0_Q_BUF_QID_MASK GENMASK(30, 24) -+ -+#define MT_PLE_FL_QUE_CTRL0_Q_BUF_QID_SHFT 24 -+#define MT_PLE_FL_QUE_CTRL0_Q_BUF_PID_SHFT 10 -+ -+#define MT_DBG_PLE_FL_QUE_CTRL2_Q_TAIL_FID_MASK GENMASK(27, 16) -+#define MT_DBG_PLE_FL_QUE_CTRL2_Q_HEAD_FID_MASK GENMASK(11, 0) -+#define MT_DBG_PLE_FL_QUE_CTRL3_Q_PKT_NUM_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PLE_STATION_PAUSE(n) MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_STATION_PAUSE) + ((n) << 2)) -+#define MT_DBG_PLE_DIS_STA_MAP(n) MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_DIS_STA_MAP) + ((n) << 2)) -+#define MT_DBG_PLE_AC_QEMPTY(ac, n) MT_DBG_PLE(__DBG_REG_OFFS(dev, DBG_PLE_AC_QEMPTY) + \ -+ __DBG_REG_OFFS(dev, DBG_PLE_AC_OFFSET) * (ac) + ((n) << 2)) -+ -+#define MT_DBG_PLE_AMSDU_PACK_MSDU_CNT(n) MT_DBG_PLE(0x10e0 + ((n) << 2)) -+ -+/* pseinfo related CRs. */ -+#define MT_DBG_PSE_BASE 0x820C8000 -+#define MT_DBG_PSE(ofs) (MT_DBG_PSE_BASE + (ofs)) -+ -+#define MT_DBG_PSE_PBUF_CTRL MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PBUF_CTRL)) -+#define MT_DBG_PSE_QUEUE_EMPTY MT_DBG_PSE(0x0b0) -+#define MT_DBG_PSE_FREEPG_CNT MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_FREEPG_CNT)) -+#define MT_DBG_PSE_FREEPG_HEAD_TAIL MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_FREEPG_HEAD_TAIL)) -+#define MT_DBG_PSE_PG_HIF0_GROUP MT_DBG_PSE(0x110) -+#define MT_DBG_PSE_HIF0_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_HIF0_PG_INFO)) -+#define MT_DBG_PSE_PG_HIF1_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_HIF1_GROUP)) -+#define MT_DBG_PSE_HIF1_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_HIF1_PG_INFO)) -+#define MT_DBG_PSE_PG_CPU_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_CPU_GROUP)) -+#define MT_DBG_PSE_CPU_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_CPU_PG_INFO)) -+#define MT_DBG_PSE_PG_LMAC0_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_LMAC0_GROUP)) -+#define MT_DBG_PSE_LMAC0_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_LMAC0_PG_INFO)) -+#define MT_DBG_PSE_PG_LMAC1_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_LMAC1_GROUP)) -+#define MT_DBG_PSE_LMAC1_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_LMAC1_PG_INFO)) -+#define MT_DBG_PSE_PG_LMAC2_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_LMAC2_GROUP)) -+#define MT_DBG_PSE_LMAC2_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_LMAC2_PG_INFO)) -+#define MT_DBG_PSE_PG_PLE_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_PLE_GROUP)) -+#define MT_DBG_PSE_PLE_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PLE_PG_INFO)) -+#define MT_DBG_PSE_PG_LMAC3_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_LMAC3_GROUP)) -+#define MT_DBG_PSE_LMAC3_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_LMAC3_PG_INFO)) -+#define MT_DBG_PSE_PG_MDP_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_MDP_GROUP)) -+#define MT_DBG_PSE_MDP_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_MDP_PG_INFO)) -+#define MT_DBG_PSE_PG_PLE1_GROUP MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PG_PLE1_GROUP)) -+#define MT_DBG_PSE_PLE1_PG_INFO MT_DBG_PSE(__DBG_REG_OFFS(dev, DBG_PSE_PLE1_PG_INFO)) -+ -+#define MT_DBG_PSE_PBUF_CTRL_PAGE_SIZE_CFG_MASK BIT(31) -+#define MT_DBG_PSE_PBUF_CTRL_PBUF_OFFSET_MASK GENMASK(25, 17) -+#define MT_DBG_PSE_PBUF_CTRL_TOTAL_PAGE_NUM_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_QUEUE_EMPTY_RLS_Q_EMTPY_MASK BIT(31) -+#define MT_DBG_PSE_QUEUE_EMPTY_MDP_RXIOC_QUEUE_EMPTY_MASK BIT(23) -+#define MT_DBG_PSE_QUEUE_EMPTY_MDP_TXIOC_QUEUE_EMPTY_MASK BIT(22) -+#define MT_DBG_PSE_QUEUE_EMPTY_SFD_PARK_QUEUE_EMPTY_MASK BIT(21) -+#define MT_DBG_PSE_QUEUE_EMPTY_SEC_RX_QUEUE_EMPTY_SHFT BIT(20) -+#define MT_DBG_PSE_QUEUE_EMPTY_SEC_TX_QUEUE_EMPTY_MASK BIT(19) -+#define MT_DBG_PSE_QUEUE_EMPTY_MDP_RX_QUEUE_EMPTY_MASK BIT(18) -+#define MT_DBG_PSE_QUEUE_EMPTY_MDP_TX_QUEUE_EMPTY_MASK BIT(17) -+#define MT_DBG_PSE_QUEUE_EMPTY_LMAC_TX_QUEUE_EMPTY_MASK BIT(16) -+#define MT_DBG_PSE_QUEUE_EMPTY_HIF_5_EMPTY_MASK BIT(13) -+#define MT_DBG_PSE_QUEUE_EMPTY_HIF_4_EMPTY_MASK BIT(12) -+#define MT_DBG_PSE_QUEUE_EMPTY_HIF_3_EMPTY_MASK BIT(11) -+#define MT_DBG_PSE_QUEUE_EMPTY_HIF_2_EMPTY_MASK BIT(10) -+#define MT_DBG_PSE_QUEUE_EMPTY_HIF_1_EMPTY_MASK BIT(9) -+#define MT_DBG_PSE_QUEUE_EMPTY_HIF_0_EMPTY_MASK BIT(8) -+#define MT_DBG_PSE_QUEUE_EMPTY_CPU_Q3_EMPTY_MASK BIT(3) -+#define MT_DBG_PSE_QUEUE_EMPTY_CPU_Q2_EMPTY_MASK BIT(2) -+#define MT_DBG_PSE_QUEUE_EMPTY_CPU_Q1_EMPTY_MASK BIT(1) -+#define MT_DBG_PSE_QUEUE_EMPTY_CPU_Q0_EMPTY_MASK BIT(0) -+#define MT_DBG_PSE_FREEPG_CNT_FFA_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_FREEPG_CNT_FREEPG_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_FREEPG_HEAD_TAIL_FREEPG_TAIL_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_FREEPG_HEAD_TAIL_FREEPG_HEAD_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_HIF0_GROUP_HIF0_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_HIF0_GROUP_HIF0_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_HIF0_GROUP_HIF0_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_HIF0_GROUP_HIF0_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_HIF0_PG_INFO_HIF0_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_HIF0_PG_INFO_HIF0_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_HIF1_GROUP_HIF1_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_HIF1_GROUP_HIF1_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_HIF1_PG_INFO_HIF1_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_HIF1_PG_INFO_HIF1_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_CPU_PG_INFO_CPU_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_CPU_PG_INFO_CPU_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_PLE_GROUP_PLE_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_PLE_GROUP_PLE_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_CPU_GROUP_CPU_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_CPU_GROUP_CPU_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PLE_PG_INFO_PLE_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PLE_PG_INFO_PLE_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_LMAC0_GROUP_LMAC0_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_LMAC0_GROUP_LMAC0_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_LMAC0_PG_INFO_LMAC0_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_LMAC0_PG_INFO_LMAC0_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_LMAC1_GROUP_LMAC1_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_TOP_PG_LMAC1_GROUP_LMAC1_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_LMAC1_PG_INFO_LMAC1_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_LMAC1_PG_INFO_LMAC1_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_LMAC2_GROUP_LMAC2_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_LMAC2_GROUP_LMAC2_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_LMAC2_PG_INFO_LMAC2_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_LMAC2_PG_INFO_LMAC2_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_LMAC3_GROUP_LMAC3_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_TOP_PG_LMAC3_GROUP_LMAC3_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_LMAC3_PG_INFO_LMAC3_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_LMAC3_PG_INFO_LMAC3_RSV_CNT_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_LMAC3_GROUP_LMAC3_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_TOP_PG_LMAC3_GROUP_LMAC3_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_PG_MDP_GROUP_MDP_MAX_QUOTA_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_PG_MDP_GROUP_MDP_MIN_QUOTA_MASK GENMASK(11, 0) -+#define MT_DBG_PSE_MDP_PG_INFO_MDP_SRC_CNT_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_MDP_PG_INFO_MDP_RSV_CNT_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PSE_FL_QUE_CTRL_0_ADDR MT_DBG_PLE(0x1b0) -+#define MT_DBG_PSE_FL_QUE_CTRL_0_EXECUTE_MASK BIT(31) -+#define MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_QID_SHFT 24 -+#define MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_PID_SHFT 10 -+#define MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_WLANID_MASK GENMASK(9, 0) -+ -+#define MT_DBG_PSE_FL_QUE_CTRL_2_ADDR MT_DBG_PLE(0x1b8) -+#define MT_DBG_PSE_FL_QUE_CTRL_2_QUEUE_TAIL_FID_MASK GENMASK(27, 16) -+#define MT_DBG_PSE_FL_QUE_CTRL_2_QUEUE_HEAD_FID_MASK GENMASK(11, 0) -+ -+#define MT_DBG_PSE_FL_QUE_CTRL_3_ADDR MT_DBG_PLE(0x1bc) -+#define MT_DBG_PSE_FL_QUE_CTRL_3_QUEUE_PKT_NUM_MASK GENMASK(11, 0) -+ -+ -+/* AGG */ -+#define MT_DBG_AGG_BASE(_band) ((_band) ? 0x820f2000 : 0x820e2000) -+#define MT_DBG_AGG(_band, ofs) (MT_DBG_AGG_BASE(_band) + (ofs)) -+ -+#define MT_DBG_AGG_AALCR0(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_AALCR0)) -+#define MT_DBG_AGG_AALCR1(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_AALCR1)) -+#define MT_DBG_AGG_AALCR2(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_AALCR2)) -+#define MT_DBG_AGG_AALCR3(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_AALCR3)) -+#define MT_DBG_AGG_AALCR4(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_AALCR4)) -+#define MT_DBG_AGG_B0BRR0(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_B0BRR0)) -+#define MT_DBG_AGG_B1BRR0(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_B1BRR0)) -+#define MT_DBG_AGG_B2BRR0(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_B2BRR0)) -+#define MT_DBG_AGG_B3BRR0(_band) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_B3BRR0)) -+#define MT_DBG_AGG_AWSCR(_band, n) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_AWSCR0) + ((n) << 2)) -+#define MT_DBG_AGG_PCR(_band, n) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_PCR0) + ((n) << 2)) -+#define MT_DBG_AGG_TTCR(_band, n) MT_DBG_AGG((_band), __DBG_REG_OFFS(dev, DBG_AGG_TTCR0) + ((n) << 2)) -+#define MT_DBG_MIB_M0ARNG(_band, n) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0ARNG0) + ((n) << 2)) -+#define MT_DBG_MIB_M0DR2(_band, n) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR2) + ((n) << 2)) -+#define MT_DBG_MIB_M0DR13(_band, n) MT_DBG_MIB((_band), __DBG_REG_OFFS(dev, DBG_MIB_M0DR13) + ((n) << 2)) -+ -+#define MT_DBG_AGG_AALCR_ACx3_AGG_LIMIT_MASK GENMASK(31, 24) -+#define MT_DBG_AGG_AALCR_ACx2_AGG_LIMIT_MASK GENMASK(23, 16) -+#define MT_DBG_AGG_AALCR_ACx1_AGG_LIMIT_MASK GENMASK(15, 8) -+#define MT_DBG_AGG_AALCR_ACx0_AGG_LIMIT_MASK GENMASK(7, 0) -+#define MT_DBG_AGG_AALCR4_ALTX0_AGG_LIMIT_MASK GENMASK(7, 0) -+ -+#define MT_DBG_AGG_AWSCR0_WINSIZE3_MASK GENMASK(31, 24) -+#define MT_DBG_AGG_AWSCR0_WINSIZE2_MASK GENMASK(23, 16) -+#define MT_DBG_AGG_AWSCR0_WINSIZE1_MASK GENMASK(15, 8) -+#define MT_DBG_AGG_AWSCR0_WINSIZE0_MASK GENMASK(7, 0) -+ -+#define MT_DBG_AGG_AWSCR1_WINSIZE7_MASK GENMASK(31, 24) -+#define MT_DBG_AGG_AWSCR1_WINSIZE6_MASK GENMASK(23, 16) -+#define MT_DBG_AGG_AWSCR1_WINSIZE5_MASK GENMASK(15, 8) -+#define MT_DBG_AGG_AWSCR1_WINSIZE4_MASK GENMASK(7, 0) -+ -+#define MT_DBG_AGG_AWSCR2_WINSIZEB_MASK GENMASK(31, 24) -+#define MT_DBG_AGG_AWSCR2_WINSIZEA_MASK GENMASK(23, 16) -+#define MT_DBG_AGG_AWSCR2_WINSIZE9_MASK GENMASK(15, 8) -+#define MT_DBG_AGG_AWSCR2_WINSIZE8_MASK GENMASK(7, 0) -+ -+#define MT_DBG_AGG_AWSCR3_WINSIZEE_MASK GENMASK(23, 16) -+#define MT_DBG_AGG_AWSCR3_WINSIZED_MASK GENMASK(15, 8) -+#define MT_DBG_AGG_AWSCR3_WINSIZEC_MASK GENMASK(7, 0) -+ -+#define MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL3_MASK GENMASK(31, 24) -+#define MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL2_MASK GENMASK(23, 16) -+#define MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL1_MASK GENMASK(15, 8) -+#define MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL0_MASK GENMASK(7, 0) -+ -+#define MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL7_MASK GENMASK(31, 24) -+#define MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL6_MASK GENMASK(23, 16) -+#define MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL5_MASK GENMASK(15, 8) -+#define MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL4_MASK GENMASK(7, 0) -+ -+#define MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL11_MASK GENMASK(31, 24) -+#define MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL10_MASK GENMASK(23, 16) -+#define MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL9_MASK GENMASK(15, 8) -+#define MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL8_MASK GENMASK(7, 0) -+ -+#define MT_DBG_MIB_M0ARNG3_AGG_RANG_SEL14_MASK GENMASK(23, 16) -+#define MT_DBG_MIB_M0ARNG3_AGG_RANG_SEL13_MASK GENMASK(15, 8) -+#define MT_DBG_MIB_M0ARNG3_AGG_RANG_SEL12_MASK GENMASK(7, 0) -+ -+#define MT_DBG_MIB_M0DR2_TRX_AGG_RANGE1_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR2_TRX_AGG_RANGE0_CNT_MASK GENMASK(15, 0) -+#define MT_DBG_MIB_M0DR3_TRX_AGG_RANGE3_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR3_TRX_AGG_RANGE2_CNT_MASK GENMASK(15, 0) -+#define MT_DBG_MIB_M0DR4_TRX_AGG_RANGE5_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR4_TRX_AGG_RANGE4_CNT_MASK GENMASK(15, 0) -+#define MT_DBG_MIB_M0DR5_TRX_AGG_RANGE7_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR5_TRX_AGG_RANGE6_CNT_MASK GENMASK(15, 0) -+#define MT_DBG_MIB_M0DR13_TRX_AGG_RANGE9_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR13_TRX_AGG_RANGE8_CNT_MASK GENMASK(15, 0) -+#define MT_DBG_MIB_M0DR14_TRX_AGG_RANGE11_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR14_TRX_AGG_RANGE10_CNT_MASK GENMASK(15, 0) -+#define MT_DBG_MIB_M0DR15_TRX_AGG_RANGE13_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR15_TRX_AGG_RANGE12_CNT_MASK GENMASK(15, 0) -+#define MT_DBG_MIB_M0DR16_TRX_AGG_RANGE15_CNT_MASK GENMASK(31, 16) -+#define MT_DBG_MIB_M0DR16_TRX_AGG_RANGE14_CNT_MASK GENMASK(15, 0) -+ -+/* mt7915 host DMA*/ -+#define MT_DBG_INT_DMA1_R0_DONE BIT(0) -+#define MT_DBG_INT_DMA1_R1_DONE BIT(1) -+#define MT_DBG_INT_DMA1_R2_DONE BIT(2) -+ -+#define MT_DBG_INT_DMA1_T16_DONE BIT(26) -+#define MT_DBG_INT_DMA1_T17_DONE BIT(27) -+#define MT_DBG_INT_DMA1_T18_DONE BIT(30) -+#define MT_DBG_INT_DMA1_T19_DONE BIT(31) -+#define MT_DBG_INT_DMA1_T20_DONE BIT(15) -+ -+#define MT_DBG_EXT_WRAP_INT_DMA0_R0_DONE BIT(16) -+#define MT_DBG_EXT_WRAP_INT_DMA0_R1_DONE BIT(17) -+ -+/* mt7986 host DMA */ -+#define MT_DBG_INT_DMA0_R0_DONE BIT(0) -+#define MT_DBG_INT_DMA0_R1_DONE BIT(1) -+#define MT_DBG_INT_DMA0_R2_DONE BIT(2) -+#define MT_DBG_INT_DMA0_R3_DONE BIT(3) -+#define MT_DBG_INT_DMA0_R4_DONE BIT(22) -+#define MT_DBG_INT_DMA0_R5_DONE BIT(23) -+ -+#define MT_DBG_INT_DMA0_T16_DONE BIT(26) -+#define MT_DBG_INT_DMA0_T17_DONE BIT(27) -+#define MT_DBG_INT_DMA0_T18_DONE BIT(30) -+#define MT_DBG_INT_DMA0_T19_DONE BIT(31) -+#define MT_DBG_INT_DMA0_T20_DONE BIT(25) -+ -+/* MCU DMA */ -+#define WF_WFDMA_MCU_DMA0_BASE 0x54000000 -+#define WF_WFDMA_MCU_DMA0_HOST_INT_STA_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x200) // 0200 -+#define WF_WFDMA_MCU_DMA0_HOST_INT_ENA_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0X204) // 0204 -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x208) // 0208 -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK 0x00000008 // RX_DMA_BUSY[3] -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT 3 -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_EN_MASK 0x00000004 // RX_DMA_EN[2] -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_EN_SHFT 2 -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK 0x00000002 // TX_DMA_BUSY[1] -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT 1 -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_EN_MASK 0x00000001 // TX_DMA_EN[0] -+#define WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_EN_SHFT 0 -+ -+#define WF_WFDMA_MCU_DMA1_BASE 0x55000000 -+#define WF_WFDMA_MCU_DMA1_HOST_INT_STA_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x200) // 0200 -+#define WF_WFDMA_MCU_DMA1_HOST_INT_ENA_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0X204) // 0204 -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x208) // 0208 -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK 0x00000008 // RX_DMA_BUSY[3] -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT 3 -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_EN_MASK 0x00000004 // RX_DMA_EN[2] -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_EN_SHFT 2 -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK 0x00000002 // TX_DMA_BUSY[1] -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT 1 -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_EN_MASK 0x00000001 // TX_DMA_EN[0] -+#define WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_EN_SHFT 0 -+#define WF_WFDMA_MCU_DMA1_WPDMA_TX_RING0_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x300) // 0300 -+#define WF_WFDMA_MCU_DMA1_WPDMA_TX_RING1_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x310) // 0310 -+#define WF_WFDMA_MCU_DMA1_WPDMA_TX_RING2_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x320) // 0320 -+#define WF_WFDMA_MCU_DMA1_WPDMA_RX_RING0_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x500) // 0500 -+#define WF_WFDMA_MCU_DMA1_WPDMA_RX_RING1_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x510) // 0510 -+#define WF_WFDMA_MCU_DMA1_WPDMA_RX_RING2_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x520) // 0520 -+#define WF_WFDMA_MCU_DMA1_WPDMA_RX_RING3_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x530) // 0530 -+#define WF_WFDMA_MCU_DMA1_WPDMA_RX_RING4_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_BASE + 0x540) // 0540 -+ -+#define WF_WFDMA_MCU_DMA1_PCIE1_BASE 0x59000000 -+#define WF_WFDMA_MCU_DMA1_PCIE1_HOST_INT_STA_ADDR (WF_WFDMA_MCU_DMA1_PCIE1_BASE + 0x200) // 0200 -+#define WF_WFDMA_MCU_DMA1_PCIE1_HOST_INT_ENA_ADDR (WF_WFDMA_MCU_DMA1_PCIE1_BASE + 0X204) // 0204 -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_ADDR (WF_WFDMA_MCU_DMA1_PCIE1_BASE + 0x208) // 0208 -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK 0x00000008 // RX_DMA_BUSY[3] -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT 3 -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_EN_MASK 0x00000004 // RX_DMA_EN[2] -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_EN_SHFT 2 -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK 0x00000002 // TX_DMA_BUSY[1] -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT 1 -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_EN_MASK 0x00000001 // TX_DMA_EN[0] -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_EN_SHFT 0 -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_TX_RING2_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_PCIE1_BASE + 0x320) // 0320 -+#define WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_RX_RING3_CTRL0_ADDR (WF_WFDMA_MCU_DMA1_PCIE1_BASE + 0x530) // 0530 -+ -+#define WF_WFDMA_MCU_DMA0_WPDMA_TX_RING0_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x300) // 0300 -+#define WF_WFDMA_MCU_DMA0_WPDMA_TX_RING1_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x310) // 0310 -+#define WF_WFDMA_MCU_DMA0_WPDMA_TX_RING2_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x320) // 0320 -+/* mt7986 add */ -+#define WF_WFDMA_MCU_DMA0_WPDMA_TX_RING3_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x330) // 0330 -+#define WF_WFDMA_MCU_DMA0_WPDMA_TX_RING4_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x340) // 0340 -+#define WF_WFDMA_MCU_DMA0_WPDMA_TX_RING5_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x350) // 0350 -+#define WF_WFDMA_MCU_DMA0_WPDMA_TX_RING6_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x360) // 0360 -+ -+ -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING0_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x500) // 0500 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING1_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x510) // 0510 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING2_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x520) // 0520 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING3_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x530) // 0530 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING4_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x540) // 0540 -+ -+/* mt7986 add */ -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING5_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x550) // 0550 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING6_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x560) // 0560 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING7_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x570) // 0570 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING8_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x580) // 0580 -+#define WF_WFDMA_MCU_DMA0_WPDMA_RX_RING9_CTRL0_ADDR (WF_WFDMA_MCU_DMA0_BASE + 0x590) // 0590 -+ -+/* MEM DMA */ -+#define WF_WFDMA_MEM_DMA_BASE 0x58000000 -+#define WF_WFDMA_MEM_DMA_HOST_INT_STA_ADDR (WF_WFDMA_MEM_DMA_BASE + 0x200) // 0200 -+#define WF_WFDMA_MEM_DMA_HOST_INT_ENA_ADDR (WF_WFDMA_MEM_DMA_BASE + 0X204) // 0204 -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_ADDR (WF_WFDMA_MEM_DMA_BASE + 0x208) // 0208 -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK 0x00000008 // RX_DMA_BUSY[3] -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT 3 -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_EN_MASK 0x00000004 // RX_DMA_EN[2] -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_EN_SHFT 2 -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK 0x00000002 // TX_DMA_BUSY[1] -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT 1 -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_EN_MASK 0x00000001 // TX_DMA_EN[0] -+#define WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_EN_SHFT 0 -+#define WF_WFDMA_MEM_DMA_WPDMA_TX_RING0_CTRL0_ADDR (WF_WFDMA_MEM_DMA_BASE + 0x300) // 0300 -+#define WF_WFDMA_MEM_DMA_WPDMA_TX_RING1_CTRL0_ADDR (WF_WFDMA_MEM_DMA_BASE + 0x310) // 0310 -+#define WF_WFDMA_MEM_DMA_WPDMA_RX_RING0_CTRL0_ADDR (WF_WFDMA_MEM_DMA_BASE + 0x500) // 0500 -+#define WF_WFDMA_MEM_DMA_WPDMA_RX_RING1_CTRL0_ADDR (WF_WFDMA_MEM_DMA_BASE + 0x510) // 0510 -+ -+enum resource_attr { -+ HIF_TX_DATA, -+ HIF_TX_CMD, -+ HIF_TX_CMD_WM, /* direct path to WMCPU, only exist for WFDMA arch with 2 CPU */ -+ HIF_TX_FWDL, -+ HIF_RX_DATA, -+ HIF_RX_EVENT, -+ RING_ATTR_NUM -+}; -+ -+struct hif_pci_tx_ring_desc { -+ u32 hw_int_mask; -+ u16 ring_size; -+ enum resource_attr ring_attr; -+ u8 band_idx; -+ char *const ring_info; -+}; -+ -+struct hif_pci_rx_ring_desc { -+ u32 hw_desc_base; -+ u32 hw_int_mask; -+ u16 ring_size; -+ enum resource_attr ring_attr; -+ u16 max_rx_process_cnt; -+ u16 max_sw_read_idx_inc; -+ char *const ring_info; -+ bool flags; -+}; -+ -+const struct hif_pci_tx_ring_desc mt7915_tx_ring_layout[] = { -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_T16_DONE, -+ .ring_size = 128, -+ .ring_attr = HIF_TX_FWDL, -+ .ring_info = "FWDL" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_T17_DONE, -+ .ring_size = 256, -+ .ring_attr = HIF_TX_CMD_WM, -+ .ring_info = "cmd to WM" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_T18_DONE, -+ .ring_size = 2048, -+ .ring_attr = HIF_TX_DATA, -+ .ring_info = "band0 TXD" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_T19_DONE, -+ .ring_size = 2048, -+ .ring_attr = HIF_TX_DATA, -+ .ring_info = "band1 TXD" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_T20_DONE, -+ .ring_size = 256, -+ .ring_attr = HIF_TX_CMD, -+ .ring_info = "cmd to WA" -+ } -+}; -+ -+const struct hif_pci_rx_ring_desc mt7915_rx_ring_layout[] = { -+ { -+ .hw_int_mask = MT_DBG_EXT_WRAP_INT_DMA0_R0_DONE, -+ .ring_size = 1536, -+ .ring_attr = HIF_RX_DATA, -+ .ring_info = "band0 RX data" -+ }, -+ { -+ .hw_int_mask = MT_DBG_EXT_WRAP_INT_DMA0_R1_DONE, -+ .ring_size = 1536, -+ .ring_attr = HIF_RX_DATA, -+ .ring_info = "band1 RX data" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_R0_DONE, -+ .ring_size = 512, -+ .ring_attr = HIF_RX_EVENT, -+ .ring_info = "event from WM" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_R1_DONE, -+ .ring_size = 1024, -+ .ring_attr = HIF_RX_EVENT, -+ .ring_info = "event from WA band0", -+ .flags = true -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA1_R2_DONE, -+ .ring_size = 512, -+ .ring_attr = HIF_RX_EVENT, -+ .ring_info = "event from WA band1" -+ } -+}; -+ -+const struct hif_pci_tx_ring_desc mt7986_tx_ring_layout[] = { -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_T16_DONE, -+ .ring_size = 128, -+ .ring_attr = HIF_TX_FWDL, -+ .ring_info = "FWDL" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_T17_DONE, -+ .ring_size = 256, -+ .ring_attr = HIF_TX_CMD_WM, -+ .ring_info = "cmd to WM" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_T18_DONE, -+ .ring_size = 2048, -+ .ring_attr = HIF_TX_DATA, -+ .ring_info = "band0 TXD" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_T19_DONE, -+ .ring_size = 2048, -+ .ring_attr = HIF_TX_DATA, -+ .ring_info = "band1 TXD" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_T20_DONE, -+ .ring_size = 256, -+ .ring_attr = HIF_TX_CMD, -+ .ring_info = "cmd to WA" -+ } -+}; -+ -+const struct hif_pci_rx_ring_desc mt7986_rx_ring_layout[] = { -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_R4_DONE, -+ .ring_size = 1536, -+ .ring_attr = HIF_RX_DATA, -+ .ring_info = "band0 RX data" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_R5_DONE, -+ .ring_size = 1536, -+ .ring_attr = HIF_RX_DATA, -+ .ring_info = "band1 RX data" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_R0_DONE, -+ .ring_size = 512, -+ .ring_attr = HIF_RX_EVENT, -+ .ring_info = "event from WM" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_R1_DONE, -+ .ring_size = 512, -+ .ring_attr = HIF_RX_EVENT, -+ .ring_info = "event from WA" -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_R2_DONE, -+ .ring_size = 1024, -+ .ring_attr = HIF_RX_EVENT, -+ .ring_info = "STS WA band0", -+ .flags = true -+ }, -+ { -+ .hw_int_mask = MT_DBG_INT_DMA0_R3_DONE, -+ .ring_size = 512, -+ .ring_attr = HIF_RX_EVENT, -+ .ring_info = "STS WA band1" -+ }, -+}; -+ -+/* mibinfo related CRs. */ -+#define BN0_WF_MIB_TOP_BASE 0x820ed000 -+#define BN1_WF_MIB_TOP_BASE 0x820fd000 -+ -+#define BN0_WF_MIB_TOP_BTOCR_ADDR (BN0_WF_MIB_TOP_BASE + 0x400) // D400 -+#define BN0_WF_MIB_TOP_BTBCR_ADDR (BN0_WF_MIB_TOP_BASE + 0x428) // D428 -+#define BN0_WF_MIB_TOP_BTDCR_ADDR (BN0_WF_MIB_TOP_BASE + 0x4F0) // D4F0 -+ -+#define BN0_WF_MIB_TOP_BSDR0_ADDR (BN0_WF_MIB_TOP_BASE + 0x688) // D688 -+#define BN0_WF_MIB_TOP_BSDR1_ADDR (BN0_WF_MIB_TOP_BASE + 0x690) // D690 -+ -+#define BN0_WF_MIB_TOP_BSDR2_ADDR (BN0_WF_MIB_TOP_BASE + 0x518) // D518 -+#define BN0_WF_MIB_TOP_BSDR3_ADDR (BN0_WF_MIB_TOP_BASE + 0x520) // D520 -+#define BN0_WF_MIB_TOP_BSDR4_ADDR (BN0_WF_MIB_TOP_BASE + 0x528) // D528 -+#define BN0_WF_MIB_TOP_BSDR5_ADDR (BN0_WF_MIB_TOP_BASE + 0x530) // D530 -+#define BN0_WF_MIB_TOP_BSDR6_ADDR (BN0_WF_MIB_TOP_BASE + 0x538) // D538 -+ -+#define BN0_WF_MIB_TOP_BROCR_ADDR (BN0_WF_MIB_TOP_BASE + 0x5B8) // D5B8 -+#define BN0_WF_MIB_TOP_BRBCR_ADDR (BN0_WF_MIB_TOP_BASE + 0x5E0) // D5E0 -+#define BN0_WF_MIB_TOP_BRDCR_ADDR (BN0_WF_MIB_TOP_BASE + 0x630) // D630 -+ -+#define BN0_WF_MIB_TOP_M0SDR0_BEACONTXCOUNT_MASK 0x0000FFFF // BEACONTXCOUNT[15..0] -+ -+#define BN0_WF_MIB_TOP_M0SDR4_RX_FIFO_FULL_COUNT_MASK 0x0000FFFF // RX_FIFO_FULL_COUNT[15..0] -+ -+#define BN0_WF_MIB_TOP_M0SDR5_RX_MPDU_COUNT_MASK 0xFFFFFFFF // RX_MPDU_COUNT[31..0] -+ -+#define BN0_WF_MIB_TOP_M0SDR6_CHANNEL_IDLE_COUNT_MASK 0x0000FFFF // CHANNEL_IDLE_COUNT[15..0] -+ -+#define BN1_WF_MIB_TOP_BTOCR_ADDR (BN1_WF_MIB_TOP_BASE + 0x400) // D400 -+ -+#define BN0_WF_MIB_TOP_M0SDR7_VEC_MISS_COUNT_MASK 0x0000FFFF // VEC_MISS_COUNT[15..0] -+#define BN0_WF_MIB_TOP_M0SDR8_DELIMITER_FAIL_COUNT_MASK 0x0000FFFF // DELIMITER_FAIL_COUNT[15..0] -+#define BN0_WF_MIB_TOP_M0SDR9_CCA_NAV_TX_TIME_MASK 0x00FFFFFF // CCA_NAV_TX_TIME[23..0] -+ -+#define BN0_WF_MIB_TOP_M0SDR11_RX_LEN_MISMATCH_MASK 0x0000FFFF // RX_LEN_MISMATCH[15..0] -+ -+#define BN0_WF_MIB_TOP_M0SDR16_P_CCA_TIME_MASK 0x00FFFFFF // P_CCA_TIME[23..0] -+#define BN0_WF_MIB_TOP_M0SDR17_S_CCA_TIME_MASK 0x00FFFFFF // S_CCA_TIME[23..0] -+#define BN0_WF_MIB_TOP_M0SDR18_P_ED_TIME_MASK 0x00FFFFFF // P_ED_TIME[23..0] -+#define BN0_WF_MIB_TOP_M0SDR19_CCK_MDRDY_TIME_MASK 0x00FFFFFF // CCK_MDRDY_TIME[23..0] -+#define BN0_WF_MIB_TOP_M0SDR20_OFDM_LG_MIXED_VHT_MDRDY_TIME_MASK 0x00FFFFFF // OFDM_LG_MIXED_VHT_MDRDY_TIME[23..0] -+#define BN0_WF_MIB_TOP_M0SDR21_OFDM_GREEN_MDRDY_TIME_MASK 0x00FFFFFF // OFDM_GREEN_MDRDY_TIME[23..0] -+ -+#define BN0_WF_MIB_TOP_M0SDR22_ADDR (BN0_WF_MIB_TOP_BASE + 0x60) // D060 -+#define BN0_WF_MIB_TOP_M0SDR23_ADDR (BN0_WF_MIB_TOP_BASE + 0x64) // D064 -+ -+#define BN0_WF_MIB_TOP_M0SDR34_MUBF_TX_COUNT_MASK 0x0000FFFF // MUBF_TX_COUNT[15..0] -+ -+#define BN0_WF_MIB_TOP_M0DR0_TX_40MHZ_CNT_MASK 0xFFFF0000 // TX_40MHZ_CNT[31..16] -+#define BN0_WF_MIB_TOP_M0DR0_TX_40MHZ_CNT_SHFT 16 -+#define BN0_WF_MIB_TOP_M0DR0_TX_20MHZ_CNT_MASK 0x0000FFFF // TX_20MHZ_CNT[15..0] -+#define BN0_WF_MIB_TOP_M0DR0_TX_20MHZ_CNT_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_M0DR1_TX_160MHZ_CNT_MASK 0xFFFF0000 // TX_160MHZ_CNT[31..16] -+#define BN0_WF_MIB_TOP_M0DR1_TX_160MHZ_CNT_SHFT 16 -+#define BN0_WF_MIB_TOP_M0DR1_TX_80MHZ_CNT_MASK 0x0000FFFF // TX_80MHZ_CNT[15..0] -+#define BN0_WF_MIB_TOP_M0DR1_TX_80MHZ_CNT_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_M0DR6_TX_DDLMT_RNG2_CNT_MASK 0xFFFF0000 // TX_DDLMT_RNG2_CNT[31..16] -+#define BN0_WF_MIB_TOP_M0DR6_TX_DDLMT_RNG2_CNT_SHFT 16 -+#define BN0_WF_MIB_TOP_M0DR6_TX_DDLMT_RNG1_CNT_MASK 0x0000FFFF // TX_DDLMT_RNG1_CNT[15..0] -+#define BN0_WF_MIB_TOP_M0DR6_TX_DDLMT_RNG1_CNT_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_M0DR7_TX_DDLMT_RNG4_CNT_MASK 0xFFFF0000 // TX_DDLMT_RNG4_CNT[31..16] -+#define BN0_WF_MIB_TOP_M0DR7_TX_DDLMT_RNG4_CNT_SHFT 16 -+#define BN0_WF_MIB_TOP_M0DR7_TX_DDLMT_RNG3_CNT_MASK 0x0000FFFF // TX_DDLMT_RNG3_CNT[15..0] -+#define BN0_WF_MIB_TOP_M0DR7_TX_DDLMT_RNG3_CNT_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_M0DR10_MU_FAIL_PPDU_CNT_MASK 0x0000FFFF // MU_FAIL_PPDU_CNT[15..0] -+ -+#define BN0_WF_MIB_TOP_M0B0SDR0_ADDR (BN0_WF_MIB_TOP_BASE + 0x100) // D100 -+#define BN0_WF_MIB_TOP_M0B0SDR0_RTSRETRYCOUNT_MASK 0xFFFF0000 // RTSRETRYCOUNT[31..16] -+#define BN0_WF_MIB_TOP_M0B0SDR0_RTSRETRYCOUNT_SHFT 16 -+#define BN0_WF_MIB_TOP_M0B0SDR0_RTSTXCOUNT_MASK 0x0000FFFF // RTSTXCOUNT[15..0] -+#define BN0_WF_MIB_TOP_M0B0SDR0_RTSTXCOUNT_SHFT 0 -+#define BN0_WF_MIB_TOP_M0B0SDR1_ADDR (BN0_WF_MIB_TOP_BASE + 0x104) // D104 -+#define BN0_WF_MIB_TOP_M0B0SDR1_ACKFAILCOUNT_MASK 0xFFFF0000 // ACKFAILCOUNT[31..16] -+#define BN0_WF_MIB_TOP_M0B0SDR1_ACKFAILCOUNT_SHFT 16 -+#define BN0_WF_MIB_TOP_M0B0SDR1_BAMISSCOUNT_MASK 0x0000FFFF // BAMISSCOUNT[15..0] -+#define BN0_WF_MIB_TOP_M0B0SDR1_BAMISSCOUNT_SHFT 0 -+#define BN0_WF_MIB_TOP_M0B0SDR2_ADDR (BN0_WF_MIB_TOP_BASE + 0x108) // D108 -+#define BN0_WF_MIB_TOP_M0B0SDR2_FRAMERETRY2COUNT_MASK 0xFFFF0000 // FRAMERETRY2COUNT[31..16] -+#define BN0_WF_MIB_TOP_M0B0SDR2_FRAMERETRY2COUNT_SHFT 16 -+#define BN0_WF_MIB_TOP_M0B0SDR2_FRAMERETRYCOUNT_MASK 0x0000FFFF // FRAMERETRYCOUNT[15..0] -+#define BN0_WF_MIB_TOP_M0B0SDR2_FRAMERETRYCOUNT_SHFT 0 -+#define BN0_WF_MIB_TOP_M0B0SDR3_ADDR (BN0_WF_MIB_TOP_BASE + 0x10C) // D10C -+#define BN0_WF_MIB_TOP_M0B0SDR3_FRAMERETRY3COUNT_MASK 0x0000FFFF // FRAMERETRY3COUNT[15..0] -+#define BN0_WF_MIB_TOP_M0B0SDR3_FRAMERETRY3COUNT_SHFT 0 -+#define BN0_WF_MIB_TOP_M0DR12_TX_DDLMT_RNG0_CNT_MASK 0x0000FFFF // TX_DDLMT_RNG0_CNT[15..0] -+ -+ -+#define BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2np1_MASK 0xFFFF0000 // TX_OK_COUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2n_MASK 0x0000FFFF // TX_OK_COUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2np1_MASK 0xFFFF0000 // TX_DATA_COUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2n_MASK 0x0000FFFF // TX_DATA_COUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2np1_MASK 0xFFFF0000 // RX_OK_COUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2n_MASK 0x0000FFFF // RX_OK_COUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2np1_MASK 0xFFFF0000 // RX_DATA_COUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2n_MASK 0x0000FFFF // RX_DATA_COUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2np1_MASK 0xFFFF0000 // RTSTXCOUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2n_MASK 0x0000FFFF // RTSTXCOUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2np1_MASK 0xFFFF0000 // RTSRETRYCOUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2n_MASK 0x0000FFFF // RTSRETRYCOUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2np1_MASK 0xFFFF0000 // BAMISSCOUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2n_MASK 0x0000FFFF // BAMISSCOUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2np1_MASK 0xFFFF0000 // ACKFAILCOUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2n_MASK 0x0000FFFF // ACKFAILCOUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2np1_MASK 0xFFFF0000 // FRAMERETRYCOUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2n_MASK 0x0000FFFF // FRAMERETRYCOUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2np1_MASK 0xFFFF0000 // FRAMERETRY2COUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2n_MASK 0x0000FFFF // FRAMERETRY2COUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2n_SHFT 0 -+ -+#define BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2np1_MASK 0xFFFF0000 // FRAMERETRY3COUNT2np1[31..16] -+#define BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2np1_SHFT 16 -+#define BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2n_MASK 0x0000FFFF // FRAMERETRY3COUNT2n[15..0] -+#define BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2n_SHFT 0 -+/* TXD */ -+ -+#define MT_TXD1_ETYP BIT(15) -+#define MT_TXD1_VLAN BIT(14) -+#define MT_TXD1_RMVL BIT(13) -+#define MT_TXD1_AMS BIT(13) -+#define MT_TXD1_EOSP BIT(12) -+#define MT_TXD1_MRD BIT(11) -+ -+#define MT_TXD7_CTXD BIT(26) -+#define MT_TXD7_CTXD_CNT GENMASK(25, 23) -+#define MT_TXD7_TAT GENMASK(9, 0) -+ -+#endif -+#endif -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -new file mode 100644 -index 0000000..62d3a99 ---- /dev/null -+++ b/mt7915/mtk_debugfs.c -@@ -0,0 +1,3750 @@ -+#include -+#include "mt7915.h" -+#include "mt7915_debug.h" -+#include "mac.h" -+#include "mcu.h" -+ -+#ifdef MTK_DEBUG -+#define LWTBL_IDX2BASE_ID GENMASK(14, 8) -+#define LWTBL_IDX2BASE_DW GENMASK(7, 2) -+#define LWTBL_IDX2BASE(_id, _dw) (MT_DBG_WTBL_BASE | \ -+ FIELD_PREP(LWTBL_IDX2BASE_ID, _id) | \ -+ FIELD_PREP(LWTBL_IDX2BASE_DW, _dw)) -+ -+#define UWTBL_IDX2BASE_ID GENMASK(12, 6) -+#define UWTBL_IDX2BASE_DW GENMASK(5, 2) -+#define UWTBL_IDX2BASE(_id, _dw) (MT_DBG_UWTBL_TOP_BASE | 0x2000 | \ -+ FIELD_PREP(UWTBL_IDX2BASE_ID, _id) | \ -+ FIELD_PREP(UWTBL_IDX2BASE_DW, _dw)) -+ -+#define KEYTBL_IDX2BASE_KEY GENMASK(12, 6) -+#define KEYTBL_IDX2BASE_DW GENMASK(5, 2) -+#define KEYTBL_IDX2BASE(_key, _dw) (MT_DBG_UWTBL_TOP_BASE | 0x2000 | \ -+ FIELD_PREP(KEYTBL_IDX2BASE_KEY, _key) | \ -+ FIELD_PREP(KEYTBL_IDX2BASE_DW, _dw)) -+ -+enum mt7915_wtbl_type { -+ WTBL_TYPE_LMAC, /* WTBL in LMAC */ -+ WTBL_TYPE_UMAC, /* WTBL in UMAC */ -+ WTBL_TYPE_KEY, /* Key Table */ -+ MAX_NUM_WTBL_TYPE -+}; -+ -+static int mt7915_wtbl_read_raw(struct mt7915_dev *dev, u16 idx, -+ enum mt7915_wtbl_type type, u16 start_dw, -+ u16 len, void *buf) -+{ -+ u32 *dest_cpy = (u32 *)buf; -+ u32 size_dw = len; -+ u32 src = 0; -+ -+ if (!buf) -+ return 0xFF; -+ -+ if (type == WTBL_TYPE_LMAC) { -+ mt76_wr(dev, MT_DBG_WTBLON_TOP_WDUCR, -+ FIELD_PREP(MT_DBG_WTBLON_TOP_WDUCR_GROUP, (idx >> 7))); -+ src = LWTBL_IDX2BASE(idx, start_dw); -+ } else if (type == WTBL_TYPE_UMAC) { -+ mt76_wr(dev, MT_DBG_UWTBL_TOP_WDUCR, -+ FIELD_PREP(MT_UWTBL_TOP_WDUCR_GROUP, (idx >> 7))); -+ src = UWTBL_IDX2BASE(idx, start_dw); -+ } else if (type == WTBL_TYPE_KEY) { -+ mt76_wr(dev, MT_DBG_UWTBL_TOP_WDUCR, -+ MT_UWTBL_TOP_WDUCR_TARGET | -+ FIELD_PREP(MT_UWTBL_TOP_WDUCR_GROUP, (idx >> 7))); -+ src = KEYTBL_IDX2BASE(idx, start_dw); -+ } -+ -+ while (size_dw--) { -+ *dest_cpy++ = mt76_rr(dev, src); -+ src += 4; -+ }; -+ -+ return 0; -+} -+ -+static int mt7915_wtbl_write_raw(struct mt7915_dev *dev, u16 idx, -+ enum mt7915_wtbl_type type, u16 start_dw, -+ u32 val) -+{ -+ u32 addr = 0; -+ -+ if (type == WTBL_TYPE_LMAC) { -+ mt76_wr(dev, MT_DBG_WTBLON_TOP_WDUCR, -+ FIELD_PREP(MT_WTBLON_TOP_WDUCR_GROUP, (idx >> 7))); -+ addr = LWTBL_IDX2BASE(idx, start_dw); -+ } else if (type == WTBL_TYPE_UMAC) { -+ mt76_wr(dev, MT_DBG_UWTBL_TOP_WDUCR, -+ FIELD_PREP(MT_UWTBL_TOP_WDUCR_GROUP, (idx >> 7))); -+ addr = UWTBL_IDX2BASE(idx, start_dw); -+ } else if (type == WTBL_TYPE_KEY) { -+ mt76_wr(dev, MT_DBG_UWTBL_TOP_WDUCR, -+ MT_UWTBL_TOP_WDUCR_TARGET | -+ FIELD_PREP(MT_UWTBL_TOP_WDUCR_GROUP, (idx >> 7))); -+ addr = KEYTBL_IDX2BASE(idx, start_dw); -+ } -+ -+ mt76_wr(dev, addr, val); -+ -+ return 0; -+} -+ -+void mt7915_packet_log_to_host(struct mt7915_dev *dev, const void *data, int len, int type, int des_len) -+{ -+ struct bin_debug_hdr *hdr; -+ char *buf; -+ -+ if (len > 1500 - sizeof(*hdr)) -+ len = 1500 - sizeof(*hdr); -+ -+ buf = kzalloc(sizeof(*hdr) + len, GFP_KERNEL); -+ if (!buf) -+ return; -+ -+ hdr = (struct bin_debug_hdr *)buf; -+ hdr->magic_num = cpu_to_le32(PKT_BIN_DEBUG_MAGIC); -+ hdr->serial_id = cpu_to_le16(dev->dbg.fwlog_seq++); -+ hdr->msg_type = cpu_to_le16(type); -+ hdr->len = cpu_to_le16(len); -+ hdr->des_len = cpu_to_le16(des_len); -+ -+ memcpy(buf + sizeof(*hdr), data, len); -+ -+ mt7915_debugfs_rx_log(dev, buf, sizeof(*hdr) + len); -+} -+ -+static int -+mt7915_fw_debug_module_set(void *data, u64 module) -+{ -+ struct mt7915_dev *dev = data; -+ -+ dev->dbg.fw_dbg_module = module; -+ return 0; -+} -+ -+static int -+mt7915_fw_debug_module_get(void *data, u64 *module) -+{ -+ struct mt7915_dev *dev = data; -+ -+ *module = dev->dbg.fw_dbg_module; -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_module, mt7915_fw_debug_module_get, -+ mt7915_fw_debug_module_set, "%lld\n"); -+ -+static int -+mt7915_fw_debug_level_set(void *data, u64 level) -+{ -+ struct mt7915_dev *dev = data; -+ -+ dev->dbg.fw_dbg_lv = level; -+ mt7915_mcu_fw_dbg_ctrl(dev, dev->dbg.fw_dbg_module, dev->dbg.fw_dbg_lv); -+ return 0; -+} -+ -+static int -+mt7915_fw_debug_level_get(void *data, u64 *level) -+{ -+ struct mt7915_dev *dev = data; -+ -+ *level = dev->dbg.fw_dbg_lv; -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_level, mt7915_fw_debug_level_get, -+ mt7915_fw_debug_level_set, "%lld\n"); -+ -+#define MAX_TX_MODE 12 -+static char *HW_TX_MODE_STR[] = {"CCK", "OFDM", "HT-Mix", "HT-GF", "VHT", -+ "N/A", "N/A", "N/A", "HE_SU", "HE_EXT_SU", -+ "HE_TRIG", "HE_MU", "N/A"}; -+static char *HW_TX_RATE_CCK_STR[] = {"1M", "2Mlong", "5.5Mlong", "11Mlong", -+ "N/A", "2Mshort", "5.5Mshort", "11Mshort", -+ "N/A"}; -+static char *HW_TX_RATE_OFDM_STR[] = {"6M", "9M", "12M", "18M", "24M", "36M", -+ "48M", "54M", "N/A"}; -+static char *fcap_str[] = {"20MHz", "20/40MHz", "20/40/80MHz", -+ "20/40/80/160/80+80MHz"}; -+ -+static char *hw_rate_ofdm_str(u16 ofdm_idx) -+{ -+ switch (ofdm_idx) { -+ case 11: /* 6M */ -+ return HW_TX_RATE_OFDM_STR[0]; -+ -+ case 15: /* 9M */ -+ return HW_TX_RATE_OFDM_STR[1]; -+ -+ case 10: /* 12M */ -+ return HW_TX_RATE_OFDM_STR[2]; -+ -+ case 14: /* 18M */ -+ return HW_TX_RATE_OFDM_STR[3]; -+ -+ case 9: /* 24M */ -+ return HW_TX_RATE_OFDM_STR[4]; -+ -+ case 13: /* 36M */ -+ return HW_TX_RATE_OFDM_STR[5]; -+ -+ case 8: /* 48M */ -+ return HW_TX_RATE_OFDM_STR[6]; -+ -+ case 12: /* 54M */ -+ return HW_TX_RATE_OFDM_STR[7]; -+ -+ default: -+ return HW_TX_RATE_OFDM_STR[8]; -+ } -+} -+ -+static char *hw_rate_str(u8 mode, u16 rate_idx) -+{ -+ if (mode == 0) -+ return rate_idx < 8 ? HW_TX_RATE_CCK_STR[rate_idx] : HW_TX_RATE_CCK_STR[8]; -+ else if (mode == 1) -+ return hw_rate_ofdm_str(rate_idx); -+ else -+ return "MCS"; -+} -+ -+static void parse_rate(struct seq_file *s, u16 rate_idx, u16 txrate) -+{ -+ u16 txmode, mcs, nss, stbc; -+ -+ txmode = FIELD_GET(GENMASK(9, 6), txrate); -+ mcs = FIELD_GET(GENMASK(5, 0), txrate); -+ nss = FIELD_GET(GENMASK(12, 10), txrate); -+ stbc = FIELD_GET(BIT(13), txrate); -+ -+ seq_printf(s, "\tRate%d(0x%x):TxMode=%d(%s), TxRate=%d(%s), Nsts=%d, STBC=%d\n", -+ rate_idx + 1, txrate, -+ txmode, (txmode < MAX_TX_MODE ? HW_TX_MODE_STR[txmode] : HW_TX_MODE_STR[MAX_TX_MODE]), -+ mcs, hw_rate_str(txmode, mcs), nss, stbc); -+} -+ -+#define LWTBL_LEN_IN_DW 32 -+#define UWTBL_LEN_IN_DW 8 -+#define ONE_KEY_ENTRY_LEN_IN_DW 8 -+static int mt7915_sta_info(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u8 lwtbl[LWTBL_LEN_IN_DW*4] = {0}; -+ u16 i = 0; -+ -+ for (i=0; i < mt7915_wtbl_size(dev); i++) { -+ mt7915_wtbl_read_raw(dev, i, WTBL_TYPE_LMAC, 0, -+ LWTBL_LEN_IN_DW, lwtbl); -+ if (lwtbl[4] || lwtbl[5] || lwtbl[6] || lwtbl[7] || lwtbl[0] || lwtbl[1]) -+ seq_printf(s, "wcid:%d\tAddr: %02x:%02x:%02x:%02x:%02x:%02x\n", -+ i, lwtbl[4], lwtbl[5], lwtbl[6], lwtbl[7], lwtbl[0], lwtbl[1]); -+ } -+ -+ return 0; -+} -+ -+static int mt7915_wtbl_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u8 lwtbl[LWTBL_LEN_IN_DW*4] = {0}; -+ int x; -+ u32 *addr = 0; -+ u32 dw_value = 0; -+ -+ mt7915_wtbl_read_raw(dev, dev->wlan_idx, WTBL_TYPE_LMAC, 0, -+ LWTBL_LEN_IN_DW, lwtbl); -+ seq_printf(s, "Dump WTBL info of WLAN_IDX:%d\n", dev->wlan_idx); -+ seq_printf(s, "LMAC WTBL Addr: group:0x%x=0x%x addr: 0x%lx\n", -+ MT_DBG_WTBLON_TOP_WDUCR, -+ mt76_rr(dev, MT_DBG_WTBLON_TOP_WDUCR), -+ LWTBL_IDX2BASE(dev->wlan_idx, 0)); -+ for (x = 0; x < LWTBL_LEN_IN_DW; x++) { -+ seq_printf(s, "DW%02d: %02x %02x %02x %02x\n", -+ x, -+ lwtbl[x * 4 + 3], -+ lwtbl[x * 4 + 2], -+ lwtbl[x * 4 + 1], -+ lwtbl[x * 4]); -+ } -+ -+ seq_printf(s, "\n\tAddr: %02x:%02x:%02x:%02x:%02x:%02x(D0[B0~15], D1[B0~31])\n", -+ lwtbl[4], lwtbl[5], lwtbl[6], lwtbl[7], lwtbl[0], lwtbl[1]); -+ -+ // DW0, DW1 -+ seq_printf(s, "LWTBL DW 0/1\n\t"); -+ addr = (u32 *)&(lwtbl[0]); -+ dw_value = *addr; -+ seq_printf(s, "MUAR_IDX:%lu/ ", FIELD_GET(GENMASK(21, 16), dw_value)); -+ seq_printf(s, "RCA1:%ld/ ", FIELD_GET(BIT(22), dw_value)); -+ seq_printf(s, "KID:%lu/ ", FIELD_GET(GENMASK(24, 23), dw_value)); -+ seq_printf(s, "RCID:%ld/ ", FIELD_GET(BIT(25), dw_value)); -+ seq_printf(s, "FROM_DS:%ld\n\t", FIELD_GET(BIT(26), dw_value)); -+ seq_printf(s, "TO_DS:%ld/ ", FIELD_GET(BIT(27), dw_value)); -+ seq_printf(s, "RV:%ld/ ", FIELD_GET(BIT(28), dw_value)); -+ seq_printf(s, "RCA2:%ld/ ", FIELD_GET(BIT(29), dw_value)); -+ seq_printf(s, "WPI_FLAG:%ld\n", FIELD_GET(BIT(30), dw_value)); -+ -+ // DW2 -+ seq_printf(s, "LWTBL DW 2\n\t"); -+ addr = (u32 *)&(lwtbl[2*4]); -+ dw_value = *addr; -+ seq_printf(s, "AID12:%lu/ ", FIELD_GET(GENMASK(11, 0), dw_value)); -+ seq_printf(s, "SU:%ld/ ", FIELD_GET(BIT(12), dw_value)); -+ seq_printf(s, "SPP_EN:%ld/ ", FIELD_GET(BIT(13), dw_value)); -+ seq_printf(s, "WPI_EVEN:%ld\n\t",FIELD_GET(BIT(14), dw_value)); -+ seq_printf(s, "CIPHER:%lu/ ", FIELD_GET(GENMASK(20, 16), dw_value)); -+ seq_printf(s, "CIPHER_IGTK:%lu/ ",FIELD_GET(GENMASK(22, 21), dw_value)); -+ seq_printf(s, "AAD_OM:%ld\n\t", FIELD_GET(BIT(15), dw_value)); -+ seq_printf(s, "SW:%ld/ ", FIELD_GET(BIT(24), dw_value)); -+ seq_printf(s, "UL:%ld/ ", FIELD_GET(BIT(25), dw_value)); -+ seq_printf(s, "TX_POWER_SAVE:%ld\n\t", FIELD_GET(BIT(26), dw_value)); -+ seq_printf(s, "QOS:%ld/ ", FIELD_GET(BIT(27), dw_value)); -+ seq_printf(s, "HT:%ld/ ", FIELD_GET(BIT(28), dw_value)); -+ seq_printf(s, "VHT:%ld/ ", FIELD_GET(BIT(29), dw_value)); -+ seq_printf(s, "HE:%ld/ ", FIELD_GET(BIT(30), dw_value)); -+ seq_printf(s, "MESH:%ld\n", FIELD_GET(BIT(31), dw_value)); -+ -+ // DW3 -+ seq_printf(s, "LWTBL DW 3\n\t"); -+ addr = (u32 *)&(lwtbl[3*4]); -+ dw_value = *addr; -+ seq_printf(s, "WMM_Q:%lu/ ", FIELD_GET(GENMASK(1, 0), dw_value)); -+ seq_printf(s, "RXD_DUP_MODE:%lu\n\t", FIELD_GET(GENMASK(3, 2), dw_value)); -+ seq_printf(s, "VLAN2ETH:%ld/ ", FIELD_GET(BIT(4), dw_value)); -+ seq_printf(s, "BEAM_CHG:%ld/ ", FIELD_GET(BIT(5), dw_value)); -+ seq_printf(s, "DIS_BA256:%ld\n\t", FIELD_GET(BIT(6), dw_value)); -+ seq_printf(s, "PFMU_IDX:%lu/ ", FIELD_GET(GENMASK(15, 8), dw_value)); -+ seq_printf(s, "ULPF_IDX:%lu\n\t", FIELD_GET(GENMASK(23, 16), dw_value)); -+ seq_printf(s, "RIBF:%ld/ ", FIELD_GET(BIT(24), dw_value)); -+ seq_printf(s, "ULPF:%ld\n\t", FIELD_GET(BIT(25), dw_value)); -+ seq_printf(s, "IGN_FBK:%ld/ ", FIELD_GET(BIT(26), dw_value)); -+ seq_printf(s, "TBF:%ld/ ", FIELD_GET(BIT(29), dw_value)); -+ seq_printf(s, "TBF_VHT:%ld/ ", FIELD_GET(BIT(30), dw_value)); -+ seq_printf(s, "TBF_HE:%ld\n", FIELD_GET(BIT(31), dw_value)); -+ -+ // DW4 -+ seq_printf(s, "LWTBL DW 4\n\t"); -+ addr = (u32 *)&(lwtbl[4*4]); -+ dw_value = *addr; -+ seq_printf(s, "ANT_ID_STS0:%lu/ ", FIELD_GET(GENMASK(2, 0), dw_value)); -+ seq_printf(s, "STS1:%lu/ ", FIELD_GET(GENMASK(5, 3), dw_value)); -+ seq_printf(s, "STS2:%lu/ ", FIELD_GET(GENMASK(8, 6), dw_value)); -+ seq_printf(s, "STS3:%lu\n\t", FIELD_GET(GENMASK(11, 9), dw_value)); -+ seq_printf(s, "ANT_ID_STS4:%lu/ ", FIELD_GET(GENMASK(14, 12), dw_value)); -+ seq_printf(s, "STS5:%lu/ ", FIELD_GET(GENMASK(17, 15), dw_value)); -+ seq_printf(s, "STS6:%ld/ ", FIELD_GET(GENMASK(20, 18), dw_value)); -+ seq_printf(s, "STS7:%lu\n\t", FIELD_GET(GENMASK(23, 21), dw_value)); -+ seq_printf(s, "CASCAD:%ld/ ", FIELD_GET(BIT(24), dw_value)); -+ seq_printf(s, "LDPC_HT:%ld/ ", FIELD_GET(BIT(25), dw_value)); -+ seq_printf(s, "LDPC_VHT:%ld/ ", FIELD_GET(BIT(26), dw_value)); -+ seq_printf(s, "LDPC_HE:%ld\n\t", FIELD_GET(BIT(27), dw_value)); -+ seq_printf(s, "DIS_RHTR:%ld/ ", FIELD_GET(BIT(28), dw_value)); -+ seq_printf(s, "ALL_ACK:%ld/ ", FIELD_GET(BIT(29), dw_value)); -+ seq_printf(s, "DROP:%ld/ ", FIELD_GET(BIT(30), dw_value)); -+ seq_printf(s, "ACK_EN:%ld\n", FIELD_GET(BIT(31), dw_value)); -+ -+ // DW5 -+ seq_printf(s, "LWTBL DW 5\n\t"); -+ addr = (u32 *)&(lwtbl[5*4]); -+ dw_value = *addr; -+ seq_printf(s, "AF:%lu/ ", FIELD_GET(GENMASK(2, 0), dw_value)); -+ seq_printf(s, "AF_HE:%lu/ ", FIELD_GET(GENMASK(4, 3), dw_value)); -+ seq_printf(s, "RTS:%ld/ ", FIELD_GET(BIT(5), dw_value)); -+ seq_printf(s, "SMPS:%ld/ ", FIELD_GET(BIT(6), dw_value)); -+ seq_printf(s, "DYN_BW:%ld\n\t", FIELD_GET(BIT(7), dw_value)); -+ seq_printf(s, "MMSS:%lu/ ", FIELD_GET(GENMASK(10, 8), dw_value)); -+ seq_printf(s, "USR:%ld/ ", FIELD_GET(BIT(11), dw_value)); -+ seq_printf(s, "SR_RATE:%lu/ ", FIELD_GET(GENMASK(14, 12), dw_value)); -+ seq_printf(s, "SR_ABORT:%ld\n\t", FIELD_GET(BIT(15), dw_value)); -+ seq_printf(s, "TX_POWER_OFFSET:%lu/ ", FIELD_GET(GENMASK(21, 16), dw_value)); -+ seq_printf(s, "WTBL_MPDU_SIZE:%lu\n\t", FIELD_GET(GENMASK(23, 22), dw_value)); -+ seq_printf(s, "PE:%lu/ ", FIELD_GET(GENMASK(25, 24), dw_value)); -+ seq_printf(s, "DOPPL:%ld/ ", FIELD_GET(BIT(26), dw_value)); -+ seq_printf(s, "TXOP_PS_CAP:%ld/ ", FIELD_GET(BIT(27), dw_value)); -+ seq_printf(s, "DONOT_UPDATE_I_PSM:%ld\n\t", FIELD_GET(BIT(28), dw_value)); -+ seq_printf(s, "I_PSM:%ld/ ", FIELD_GET(BIT(29), dw_value)); -+ seq_printf(s, "PSM:%ld/ ", FIELD_GET(BIT(30), dw_value)); -+ seq_printf(s, "SKIP_TX:%ld\n", FIELD_GET(BIT(31), dw_value)); -+ -+ // DW6 -+ seq_printf(s, "LWTBL DW 6\n\t"); -+ seq_printf(s, "TID 0/1/2/3/4/5/6/7 BA_WIN_SIZE:"); -+ addr = (u32 *)&(lwtbl[6*4]); -+ dw_value = *addr; -+ seq_printf(s, "%lu/ ", FIELD_GET(GENMASK(3, 0), dw_value)); -+ seq_printf(s, "%lu/ ", FIELD_GET(GENMASK(7, 4), dw_value)); -+ seq_printf(s, "%lu/ ", FIELD_GET(GENMASK(11, 8), dw_value)); -+ seq_printf(s, "%lu/ ", FIELD_GET(GENMASK(15, 12), dw_value)); -+ seq_printf(s, "%lu/ ", FIELD_GET(GENMASK(19, 16), dw_value)); -+ seq_printf(s, "%lu/ ", FIELD_GET(GENMASK(23, 20), dw_value)); -+ seq_printf(s, "%lu/ ", FIELD_GET(GENMASK(27, 24), dw_value)); -+ seq_printf(s, "%lu\n", FIELD_GET(GENMASK(31, 28), dw_value)); -+ -+ // DW7 -+ seq_printf(s, "LWTBL DW 7\n\t"); -+ addr = (u32 *)&(lwtbl[7*4]); -+ dw_value = *addr; -+ seq_printf(s, "CBRN:%lu/ ", FIELD_GET(GENMASK(2, 0), dw_value)); -+ seq_printf(s, "DBNSS_EN:%ld/ ", FIELD_GET(BIT(3), dw_value)); -+ seq_printf(s, "BAF_EN:%ld/ ", FIELD_GET(BIT(4), dw_value)); -+ seq_printf(s, "RDGBA:%ld\n\t", FIELD_GET(BIT(5), dw_value)); -+ seq_printf(s, "RDG:%ld/ ", FIELD_GET(BIT(6), dw_value)); -+ seq_printf(s, "SPE_IDX:%lu/ ", FIELD_GET(GENMASK(11, 7), dw_value)); -+ seq_printf(s, "G2:%ld/ ", FIELD_GET(BIT(12), dw_value)); -+ seq_printf(s, "G4:%ld/ ", FIELD_GET(BIT(13), dw_value)); -+ seq_printf(s, "G8:%ld/ ", FIELD_GET(BIT(14), dw_value)); -+ seq_printf(s, "G16:%ld\n\t", FIELD_GET(BIT(15), dw_value)); -+ seq_printf(s, "G2_LTF:%lu/ ", FIELD_GET(GENMASK(17, 16), dw_value)); -+ seq_printf(s, "G4_LTF:%lu/ ", FIELD_GET(GENMASK(19, 18), dw_value)); -+ seq_printf(s, "G8_LTF:%lu/ ", FIELD_GET(GENMASK(21, 20), dw_value)); -+ seq_printf(s, "G16_LTF:%lu\n\t", FIELD_GET(GENMASK(23, 22), dw_value)); -+ seq_printf(s, "G2_HE:%lu/ ", FIELD_GET(GENMASK(25, 24), dw_value)); -+ seq_printf(s, "G4_HE:%lu/ ", FIELD_GET(GENMASK(27, 27), dw_value)); -+ seq_printf(s, "G8_HE:%lu/ ", FIELD_GET(GENMASK(29, 28), dw_value)); -+ seq_printf(s, "G16_HE:%lu\n", FIELD_GET(GENMASK(31, 30), dw_value)); -+ -+ // DW8 -+ seq_printf(s, "LWTBL DW 8\n\t"); -+ addr = (u32 *)&(lwtbl[8*4]); -+ dw_value = *addr; -+ seq_printf(s, "FAIL_CNT_AC0:%lu/ ", FIELD_GET(GENMASK(4, 0), dw_value)); -+ seq_printf(s, "AC1:%lu/ ", FIELD_GET(GENMASK(9, 5), dw_value)); -+ seq_printf(s, "AC2:%lu/ ", FIELD_GET(GENMASK(14, 10), dw_value)); -+ seq_printf(s, "AC3:%lu\n\t", FIELD_GET(GENMASK(19, 15), dw_value)); -+ seq_printf(s, "PARTIAL_AID:%lu/ ", FIELD_GET(GENMASK(28, 20), dw_value)); -+ seq_printf(s, "CHK_PER:%lu\n", FIELD_GET(BIT(31), dw_value)); -+ -+ // DW9 -+ seq_printf(s, "LWTBL DW 9\n\t"); -+ addr = (u32 *)&(lwtbl[9*4]); -+ dw_value = *addr; -+ seq_printf(s, "RX_AVG_MPDU:%lu/ ", FIELD_GET(GENMASK(13, 0), dw_value)); -+ seq_printf(s, "PRITX_SW_MODE:%ld/ ", FIELD_GET(BIT(16), dw_value)); -+ seq_printf(s, "PRITX_PLR:%ld\n\t", FIELD_GET(BIT(17), dw_value)); -+ seq_printf(s, "PRITX_DCM:%ld/ ", FIELD_GET(BIT(18), dw_value)); -+ seq_printf(s, "PRITX_ER160:%ld/ ", FIELD_GET(BIT(19), dw_value)); -+ seq_printf(s, "PRITX_ERSU:%lu\n\t", FIELD_GET(BIT(20), dw_value)); -+ seq_printf(s, "MPDU_FAIL_CNT:%lu/ ", FIELD_GET(GENMASK(25, 23), dw_value)); -+ seq_printf(s, "MPDU_OK_CNT:%lu/ ", FIELD_GET(GENMASK(28, 26), dw_value)); -+ seq_printf(s, "RATE_IDX:%lu\n\t", FIELD_GET(GENMASK(31, 29), dw_value)); -+ seq_printf(s, "FCAP:%s\n", fcap_str[FIELD_GET(GENMASK(22, 21), dw_value)]); -+ -+ // DW10 -+ seq_printf(s, "LWTBL DW 10\n"); -+ addr = (u32 *)&(lwtbl[10*4]); -+ dw_value = *addr; -+ parse_rate(s, 0, FIELD_GET(GENMASK(13, 0), dw_value)); -+ parse_rate(s, 1, FIELD_GET(GENMASK(29, 16), dw_value)); -+ // DW11 -+ seq_printf(s, "LWTBL DW 11\n"); -+ addr = (u32 *)&(lwtbl[11*4]); -+ dw_value = *addr; -+ parse_rate(s, 2, FIELD_GET(GENMASK(13, 0), dw_value)); -+ parse_rate(s, 3, FIELD_GET(GENMASK(29, 16), dw_value)); -+ // DW12 -+ seq_printf(s, "LWTBL DW 12\n"); -+ addr = (u32 *)&(lwtbl[12*4]); -+ dw_value = *addr; -+ parse_rate(s, 4, FIELD_GET(GENMASK(13, 0), dw_value)); -+ parse_rate(s, 5, FIELD_GET(GENMASK(29, 16), dw_value)); -+ // DW13 -+ seq_printf(s, "LWTBL DW 13\n"); -+ addr = (u32 *)&(lwtbl[13*4]); -+ dw_value = *addr; -+ parse_rate(s, 6, FIELD_GET(GENMASK(13, 0), dw_value)); -+ parse_rate(s, 7, FIELD_GET(GENMASK(29, 16), dw_value)); -+ -+ //DW28 -+ seq_printf(s, "LWTBL DW 28\n\t"); -+ addr = (u32 *)&(lwtbl[28*4]); -+ dw_value = *addr; -+ seq_printf(s, "OM_INFO:%lu/ ", FIELD_GET(GENMASK(11, 0), dw_value)); -+ seq_printf(s, "OM_RXD_DUP_MODE:%u\n\t", !!(dw_value & BIT(12)) ); -+ -+ //DW29 -+ seq_printf(s, "LWTBL DW 29\n"); -+ addr = (u32 *)&(lwtbl[29*4]); -+ dw_value = *addr; -+ seq_printf(s, "USER_RSSI:%lu/ ", FIELD_GET(GENMASK(8, 0), dw_value)); -+ seq_printf(s, "USER_SNR:%lu/ ", FIELD_GET(GENMASK(14, 9), dw_value)); -+ seq_printf(s, "RAPID_REACTION_RATE:%lu/ ", FIELD_GET(GENMASK(26, 16), dw_value)); -+ seq_printf(s, "HT_AMSDU(Read Only):%u/ ", !!(dw_value & BIT(30)) ); -+ seq_printf(s, "AMSDU_CROSS_LG(Read Only):%u\n\t ", !!(dw_value & BIT(31))); -+ -+ //DW30 -+ seq_printf(s, "LWTBL DW 30\n\t"); -+ addr = (u32 *)&(lwtbl[30*4]); -+ dw_value = *addr; -+ seq_printf(s, "RCPI 0:%lu/ ", FIELD_GET(GENMASK(7, 0), dw_value)); -+ seq_printf(s, "RCPI 1:%lu/ ", FIELD_GET(GENMASK(15, 8), dw_value)); -+ seq_printf(s, "RCPI 2:%lu/ ", FIELD_GET(GENMASK(23, 16), dw_value)); -+ seq_printf(s, "RCPI 3:%lu\n\t", FIELD_GET(GENMASK(31, 24), dw_value)); -+ -+ //DW31 -+ seq_printf(s, "LWTBL DW 31\n\t"); -+ addr = (u32 *)&(lwtbl[31*4]); -+ dw_value = *addr; -+ seq_printf(s, "RCPI 4:%lu/ ", FIELD_GET(GENMASK(7, 0), dw_value)); -+ seq_printf(s, "RCPI 5:%lu/ ", FIELD_GET(GENMASK(15, 8), dw_value)); -+ seq_printf(s, "RCPI 6:%lu/ ", FIELD_GET(GENMASK(23, 16), dw_value)); -+ seq_printf(s, "RCPI 7:%lu\n\t", FIELD_GET(GENMASK(31, 24), dw_value)); -+ -+ return 0; -+} -+ -+static int mt7915_uwtbl_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u8 uwtbl[UWTBL_LEN_IN_DW * 4] = {0}; -+ u8 keytbl[ONE_KEY_ENTRY_LEN_IN_DW*4] = {0}; -+ int x; -+ u32 *addr = 0; -+ u32 dw_value = 0; -+ u32 amsdu_len = 0; -+ u32 u2SN = 0; -+ u16 keyloc0, keyloc1; -+ -+ mt7915_wtbl_read_raw(dev, dev->wlan_idx, WTBL_TYPE_UMAC, 0, -+ UWTBL_LEN_IN_DW, uwtbl); -+ seq_printf(s, "Dump WTBL info of WLAN_IDX:%d\n", dev->wlan_idx); -+ seq_printf(s, "UMAC WTBL Addr: group:0x%x=0x%x addr: 0x%lx\n", -+ MT_DBG_UWTBL_TOP_WDUCR, -+ mt76_rr(dev, MT_DBG_UWTBL_TOP_BASE), -+ UWTBL_IDX2BASE(dev->wlan_idx, 0)); -+ for (x = 0; x < UWTBL_LEN_IN_DW; x++) { -+ seq_printf(s, "DW%02d: %02x %02x %02x %02x\n", -+ x, -+ uwtbl[x * 4 + 3], -+ uwtbl[x * 4 + 2], -+ uwtbl[x * 4 + 1], -+ uwtbl[x * 4]); -+ } -+ -+ /* UMAC WTBL DW 0 */ -+ seq_printf(s, "\nUWTBL PN\n\t"); -+ addr = (u32 *)&(uwtbl[0]); -+ dw_value = *addr; -+ seq_printf(s, "PN0:%lu/ ", FIELD_GET(GENMASK(7, 0), dw_value)); -+ seq_printf(s, "PN1:%lu/ ", FIELD_GET(GENMASK(15, 8), dw_value)); -+ seq_printf(s, "PN2:%lu\n\t", FIELD_GET(GENMASK(23, 16), dw_value)); -+ seq_printf(s, "PN3:%lu/ ", FIELD_GET(GENMASK(31, 24), dw_value)); -+ -+ addr = (u32 *)&(uwtbl[1 * 4]); -+ dw_value = *addr; -+ seq_printf(s, "PN4:%lu/ ", FIELD_GET(GENMASK(7, 0), dw_value)); -+ seq_printf(s, "PN5:%lu\n", FIELD_GET(GENMASK(15, 8), dw_value)); -+ -+ /* UMAC WTBL DW SN part */ -+ seq_printf(s, "\nUWTBL SN\n"); -+ addr = (u32 *)&(uwtbl[2 * 4]); -+ dw_value = *addr; -+ seq_printf(s, "TID0_AC0_SN:%lu\n", FIELD_GET(GENMASK(11, 0), dw_value)); -+ seq_printf(s, "TID1_AC1_SN:%lu\n", FIELD_GET(GENMASK(23, 12), dw_value)); -+ -+ u2SN = FIELD_GET(GENMASK(31, 24), dw_value); -+ addr = (u32 *)&(uwtbl[3 * 4]); -+ dw_value = *addr; -+ u2SN |= FIELD_GET(GENMASK(3, 0), dw_value); -+ seq_printf(s, "TID2_AC2_SN:%u\n", u2SN); -+ seq_printf(s, "TID3_AC3_SN:%lu\n", FIELD_GET(GENMASK(15, 4), dw_value)); -+ seq_printf(s, "TID4_SN:%lu\n", FIELD_GET(GENMASK(27, 16), dw_value)); -+ -+ u2SN = FIELD_GET(GENMASK(31, 28), dw_value); -+ addr = (u32 *)&(uwtbl[4 * 4]); -+ dw_value = *addr; -+ u2SN |= FIELD_GET(GENMASK(7, 0), dw_value); -+ seq_printf(s, "TID5_SN:%u\n", u2SN); -+ seq_printf(s, "TID6_SN:%lu\n", FIELD_GET(GENMASK(19, 8), dw_value)); -+ seq_printf(s, "TID7_SN:%lu\n", FIELD_GET(GENMASK(31, 20), dw_value)); -+ -+ addr = (u32 *)&(uwtbl[1 * 4]); -+ dw_value = *addr; -+ seq_printf(s, "COM_SN:%lu\n", FIELD_GET(GENMASK(27, 16), dw_value)); -+ -+ /* UMAC WTBL DW 0 */ -+ seq_printf(s, "\nUWTBL others\n"); -+ -+ addr = (u32 *)&(uwtbl[5 * 4]); -+ dw_value = *addr; -+ keyloc0 = FIELD_GET(GENMASK(10, 0), dw_value); -+ keyloc1 = FIELD_GET(GENMASK(26, 16), dw_value); -+ seq_printf(s, "\tKey Loc 1/2:%lu/%lu\n", -+ FIELD_GET(GENMASK(10, 0), dw_value), -+ FIELD_GET(GENMASK(26, 16), dw_value)); -+ seq_printf(s, "\tUWTBL_QOS:%lu\n", FIELD_GET(BIT(27), dw_value)); -+ seq_printf(s, "\tUWTBL_HT_VHT_HE:%lu\n", FIELD_GET(BIT(28), dw_value)); -+ -+ addr = (u32 *)&(uwtbl[6*4]); -+ dw_value = *addr; -+ seq_printf(s, "\tHW AMSDU Enable:%lu\n", FIELD_GET(BIT(9), dw_value)); -+ -+ amsdu_len = FIELD_GET(GENMASK(5, 0), dw_value); -+ if (amsdu_len == 0) -+ seq_printf(s, "\tHW AMSDU Len:invalid (WTBL value=0x%x)\n", amsdu_len); -+ else if (amsdu_len == 1) -+ seq_printf(s, "\tHW AMSDU Len:%d~%d (WTBL value=0x%x)\n", -+ 1, -+ 255, -+ amsdu_len); -+ else -+ seq_printf(s, "\tHW AMSDU Len:%d~%d (WTBL value=0x%x)\n", -+ 256 * (amsdu_len - 1), -+ 256 * (amsdu_len - 1) + 255, -+ amsdu_len -+ ); -+ seq_printf(s, "\tHW AMSDU Num:%lu (WTBL value=0x%lx)\n", -+ FIELD_GET(GENMASK(8, 6), dw_value) + 1, -+ FIELD_GET(GENMASK(8, 6), dw_value)); -+ -+ /* Parse KEY link */ -+ seq_printf(s, "\n\tkeyloc0:%d\n", keyloc0); -+ if(keyloc0 != GENMASK(10, 0)) { -+ mt7915_wtbl_read_raw(dev, keyloc0, WTBL_TYPE_KEY, -+ 0, ONE_KEY_ENTRY_LEN_IN_DW, keytbl); -+ seq_printf(s, "KEY WTBL Addr: group:0x%x=0x%x addr: 0x%lx\n", -+ MT_DBG_UWTBL_TOP_WDUCR, -+ mt76_rr(dev, MT_DBG_UWTBL_TOP_BASE), -+ KEYTBL_IDX2BASE(keyloc0, 0)); -+ -+ for (x = 0; x < ONE_KEY_ENTRY_LEN_IN_DW; x++) { -+ seq_printf(s, "DW%02d: %02x %02x %02x %02x\n", -+ x, -+ keytbl[x * 4 + 3], -+ keytbl[x * 4 + 2], -+ keytbl[x * 4 + 1], -+ keytbl[x * 4]); -+ } -+ } -+ -+ seq_printf(s, "\n\tkeyloc1:%d\n", keyloc1); -+ if(keyloc1 != GENMASK(26, 16)) { -+ mt7915_wtbl_read_raw(dev, keyloc1, WTBL_TYPE_KEY, -+ 0, ONE_KEY_ENTRY_LEN_IN_DW, keytbl); -+ seq_printf(s, "KEY WTBL Addr: group:0x%x=0x%x addr: 0x%lx\n", -+ MT_DBG_UWTBL_TOP_WDUCR, -+ mt76_rr(dev, MT_DBG_UWTBL_TOP_BASE), -+ KEYTBL_IDX2BASE(keyloc1, 0)); -+ -+ for (x = 0; x < ONE_KEY_ENTRY_LEN_IN_DW; x++) { -+ seq_printf(s, "DW%02d: %02x %02x %02x %02x\n", -+ x, -+ keytbl[x * 4 + 3], -+ keytbl[x * 4 + 2], -+ keytbl[x * 4 + 1], -+ keytbl[x * 4]); -+ } -+ } -+ return 0; -+} -+ -+static void -+dump_dma_tx_ring_info(struct seq_file *s, struct mt7915_dev *dev, char *str, u32 ring_base) -+{ -+ u32 base, cnt, cidx, didx, queue_cnt; -+ -+ base= mt76_rr(dev, ring_base); -+ cnt = mt76_rr(dev, ring_base + 4); -+ cidx = mt76_rr(dev, ring_base + 8); -+ didx = mt76_rr(dev, ring_base + 12); -+ queue_cnt = (cidx >= didx) ? (cidx - didx) : (cidx - didx + cnt); -+ -+ seq_printf(s, "%20s %10x %10x %10x %10x %10x\n", str, base, cnt, cidx, didx, queue_cnt); -+} -+ -+static void -+dump_dma_rx_ring_info(struct seq_file *s, struct mt7915_dev *dev, char *str, u32 ring_base) -+{ -+ u32 base, cnt, cidx, didx, queue_cnt; -+ -+ base= mt76_rr(dev, ring_base); -+ cnt = mt76_rr(dev, ring_base + 4); -+ cidx = mt76_rr(dev, ring_base + 8); -+ didx = mt76_rr(dev, ring_base + 12); -+ queue_cnt = (didx > cidx) ? (didx - cidx - 1) : (didx - cidx + cnt - 1); -+ -+ seq_printf(s, "%20s %10x %10x %10x %10x %10x\n", str, base, cnt, cidx, didx, queue_cnt); -+} -+ -+static void -+mt7915_show_host_dma_info(struct seq_file *s, struct mt7915_dev *dev) -+{ -+ u32 sys_ctrl[10] = {}; -+ -+ /* HOST DMA */ -+ sys_ctrl[0] = mt76_rr(dev, MT_DBG_INT_SOURCE_CSR); -+ sys_ctrl[1] = mt76_rr(dev, MT_DBG_INT_MASK_CSR); -+ sys_ctrl[2] = mt76_rr(dev, MT_DBG_WFDMA0_INT_SOURCE_CSR); -+ sys_ctrl[3] = mt76_rr(dev, MT_DBG_WFDMA0_INT_MASK_CSR); -+ sys_ctrl[4] = mt76_rr(dev, MT_DBG_WFDMA1_INT_SOURCE_CSR); -+ sys_ctrl[5] = mt76_rr(dev, MT_DBG_WFDMA1_INT_MASK_CSR); -+ sys_ctrl[6] = mt76_rr(dev, MT_DBG_WFDMA0_GLO_CFG); -+ sys_ctrl[7] = mt76_rr(dev, MT_DBG_WFDMA1_GLO_CFG); -+ seq_printf(s, "HOST_DMA Configuration\n"); -+ seq_printf(s, "%10s %10s %10s %10s %10s %10s\n", -+ "DMA", "IntCSR", "IntMask", "Glocfg", "Tx/RxEn", "Tx/RxBusy"); -+ seq_printf(s, "%10s %10x %10x\n", -+ "Merge", sys_ctrl[0], sys_ctrl[1]); -+ seq_printf(s, "%10s %10x %10x %10x %4lx/%5lx %4lx/%5lx\n", -+ "DMA0", sys_ctrl[2], sys_ctrl[3], sys_ctrl[6], -+ FIELD_GET(MT_DBG_WFDMA0_GLO_CFG_TX_DMA_EN, sys_ctrl[6]), -+ FIELD_GET(MT_DBG_WFDMA0_GLO_CFG_RX_DMA_EN, sys_ctrl[6]), -+ FIELD_GET(MT_DBG_WFDMA0_GLO_CFG_TX_BUSY_MASK, sys_ctrl[6]), -+ FIELD_GET(MT_DBG_WFDMA0_GLO_CFG_RX_BUSY_MASK, sys_ctrl[6])); -+ -+ seq_printf(s, "%10s %10x %10x %10x %4lx/%5lx %4lx/%5lx\n", -+ "DMA1", sys_ctrl[4], sys_ctrl[5], sys_ctrl[7], -+ FIELD_GET(MT_DBG_WFDMA1_GLO_CFG_TX_DMA_EN, sys_ctrl[7]), -+ FIELD_GET(MT_DBG_WFDMA1_GLO_CFG_RX_DMA_EN, sys_ctrl[7]), -+ FIELD_GET(MT_DBG_WFDMA1_GLO_CFG_TX_BUSY_MASK, sys_ctrl[7]), -+ FIELD_GET(MT_DBG_WFDMA1_GLO_CFG_RX_BUSY_MASK, sys_ctrl[7])); -+ -+ sys_ctrl[0] = mt76_rr(dev, MT_DBG_INT1_SOURCE_CSR); -+ sys_ctrl[1] = mt76_rr(dev, MT_DBG_INT1_MASK_CSR); -+ sys_ctrl[2] = mt76_rr(dev, MT_DBG_WFDMA0_PCIE1_INT_SOURCE_CSR); -+ sys_ctrl[3] = mt76_rr(dev, MT_DBG_WFDMA0_PCIE1_INT_MASK_CSR); -+ sys_ctrl[4] = mt76_rr(dev, MT_DBG_WFDMA1_PCIE1_INT_SOURCE_CSR); -+ sys_ctrl[5] = mt76_rr(dev, MT_DBG_WFDMA1_PCIE1_INT_MASK_CSR); -+ sys_ctrl[6] = mt76_rr(dev, MT_DBG_WFDMA0_PCIE1_GLO_CFG); -+ sys_ctrl[7] = mt76_rr(dev, MT_DBG_WFDMA1_PCIE1_GLO_CFG); -+ seq_printf(s, "%10s %10x %10x\n", -+ "MergeP1", sys_ctrl[0], sys_ctrl[1]); -+ seq_printf(s, "%10s %10x %10x %10x %4lx/%5lx %4lx/%5lx\n", -+ "DMA0P1", sys_ctrl[2], sys_ctrl[3], sys_ctrl[6], -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_TX_DMA_EN, sys_ctrl[6]), -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_RX_DMA_EN, sys_ctrl[6]), -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_TX_BUSY_MASK, sys_ctrl[6]), -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_RX_BUSY_MASK, sys_ctrl[6])); -+ seq_printf(s, "%10s %10x %10x %10x %4lx/%5lx %4lx/%5lx\n", -+ "DMA1P1", sys_ctrl[4], sys_ctrl[5], sys_ctrl[7], -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_TX_DMA_EN, sys_ctrl[7]), -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_RX_DMA_EN, sys_ctrl[7]), -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_TX_BUSY_MASK, sys_ctrl[7]), -+ FIELD_GET(MT_DBG_WFDMA0_PCIE1_GLO_CFG_RX_BUSY_MASK, sys_ctrl[7])); -+ -+ seq_printf(s, "HOST_DMA0 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_rx_ring_info(s, dev, "R0:Data0(MAC2H)", MT_DBG_RX_DATA_RING_CTRL(0)); -+ dump_dma_rx_ring_info(s, dev, "R1:Data1(MAC2H)", MT_DBG_RX_DATA_RING_CTRL(1)); -+ -+ seq_printf(s, "HOST_DMA0 PCIe 1 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_rx_ring_info(s, dev, "R1:Data1(MAC2H)", MT_DBG_WFDMA0_PCIE1_RX1_CTRL0); -+ -+ seq_printf(s, "HOST_DMA1 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T16:FWDL", MT_DBG_TX_RING_CTRL(0)); -+ dump_dma_tx_ring_info(s, dev, "T17:Cmd(H2WM)", MT_DBG_TX_RING_CTRL(1)); -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed)) { -+ dump_dma_tx_ring_info(s, dev, "T18:TXD0(H2WA)", MT_DBG_WFDMA_WED_TX_CTRL(0)); -+ dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_WFDMA_WED_TX_CTRL(1)); -+ } else { -+ dump_dma_tx_ring_info(s, dev, "T18:TXD0(H2WA)", MT_DBG_TX_RING_CTRL(2)); -+ dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_TX_RING_CTRL(3)); -+ } -+ dump_dma_tx_ring_info(s, dev, "T20:Cmd(H2WA)", MT_DBG_TX_RING_CTRL(4)); -+ dump_dma_rx_ring_info(s, dev, "R0:Event(WM2H)", MT_DBG_RX_EVENT_RING_CTRL(0)); -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed)) -+ dump_dma_rx_ring_info(s, dev, "R1:TxDone(WA2H)", MT_DBG_WFDMA_WED_RX_CTRL(1)); -+ else -+ dump_dma_rx_ring_info(s, dev, "R1:Event0(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(1)); -+ dump_dma_rx_ring_info(s, dev, "R2:Event1(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(2)); -+ -+ seq_printf(s, "HOST_DMA1 PCIe 1 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_WFDMA1_PCIE1_TX19_CTRL0); -+ dump_dma_rx_ring_info(s, dev, "R2:Event1(WA2H)", MT_DBG_WFDMA1_PCIE1_RX2_CTRL0); -+} -+ -+static void -+mt7915_show_mcu_dma_info(struct seq_file *s, struct mt7915_dev *dev) -+{ -+ u32 sys_ctrl[9] = {}; -+ -+ /* MCU DMA information */ -+ sys_ctrl[0] = mt76_rr(dev, WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_ADDR); -+ sys_ctrl[1] = mt76_rr(dev, WF_WFDMA_MCU_DMA0_HOST_INT_STA_ADDR); -+ sys_ctrl[2] = mt76_rr(dev, WF_WFDMA_MCU_DMA0_HOST_INT_ENA_ADDR); -+ -+ sys_ctrl[3] = mt76_rr(dev, WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_ADDR); -+ sys_ctrl[4] = mt76_rr(dev, WF_WFDMA_MCU_DMA1_HOST_INT_STA_ADDR); -+ sys_ctrl[5] = mt76_rr(dev, WF_WFDMA_MCU_DMA1_HOST_INT_ENA_ADDR); -+ sys_ctrl[6] = mt76_rr(dev, WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_ADDR); -+ sys_ctrl[7] = mt76_rr(dev, WF_WFDMA_MCU_DMA1_PCIE1_HOST_INT_STA_ADDR); -+ sys_ctrl[8] = mt76_rr(dev, WF_WFDMA_MCU_DMA1_PCIE1_HOST_INT_ENA_ADDR); -+ -+ seq_printf(s, "MCU_DMA Configuration\n"); -+ seq_printf(s, "%10s %10s %10s %10s %10s %10s\n", -+ "DMA", "IntCSR", "IntMask", "Glocfg", "Tx/RxEn", "Tx/RxBusy"); -+ seq_printf(s, "%10s %10x %10x %10x %4x/%5x %4x/%5x\n", -+ "DMA0", sys_ctrl[1], sys_ctrl[2], sys_ctrl[0], -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_EN_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_EN_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT); -+ -+ seq_printf(s, "%10s %10x %10x %10x %4x/%5x %4x/%5x\n", -+ "DMA1", sys_ctrl[4], sys_ctrl[5], sys_ctrl[3], -+ (sys_ctrl[3] & WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_EN_SHFT, -+ (sys_ctrl[3] & WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_EN_SHFT, -+ (sys_ctrl[3] & WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT, -+ (sys_ctrl[3] & WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA1_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT); -+ seq_printf(s, "%10s %10x %10x %10x %4x/%5x %4x/%5x\n", -+ "DMA1P1", sys_ctrl[7], sys_ctrl[8], sys_ctrl[6], -+ (sys_ctrl[6] & WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_EN_SHFT, -+ (sys_ctrl[6] & WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_EN_SHFT, -+ (sys_ctrl[6] & WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT, -+ (sys_ctrl[6] & WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT); -+ -+ seq_printf(s, "MCU_DMA0 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T0:TXD(WM2MAC)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING0_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T1:TXCMD(WM2MAC)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING1_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T2:TXD(WA2MAC)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING2_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R0:Data(MAC2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING0_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R1:TxDone(MAC2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING1_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R2:SPL(MAC2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING2_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R3:TxDone(MAC2WA)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING3_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R4:TXS(MAC2WA)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING4_CTRL0_ADDR); -+ -+ seq_printf(s, "MCU_DMA1 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T0:Event(WM2H)", WF_WFDMA_MCU_DMA1_WPDMA_TX_RING0_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T1:Event0(WA2H)", WF_WFDMA_MCU_DMA1_WPDMA_TX_RING1_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T2:Event1(WA2H)", WF_WFDMA_MCU_DMA1_WPDMA_TX_RING2_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R0:FWDL", WF_WFDMA_MCU_DMA1_WPDMA_RX_RING0_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R1:Cmd(H2WM)", WF_WFDMA_MCU_DMA1_WPDMA_RX_RING1_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R2:TXD0(H2WA)", WF_WFDMA_MCU_DMA1_WPDMA_RX_RING2_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R3:TXD1(H2WA)", WF_WFDMA_MCU_DMA1_WPDMA_RX_RING3_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R4:Cmd(H2WA)", WF_WFDMA_MCU_DMA1_WPDMA_RX_RING4_CTRL0_ADDR); -+ -+ seq_printf(s, "MCU_DMA1 PCIe 1 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T2:Event1(WA2H)", WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_TX_RING2_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R3:TXD1(H2WA)", WF_WFDMA_MCU_DMA1_PCIE1_WPDMA_RX_RING3_CTRL0_ADDR); -+} -+ -+static void -+mt7986_show_host_dma_info(struct seq_file *s, struct mt7915_dev *dev) -+{ -+ u32 sys_ctrl[5] = {}; -+ -+ /* HOST DMA */ -+ sys_ctrl[0] = mt76_rr(dev, MT_DBG_INT_SOURCE_CSR); -+ sys_ctrl[1] = mt76_rr(dev, MT_DBG_INT_MASK_CSR); -+ sys_ctrl[2] = mt76_rr(dev, MT_DBG_WFDMA0_INT_SOURCE_CSR); -+ sys_ctrl[3] = mt76_rr(dev, MT_DBG_WFDMA0_INT_MASK_CSR); -+ sys_ctrl[4] = mt76_rr(dev, MT_DBG_WFDMA0_GLO_CFG); -+ -+ seq_printf(s, "HOST_DMA Configuration\n"); -+ seq_printf(s, "%10s %10s %10s %10s %10s %10s\n", -+ "DMA", "IntCSR", "IntMask", "Glocfg", "Tx/RxEn", "Tx/RxBusy"); -+ seq_printf(s, "%10s %10x %10x\n", -+ "Merge", sys_ctrl[0], sys_ctrl[1]); -+ seq_printf(s, "%10s %10x %10x %10x %4lx/%5lx %4lx/%5lx\n", -+ "DMA0", sys_ctrl[2], sys_ctrl[3], sys_ctrl[4], -+ FIELD_GET(MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_TX_DMA_EN_MASK, sys_ctrl[4]), -+ FIELD_GET(MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_RX_DMA_EN_MASK, sys_ctrl[4]), -+ FIELD_GET(MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_TX_DMA_BUSY_MASK, sys_ctrl[4]), -+ FIELD_GET(MT_DBG_WFDMA_HOST_DMA0_GLO_CFG_RX_DMA_BUSY_MASK, sys_ctrl[4])); -+ -+ -+ seq_printf(s, "HOST_DMA0 Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T16:FWDL", MT_DBG_TX_RING_CTRL(0)); -+ dump_dma_tx_ring_info(s, dev, "T17:Cmd(H2WM)", MT_DBG_TX_RING_CTRL(1)); -+ -+ if (is_mt7916(&dev->mt76) && mtk_wed_device_active(&dev->mt76.mmio.wed)) { -+ dump_dma_tx_ring_info(s, dev, "T18:TXD0(H2WA)", MT_DBG_WFDMA_WED_TX_CTRL(0)); -+ dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_WFDMA_WED_TX_CTRL(1)); -+ } else { -+ dump_dma_tx_ring_info(s, dev, "T18:TXD0(H2WA)", MT_DBG_TX_RING_CTRL(2)); -+ dump_dma_tx_ring_info(s, dev, "T19:TXD1(H2WA)", MT_DBG_TX_RING_CTRL(3)); -+ } -+ -+ dump_dma_tx_ring_info(s, dev, "T20:Cmd(H2WA)", MT_DBG_TX_RING_CTRL(4)); -+ dump_dma_rx_ring_info(s, dev, "R0:Event(WM2H)", MT_DBG_RX_DATA_RING_CTRL(0)); -+ dump_dma_rx_ring_info(s, dev, "R1:Event(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(1)); -+ if (is_mt7916(&dev->mt76) && mtk_wed_device_active(&dev->mt76.mmio.wed)) -+ dump_dma_rx_ring_info(s, dev, "R2:TxDone(WA2H)", MT_DBG_WFDMA_WED_RX_CTRL(1)); -+ else -+ dump_dma_rx_ring_info(s, dev, "R2:TxDone(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(2)); -+ dump_dma_rx_ring_info(s, dev, "R3:TxDone1(WA2H)", MT_DBG_RX_EVENT_RING_CTRL(3)); -+ dump_dma_rx_ring_info(s, dev, "R4:Data0(MAC2H)", MT_DBG_RX_DATA_RING_CTRL(0)); -+ dump_dma_rx_ring_info(s, dev, "R5:Data1(MAC2H)", MT_DBG_RX_DATA_RING_CTRL(1)); -+} -+ -+static void -+mt7986_show_mcu_dma_info(struct seq_file *s, struct mt7915_dev *dev) -+{ -+ u32 sys_ctrl[3] = {}; -+ -+ /* MCU DMA information */ -+ sys_ctrl[0] = mt76_rr(dev, WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_ADDR); -+ sys_ctrl[1] = mt76_rr(dev, WF_WFDMA_MCU_DMA0_HOST_INT_STA_ADDR); -+ sys_ctrl[2] = mt76_rr(dev, WF_WFDMA_MCU_DMA0_HOST_INT_ENA_ADDR); -+ -+ seq_printf(s, "MCU_DMA Configuration\n"); -+ seq_printf(s, "%10s %10s %10s %10s %10s %10s\n", -+ "DMA", "IntCSR", "IntMask", "Glocfg", "Tx/RxEn", "Tx/RxBusy"); -+ seq_printf(s, "%10s %10x %10x %10x %4x/%5x %4x/%5x\n", -+ "DMA0", sys_ctrl[1], sys_ctrl[2], sys_ctrl[0], -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_EN_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_EN_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_EN_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK) >> WF_WFDMA_MCU_DMA0_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT); -+ -+ seq_printf(s, "MCU_DMA0 Ring Configuration\n"); -+ seq_printf(s, "%22s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T0:Event (WM2H)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING0_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T1:Event (WA2H)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING1_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T2:TxDone (WA2H)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING2_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T3:TxDone1 (WA2H)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING3_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T4:TXD (WM2MAC)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING4_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T5:TXCMD (WM2MAC)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING5_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T6:TXD (WA2MAC)", WF_WFDMA_MCU_DMA0_WPDMA_TX_RING6_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R0:FWDL", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING0_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R1:Cmd (H2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING1_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R2:TXD (H2WA)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING2_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R3:TXD1 (H2WA)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING3_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R4:Cmd (H2WA)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING4_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R5:Data (MAC2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING5_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R6:TxDone/STS (MAC2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING6_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R7:RPT (MAC2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING7_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R8:TxDone/STS (MAC2WA)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING8_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R9:Data1 (MAC2WM)", WF_WFDMA_MCU_DMA0_WPDMA_RX_RING9_CTRL0_ADDR); -+ -+} -+ -+static void -+mt7915_show_dma_info(struct seq_file *s, struct mt7915_dev *dev) -+{ -+ u32 sys_ctrl[10] = {}; -+ -+ if(is_mt7915(&dev->mt76)) { -+ mt7915_show_host_dma_info(s, dev); -+ mt7915_show_mcu_dma_info(s, dev); -+ } else { -+ mt7986_show_host_dma_info(s, dev); -+ mt7986_show_mcu_dma_info(s, dev); -+ } -+ -+ /* MEM DMA information */ -+ sys_ctrl[0] = mt76_rr(dev, WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_ADDR); -+ sys_ctrl[1] = mt76_rr(dev, WF_WFDMA_MEM_DMA_HOST_INT_STA_ADDR); -+ sys_ctrl[2] = mt76_rr(dev, WF_WFDMA_MEM_DMA_HOST_INT_ENA_ADDR); -+ -+ seq_printf(s, "MEM_DMA Configuration\n"); -+ seq_printf(s, "%10s %10s %10s %10s %10s %10s\n", -+ "DMA", "IntCSR", "IntMask", "Glocfg", "Tx/RxEn", "Tx/RxBusy"); -+ seq_printf(s, "%10s %10x %10x %10x %4x/%5x %4x/%5x\n", -+ "MEM", sys_ctrl[1], sys_ctrl[2], sys_ctrl[0], -+ (sys_ctrl[0] & WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_EN_MASK) >> WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_EN_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_EN_MASK) >> WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_EN_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_BUSY_MASK) >> WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_TX_DMA_BUSY_SHFT, -+ (sys_ctrl[0] & WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_BUSY_MASK) >> WF_WFDMA_MEM_DMA_WPDMA_GLO_CFG_RX_DMA_BUSY_SHFT); -+ -+ seq_printf(s, "MEM_DMA Ring Configuration\n"); -+ seq_printf(s, "%20s %10s %10s %10s %10s %10s\n", -+ "Name", "Base", "Cnt", "CIDX", "DIDX", "QCnt"); -+ dump_dma_tx_ring_info(s, dev, "T0:CmdEvent(WM2WA)", WF_WFDMA_MEM_DMA_WPDMA_TX_RING0_CTRL0_ADDR); -+ dump_dma_tx_ring_info(s, dev, "T1:CmdEvent(WA2WM)", WF_WFDMA_MEM_DMA_WPDMA_TX_RING1_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R0:CmdEvent(WM2WA)", WF_WFDMA_MEM_DMA_WPDMA_RX_RING0_CTRL0_ADDR); -+ dump_dma_rx_ring_info(s, dev, "R1:CmdEvent(WA2WM)", WF_WFDMA_MEM_DMA_WPDMA_RX_RING1_CTRL0_ADDR); -+} -+ -+static int mt7915_trinfo_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ const struct hif_pci_tx_ring_desc *tx_ring_layout; -+ const struct hif_pci_rx_ring_desc *rx_ring_layout; -+ struct mtk_wed_device *wed = &dev->mt76.mmio.wed; -+ u32 tx_ring_num, rx_ring_num; -+ u32 tbase[5], tcnt[5]; -+ u32 tcidx[5], tdidx[5]; -+ u32 rbase[6], rcnt[6]; -+ u32 rcidx[6], rdidx[6]; -+ int idx; -+ bool flags = false; -+ -+ if(is_mt7915(&dev->mt76)) { -+ tx_ring_layout = &mt7915_tx_ring_layout[0]; -+ rx_ring_layout = &mt7915_rx_ring_layout[0]; -+ tx_ring_num = ARRAY_SIZE(mt7915_tx_ring_layout); -+ rx_ring_num = ARRAY_SIZE(mt7915_rx_ring_layout); -+ } else { -+ tx_ring_layout = &mt7986_tx_ring_layout[0]; -+ rx_ring_layout = &mt7986_rx_ring_layout[0]; -+ tx_ring_num = ARRAY_SIZE(mt7986_tx_ring_layout); -+ rx_ring_num = ARRAY_SIZE(mt7986_rx_ring_layout); -+ } -+ -+ for (idx = 0; idx < tx_ring_num; idx++) { -+ if (mtk_wed_device_active(wed) && -+ (tx_ring_layout[idx].ring_attr == HIF_TX_DATA)) { -+ struct mt76_phy *phy = dev->mt76.phys[MT_BAND0]; -+ struct mt76_phy *ext_phy = dev->mt76.phys[MT_BAND1]; -+ struct mt76_queue *q; -+ -+ tbase[idx] = tcnt[idx] = tcidx[idx] = tdidx[idx] = 0; -+ -+ if (!phy) -+ continue; -+ -+ if (flags && !ext_phy) -+ continue; -+ -+ if (flags && ext_phy) -+ phy = ext_phy; -+ -+ q = phy->q_tx[0]; -+ -+ if (q->wed_regs) { -+ tbase[idx] = mtk_wed_device_reg_read(wed, q->wed_regs); -+ tcnt[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x04); -+ tcidx[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x08); -+ tdidx[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x0c); -+ } -+ -+ flags = true; -+ } else { -+ tbase[idx] = mt76_rr(dev, MT_DBG_TX_RING_CTRL(idx)); -+ tcnt[idx] = mt76_rr(dev, MT_DBG_TX_RING_CTRL(idx) + 0x04); -+ tcidx[idx] = mt76_rr(dev, MT_DBG_TX_RING_CTRL(idx) + 0x08); -+ tdidx[idx] = mt76_rr(dev, MT_DBG_TX_RING_CTRL(idx) + 0x0c);} -+ } -+ -+ for (idx = 0; idx < rx_ring_num; idx++) { -+ if (rx_ring_layout[idx].ring_attr == HIF_RX_DATA) { -+ if (mtk_wed_device_active(wed) && mtk_wed_get_rx_capa(wed)) { -+ struct mt76_queue *q = &dev->mt76.q_rx[MT_RXQ_MAIN]; -+ -+ rbase[idx] = rcnt[idx] = rcidx[idx] = rdidx[idx] = 0; -+ -+ if (idx == 1) -+ q = &dev->mt76.q_rx[MT_RXQ_BAND1]; -+ -+ if (q->wed_regs) { -+ rbase[idx] = mtk_wed_device_reg_read(wed, q->wed_regs); -+ rcnt[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x04); -+ rcidx[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x08); -+ rdidx[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x0c); -+ } -+ } else { -+ rbase[idx] = mt76_rr(dev, MT_DBG_RX_DATA_RING_CTRL(idx)); -+ rcnt[idx] = mt76_rr(dev, MT_DBG_RX_DATA_RING_CTRL(idx) + 0x04); -+ rcidx[idx] = mt76_rr(dev, MT_DBG_RX_DATA_RING_CTRL(idx) + 0x08); -+ rdidx[idx] = mt76_rr(dev, MT_DBG_RX_DATA_RING_CTRL(idx) + 0x0c); -+ } -+ } else { -+ if (mtk_wed_device_active(wed) && rx_ring_layout[idx].flags) { -+ struct mt76_queue *q = &dev->mt76.q_rx[MT_RXQ_MAIN_WA]; -+ -+ if (is_mt7915(&dev->mt76)) -+ q = &dev->mt76.q_rx[MT_RXQ_MCU_WA]; -+ -+ rbase[idx] = mtk_wed_device_reg_read(wed, q->wed_regs); -+ rcnt[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x04); -+ rcidx[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x08); -+ rdidx[idx] = mtk_wed_device_reg_read(wed, q->wed_regs + 0x0c); -+ -+ } else { -+ rbase[idx] = mt76_rr(dev, MT_DBG_RX_EVENT_RING_CTRL(idx - 2)); -+ rcnt[idx] = mt76_rr(dev, MT_DBG_RX_EVENT_RING_CTRL(idx - 2) + 0x04); -+ rcidx[idx] = mt76_rr(dev, MT_DBG_RX_EVENT_RING_CTRL(idx - 2) + 0x08); -+ rdidx[idx] = mt76_rr(dev, MT_DBG_RX_EVENT_RING_CTRL(idx - 2) + 0x0c); -+ } -+ } -+ } -+ -+ seq_printf(s, "=================================================\n"); -+ seq_printf(s, "TxRing Configuration\n"); -+ seq_printf(s, "%4s %10s %8s %1s %6s %6s %6s %6s\n", -+ "Idx", "Attr", "Reg", "Base", "Cnt", "CIDX", "DIDX", -+ "QCnt"); -+ for (idx = 0; idx < tx_ring_num; idx++) { -+ u32 queue_cnt; -+ -+ queue_cnt = (tcidx[idx] >= tdidx[idx]) ? -+ (tcidx[idx] - tdidx[idx]) : -+ (tcidx[idx] - tdidx[idx] + tcnt[idx]); -+ seq_printf(s, "%4d %8s %8x %10x %6x %6x %6x %6x\n", -+ idx, tx_ring_layout[idx].ring_info, -+ MT_DBG_TX_RING_CTRL(idx), tbase[idx], -+ tcnt[idx], tcidx[idx], tdidx[idx], queue_cnt); -+ } -+ -+ seq_printf(s, "RxRing Configuration\n"); -+ seq_printf(s, "%4s %10s %8s %10s %6s %6s %6s %6s\n", -+ "Idx", "Attr", "Reg", "Base", "Cnt", "CIDX", "DIDX", -+ "QCnt"); -+ -+ for (idx = 0; idx < rx_ring_num; idx++) { -+ u32 queue_cnt; -+ -+ queue_cnt = (rdidx[idx] > rcidx[idx]) ? -+ (rdidx[idx] - rcidx[idx] - 1) : -+ (rdidx[idx] - rcidx[idx] + rcnt[idx] - 1); -+ seq_printf(s, "%4d %8s %8x %10x %6x %6x %6x %6x\n", -+ idx, rx_ring_layout[idx].ring_info, -+ (idx < 2) ? MT_DBG_RX_DATA_RING_CTRL(idx): MT_DBG_RX_EVENT_RING_CTRL(idx - 2), -+ rbase[idx], rcnt[idx], rcidx[idx], rdidx[idx], queue_cnt); -+ } -+ -+ mt7915_show_dma_info(s, dev); -+ return 0; -+} -+ -+static int mt7915_drr_info(struct seq_file *s, void *data) -+{ -+#define DL_AC_START 0x00 -+#define DL_AC_END 0x0F -+#define UL_AC_START 0x10 -+#define UL_AC_END 0x1F -+ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 drr_sta_status[16]; -+ u32 drr_ctrl_def_val = 0x80220000, drr_ctrl_val = 0; -+ bool is_show = false; -+ int idx, sta_line = 0, sta_no = 0, max_sta_line = (mt7915_wtbl_size(dev) + 31) / 32; -+ seq_printf(s, "DRR Table STA Info:\n"); -+ -+ for (idx = DL_AC_START; idx <= DL_AC_END; idx++) { -+ is_show = true; -+ drr_ctrl_val = (drr_ctrl_def_val | idx); -+ mt76_wr(dev, MT_DBG_PLE_DRR_TAB_CTRL, drr_ctrl_val); -+ drr_sta_status[0] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA0); -+ drr_sta_status[1] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA1); -+ drr_sta_status[2] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA2); -+ drr_sta_status[3] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA3); -+ drr_sta_status[4] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA4); -+ drr_sta_status[5] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA5); -+ drr_sta_status[6] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA6); -+ drr_sta_status[7] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA7); -+ -+ if (is_mt7915(&dev->mt76) && max_sta_line > 8) { -+ drr_ctrl_val = (drr_ctrl_def_val | idx | 1 << 10); -+ mt76_wr(dev, MT_DBG_PLE_DRR_TAB_CTRL, drr_ctrl_val); -+ drr_sta_status[8] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA0); -+ drr_sta_status[9] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA1); -+ drr_sta_status[10] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA2); -+ drr_sta_status[11] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA3); -+ drr_sta_status[12] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA4); -+ drr_sta_status[13] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA5); -+ drr_sta_status[14] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA6); -+ drr_sta_status[15] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA7); -+ } -+ if (!is_mt7915(&dev->mt76)) -+ max_sta_line = 8; -+ -+ for (sta_line = 0; sta_line < max_sta_line; sta_line++) { -+ if (drr_sta_status[sta_line] > 0) { -+ for (sta_no = 0; sta_no < 32; sta_no++) { -+ if (((drr_sta_status[sta_line] & (0x1 << sta_no)) >> sta_no)) { -+ if (is_show) { -+ seq_printf(s, "\n DL AC%02d Queue Non-Empty STA:\n", idx); -+ is_show = false; -+ } -+ seq_printf(s, "%d ", sta_no + (sta_line * 32)); -+ } -+ } -+ } -+ } -+ } -+ -+ for (idx = UL_AC_START; idx <= UL_AC_END; idx++) { -+ is_show = true; -+ drr_ctrl_val = (drr_ctrl_def_val | idx); -+ mt76_wr(dev, MT_DBG_PLE_DRR_TAB_CTRL, drr_ctrl_val); -+ drr_sta_status[0] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA0); -+ drr_sta_status[1] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA1); -+ drr_sta_status[2] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA2); -+ drr_sta_status[3] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA3); -+ drr_sta_status[4] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA4); -+ drr_sta_status[5] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA5); -+ drr_sta_status[6] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA6); -+ drr_sta_status[7] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA7); -+ -+ if (is_mt7915(&dev->mt76) && max_sta_line > 8) { -+ drr_ctrl_val = (drr_ctrl_def_val | idx | 1 << 10); -+ mt76_wr(dev, MT_DBG_PLE_DRR_TAB_CTRL, drr_ctrl_val); -+ drr_sta_status[8] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA0); -+ drr_sta_status[9] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA1); -+ drr_sta_status[10] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA2); -+ drr_sta_status[11] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA3); -+ drr_sta_status[12] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA4); -+ drr_sta_status[13] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA5); -+ drr_sta_status[14] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA6); -+ drr_sta_status[15] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA7); -+ } -+ -+ if (!is_mt7915(&dev->mt76)) -+ max_sta_line = 8; -+ -+ for (sta_line = 0; sta_line < max_sta_line; sta_line++) { -+ if (drr_sta_status[sta_line] > 0) { -+ for (sta_no = 0; sta_no < 32; sta_no++) { -+ if (((drr_sta_status[sta_line] & (0x1 << sta_no)) >> sta_no)) { -+ if (is_show) { -+ seq_printf(s, "\n UL AC%02d Queue Non-Empty STA:\n", idx); -+ is_show = false; -+ } -+ seq_printf(s, "%d ", sta_no + (sta_line * 32)); -+ } -+ } -+ } -+ } -+ } -+ -+ for (idx = DL_AC_START; idx <= DL_AC_END; idx++) { -+ drr_ctrl_def_val = 0x80420000; -+ drr_ctrl_val = (drr_ctrl_def_val | idx); -+ mt76_wr(dev, MT_DBG_PLE_DRR_TAB_CTRL, drr_ctrl_val); -+ drr_sta_status[0] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA0); -+ drr_sta_status[1] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA1); -+ drr_sta_status[2] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA2); -+ drr_sta_status[3] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA3); -+ drr_sta_status[4] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA4); -+ drr_sta_status[5] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA5); -+ drr_sta_status[6] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA6); -+ drr_sta_status[7] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA7); -+ -+ if (is_mt7915(&dev->mt76) && max_sta_line > 8) { -+ drr_ctrl_val = (drr_ctrl_def_val | idx | 1<<10); -+ mt76_wr(dev, MT_DBG_PLE_DRR_TAB_CTRL, drr_ctrl_val); -+ drr_sta_status[8] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA0); -+ drr_sta_status[9] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA1); -+ drr_sta_status[10] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA2); -+ drr_sta_status[11] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA3); -+ drr_sta_status[12] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA4); -+ drr_sta_status[13] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA5); -+ drr_sta_status[14] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA6); -+ drr_sta_status[15] = mt76_rr(dev, MT_DBG_PLE_DRR_TABLE_RDATA7); -+ } -+ -+ seq_printf(s, "\nBSSGrp[%d]:\n", idx); -+ if (!is_mt7915(&dev->mt76)) -+ max_sta_line = 8; -+ -+ for (sta_line = 0; sta_line < max_sta_line; sta_line++) { -+ seq_printf(s, "0x%08x ", drr_sta_status[sta_line]); -+ -+ if ((sta_line % 4) == 3) -+ seq_printf(s, "\n"); -+ } -+ } -+ -+ return 0; -+} -+ -+#define CR_NUM_OF_AC 17 -+ -+typedef enum _ENUM_UMAC_PORT_T { -+ ENUM_UMAC_HIF_PORT_0 = 0, -+ ENUM_UMAC_CPU_PORT_1 = 1, -+ ENUM_UMAC_LMAC_PORT_2 = 2, -+ ENUM_PLE_CTRL_PSE_PORT_3 = 3, -+ ENUM_UMAC_PSE_PLE_PORT_TOTAL_NUM = 4 -+} ENUM_UMAC_PORT_T, *P_ENUM_UMAC_PORT_T; -+ -+/* N9 MCU QUEUE LIST */ -+typedef enum _ENUM_UMAC_CPU_P_QUEUE_T { -+ ENUM_UMAC_CTX_Q_0 = 0, -+ ENUM_UMAC_CTX_Q_1 = 1, -+ ENUM_UMAC_CTX_Q_2 = 2, -+ ENUM_UMAC_CTX_Q_3 = 3, -+ ENUM_UMAC_CRX = 0, -+ ENUM_UMAC_CIF_QUEUE_TOTAL_NUM = 4 -+} ENUM_UMAC_CPU_P_QUEUE_T, *P_ENUM_UMAC_CPU_P_QUEUE_T; -+ -+/* LMAC PLE TX QUEUE LIST */ -+typedef enum _ENUM_UMAC_LMAC_PLE_TX_P_QUEUE_T { -+ ENUM_UMAC_LMAC_PLE_TX_Q_00 = 0x00, -+ ENUM_UMAC_LMAC_PLE_TX_Q_01 = 0x01, -+ ENUM_UMAC_LMAC_PLE_TX_Q_02 = 0x02, -+ ENUM_UMAC_LMAC_PLE_TX_Q_03 = 0x03, -+ -+ ENUM_UMAC_LMAC_PLE_TX_Q_10 = 0x04, -+ ENUM_UMAC_LMAC_PLE_TX_Q_11 = 0x05, -+ ENUM_UMAC_LMAC_PLE_TX_Q_12 = 0x06, -+ ENUM_UMAC_LMAC_PLE_TX_Q_13 = 0x07, -+ -+ ENUM_UMAC_LMAC_PLE_TX_Q_20 = 0x08, -+ ENUM_UMAC_LMAC_PLE_TX_Q_21 = 0x09, -+ ENUM_UMAC_LMAC_PLE_TX_Q_22 = 0x0a, -+ ENUM_UMAC_LMAC_PLE_TX_Q_23 = 0x0b, -+ -+ ENUM_UMAC_LMAC_PLE_TX_Q_30 = 0x0c, -+ ENUM_UMAC_LMAC_PLE_TX_Q_31 = 0x0d, -+ ENUM_UMAC_LMAC_PLE_TX_Q_32 = 0x0e, -+ ENUM_UMAC_LMAC_PLE_TX_Q_33 = 0x0f, -+ -+ ENUM_UMAC_LMAC_PLE_TX_Q_ALTX_0 = 0x10, -+ ENUM_UMAC_LMAC_PLE_TX_Q_BMC_0 = 0x11, -+ ENUM_UMAC_LMAC_PLE_TX_Q_BNC_0 = 0x12, -+ ENUM_UMAC_LMAC_PLE_TX_Q_PSMP_0 = 0x13, -+ -+ ENUM_UMAC_LMAC_PLE_TX_Q_ALTX_1 = 0x14, -+ ENUM_UMAC_LMAC_PLE_TX_Q_BMC_1 = 0x15, -+ ENUM_UMAC_LMAC_PLE_TX_Q_BNC_1 = 0x16, -+ ENUM_UMAC_LMAC_PLE_TX_Q_PSMP_1 = 0x17, -+ ENUM_UMAC_LMAC_PLE_TX_Q_NAF = 0x18, -+ ENUM_UMAC_LMAC_PLE_TX_Q_NBCN = 0x19, -+ ENUM_UMAC_LMAC_PLE_TX_Q_RELEASE = 0x1f, /* DE suggests not to use 0x1f, it's only for hw free queue */ -+ ENUM_UMAC_LMAC_QUEUE_TOTAL_NUM = 24, -+ -+} ENUM_UMAC_LMAC_TX_P_QUEUE_T, *P_ENUM_UMAC_LMAC_TX_P_QUEUE_T; -+ -+typedef struct _EMPTY_QUEUE_INFO_T { -+ char *QueueName; -+ u32 Portid; -+ u32 Queueid; -+} EMPTY_QUEUE_INFO_T, *P_EMPTY_QUEUE_INFO_T; -+ -+static EMPTY_QUEUE_INFO_T ple_queue_empty_info[] = { -+ {"CPU Q0", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_0}, -+ {"CPU Q1", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_1}, -+ {"CPU Q2", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_2}, -+ {"CPU Q3", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_3}, -+ {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, /* 4~7 not defined */ -+ {"ALTX Q0", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_ALTX_0}, /* Q16 */ -+ {"BMC Q0", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_BMC_0}, -+ {"BCN Q0", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_BNC_0}, -+ {"PSMP Q0", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_PSMP_0}, -+ {"ALTX Q1", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_ALTX_1}, -+ {"BMC Q1", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_BMC_1}, -+ {"BCN Q1", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_BNC_1}, -+ {"PSMP Q1", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_PSMP_1}, -+ {"NAF Q", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_NAF}, -+ {"NBCN Q", ENUM_UMAC_LMAC_PORT_2, ENUM_UMAC_LMAC_PLE_TX_Q_NBCN}, -+ {NULL, 0, 0}, {NULL, 0, 0}, /* 18, 19 not defined */ -+ {"FIXFID Q", ENUM_UMAC_LMAC_PORT_2, 0x1a}, -+ {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, -+ {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, /* 21~29 not defined */ -+ {"RLS Q", ENUM_PLE_CTRL_PSE_PORT_3, 0x7e}, -+ {"RLS2 Q", ENUM_PLE_CTRL_PSE_PORT_3, 0x7f} -+}; -+ -+static EMPTY_QUEUE_INFO_T ple_txcmd_queue_empty_info[] = { -+ {"AC00Q", ENUM_UMAC_LMAC_PORT_2, 0x40}, -+ {"AC01Q", ENUM_UMAC_LMAC_PORT_2, 0x41}, -+ {"AC02Q", ENUM_UMAC_LMAC_PORT_2, 0x42}, -+ {"AC03Q", ENUM_UMAC_LMAC_PORT_2, 0x43}, -+ {"AC10Q", ENUM_UMAC_LMAC_PORT_2, 0x44}, -+ {"AC11Q", ENUM_UMAC_LMAC_PORT_2, 0x45}, -+ {"AC12Q", ENUM_UMAC_LMAC_PORT_2, 0x46}, -+ {"AC13Q", ENUM_UMAC_LMAC_PORT_2, 0x47}, -+ {"AC20Q", ENUM_UMAC_LMAC_PORT_2, 0x48}, -+ {"AC21Q", ENUM_UMAC_LMAC_PORT_2, 0x49}, -+ {"AC22Q", ENUM_UMAC_LMAC_PORT_2, 0x4a}, -+ {"AC23Q", ENUM_UMAC_LMAC_PORT_2, 0x4b}, -+ {"AC30Q", ENUM_UMAC_LMAC_PORT_2, 0x4c}, -+ {"AC31Q", ENUM_UMAC_LMAC_PORT_2, 0x4d}, -+ {"AC32Q", ENUM_UMAC_LMAC_PORT_2, 0x4e}, -+ {"AC33Q", ENUM_UMAC_LMAC_PORT_2, 0x4f}, -+ {"ALTX Q0", ENUM_UMAC_LMAC_PORT_2, 0x50}, -+ {"TF Q0", ENUM_UMAC_LMAC_PORT_2, 0x51}, -+ {"TWT TSF-TF Q0", ENUM_UMAC_LMAC_PORT_2, 0x52}, -+ {"TWT DL Q0", ENUM_UMAC_LMAC_PORT_2, 0x53}, -+ {"TWT UL Q0", ENUM_UMAC_LMAC_PORT_2, 0x54}, -+ {"ALTX Q1", ENUM_UMAC_LMAC_PORT_2, 0x55}, -+ {"TF Q1", ENUM_UMAC_LMAC_PORT_2, 0x56}, -+ {"TWT TSF-TF Q1", ENUM_UMAC_LMAC_PORT_2, 0x57}, -+ {"TWT DL Q1", ENUM_UMAC_LMAC_PORT_2, 0x58}, -+ {"TWT UL Q1", ENUM_UMAC_LMAC_PORT_2, 0x59}, -+ {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, -+}; -+ -+static char* sta_ctrl_reg[] = {"ENABLE", "DISABLE", "PAUSE"}; -+static u32 chip_show_sta_acq_info(struct seq_file *s, struct mt7915_dev *dev, u32 *ple_stat, -+ u32 *sta_pause, u32 *dis_sta_map, -+ u32 dumptxd) -+{ -+ int i, j; -+ u32 total_nonempty_cnt = 0; -+ u32 ac_num = 9, all_ac_num; -+ -+ /* TDO: ac_num = 16 for mt7986 */ -+ if (!is_mt7915(&dev->mt76)) -+ ac_num = 17; -+ -+ all_ac_num = ac_num * 4; -+ -+ for (j = 0; j < all_ac_num; j++) { /* show AC Q info */ -+ for (i = 0; i < 32; i++) { -+ if (((ple_stat[j + 1] & (0x1 << i)) >> i) == 0) { -+ u32 hfid, tfid, pktcnt, ac_n = j / ac_num, ctrl = 0; -+ u32 sta_num = i + (j % ac_num) * 32, fl_que_ctrl[3] = {0}; -+ //struct wifi_dev *wdev = wdev_search_by_wcid(pAd, sta_num); -+ u32 wmmidx = 0; -+ struct mt7915_sta *msta; -+ struct mt76_wcid *wcid; -+ -+ wcid = rcu_dereference(dev->mt76.wcid[sta_num]); -+ if (!wcid) { -+ printk("ERROR!! no found STA wcid=%d\n", sta_num); -+ continue; -+ } -+ msta = container_of(wcid, struct mt7915_sta, wcid); -+ wmmidx = msta->vif->mt76.wmm_idx; -+ -+ seq_printf(s, "\tSTA%d AC%d: ", sta_num, ac_n); -+ -+ fl_que_ctrl[0] |= MT_DBG_PLE_FL_QUE_CTRL0_EXECUTE_MASK; -+ fl_que_ctrl[0] |= (ENUM_UMAC_LMAC_PORT_2 << MT_PLE_FL_QUE_CTRL0_Q_BUF_PID_SHFT); -+ fl_que_ctrl[0] |= (ac_n << MT_PLE_FL_QUE_CTRL0_Q_BUF_QID_SHFT); -+ fl_que_ctrl[0] |= sta_num; -+ mt76_wr(dev, MT_DBG_PLE_FL_QUE_CTRL0, fl_que_ctrl[0]); -+ fl_que_ctrl[1] = mt76_rr(dev, MT_DBG_PLE_FL_QUE_CTRL2); -+ fl_que_ctrl[2] = mt76_rr(dev, MT_DBG_PLE_FL_QUE_CTRL3); -+ hfid = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL2_Q_HEAD_FID_MASK, fl_que_ctrl[1]); -+ tfid = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL2_Q_TAIL_FID_MASK, fl_que_ctrl[1]); -+ pktcnt = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL3_Q_PKT_NUM_MASK, fl_que_ctrl[2]); -+ seq_printf(s, "tail/head fid = 0x%03x/0x%03x, pkt cnt = 0x%03x", -+ tfid, hfid, pktcnt); -+ -+ if (((sta_pause[j % ac_num] & 0x1 << i) >> i) == 1) -+ ctrl = 2; -+ -+ if (((dis_sta_map[j % ac_num] & 0x1 << i) >> i) == 1) -+ ctrl = 1; -+ -+ seq_printf(s, " ctrl = %s", sta_ctrl_reg[ctrl]); -+ seq_printf(s, " (wmmidx=%d)\n", wmmidx); -+ -+ total_nonempty_cnt++; -+ -+ // TODO -+ //if (pktcnt > 0 && dumptxd > 0) -+ // ShowTXDInfo(pAd, hfid); -+ } -+ } -+ } -+ -+ return total_nonempty_cnt; -+} -+ -+static void chip_show_txcmdq_info(struct seq_file *s, struct mt7915_dev *dev, u32 ple_txcmd_stat) -+{ -+ int i; -+ -+ seq_printf(s, "Nonempty TXCMD Q info:\n"); -+ for (i = 0; i < 32; i++) { -+ if (((ple_txcmd_stat & (0x1 << i)) >> i) == 0) { -+ u32 hfid, tfid, pktcnt, fl_que_ctrl[3] = {0}; -+ -+ if (ple_txcmd_queue_empty_info[i].QueueName != NULL) { -+ seq_printf(s, "\t%s: ", ple_txcmd_queue_empty_info[i].QueueName); -+ fl_que_ctrl[0] |= MT_DBG_PLE_FL_QUE_CTRL0_EXECUTE_MASK; -+ fl_que_ctrl[0] |= (ple_txcmd_queue_empty_info[i].Portid << -+ MT_PLE_FL_QUE_CTRL0_Q_BUF_PID_SHFT); -+ fl_que_ctrl[0] |= (ple_txcmd_queue_empty_info[i].Queueid << -+ MT_PLE_FL_QUE_CTRL0_Q_BUF_QID_SHFT); -+ } else -+ continue; -+ -+ mt76_wr(dev, MT_DBG_PLE_FL_QUE_CTRL0, fl_que_ctrl[0]); -+ fl_que_ctrl[1] = mt76_rr(dev, MT_DBG_PLE_FL_QUE_CTRL2); -+ fl_que_ctrl[2] = mt76_rr(dev, MT_DBG_PLE_FL_QUE_CTRL3); -+ hfid = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL2_Q_HEAD_FID_MASK, fl_que_ctrl[1]); -+ tfid = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL2_Q_TAIL_FID_MASK, fl_que_ctrl[1]); -+ pktcnt = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL3_Q_PKT_NUM_MASK, fl_que_ctrl[2]); -+ seq_printf(s, "tail/head fid = 0x%03x/0x%03x, pkt cnt = 0x%03x\n", -+ tfid, hfid, pktcnt); -+ } -+ } -+} -+ -+static void chip_get_ple_acq_stat(struct mt7915_dev *dev, u32 *ple_stat) -+{ -+ int i; -+ int cr_num = 9, all_cr_num; -+ u32 ac , index; -+ -+ /* TDO: cr_num = 16 for mt7986 */ -+ if(!is_mt7915(&dev->mt76)) -+ cr_num = 17; -+ -+ all_cr_num = cr_num * 4; -+ -+ ple_stat[0] = mt76_rr(dev, MT_DBG_PLE_QUEUE_EMPTY); -+ -+ for(i = 0; i < all_cr_num; i++) { -+ ac = i / cr_num; -+ index = i % cr_num; -+ ple_stat[i + 1] = -+ mt76_rr(dev, MT_DBG_PLE_AC_QEMPTY(ac, index)); -+ -+ } -+} -+ -+static void chip_get_dis_sta_map(struct mt7915_dev *dev, u32 *dis_sta_map) -+{ -+ int i; -+ u32 ac_num = 9; -+ -+ /* TDO: ac_num = 16 for mt7986 */ -+ if (!is_mt7915(&dev->mt76)) -+ ac_num = 17; -+ -+ for(i = 0; i < ac_num; i++) { -+ dis_sta_map[i] = mt76_rr(dev, MT_DBG_PLE_DIS_STA_MAP(i)); -+ } -+} -+ -+static void chip_get_sta_pause(struct mt7915_dev *dev, u32 *sta_pause) -+{ -+ int i; -+ u32 ac_num = 9; -+ -+ /* TDO: ac_num = 16 for mt7986 */ -+ if (!is_mt7915(&dev->mt76)) -+ ac_num = 17; -+ -+ for(i = 0; i < ac_num; i++) { -+ sta_pause[i] = mt76_rr(dev, MT_DBG_PLE_STATION_PAUSE(i)); -+ } -+} -+ -+static int mt7915_pleinfo_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 ple_buf_ctrl, pg_sz, pg_num; -+ u32 ple_stat[70] = {0}, pg_flow_ctrl[8] = {0}; -+ u32 ple_native_txcmd_stat; -+ u32 ple_txcmd_stat; -+ u32 sta_pause[CR_NUM_OF_AC] = {0}, dis_sta_map[CR_NUM_OF_AC] = {0}; -+ u32 fpg_cnt, ffa_cnt, fpg_head, fpg_tail, hif_max_q, hif_min_q; -+ u32 rpg_hif, upg_hif, cpu_max_q, cpu_min_q, rpg_cpu, upg_cpu; -+ int i, j; -+ u32 ac_num = 9, all_ac_num; -+ -+ /* TDO: ac_num = 16 for mt7986 */ -+ if (!is_mt7915(&dev->mt76)) -+ ac_num = 17; -+ -+ all_ac_num = ac_num * 4; -+ -+ ple_buf_ctrl = mt76_rr(dev, MT_DBG_PLE_PBUF_CTRL_ADDR); -+ chip_get_ple_acq_stat(dev, ple_stat); -+ ple_txcmd_stat = mt76_rr(dev, MT_DBG_PLE_TXCMD_Q_EMPTY); -+ ple_native_txcmd_stat = mt76_rr(dev, MT_DBG_PLE_NATIVE_TXCMD_Q_EMPTY); -+ pg_flow_ctrl[0] = mt76_rr(dev, MT_DBG_PLE_FREEPG_CNT); -+ pg_flow_ctrl[1] = mt76_rr(dev, MT_DBG_PLE_FREEPG_HEAD_TAIL); -+ pg_flow_ctrl[2] = mt76_rr(dev, MT_DBG_PLE_PG_HIF_GROUP); -+ pg_flow_ctrl[3] = mt76_rr(dev, MT_DBG_PLE_HIF_PG_INFO); -+ pg_flow_ctrl[4] = mt76_rr(dev, MT_DBG_PLE_PG_CPU_GROUP); -+ pg_flow_ctrl[5] = mt76_rr(dev, MT_DBG_PLE_CPU_PG_INFO); -+ pg_flow_ctrl[6] = mt76_rr(dev, MT_DBG_PLE_PG_HIF_TXCMD_GROUP); -+ pg_flow_ctrl[7] = mt76_rr(dev, MT_DBG_PLE_HIF_TXCMD_PG_INFO); -+ chip_get_dis_sta_map(dev, dis_sta_map); -+ chip_get_sta_pause(dev, sta_pause); -+ -+ seq_printf(s, "PLE Configuration Info:\n"); -+ seq_printf(s, "\tPacket Buffer Control(0x%x): 0x%08x\n", -+ MT_DBG_PLE_PBUF_CTRL_ADDR, ple_buf_ctrl); -+ -+ pg_sz = FIELD_GET(MT_DBG_PLE_PBUF_CTRL_PAGE_SIZE_MASK, ple_buf_ctrl); -+ seq_printf(s, "\t\tPage Size=%d(%d bytes per page)\n", -+ pg_sz, (pg_sz == 1 ? 128 : 64)); -+ seq_printf(s, "\t\tPage Offset=%ld(in unit of 2KB)\n", -+ FIELD_GET(MT_DBG_PLE_PBUF_CTRL_OFFSET_MASK, ple_buf_ctrl)); -+ -+ pg_num = FIELD_GET(MT_DBG_PLE_PBUF_CTRL_TOTAL_PAGE_NUM_MASK, ple_buf_ctrl); -+ seq_printf(s, "\t\tTotal Page=%d pages\n", pg_num); -+ -+ /* Page Flow Control */ -+ seq_printf(s, "PLE Page Flow Control:\n"); -+ seq_printf(s, "\tFree page counter(0x%x): 0x%08x\n", -+ MT_DBG_PLE_FREEPG_CNT, pg_flow_ctrl[0]); -+ fpg_cnt = FIELD_GET(MT_DBG_PLE_FREEPG_CNT_FREEPG_CNT_MASK, pg_flow_ctrl[0]); -+ -+ seq_printf(s, "\t\tThe toal page number of free=0x%03x\n", fpg_cnt); -+ ffa_cnt = FIELD_GET(MT_DBG_PLE_FREEPG_CNT_FFA_CNT_MASK, pg_flow_ctrl[0]); -+ -+ seq_printf(s, "\t\tThe free page numbers of free for all=0x%03x\n", ffa_cnt); -+ seq_printf(s, "\tFree page head and tail(0x%x): 0x%08x\n", -+ MT_DBG_PLE_FREEPG_HEAD_TAIL, pg_flow_ctrl[1]); -+ -+ fpg_head = FIELD_GET(MT_DBG_PLE_FREEPG_HEAD_TAIL_FREEPG_HEAD_MASK, pg_flow_ctrl[1]); -+ fpg_tail = FIELD_GET(MT_DBG_PLE_FREEPG_HEAD_TAIL_FREEPG_TAIL_MASK, pg_flow_ctrl[1]); -+ seq_printf(s, "\t\tThe tail/head page of free page list=0x%03x/0x%03x\n", fpg_tail, fpg_head); -+ seq_printf(s, "\tReserved page counter of HIF group(0x%x): 0x%08x\n", -+ MT_DBG_PLE_PG_HIF_GROUP, pg_flow_ctrl[2]); -+ seq_printf(s, "\tHIF group page status(0x%x): 0x%08x\n", -+ MT_DBG_PLE_HIF_PG_INFO, pg_flow_ctrl[3]); -+ -+ hif_min_q = FIELD_GET(MT_DBG_PLE_PG_HIF_GROUP_HIF_MIN_QUOTA_MASK, pg_flow_ctrl[2]); -+ hif_max_q = FIELD_GET(MT_DBG_PLE_PG_HIF_GROUP_HIF_MAX_QUOTA_MASK, pg_flow_ctrl[2]); -+ seq_printf(s, "\t\tThe max/min quota pages of HIF group=0x%03x/0x%03x\n", hif_max_q, hif_min_q); -+ -+ rpg_hif = FIELD_GET(MT_DBG_PLE_HIF_PG_INFO_HIF_RSV_CNT_MASK, pg_flow_ctrl[3]); -+ upg_hif = FIELD_GET(MT_DBG_PLE_HIF_PG_INFO_HIF_SRC_CNT_MASK, pg_flow_ctrl[3]); -+ seq_printf(s, "\t\tThe used/reserved pages of HIF group=0x%03x/0x%03x\n", upg_hif, rpg_hif); -+ -+ seq_printf(s, "\tReserved page counter of HIF_TXCMD group(0x%x): 0x%08x\n", -+ MT_DBG_PLE_PG_HIF_TXCMD_GROUP, pg_flow_ctrl[6]); -+ seq_printf(s, "\tHIF_TXCMD group page status(0x%x): 0x%08x\n", -+ MT_DBG_PLE_HIF_TXCMD_PG_INFO, pg_flow_ctrl[7]); -+ cpu_min_q = FIELD_GET(MT_DBG_PLE_PG_HIF_TXCMD_GROUP_HIF_TXCMD_MIN_QUOTA_MASK, pg_flow_ctrl[6]); -+ cpu_max_q = FIELD_GET(MT_DBG_PLE_PG_HIF_TXCMD_GROUP_HIF_TXCMD_MAX_QUOTA_MASK, pg_flow_ctrl[6]); -+ seq_printf(s, "\t\tThe max/min quota pages of HIF_TXCMD group=0x%03x/0x%03x\n", cpu_max_q, cpu_min_q); -+ -+ rpg_cpu = FIELD_GET(MT_DBG_PLE_TXCMD_PG_INFO_HIF_TXCMD_RSV_CNT_MASK, pg_flow_ctrl[7]); -+ upg_cpu = FIELD_GET(MT_DBG_PLE_TXCMD_PG_INFO_HIF_TXCMD_SRC_CNT_MASK, pg_flow_ctrl[7]); -+ seq_printf(s, "\t\tThe used/reserved pages of HIF_TXCMD group=0x%03x/0x%03x\n", upg_cpu, rpg_cpu); -+ -+ seq_printf(s, "\tReserved page counter of CPU group(0x%x): 0x%08x\n", -+ MT_DBG_PLE_PG_CPU_GROUP, pg_flow_ctrl[4]); -+ seq_printf(s, "\tCPU group page status(0x%x): 0x%08x\n", -+ MT_DBG_PLE_CPU_PG_INFO, pg_flow_ctrl[5]); -+ cpu_min_q = FIELD_GET(MT_DBG_PLE_PG_CPU_GROUP_CPU_MIN_QUOTA_MASK, pg_flow_ctrl[4]); -+ cpu_max_q = FIELD_GET(MT_DBG_PLE_PG_CPU_GROUP_CPU_MAX_QUOTA_MASK, pg_flow_ctrl[4]); -+ seq_printf(s, "\t\tThe max/min quota pages of CPU group=0x%03x/0x%03x\n", cpu_max_q, cpu_min_q); -+ -+ rpg_cpu = FIELD_GET(MT_DBG_PLE_CPU_PG_INFO_CPU_RSV_CNT_MASK, pg_flow_ctrl[5]); -+ upg_cpu = FIELD_GET(MT_DBG_PLE_CPU_PG_INFO_CPU_SRC_CNT_MASK, pg_flow_ctrl[5]); -+ seq_printf(s, "\t\tThe used/reserved pages of CPU group=0x%03x/0x%03x\n", upg_cpu, rpg_cpu); -+ -+ if ((ple_stat[0] & MT_DBG_PLE_Q_EMPTY_ALL_AC_EMPTY_MASK) == 0) { -+ for (j = 0; j < all_ac_num; j++) { -+ if (j % ac_num == 0) { -+ seq_printf(s, "\n\tNonempty AC%d Q of STA#: ", j / ac_num); -+ } -+ -+ for (i = 0; i < 32; i++) { -+ if (((ple_stat[j + 1] & (0x1 << i)) >> i) == 0) { -+ seq_printf(s, "%d ", i + (j % ac_num) * 32); -+ } -+ } -+ } -+ -+ seq_printf(s, "\n"); -+ } -+ -+ seq_printf(s, "non-native/native txcmd queue empty = %d/%d\n", ple_txcmd_stat, ple_native_txcmd_stat); -+ -+ seq_printf(s, "Nonempty Q info:\n"); -+ -+ for (i = 0; i < 32; i++) { -+ if (((ple_stat[0] & (0x1 << i)) >> i) == 0) { -+ u32 hfid, tfid, pktcnt, fl_que_ctrl[3] = {0}; -+ -+ if (ple_queue_empty_info[i].QueueName != NULL) { -+ seq_printf(s, "\t%s: ", ple_queue_empty_info[i].QueueName); -+ fl_que_ctrl[0] |= MT_DBG_PLE_FL_QUE_CTRL0_EXECUTE_MASK; -+ fl_que_ctrl[0] |= (ple_queue_empty_info[i].Portid << MT_PLE_FL_QUE_CTRL0_Q_BUF_PID_SHFT); -+ fl_que_ctrl[0] |= (ple_queue_empty_info[i].Queueid << MT_PLE_FL_QUE_CTRL0_Q_BUF_QID_SHFT); -+ } else -+ continue; -+ -+ if (ple_queue_empty_info[i].Queueid >= ENUM_UMAC_LMAC_PLE_TX_Q_ALTX_0 && -+ ple_queue_empty_info[i].Queueid <= ENUM_UMAC_LMAC_PLE_TX_Q_PSMP_0) -+ /* band0 set TGID 0, bit31 = 0 */ -+ mt76_wr(dev, MT_DBG_PLE_FL_QUE_CTRL1, 0x0); -+ else if (ple_queue_empty_info[i].Queueid >= ENUM_UMAC_LMAC_PLE_TX_Q_ALTX_1 && -+ ple_queue_empty_info[i].Queueid <= ENUM_UMAC_LMAC_PLE_TX_Q_PSMP_1) -+ /* band1 set TGID 1, bit31 = 1 */ -+ mt76_wr(dev, MT_DBG_PLE_FL_QUE_CTRL1, 0x80000000); -+ -+ mt76_wr(dev, MT_DBG_PLE_FL_QUE_CTRL0, fl_que_ctrl[0]); -+ fl_que_ctrl[1] = mt76_rr(dev, MT_DBG_PLE_FL_QUE_CTRL2); -+ fl_que_ctrl[2] = mt76_rr(dev, MT_DBG_PLE_FL_QUE_CTRL3); -+ hfid = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL2_Q_HEAD_FID_MASK, fl_que_ctrl[1]); -+ tfid = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL2_Q_TAIL_FID_MASK, fl_que_ctrl[1]); -+ pktcnt = FIELD_GET(MT_DBG_PLE_FL_QUE_CTRL3_Q_PKT_NUM_MASK, fl_que_ctrl[2]); -+ seq_printf(s, "tail/head fid = 0x%03x/0x%03x, pkt cnt = 0x%03x\n", -+ tfid, hfid, pktcnt); -+ -+ /* TODO */ -+ //if (pktcnt > 0 && dumptxd > 0) -+ // ShowTXDInfo(pAd, hfid); -+ } -+ } -+ -+ chip_show_sta_acq_info(s, dev, ple_stat, sta_pause, dis_sta_map, 0/*dumptxd*/); -+ chip_show_txcmdq_info(s, dev, ple_native_txcmd_stat); -+ -+ return 0; -+} -+ -+typedef enum _ENUM_UMAC_PLE_CTRL_P3_QUEUE_T { -+ ENUM_UMAC_PLE_CTRL_P3_Q_0X1E = 0x1e, -+ ENUM_UMAC_PLE_CTRL_P3_Q_0X1F = 0x1f, -+ ENUM_UMAC_PLE_CTRL_P3_TOTAL_NUM = 2 -+} ENUM_UMAC_PLE_CTRL_P3_QUEUE_T, *P_ENUM_UMAC_PLE_CTRL_P3_QUEUE_T; -+ -+static EMPTY_QUEUE_INFO_T pse_queue_empty_info[] = { -+ {"CPU Q0", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_0}, -+ {"CPU Q1", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_1}, -+ {"CPU Q2", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_2}, -+ {"CPU Q3", ENUM_UMAC_CPU_PORT_1, ENUM_UMAC_CTX_Q_3}, -+ {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, /* 4~7 not defined */ -+ {"HIF Q0", ENUM_UMAC_HIF_PORT_0, 0}, /* Q8 */ -+ {"HIF Q1", ENUM_UMAC_HIF_PORT_0, 1}, -+ {"HIF Q2", ENUM_UMAC_HIF_PORT_0, 2}, -+ {"HIF Q3", ENUM_UMAC_HIF_PORT_0, 3}, -+ {"HIF Q4", ENUM_UMAC_HIF_PORT_0, 4}, -+ {"HIF Q5", ENUM_UMAC_HIF_PORT_0, 5}, -+ {NULL, 0, 0}, {NULL, 0, 0}, /* 14~15 not defined */ -+ {"LMAC Q", ENUM_UMAC_LMAC_PORT_2, 0}, -+ {"MDP TX Q", ENUM_UMAC_LMAC_PORT_2, 1}, -+ {"MDP RX Q", ENUM_UMAC_LMAC_PORT_2, 2}, -+ {"SEC TX Q", ENUM_UMAC_LMAC_PORT_2, 3}, -+ {"SEC RX Q", ENUM_UMAC_LMAC_PORT_2, 4}, -+ {"SFD_PARK Q", ENUM_UMAC_LMAC_PORT_2, 5}, -+ {"MDP_TXIOC Q", ENUM_UMAC_LMAC_PORT_2, 6}, -+ {"MDP_RXIOC Q", ENUM_UMAC_LMAC_PORT_2, 7}, -+ {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, {NULL, 0, 0}, /* 24~30 not defined */ -+ {"RLS Q", ENUM_PLE_CTRL_PSE_PORT_3, ENUM_UMAC_PLE_CTRL_P3_Q_0X1F} -+}; -+ -+static int mt7915_pseinfo_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 pse_buf_ctrl, pg_sz, pg_num; -+ u32 pse_stat, pg_flow_ctrl[22] = {0}; -+ u32 fpg_cnt, ffa_cnt, fpg_head, fpg_tail; -+ u32 max_q, min_q, rsv_pg, used_pg; -+ int i; -+ -+ pse_buf_ctrl = mt76_rr(dev, MT_DBG_PSE_PBUF_CTRL); -+ pse_stat = mt76_rr(dev, MT_DBG_PSE_QUEUE_EMPTY); -+ pg_flow_ctrl[0] = mt76_rr(dev, MT_DBG_PSE_FREEPG_CNT); -+ pg_flow_ctrl[1] = mt76_rr(dev, MT_DBG_PSE_FREEPG_HEAD_TAIL); -+ pg_flow_ctrl[2] = mt76_rr(dev, MT_DBG_PSE_PG_HIF0_GROUP); -+ pg_flow_ctrl[3] = mt76_rr(dev, MT_DBG_PSE_HIF0_PG_INFO); -+ pg_flow_ctrl[4] = mt76_rr(dev, MT_DBG_PSE_PG_HIF1_GROUP); -+ pg_flow_ctrl[5] = mt76_rr(dev, MT_DBG_PSE_HIF1_PG_INFO); -+ pg_flow_ctrl[6] = mt76_rr(dev, MT_DBG_PSE_PG_CPU_GROUP); -+ pg_flow_ctrl[7] = mt76_rr(dev, MT_DBG_PSE_CPU_PG_INFO); -+ pg_flow_ctrl[8] = mt76_rr(dev, MT_DBG_PSE_PG_LMAC0_GROUP); -+ pg_flow_ctrl[9] = mt76_rr(dev, MT_DBG_PSE_LMAC0_PG_INFO); -+ pg_flow_ctrl[10] = mt76_rr(dev, MT_DBG_PSE_PG_LMAC1_GROUP); -+ pg_flow_ctrl[11] = mt76_rr(dev, MT_DBG_PSE_LMAC1_PG_INFO); -+ pg_flow_ctrl[12] = mt76_rr(dev, MT_DBG_PSE_PG_LMAC2_GROUP); -+ pg_flow_ctrl[13] = mt76_rr(dev, MT_DBG_PSE_LMAC2_PG_INFO); -+ pg_flow_ctrl[14] = mt76_rr(dev, MT_DBG_PSE_PG_PLE_GROUP); -+ pg_flow_ctrl[15] = mt76_rr(dev, MT_DBG_PSE_PLE_PG_INFO); -+ pg_flow_ctrl[16] = mt76_rr(dev, MT_DBG_PSE_PG_LMAC3_GROUP); -+ pg_flow_ctrl[17] = mt76_rr(dev, MT_DBG_PSE_LMAC3_PG_INFO); -+ pg_flow_ctrl[18] = mt76_rr(dev, MT_DBG_PSE_PG_MDP_GROUP); -+ pg_flow_ctrl[19] = mt76_rr(dev, MT_DBG_PSE_MDP_PG_INFO); -+ pg_flow_ctrl[20] = mt76_rr(dev, MT_DBG_PSE_PG_PLE1_GROUP); -+ pg_flow_ctrl[21] = mt76_rr(dev,MT_DBG_PSE_PLE1_PG_INFO); -+ -+ /* Configuration Info */ -+ seq_printf(s, "PSE Configuration Info:\n"); -+ seq_printf(s, "\tPacket Buffer Control(0x82068014): 0x%08x\n", pse_buf_ctrl); -+ pg_sz = FIELD_GET(MT_DBG_PSE_PBUF_CTRL_PAGE_SIZE_CFG_MASK, pse_buf_ctrl); -+ -+ seq_printf(s, "\t\tPage Size=%d(%d bytes per page)\n", pg_sz, (pg_sz == 1 ? 256 : 128)); -+ seq_printf(s, "\t\tPage Offset=%ld(in unit of 64KB)\n", -+ FIELD_GET(MT_DBG_PSE_PBUF_CTRL_PBUF_OFFSET_MASK, pse_buf_ctrl)); -+ pg_num = FIELD_GET(MT_DBG_PSE_PBUF_CTRL_TOTAL_PAGE_NUM_MASK, pse_buf_ctrl); -+ -+ seq_printf(s, "\t\tTotal page numbers=%d pages\n", pg_num); -+ -+ /* Page Flow Control */ -+ seq_printf(s, "PSE Page Flow Control:\n"); -+ seq_printf(s, "\tFree page counter(0x82068100): 0x%08x\n", pg_flow_ctrl[0]); -+ fpg_cnt = FIELD_GET(MT_DBG_PSE_FREEPG_CNT_FREEPG_CNT_MASK, pg_flow_ctrl[0]); -+ seq_printf(s, "\t\tThe toal page number of free=0x%03x\n", fpg_cnt); -+ -+ ffa_cnt = FIELD_GET(MT_DBG_PSE_FREEPG_CNT_FFA_CNT_MASK, pg_flow_ctrl[0]); -+ seq_printf(s, "\t\tThe free page numbers of free for all=0x%03x\n", ffa_cnt); -+ -+ seq_printf(s, "\tFree page head and tail(0x82068104): 0x%08x\n", pg_flow_ctrl[1]); -+ fpg_head = FIELD_GET(MT_DBG_PSE_FREEPG_HEAD_TAIL_FREEPG_HEAD_MASK, pg_flow_ctrl[1]); -+ -+ fpg_tail = FIELD_GET(MT_DBG_PSE_FREEPG_HEAD_TAIL_FREEPG_TAIL_MASK, pg_flow_ctrl[1]); -+ seq_printf(s, "\t\tThe tail/head page of free page list=0x%03x/0x%03x\n", fpg_tail, fpg_head); -+ seq_printf(s, "\tReserved page counter of HIF0 group(0x82068110): 0x%08x\n", pg_flow_ctrl[2]); -+ seq_printf(s, "\tHIF0 group page status(0x82068114): 0x%08x\n", pg_flow_ctrl[3]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_HIF0_GROUP_HIF0_MIN_QUOTA_MASK, pg_flow_ctrl[2]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_HIF0_GROUP_HIF0_MAX_QUOTA_MASK, pg_flow_ctrl[2]); -+ seq_printf(s, "\t\tThe max/min quota pages of HIF0 group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_HIF0_PG_INFO_HIF0_RSV_CNT_MASK, pg_flow_ctrl[3]);; -+ used_pg = FIELD_GET(MT_DBG_PSE_HIF0_PG_INFO_HIF0_SRC_CNT_MASK, pg_flow_ctrl[3]); -+ seq_printf(s, "\t\tThe used/reserved pages of HIF0 group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ seq_printf(s, "\tReserved page counter of HIF1 group(0x82068118): 0x%08x\n", pg_flow_ctrl[4]); -+ seq_printf(s, "\tHIF1 group page status(0x8206811c): 0x%08x\n", pg_flow_ctrl[5]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_HIF1_GROUP_HIF1_MIN_QUOTA_MASK, pg_flow_ctrl[4]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_HIF1_GROUP_HIF1_MAX_QUOTA_MASK, pg_flow_ctrl[4]); -+ seq_printf(s, "\t\tThe max/min quota pages of HIF1 group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_HIF1_PG_INFO_HIF1_RSV_CNT_MASK, pg_flow_ctrl[5]); -+ used_pg = FIELD_GET(MT_DBG_PSE_HIF1_PG_INFO_HIF1_SRC_CNT_MASK, pg_flow_ctrl[5]); -+ -+ seq_printf(s, "\t\tThe used/reserved pages of HIF1 group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ seq_printf(s, "\tReserved page counter of CPU group(0x82068150): 0x%08x\n", pg_flow_ctrl[6]); -+ seq_printf(s, "\tCPU group page status(0x82068154): 0x%08x\n", pg_flow_ctrl[7]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_CPU_GROUP_CPU_MIN_QUOTA_MASK, pg_flow_ctrl[6]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_CPU_GROUP_CPU_MAX_QUOTA_MASK, pg_flow_ctrl[6]); -+ seq_printf(s, "\t\tThe max/min quota pages of CPU group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_CPU_PG_INFO_CPU_RSV_CNT_MASK, pg_flow_ctrl[7]); -+ used_pg = FIELD_GET(MT_DBG_PSE_CPU_PG_INFO_CPU_SRC_CNT_MASK, pg_flow_ctrl[7]); -+ seq_printf(s, "\t\tThe used/reserved pages of CPU group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ seq_printf(s, "\tReserved page counter of LMAC0 group(0x82068170): 0x%08x\n", pg_flow_ctrl[8]); -+ seq_printf(s, "\tLMAC0 group page status(0x82068174): 0x%08x\n", pg_flow_ctrl[9]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_LMAC0_GROUP_LMAC0_MIN_QUOTA_MASK, pg_flow_ctrl[8]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_LMAC0_GROUP_LMAC0_MAX_QUOTA_MASK, pg_flow_ctrl[8]); -+ seq_printf(s, "\t\tThe max/min quota pages of LMAC0 group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_LMAC0_PG_INFO_LMAC0_RSV_CNT_MASK, pg_flow_ctrl[9]); -+ used_pg = FIELD_GET(MT_DBG_PSE_LMAC0_PG_INFO_LMAC0_SRC_CNT_MASK, pg_flow_ctrl[9]); -+ seq_printf(s, "\t\tThe used/reserved pages of LMAC0 group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ seq_printf(s, "\tReserved page counter of LMAC1 group(0x82068178): 0x%08x\n", pg_flow_ctrl[10]); -+ seq_printf(s, "\tLMAC1 group page status(0x8206817c): 0x%08x\n", pg_flow_ctrl[11]); -+ min_q = FIELD_GET(MT_DBG_TOP_PG_LMAC1_GROUP_LMAC1_MIN_QUOTA_MASK, pg_flow_ctrl[10]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_LMAC1_GROUP_LMAC1_MAX_QUOTA_MASK, pg_flow_ctrl[10]); -+ seq_printf(s, "\t\tThe max/min quota pages of LMAC1 group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_LMAC1_PG_INFO_LMAC1_RSV_CNT_MASK, pg_flow_ctrl[11]); -+ used_pg = FIELD_GET(MT_DBG_PSE_LMAC1_PG_INFO_LMAC1_SRC_CNT_MASK, pg_flow_ctrl[11]); -+ seq_printf(s, "\t\tThe used/reserved pages of LMAC1 group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ seq_printf(s, "\tReserved page counter of LMAC2 group(0x82068180): 0x%08x\n", pg_flow_ctrl[11]); -+ seq_printf(s, "\tLMAC2 group page status(0x82068184): 0x%08x\n", pg_flow_ctrl[12]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_LMAC2_GROUP_LMAC2_MIN_QUOTA_MASK, pg_flow_ctrl[12]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_LMAC2_GROUP_LMAC2_MAX_QUOTA_MASK, pg_flow_ctrl[12]); -+ seq_printf(s, "\t\tThe max/min quota pages of LMAC2 group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_LMAC2_PG_INFO_LMAC2_RSV_CNT_MASK, pg_flow_ctrl[13]); -+ used_pg = FIELD_GET(MT_DBG_PSE_LMAC2_PG_INFO_LMAC2_SRC_CNT_MASK, pg_flow_ctrl[13]); -+ seq_printf(s, "\t\tThe used/reserved pages of LMAC2 group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ -+ seq_printf(s, "\tReserved page counter of LMAC3 group(0x82068188): 0x%08x\n", pg_flow_ctrl[16]); -+ seq_printf(s, "\tLMAC3 group page status(0x8206818c): 0x%08x\n", pg_flow_ctrl[17]); -+ min_q = FIELD_GET(MT_DBG_TOP_PG_LMAC3_GROUP_LMAC3_MIN_QUOTA_MASK, pg_flow_ctrl[16]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_LMAC3_GROUP_LMAC3_MAX_QUOTA_MASK, pg_flow_ctrl[16]); -+ seq_printf(s, "\t\tThe max/min quota pages of LMAC3 group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_LMAC3_PG_INFO_LMAC3_RSV_CNT_MASK, pg_flow_ctrl[17]); -+ used_pg = FIELD_GET(MT_DBG_PSE_LMAC3_PG_INFO_LMAC3_SRC_CNT_MASK, pg_flow_ctrl[17]); -+ seq_printf(s, "\t\tThe used/reserved pages of LMAC3 group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ -+ seq_printf(s, "\tReserved page counter of PLE group(0x82068160): 0x%08x\n", pg_flow_ctrl[14]); -+ seq_printf(s, "\tPLE group page status(0x82068164): 0x%08x\n", pg_flow_ctrl[15]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_PLE_GROUP_PLE_MIN_QUOTA_MASK, pg_flow_ctrl[14]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_PLE_GROUP_PLE_MAX_QUOTA_MASK, pg_flow_ctrl[14]); -+ seq_printf(s, "\t\tThe max/min quota pages of PLE group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_PLE_PG_INFO_PLE_RSV_CNT_MASK, pg_flow_ctrl[15]); -+ used_pg = FIELD_GET(MT_DBG_PSE_PLE_PG_INFO_PLE_SRC_CNT_MASK, pg_flow_ctrl[15]); -+ seq_printf(s, "\t\tThe used/reserved pages of PLE group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ -+ seq_printf(s, "\tReserved page counter of PLE1 group(0x82068168): 0x%08x\n", pg_flow_ctrl[14]); -+ seq_printf(s, "\tPLE1 group page status(0x8206816c): 0x%08x\n", pg_flow_ctrl[15]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_PLE_GROUP_PLE_MIN_QUOTA_MASK, pg_flow_ctrl[20]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_PLE_GROUP_PLE_MAX_QUOTA_MASK, pg_flow_ctrl[20]); -+ seq_printf(s, "\t\tThe max/min quota pages of PLE1 group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_PLE_PG_INFO_PLE_RSV_CNT_MASK, pg_flow_ctrl[21]); -+ used_pg = FIELD_GET(MT_DBG_PSE_PLE_PG_INFO_PLE_SRC_CNT_MASK, pg_flow_ctrl[21]); -+ seq_printf(s, "\t\tThe used/reserved pages of PLE1 group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ -+ seq_printf(s, "\tReserved page counter of MDP group(0x82068198): 0x%08x\n", pg_flow_ctrl[18]); -+ seq_printf(s, "\tMDP group page status(0x8206819c): 0x%08x\n", pg_flow_ctrl[19]); -+ min_q = FIELD_GET(MT_DBG_PSE_PG_MDP_GROUP_MDP_MIN_QUOTA_MASK, pg_flow_ctrl[18]); -+ max_q = FIELD_GET(MT_DBG_PSE_PG_MDP_GROUP_MDP_MAX_QUOTA_MASK, pg_flow_ctrl[18]); -+ seq_printf(s, "\t\tThe max/min quota pages of MDP group=0x%03x/0x%03x\n", max_q, min_q); -+ rsv_pg = FIELD_GET(MT_DBG_PSE_MDP_PG_INFO_MDP_RSV_CNT_MASK, pg_flow_ctrl[19]); -+ used_pg = FIELD_GET(MT_DBG_PSE_MDP_PG_INFO_MDP_SRC_CNT_MASK, pg_flow_ctrl[19]); -+ seq_printf(s, "\t\tThe used/reserved pages of MDP group=0x%03x/0x%03x\n", used_pg, rsv_pg); -+ -+ /* Queue Empty Status */ -+ seq_printf(s, "PSE Queue Empty Status:\n"); -+ seq_printf(s, "\tQUEUE_EMPTY(0x820680b0): 0x%08x\n", pse_stat); -+ seq_printf(s, "\t\tCPU Q0/1/2/3 empty=%ld/%ld/%ld/%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_CPU_Q0_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_CPU_Q1_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_CPU_Q2_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_CPU_Q3_EMPTY_MASK, pse_stat)); -+ -+ seq_printf(s, "\t\tHIF Q0/1/2/3/4/5 empty=%ld/%ld/%ld/%ld/%ld/%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_HIF_0_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_HIF_1_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_HIF_2_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_HIF_3_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_HIF_4_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_HIF_5_EMPTY_MASK, pse_stat)); -+ -+ seq_printf(s, "\t\tLMAC TX Q empty=%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_LMAC_TX_QUEUE_EMPTY_MASK, pse_stat)); -+ seq_printf(s, "\t\tMDP TX Q/RX Q empty=%ld/%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_MDP_TX_QUEUE_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_MDP_RX_QUEUE_EMPTY_MASK, pse_stat)); -+ seq_printf(s, "\t\tSEC TX Q/RX Q empty=%ld/%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_SEC_TX_QUEUE_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_SEC_RX_QUEUE_EMPTY_SHFT, pse_stat)); -+ seq_printf(s, "\t\tSFD PARK Q empty=%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_SFD_PARK_QUEUE_EMPTY_MASK, pse_stat)); -+ seq_printf(s, "\t\tMDP TXIOC Q/RXIOC Q empty=%ld/%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_MDP_TXIOC_QUEUE_EMPTY_MASK, pse_stat), -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_MDP_RXIOC_QUEUE_EMPTY_MASK, pse_stat)); -+ seq_printf(s, "\t\tRLS Q empty=%ld\n", -+ FIELD_GET(MT_DBG_PSE_QUEUE_EMPTY_RLS_Q_EMTPY_MASK, pse_stat)); -+ seq_printf(s, "Nonempty Q info:\n"); -+ -+ for (i = 0; i < 31; i++) { -+ if (((pse_stat & (0x1 << i)) >> i) == 0) { -+ u32 hfid, tfid, pktcnt, fl_que_ctrl[3] = {0}; -+ -+ if (pse_queue_empty_info[i].QueueName != NULL) { -+ seq_printf(s, "\t%s: ", pse_queue_empty_info[i].QueueName); -+ fl_que_ctrl[0] |= MT_DBG_PSE_FL_QUE_CTRL_0_EXECUTE_MASK; -+ fl_que_ctrl[0] |= (pse_queue_empty_info[i].Portid << MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_PID_SHFT); -+ fl_que_ctrl[0] |= (pse_queue_empty_info[i].Queueid << MT_DBG_PSE_FL_QUE_CTRL_0_Q_BUF_QID_SHFT); -+ } else -+ continue; -+ -+ fl_que_ctrl[0] |= (0x1 << 31); -+ -+ mt76_wr(dev, MT_DBG_PSE_FL_QUE_CTRL_0_ADDR, fl_que_ctrl[0]); -+ fl_que_ctrl[1] = mt76_rr(dev, MT_DBG_PSE_FL_QUE_CTRL_2_ADDR); -+ fl_que_ctrl[2] = mt76_rr(dev, MT_DBG_PSE_FL_QUE_CTRL_3_ADDR); -+ -+ hfid = FIELD_GET(MT_DBG_PSE_FL_QUE_CTRL_2_QUEUE_HEAD_FID_MASK, fl_que_ctrl[1]); -+ tfid = FIELD_GET(MT_DBG_PSE_FL_QUE_CTRL_2_QUEUE_TAIL_FID_MASK, fl_que_ctrl[1]); -+ pktcnt = FIELD_GET(MT_DBG_PSE_FL_QUE_CTRL_3_QUEUE_PKT_NUM_MASK, fl_que_ctrl[2]); -+ seq_printf(s, "tail/head fid = 0x%03x/0x%03x, pkt cnt = 0x%03x\n", -+ tfid, hfid, pktcnt); -+ } -+ } -+ -+ return 0; -+} -+ -+static int mt7915_mibinfo_read_per_band(struct seq_file *s, int band_idx) -+{ -+#define BSS_NUM 4 -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 mac_val0, mac_val, mac_val1, idx, band_offset = 0; -+ u32 msdr6, msdr7, msdr8, msdr9, msdr10, msdr16, msdr17, msdr18, msdr19, msdr20, msdr21; -+ u32 mbxsdr[BSS_NUM][7]; -+ u32 mbtcr[16], mbtbcr[16], mbrcr[16], mbrbcr[16]; -+ u32 btcr[BSS_NUM], btbcr[BSS_NUM], brcr[BSS_NUM], brbcr[BSS_NUM], btdcr[BSS_NUM], brdcr[BSS_NUM]; -+ u32 mu_cnt[5]; -+ u32 ampdu_cnt[3]; -+ unsigned long per; -+ -+ seq_printf(s, "Band %d MIB Status\n", band_idx); -+ seq_printf(s, "===============================\n"); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SCR0(band_idx)); -+ seq_printf(s, "MIB Status Control=0x%x\n", mac_val); -+ if (is_mt7915(&dev->mt76)) { -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0PBSCR(band_idx)); -+ seq_printf(s, "MIB Per-BSS Status Control=0x%x\n", mac_val); -+ } -+ -+ msdr6 = mt76_rr(dev, MT_DBG_MIB_M0SDR6(band_idx)); -+ msdr7 = mt76_rr(dev, MT_DBG_MIB_M0SDR7(band_idx)); -+ msdr8 = mt76_rr(dev, MT_DBG_MIB_M0SDR8(band_idx)); -+ msdr9 = mt76_rr(dev, MT_DBG_MIB_M0SDR9(band_idx)); -+ msdr10 = mt76_rr(dev, MT_DBG_MIB_M0SDR10(band_idx)); -+ msdr16 = mt76_rr(dev, MT_DBG_MIB_M0SDR16(band_idx)); -+ msdr17 = mt76_rr(dev, MT_DBG_MIB_M0SDR17(band_idx)); -+ msdr18 = mt76_rr(dev, MT_DBG_MIB_M0SDR18(band_idx)); -+ msdr19 = mt76_rr(dev, MT_DBG_MIB_M0SDR19(band_idx)); -+ msdr20 = mt76_rr(dev, MT_DBG_MIB_M0SDR20(band_idx)); -+ msdr21 = mt76_rr(dev, MT_DBG_MIB_M0SDR21(band_idx)); -+ ampdu_cnt[0] = mt76_rr(dev, MT_DBG_MIB_M0SDR12(band_idx)); -+ ampdu_cnt[1] = mt76_rr(dev, MT_DBG_MIB_M0SDR14(band_idx)); -+ ampdu_cnt[2] = mt76_rr(dev, MT_DBG_MIB_M0SDR15(band_idx)); -+ ampdu_cnt[1] &= MT_DBG_MIB_M0SDR14_AMPDU_MASK; -+ ampdu_cnt[2] &= MT_DBG_MIB_M0SDR15_AMPDU_ACKED_MASK; -+ -+ seq_printf(s, "===Phy/Timing Related Counters===\n"); -+ seq_printf(s, "\tChannelIdleCnt=0x%x\n", msdr6 & BN0_WF_MIB_TOP_M0SDR6_CHANNEL_IDLE_COUNT_MASK); -+ seq_printf(s, "\tCCA_NAV_Tx_Time=0x%x\n", msdr9 & BN0_WF_MIB_TOP_M0SDR9_CCA_NAV_TX_TIME_MASK); -+ seq_printf(s, "\tRx_MDRDY_CNT=0x%lx\n", msdr10 & MT_DBG_MIB_M0SDR10_RX_MDRDY_COUNT_MASK); -+ seq_printf(s, "\tCCK_MDRDY_TIME=0x%x, OFDM_MDRDY_TIME=0x%x, OFDM_GREEN_MDRDY_TIME=0x%x\n", -+ msdr19 & BN0_WF_MIB_TOP_M0SDR19_CCK_MDRDY_TIME_MASK, -+ msdr20 & BN0_WF_MIB_TOP_M0SDR20_OFDM_LG_MIXED_VHT_MDRDY_TIME_MASK, -+ msdr21 & BN0_WF_MIB_TOP_M0SDR21_OFDM_GREEN_MDRDY_TIME_MASK); -+ seq_printf(s, "\tPrim CCA Time=0x%x\n", msdr16 & BN0_WF_MIB_TOP_M0SDR16_P_CCA_TIME_MASK); -+ seq_printf(s, "\tSec CCA Time=0x%x\n", msdr17 & BN0_WF_MIB_TOP_M0SDR17_S_CCA_TIME_MASK); -+ seq_printf(s, "\tPrim ED Time=0x%x\n", msdr18 & BN0_WF_MIB_TOP_M0SDR18_P_ED_TIME_MASK); -+ -+ seq_printf(s, "===Tx Related Counters(Generic)===\n"); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SDR0(band_idx)); -+ dev->dbg.bcn_total_cnt[band_idx] += (mac_val & BN0_WF_MIB_TOP_M0SDR0_BEACONTXCOUNT_MASK); -+ seq_printf(s, "\tBeaconTxCnt=0x%x\n",dev->dbg.bcn_total_cnt[band_idx]); -+ dev->dbg.bcn_total_cnt[band_idx] = 0; -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0DR0(band_idx)); -+ seq_printf(s, "\tTx 20MHz Cnt=0x%x\n", mac_val & BN0_WF_MIB_TOP_M0DR0_TX_20MHZ_CNT_MASK); -+ seq_printf(s, "\tTx 40MHz Cnt=0x%x\n", (mac_val & BN0_WF_MIB_TOP_M0DR0_TX_40MHZ_CNT_MASK) >> BN0_WF_MIB_TOP_M0DR0_TX_40MHZ_CNT_SHFT); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0DR1(band_idx)); -+ seq_printf(s, "\tTx 80MHz Cnt=0x%x\n", mac_val & BN0_WF_MIB_TOP_M0DR1_TX_80MHZ_CNT_MASK); -+ seq_printf(s, "\tTx 160MHz Cnt=0x%x\n", (mac_val & BN0_WF_MIB_TOP_M0DR1_TX_160MHZ_CNT_MASK) >> BN0_WF_MIB_TOP_M0DR1_TX_160MHZ_CNT_SHFT); -+ seq_printf(s, "\tAMPDU Cnt=0x%x\n", ampdu_cnt[0]); -+ seq_printf(s, "\tAMPDU MPDU Cnt=0x%x\n", ampdu_cnt[1]); -+ seq_printf(s, "\tAMPDU MPDU Ack Cnt=0x%x\n", ampdu_cnt[2]); -+ per = (ampdu_cnt[2] == 0 ? 0 : 1000 * (ampdu_cnt[1] - ampdu_cnt[2]) / ampdu_cnt[1]); -+ seq_printf(s, "\tAMPDU MPDU PER=%ld.%1ld%%\n", per / 10, per % 10); -+ -+ seq_printf(s, "===MU Related Counters===\n"); -+ mu_cnt[0] = mt76_rr(dev, MT_DBG_MIB_MUBF(band_idx)); -+ mu_cnt[1] = mt76_rr(dev, MT_DBG_MIB_M0DR8(band_idx)); -+ mu_cnt[2] = mt76_rr(dev, MT_DBG_MIB_M0DR9(band_idx)); -+ mu_cnt[3] = mt76_rr(dev, MT_DBG_MIB_M0DR10(band_idx)); -+ mu_cnt[4] = mt76_rr(dev, MT_DBG_MIB_M0DR11(band_idx)); -+ seq_printf(s, "\tMUBF_TX_COUNT=0x%x\n", mu_cnt[0] & BN0_WF_MIB_TOP_M0SDR34_MUBF_TX_COUNT_MASK); -+ seq_printf(s, "\tMU_TX_MPDU_COUNT(Ok+Fail)=0x%x\n", mu_cnt[1]); -+ seq_printf(s, "\tMU_TX_OK_MPDU_COUNT=0x%x\n", mu_cnt[2]); -+ seq_printf(s, "\tMU_TO_SU_PPDU_COUNT=0x%x\n", mu_cnt[3] & BN0_WF_MIB_TOP_M0DR10_MU_FAIL_PPDU_CNT_MASK); -+ seq_printf(s, "\tSU_TX_OK_MPDU_COUNT=0x%x\n", mu_cnt[4]); -+ -+ seq_printf(s, "===Rx Related Counters(Generic)===\n"); -+ seq_printf(s, "\tVector Mismacth Cnt=0x%x\n", msdr7 & BN0_WF_MIB_TOP_M0SDR7_VEC_MISS_COUNT_MASK); -+ seq_printf(s, "\tDelimiter Fail Cnt=0x%x\n", msdr8 & BN0_WF_MIB_TOP_M0SDR8_DELIMITER_FAIL_COUNT_MASK); -+ -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SDR3(band_idx)); -+ seq_printf(s, "\tRxFCSErrCnt=0x%lx\n", __DBG_FIELD_GET(DBG_MIB_RX_FCS_ERROR_COUNT, mac_val)); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SDR4(band_idx)); -+ seq_printf(s, "\tRxFifoFullCnt=0x%x\n", (mac_val & BN0_WF_MIB_TOP_M0SDR4_RX_FIFO_FULL_COUNT_MASK)); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SDR11(band_idx)); -+ seq_printf(s, "\tRxLenMismatch=0x%x\n", (mac_val & BN0_WF_MIB_TOP_M0SDR11_RX_LEN_MISMATCH_MASK)); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SDR5(band_idx)); -+ seq_printf(s, "\tRxMPDUCnt=0x%x\n", (mac_val & BN0_WF_MIB_TOP_M0SDR5_RX_MPDU_COUNT_MASK)); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SDR22(band_idx)); -+ seq_printf(s, "\tRx AMPDU Cnt=0x%x\n", mac_val); -+ /* TODO: shiang-MT7615, is MIB_M0SDR23 used for Rx total byte count for all or just AMPDU only??? */ -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0SDR23(band_idx)); -+ seq_printf(s, "\tRx Total ByteCnt=0x%x\n", mac_val); -+ -+ if (is_mt7915(&dev->mt76)) { -+ band_offset = WF_WTBLON_TOP_B1BTCRn_ADDR - WF_WTBLON_TOP_B0BTCRn_ADDR;//check -+ seq_printf(s, "===Per-BSS Related Tx/Rx Counters===\n"); -+ seq_printf(s, "BSS Idx TxCnt/DataCnt TxByteCnt RxCnt/DataCnt RxByteCnt\n"); -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ btcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0BTCRn_ADDR + band_offset + idx * 4); -+ btbcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0BTBCRn_ADDR + band_offset + idx * 4); -+ brcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0BRCRn_ADDR + band_offset + idx * 4); -+ brbcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0BRBCRn_ADDR + band_offset + idx * 4); -+ btdcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0BTDCRn_ADDR + band_offset + idx * 4); -+ brdcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0BRDCRn_ADDR + band_offset + idx * 4); -+ } -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ seq_printf(s, "%d\t 0x%x/0x%x\t 0x%x \t 0x%x/0x%x \t 0x%x\n", -+ idx, btcr[idx], btdcr[idx], btbcr[idx], -+ brcr[idx], brdcr[idx], brbcr[idx]); -+ } -+ -+ band_offset = (BN1_WF_MIB_TOP_BASE - BN0_WF_MIB_TOP_BASE) * band_idx; -+ seq_printf(s, "===Per-MBSS Related MIB Counters===\n"); -+ seq_printf(s, "BSS Idx RTSTx/RetryCnt BAMissCnt AckFailCnt FrmRetry1/2/3Cnt\n"); -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ mbxsdr[idx][0] = mt76_rr(dev, BN0_WF_MIB_TOP_M0B0SDR0_ADDR + band_offset + idx * 0x10); -+ mbxsdr[idx][1] = mt76_rr(dev, BN0_WF_MIB_TOP_M0B0SDR1_ADDR + band_offset + idx * 0x10); -+ mbxsdr[idx][2] = mt76_rr(dev, BN0_WF_MIB_TOP_M0B0SDR2_ADDR + band_offset + idx * 0x10); -+ mbxsdr[idx][3] = mt76_rr(dev, BN0_WF_MIB_TOP_M0B0SDR3_ADDR + band_offset + idx * 0x10); -+ } -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ seq_printf(s, "%d:\t0x%08x/0x%08x 0x%08x \t 0x%08x \t 0x%08x/0x%08x/0x%08x\n", -+ idx, (mbxsdr[idx][0] & BN0_WF_MIB_TOP_M0B0SDR0_RTSTXCOUNT_MASK), -+ (mbxsdr[idx][0] & BN0_WF_MIB_TOP_M0B0SDR0_RTSRETRYCOUNT_MASK) >> BN0_WF_MIB_TOP_M0B0SDR0_RTSRETRYCOUNT_SHFT, -+ (mbxsdr[idx][1] & BN0_WF_MIB_TOP_M0B0SDR1_BAMISSCOUNT_MASK), -+ (mbxsdr[idx][1] & BN0_WF_MIB_TOP_M0B0SDR1_ACKFAILCOUNT_MASK) >> BN0_WF_MIB_TOP_M0B0SDR1_ACKFAILCOUNT_SHFT, -+ (mbxsdr[idx][2] & BN0_WF_MIB_TOP_M0B0SDR2_FRAMERETRYCOUNT_MASK), -+ (mbxsdr[idx][2] & BN0_WF_MIB_TOP_M0B0SDR2_FRAMERETRY2COUNT_MASK) >> BN0_WF_MIB_TOP_M0B0SDR2_FRAMERETRY2COUNT_SHFT, -+ (mbxsdr[idx][3] & BN0_WF_MIB_TOP_M0B0SDR3_FRAMERETRY3COUNT_MASK)); -+ } -+ -+ band_offset = WF_WTBLON_TOP_B1BTCRn_ADDR - WF_WTBLON_TOP_B0BTCRn_ADDR; -+ seq_printf(s, "===Per-MBSS Related Tx/Rx Counters===\n"); -+ seq_printf(s, "MBSSIdx TxCnt TxByteCnt RxCnt RxByteCnt\n"); -+ -+ for (idx = 0; idx < 16; idx++) { -+ mbtcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0MBTCRn_ADDR + band_offset + idx * 4); -+ mbtbcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0MBTBCRn_ADDR + band_offset + idx * 4); -+ mbrcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0MBRCRn_ADDR + band_offset + idx * 4); -+ mbrbcr[idx] = mt76_rr(dev, WF_WTBLON_TOP_B0MBRBCRn_ADDR + band_offset + idx * 4); -+ } -+ -+ for (idx = 0; idx < 16; idx++) { -+ seq_printf(s, "%d\t 0x%08x\t 0x%08x \t 0x%08x \t 0x%08x\n", -+ idx, mbtcr[idx], mbtbcr[idx], mbrcr[idx], mbrbcr[idx]); -+ } -+ return 0; -+ } else { -+ u32 btocr[BSS_NUM], mbtocr[16],mbrocr[16], brocr[BSS_NUM]; -+ u8 bss_nums = BSS_NUM; -+ -+ band_offset = (BN1_WF_MIB_TOP_BTOCR_ADDR - BN0_WF_MIB_TOP_BTOCR_ADDR) * band_idx; -+ seq_printf(s, "===Per-BSS Related Tx/Rx Counters===\n"); -+ seq_printf(s, "BSS Idx TxCnt/DataCnt TxByteCnt RxCnt/DataCnt RxByteCnt\n"); -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ btocr[idx] = mt76_rr(dev, (BN0_WF_MIB_TOP_BTOCR_ADDR + band_offset + (idx >> 1) * 4)); -+ btdcr[idx] = mt76_rr(dev, (BN0_WF_MIB_TOP_BTDCR_ADDR + band_offset + (idx >> 1) * 4)); -+ btbcr[idx] = mt76_rr(dev, (BN0_WF_MIB_TOP_BTBCR_ADDR + band_offset + (idx * 4))); -+ brocr[idx] = mt76_rr(dev, (BN0_WF_MIB_TOP_BROCR_ADDR + band_offset + (idx >> 1) * 4)); -+ brdcr[idx] = mt76_rr(dev, (BN0_WF_MIB_TOP_BRDCR_ADDR + band_offset + (idx >> 1) * 4)); -+ brbcr[idx] = mt76_rr(dev, (BN0_WF_MIB_TOP_BRBCR_ADDR + band_offset + (idx * 4))); -+ -+ if ((idx % 2) == 0) { -+ btocr[idx] = ((btocr[idx] & BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2n_MASK) >> BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2n_SHFT); -+ btdcr[idx] = ((btdcr[idx] & BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2n_MASK) >> BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2n_SHFT); -+ brocr[idx] = ((brocr[idx] & BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2n_MASK) >> BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2n_SHFT); -+ brdcr[idx] = ((brdcr[idx] & BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2n_MASK) >> BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2n_SHFT); -+ } else { -+ btocr[idx] = ((btocr[idx] & BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2np1_SHFT); -+ btdcr[idx] = ((btdcr[idx] & BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BTDCR_TX_DATA_COUNT2np1_SHFT); -+ brocr[idx] = ((brocr[idx] & BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2np1_SHFT); -+ brdcr[idx] = ((brdcr[idx] & BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BRDCR_RX_DATA_COUNT2np1_SHFT); -+ } -+ } -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ seq_printf(s, "%d\t 0x%x/0x%x\t 0x%x \t 0x%x/0x%x \t 0x%x\n", -+ idx, btocr[idx], btdcr[idx], btbcr[idx], brocr[idx], brdcr[idx], brbcr[idx]); -+ } -+ -+ band_offset = (BN1_WF_MIB_TOP_BASE - BN0_WF_MIB_TOP_BASE) * band_idx; -+ seq_printf(s, "===Per-MBSS Related MIB Counters===\n"); -+ seq_printf(s, "BSS Idx RTSTx/RetryCnt BAMissCnt AckFailCnt FrmRetry1/2/3Cnt\n"); -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ mbxsdr[idx][0] = mt76_rr(dev, BN0_WF_MIB_TOP_BSDR0_ADDR + band_offset + ((idx >> 1) * 4)); -+ mbxsdr[idx][1] = mt76_rr(dev, BN0_WF_MIB_TOP_BSDR1_ADDR + band_offset + ((idx >> 1) * 4)); -+ mbxsdr[idx][2] = mt76_rr(dev, BN0_WF_MIB_TOP_BSDR2_ADDR + band_offset + ((idx >> 1) * 4)); -+ mbxsdr[idx][3] = mt76_rr(dev, BN0_WF_MIB_TOP_BSDR3_ADDR + band_offset + ((idx >> 1) * 4)); -+ mbxsdr[idx][4] = mt76_rr(dev, BN0_WF_MIB_TOP_BSDR4_ADDR + band_offset + ((idx >> 1) * 4)); -+ mbxsdr[idx][5] = mt76_rr(dev, BN0_WF_MIB_TOP_BSDR5_ADDR + band_offset + ((idx >> 1) * 4)); -+ mbxsdr[idx][6] = mt76_rr(dev, BN0_WF_MIB_TOP_BSDR6_ADDR + band_offset + ((idx >> 1) * 4)); -+ -+ if ((idx % 2) == 0) { -+ mbxsdr[idx][0] = ((mbxsdr[idx][0] & BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2n_MASK) >> BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2n_SHFT); -+ mbxsdr[idx][1] = ((mbxsdr[idx][1] & BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2n_MASK) >> BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2n_SHFT); -+ mbxsdr[idx][2] = ((mbxsdr[idx][2] & BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2n_MASK) >> BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2n_SHFT); -+ mbxsdr[idx][3] = ((mbxsdr[idx][3] & BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2n_MASK) >> BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2n_SHFT); -+ mbxsdr[idx][4] = ((mbxsdr[idx][4] & BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2n_MASK) >> BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2n_SHFT); -+ mbxsdr[idx][5] = ((mbxsdr[idx][5] & BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2n_MASK) >> BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2n_SHFT); -+ mbxsdr[idx][6] = ((mbxsdr[idx][6] & BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2n_MASK) >> BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2n_SHFT); -+ } else { -+ mbxsdr[idx][0] = ((mbxsdr[idx][0] & BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2np1_MASK) >> BN0_WF_MIB_TOP_BSDR0_RTSTXCOUNT2np1_SHFT); -+ mbxsdr[idx][1] = ((mbxsdr[idx][1] & BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2np1_MASK) >> BN0_WF_MIB_TOP_BSDR1_RTSRETRYCOUNT2np1_SHFT); -+ mbxsdr[idx][2] = ((mbxsdr[idx][2] & BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2np1_MASK) >> BN0_WF_MIB_TOP_BSDR2_BAMISSCOUNT2np1_SHFT); -+ mbxsdr[idx][3] = ((mbxsdr[idx][3] & BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2np1_MASK) >> BN0_WF_MIB_TOP_BSDR3_ACKFAILCOUNT2np1_SHFT); -+ mbxsdr[idx][4] = ((mbxsdr[idx][4] & BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2np1_MASK) >> BN0_WF_MIB_TOP_BSDR4_FRAMERETRYCOUNT2np1_SHFT); -+ mbxsdr[idx][5] = ((mbxsdr[idx][5] & BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BSDR5_FRAMERETRY2COUNT2np1_SHFT); -+ mbxsdr[idx][6] = ((mbxsdr[idx][6] & BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BSDR6_FRAMERETRY3COUNT2np1_SHFT); -+ } -+ } -+ -+ for (idx = 0; idx < BSS_NUM; idx++) { -+ seq_printf(s, "%d:\t0x%x/0x%x 0x%x \t 0x%x \t 0x%x/0x%x/0x%x\n", -+ idx, -+ mbxsdr[idx][0], mbxsdr[idx][1], mbxsdr[idx][2], mbxsdr[idx][3], -+ mbxsdr[idx][4], mbxsdr[idx][5], mbxsdr[idx][6]); -+ } -+ -+ band_offset = (BN1_WF_MIB_TOP_BTOCR_ADDR - BN0_WF_MIB_TOP_BTOCR_ADDR) * band_idx; -+ seq_printf(s, "===Per-MBSS Related Tx/Rx Counters===\n"); -+ seq_printf(s, "MBSSIdx TxCnt TxByteCnt RxCnt RxByteCnt\n"); -+ -+ for (idx = 0; idx < 16; idx++) { -+ mbtocr[idx] = mt76_rr(dev, BN0_WF_MIB_TOP_BTOCR_ADDR + band_offset + (((bss_nums >> 1) * 4) + ((idx >> 1) * 4))); -+ mbtbcr[idx] = mt76_rr(dev, BN0_WF_MIB_TOP_BTBCR_ADDR + band_offset + (((bss_nums >> 1) * 4) + (idx * 4))); -+ mbrocr[idx] = mt76_rr(dev, BN0_WF_MIB_TOP_BROCR_ADDR + band_offset + (((bss_nums >> 1) * 4) + ((idx >> 1) * 4))); -+ mbrbcr[idx] = mt76_rr(dev, BN0_WF_MIB_TOP_BRBCR_ADDR + band_offset + (((bss_nums >> 1) * 4) + (idx * 4))); -+ -+ if ((idx % 2) == 0) { -+ mbtocr[idx] = ((mbtocr[idx] & BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2n_MASK) >> BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2n_SHFT); -+ mbrocr[idx] = ((mbrocr[idx] & BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2n_MASK) >> BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2n_SHFT); -+ } else { -+ mbtocr[idx] = ((mbtocr[idx] & BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BTOCR_TX_OK_COUNT2np1_SHFT); -+ mbrocr[idx] = ((mbrocr[idx] & BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2np1_MASK) >> BN0_WF_MIB_TOP_BROCR_RX_OK_COUNT2np1_SHFT); -+ } -+ } -+ -+ for (idx = 0; idx < 16; idx++) { -+ seq_printf(s, "%d\t 0x%08x\t 0x%08x \t 0x%08x \t 0x%08x\n", -+ idx, mbtocr[idx], mbtbcr[idx], mbrocr[idx], mbrbcr[idx]); -+ } -+ } -+ -+ seq_printf(s, "===Dummy delimiter insertion result===\n"); -+ mac_val0 = mt76_rr(dev, MT_DBG_MIB_M0DR11(band_idx)); -+ mac_val = mt76_rr(dev, MT_DBG_MIB_M0DR6(band_idx)); -+ mac_val1 = mt76_rr(dev, MT_DBG_MIB_M0DR7(band_idx)); -+ seq_printf(s, "Range0 = %d\t Range1 = %d\t Range2 = %d\t Range3 = %d\t Range4 = %d\n", -+ (mac_val0 & BN0_WF_MIB_TOP_M0DR12_TX_DDLMT_RNG0_CNT_MASK), -+ (mac_val & BN0_WF_MIB_TOP_M0DR6_TX_DDLMT_RNG1_CNT_MASK), -+ (mac_val & BN0_WF_MIB_TOP_M0DR6_TX_DDLMT_RNG2_CNT_MASK) >> BN0_WF_MIB_TOP_M0DR6_TX_DDLMT_RNG2_CNT_SHFT, -+ (mac_val1 & BN0_WF_MIB_TOP_M0DR7_TX_DDLMT_RNG3_CNT_MASK), -+ (mac_val1 & BN0_WF_MIB_TOP_M0DR7_TX_DDLMT_RNG4_CNT_MASK) >> BN0_WF_MIB_TOP_M0DR7_TX_DDLMT_RNG4_CNT_SHFT); -+ -+ return 0; -+} -+ -+static int mt7915_mibinfo_band0(struct seq_file *s, void *data) -+{ -+ mt7915_mibinfo_read_per_band(s, 0); -+ return 0; -+} -+ -+static int mt7915_mibinfo_band1(struct seq_file *s, void *data) -+{ -+ mt7915_mibinfo_read_per_band(s, 1); -+ return 0; -+} -+ -+static int mt7915_token_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ int id, count = 0; -+ struct mt76_txwi_cache *txwi; -+ -+ seq_printf(s, "Cut through token:\n"); -+ spin_lock_bh(&dev->mt76.token_lock); -+ idr_for_each_entry(&dev->mt76.token, txwi, id) { -+ seq_printf(s, "%4d ", id); -+ count++; -+ if (count % 8 == 0) -+ seq_printf(s, "\n"); -+ } -+ spin_unlock_bh(&dev->mt76.token_lock); -+ seq_printf(s, "\n"); -+ -+ return 0; -+} -+ -+struct txd_l { -+ u32 txd_0; -+ u32 txd_1; -+ u32 txd_2; -+ u32 txd_3; -+ u32 txd_4; -+ u32 txd_5; -+ u32 txd_6; -+ u32 txd_7; -+} __packed; -+ -+char *pkt_ft_str[] = {"cut_through", "store_forward", "cmd", "PDA_FW_Download"}; -+char *hdr_fmt_str[] = { -+ "Non-80211-Frame", -+ "Command-Frame", -+ "Normal-80211-Frame", -+ "enhanced-80211-Frame", -+}; -+/* TMAC_TXD_1.hdr_format */ -+#define TMI_HDR_FT_NON_80211 0x0 -+#define TMI_HDR_FT_CMD 0x1 -+#define TMI_HDR_FT_NOR_80211 0x2 -+#define TMI_HDR_FT_ENH_80211 0x3 -+ -+void mt7915_dump_tmac_info(u8 *tmac_info) -+{ -+ struct txd_l *txd = (struct txd_l *)tmac_info; -+ -+ printk("txd raw data: size=%d\n", MT_TXD_SIZE); -+ print_hex_dump(KERN_ERR , "", DUMP_PREFIX_OFFSET, 16, 1, tmac_info, MT_TXD_SIZE, false); -+ -+ printk("TMAC_TXD Fields:\n"); -+ printk("\tTMAC_TXD_0:\n"); -+ -+ /* DW0 */ -+ /* TX Byte Count [15:0] */ -+ printk("\t\tTxByteCnt = %ld\n", FIELD_GET(MT_TXD0_TX_BYTES, txd->txd_0)); -+ -+ /* PKT_FT: Packet Format [24:23] */ -+ printk("\t\tpkt_ft = %ld(%s)\n", -+ FIELD_GET(MT_TXD0_PKT_FMT, txd->txd_0), -+ pkt_ft_str[FIELD_GET(MT_TXD0_PKT_FMT, txd->txd_0)]); -+ -+ /* Q_IDX [31:25] */ -+ printk("\t\tQueID =0x%lx\n", FIELD_GET(MT_TXD0_Q_IDX, txd->txd_0)); -+ -+ printk("\tTMAC_TXD_1:\n"); -+ -+ /* DW1 */ -+ /* WLAN Indec [9:0] */ -+ printk("\t\tWlan Index = %ld\n", FIELD_GET(MT_TXD1_WLAN_IDX, txd->txd_1)); -+ -+ /* VTA [10] */ -+ printk("\t\tVTA = %d\n", ((txd->txd_1 & MT_TXD1_VTA) ? 1 : 0)); -+ -+ /* HF: Header Format [17:16] */ -+ printk("\t\tHdrFmt = %ld(%s)\n", -+ FIELD_GET(MT_TXD1_HDR_FORMAT, txd->txd_1), -+ FIELD_GET(MT_TXD1_HDR_FORMAT, txd->txd_1) < 4 ? -+ hdr_fmt_str[FIELD_GET(MT_TXD1_HDR_FORMAT, txd->txd_1)] : "N/A"); -+ -+ switch (FIELD_GET(MT_TXD1_HDR_FORMAT, txd->txd_1)) { -+ case TMI_HDR_FT_NON_80211: -+ /* MRD [11], EOSP [12], RMVL [13], VLAN [14], ETYPE [15] */ -+ printk("\t\t\tMRD = %d, EOSP = %d,\ -+ RMVL = %d, VLAN = %d, ETYP = %d\n", -+ (txd->txd_1 & MT_TXD1_MRD) ? 1 : 0, -+ (txd->txd_1 & MT_TXD1_EOSP) ? 1 : 0, -+ (txd->txd_1 & MT_TXD1_RMVL) ? 1 : 0, -+ (txd->txd_1 & MT_TXD1_VLAN) ? 1 : 0, -+ (txd->txd_1 & MT_TXD1_ETYP) ? 1 : 0); -+ break; -+ case TMI_HDR_FT_NOR_80211: -+ /* HEADER_LENGTH [15:11] */ -+ printk("\t\t\tHeader Len = %ld(WORD)\n", FIELD_GET(MT_TXD1_HDR_INFO, txd->txd_1)); -+ break; -+ -+ case TMI_HDR_FT_ENH_80211: -+ /* EOSP [12], AMS [13] */ -+ printk("\t\t\tEOSP = %d, AMS = %d\n", -+ (txd->txd_1 & MT_TXD1_EOSP) ? 1 : 0, -+ (txd->txd_1 & MT_TXD1_AMS) ? 1 : 0); -+ break; -+ } -+ -+ /* Header Padding [19:18] */ -+ printk("\t\tHdrPad = %ld\n", FIELD_GET(MT_TXD1_HDR_PAD, txd->txd_1)); -+ -+ /* TID [22:20] */ -+ printk("\t\tTID = %ld\n", FIELD_GET(MT_TXD1_TID, txd->txd_1)); -+ -+ -+ /* UtxB/AMSDU_C/AMSDU [23] */ -+ printk("\t\tamsdu = %d\n", ((txd->txd_1 & MT_TXD1_AMSDU) ? 1 : 0)); -+ -+ /* OM [29:24] */ -+ printk("\t\town_mac = %ld\n", FIELD_GET(MT_TXD1_OWN_MAC, txd->txd_1)); -+ -+ -+ /* TGID [30] */ -+ printk("\t\tTGID = %d\n", ((txd->txd_1 & MT_TXD1_TGID) ? 1 : 0)); -+ -+ -+ /* FT [31] */ -+ printk("\t\tTxDFormatType = %d\n", (txd->txd_1 & MT_TXD1_LONG_FORMAT) ? 1 : 0); -+ -+ printk("\tTMAC_TXD_2:\n"); -+ /* DW2 */ -+ /* Subtype [3:0] */ -+ printk("\t\tsub_type = %ld\n", FIELD_GET(MT_TXD2_SUB_TYPE, txd->txd_2)); -+ -+ /* Type[5:4] */ -+ printk("\t\tfrm_type = %ld\n", FIELD_GET(MT_TXD2_FRAME_TYPE, txd->txd_2)); -+ -+ /* NDP [6] */ -+ printk("\t\tNDP = %d\n", ((txd->txd_2 & MT_TXD2_NDP) ? 1 : 0)); -+ -+ /* NDPA [7] */ -+ printk("\t\tNDPA = %d\n", ((txd->txd_2 & MT_TXD2_NDPA) ? 1 : 0)); -+ -+ /* SD [8] */ -+ printk("\t\tSounding = %d\n", ((txd->txd_2 & MT_TXD2_SOUNDING) ? 1 : 0)); -+ -+ /* RTS [9] */ -+ printk("\t\tRTS = %d\n", ((txd->txd_2 & MT_TXD2_RTS) ? 1 : 0)); -+ -+ /* BM [10] */ -+ printk("\t\tbc_mc_pkt = %d\n", ((txd->txd_2 & MT_TXD2_MULTICAST) ? 1 : 0)); -+ -+ /* B [11] */ -+ printk("\t\tBIP = %d\n", ((txd->txd_2 & MT_TXD2_BIP) ? 1 : 0)); -+ -+ /* DU [12] */ -+ printk("\t\tDuration = %d\n", ((txd->txd_2 & MT_TXD2_DURATION) ? 1 : 0)); -+ -+ /* HE [13] */ -+ printk("\t\tHE(HTC Exist) = %d\n", ((txd->txd_2 & MT_TXD2_HTC_VLD) ? 1 : 0)); -+ -+ /* FRAG [15:14] */ -+ printk("\t\tFRAG = %ld\n", FIELD_GET(MT_TXD2_FRAG, txd->txd_2)); -+ -+ -+ /* Remaining Life Time [23:16]*/ -+ printk("\t\tReamingLife/MaxTx time = %ld (unit: 64TU)\n", -+ FIELD_GET(MT_TXD2_MAX_TX_TIME, txd->txd_2)); -+ -+ /* Power Offset [29:24] */ -+ printk("\t\tpwr_offset = %ld\n", FIELD_GET(MT_TXD2_POWER_OFFSET, txd->txd_2)); -+ -+ /* FRM [30] */ -+ printk("\t\tfix rate mode = %d\n", (txd->txd_2 & MT_TXD2_FIXED_RATE) ? 1 : 0); -+ -+ /* FR[31] */ -+ printk("\t\tfix rate = %d\n", (txd->txd_2 & MT_TXD2_FIX_RATE) ? 1 : 0); -+ -+ -+ printk("\tTMAC_TXD_3:\n"); -+ -+ /* DW3 */ -+ /* NA [0] */ -+ printk("\t\tNoAck = %d\n", (txd->txd_3 & MT_TXD3_NO_ACK) ? 1 : 0); -+ -+ /* PF [1] */ -+ printk("\t\tPF = %d\n", (txd->txd_3 & MT_TXD3_PROTECT_FRAME) ? 1 : 0); -+ -+ /* EMRD [2] */ -+ printk("\t\tEMRD = %d\n", (txd->txd_3 & MT_TXD3_EMRD) ? 1 : 0); -+ -+ /* EEOSP [3] */ -+ printk("\t\tEEOSP = %d\n", (txd->txd_3 & MT_TXD3_EEOSP) ? 1 : 0); -+ -+ /* DAS [4] */ -+ printk("\t\tda_select = %d\n", (txd->txd_3 & MT_TXD3_DAS) ? 1 : 0); -+ -+ /* TM [5] */ -+ printk("\t\ttm = %d\n", (txd->txd_3 & MT_TXD3_TIMING_MEASURE) ? 1 : 0); -+ -+ /* TX Count [10:6] */ -+ printk("\t\ttx_cnt = %ld\n", FIELD_GET(MT_TXD3_TX_COUNT, txd->txd_3)); -+ -+ /* Remaining TX Count [15:11] */ -+ printk("\t\tremain_tx_cnt = %ld\n", FIELD_GET(MT_TXD3_REM_TX_COUNT, txd->txd_3)); -+ -+ /* SN [27:16] */ -+ printk("\t\tsn = %ld\n", FIELD_GET(MT_TXD3_SEQ, txd->txd_3)); -+ -+ /* BA_DIS [28] */ -+ printk("\t\tba dis = %d\n", (txd->txd_3 & MT_TXD3_BA_DISABLE) ? 1 : 0); -+ -+ /* Power Management [29] */ -+ printk("\t\tpwr_mgmt = 0x%x\n", (txd->txd_3 & MT_TXD3_SW_POWER_MGMT) ? 1 : 0); -+ -+ /* PN_VLD [30] */ -+ printk("\t\tpn_vld = %d\n", (txd->txd_3 & MT_TXD3_PN_VALID) ? 1 : 0); -+ -+ /* SN_VLD [31] */ -+ printk("\t\tsn_vld = %d\n", (txd->txd_3 & MT_TXD3_SN_VALID) ? 1 : 0); -+ -+ -+ /* DW4 */ -+ printk("\tTMAC_TXD_4:\n"); -+ -+ /* PN_LOW [31:0] */ -+ printk("\t\tpn_low = 0x%lx\n", FIELD_GET(MT_TXD4_PN_LOW, txd->txd_4)); -+ -+ -+ /* DW5 */ -+ printk("\tTMAC_TXD_5:\n"); -+ -+ /* PID [7:0] */ -+ printk("\t\tpid = %ld\n", FIELD_GET(MT_TXD5_PID, txd->txd_5)); -+ -+ /* TXSFM [8] */ -+ printk("\t\ttx_status_fmt = %d\n", (txd->txd_5 & MT_TXD5_TX_STATUS_FMT) ? 1 : 0); -+ -+ /* TXS2M [9] */ -+ printk("\t\ttx_status_2_mcu = %d\n", (txd->txd_5 & MT_TXD5_TX_STATUS_MCU) ? 1 : 0); -+ -+ /* TXS2H [10] */ -+ printk("\t\ttx_status_2_host = %d\n", (txd->txd_5 & MT_TXD5_TX_STATUS_HOST) ? 1 : 0); -+ -+ /* ADD_BA [14] */ -+ printk("\t\tADD_BA = %d\n", (txd->txd_5 & MT_TXD5_ADD_BA) ? 1 : 0); -+ -+ /* MD [15] */ -+ printk("\t\tMD = %d\n", (txd->txd_5 & MT_TXD5_MD) ? 1 : 0); -+ -+ /* PN_HIGH [31:16] */ -+ printk("\t\tpn_high = 0x%lx\n", FIELD_GET(MT_TXD5_PN_HIGH, txd->txd_5)); -+ -+ /* DW6 */ -+ printk("\tTMAC_TXD_6:\n"); -+ -+ if (txd->txd_2 & MT_TXD2_FIX_RATE) { -+ /* Fixed BandWidth mode [2:0] */ -+ printk("\t\tbw = %ld\n", -+ FIELD_GET(MT_TXD6_BW, txd->txd_6) | (txd->txd_6 & MT_TXD6_FIXED_BW)); -+ -+ /* DYN_BW [3] */ -+ printk("\t\tdyn_bw = %d\n", (txd->txd_6 & MT_TXD6_DYN_BW) ? 1 : 0); -+ -+ /* ANT_ID [7:4] */ -+ printk("\t\tant_id = %ld\n", FIELD_GET(MT_TXD6_ANT_ID, txd->txd_6)); -+ -+ /* SPE_IDX_SEL [10] */ -+ printk("\t\tspe_idx_sel = %d\n", (txd->txd_6 & MT_TXD6_SPE_ID_IDX) ? 1 : 0); -+ -+ /* LDPC [11] */ -+ printk("\t\tldpc = %d\n", (txd->txd_6 & MT_TXD6_LDPC) ? 1 : 0); -+ -+ /* HELTF Type[13:12] */ -+ printk("\t\tHELTF Type = %ld\n", FIELD_GET(MT_TXD6_HELTF, txd->txd_6)); -+ -+ /* GI Type [15:14] */ -+ printk("\t\tGI = %ld\n", FIELD_GET(MT_TXD6_SGI, txd->txd_6)); -+ -+ /* Rate to be Fixed [29:16] */ -+ printk("\t\ttx_rate = 0x%lx\n", FIELD_GET(MT_TXD6_TX_RATE, txd->txd_6)); -+ } -+ -+ /* TXEBF [30] */ -+ printk("\t\ttxebf = %d\n", (txd->txd_6 & MT_TXD6_TX_EBF) ? 1 : 0); -+ -+ /* TXIBF [31] */ -+ printk("\t\ttxibf = %d\n", (txd->txd_6 & MT_TXD6_TX_IBF) ? 1 : 0); -+ -+ /* DW7 */ -+ printk("\tTMAC_TXD_7:\n"); -+ -+ if ((txd->txd_1 & MT_TXD1_VTA) == 0) { -+ /* SW Tx Time [9:0] */ -+ printk("\t\tsw_tx_time = %ld\n", FIELD_GET(MT_TXD7_TX_TIME, txd->txd_7)); -+ } else { -+ /* TXD Arrival Time [9:0] */ -+ printk("\t\tat = %ld\n", FIELD_GET(MT_TXD7_TAT, txd->txd_7)); -+ } -+ -+ /* HW_AMSDU_CAP [10] */ -+ printk("\t\thw amsdu cap = %d\n",(txd->txd_7 & MT_TXD7_HW_AMSDU) ? 1 : 0); -+ -+ /* SPE_IDX [15:11] */ -+ if (txd->txd_2 & MT_TXD2_FIX_RATE) { -+ printk("\t\tspe_idx = 0x%lx\n", FIELD_GET(MT_TXD7_SPE_IDX, txd->txd_7)); -+ } -+ -+ /* PSE_FID [27:16] */ -+ printk("\t\tpse_fid = 0x%lx\n", FIELD_GET(MT_TXD7_PSE_FID, txd->txd_7)); -+ -+ /* Subtype [19:16] */ -+ printk("\t\tpp_sub_type=%ld\n", FIELD_GET(MT_TXD7_SUB_TYPE, txd->txd_7)); -+ -+ /* Type [21:20] */ -+ printk("\t\tpp_type=%ld\n", FIELD_GET(MT_TXD7_TYPE, txd->txd_7)); -+ -+ /* CTXD_CNT [25:23] */ -+ printk("\t\tctxd cnt=0x%lx\n", FIELD_GET(MT_TXD7_CTXD_CNT, txd->txd_7)); -+ -+ /* CTXD [26] */ -+ printk("\t\tctxd = %d\n", (txd->txd_7 & MT_TXD7_CTXD) ? 1 : 0); -+ -+ /* I [28] */ -+ printk("\t\ti = %d\n", (txd->txd_7 & MT_TXD7_IP_SUM) ? 1 : 0); -+ -+ /* UT [29] */ -+ printk("\t\tUT = %d\n", (txd->txd_7 & MT_TXD7_UDP_TCP_SUM) ? 1 : 0); -+ -+ /* TXDLEN [31:30] */ -+ printk("\t\t txd len= %ld\n", FIELD_GET(MT_TXD7_TXD_LEN, txd->txd_7)); -+} -+ -+ -+static int mt7915_token_txd_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ struct mt76_txwi_cache *t; -+ u8* txwi; -+ -+ seq_printf(s, "\n"); -+ spin_lock_bh(&dev->mt76.token_lock); -+ -+ t = idr_find(&dev->mt76.token, dev->dbg.token_idx); -+ -+ if (t != NULL) { -+ struct mt76_dev *mdev = &dev->mt76; -+ txwi = ((u8*)(t)) - (mdev->drv->txwi_size); -+ mt7915_dump_tmac_info((u8*) txwi); -+ seq_printf(s, "\n"); -+ printk("[SKB]\n"); -+ print_hex_dump(KERN_ERR , "", DUMP_PREFIX_OFFSET, 16, 1, (u8 *)t->skb->data, t->skb->len, false); -+ seq_printf(s, "\n"); -+ } -+ spin_unlock_bh(&dev->mt76.token_lock); -+ return 0; -+} -+ -+static int mt7915_amsduinfo_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 ple_stat[8] = {0}, total_amsdu = 0; -+ u8 i; -+ -+ for (i = 0; i < 8; i++) -+ ple_stat[i] = mt76_rr(dev, MT_DBG_PLE_AMSDU_PACK_MSDU_CNT(i)); -+ -+ seq_printf(s, "TXD counter status of MSDU:\n"); -+ -+ for (i = 0; i < 8; i++) -+ total_amsdu += ple_stat[i]; -+ -+ for (i = 0; i < 8; i++) { -+ seq_printf(s, "AMSDU pack count of %d MSDU in TXD: 0x%x ", i + 1, ple_stat[i]); -+ if (total_amsdu != 0) -+ seq_printf(s, "(%d%%)\n", ple_stat[i] * 100 / total_amsdu); -+ else -+ seq_printf(s, "\n"); -+ } -+ -+ return 0; -+ -+} -+ -+static int mt7915_agginfo_read_per_band(struct seq_file *s, int band_idx) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 value, idx, agg_rang_sel[15], ampdu_cnt[11], total_ampdu = 0; -+ -+ seq_printf(s, "Band %d AGG Status\n", band_idx); -+ seq_printf(s, "===============================\n"); -+ value = mt76_rr(dev, MT_DBG_AGG_AALCR0(band_idx)); -+ seq_printf(s, "AC00 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx0_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC01 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx1_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC02 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx2_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC03 Agg limit = %ld\n", FIELD_GET(MT_DBG_AGG_AALCR_ACx3_AGG_LIMIT_MASK, value)); -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AALCR1(band_idx)); -+ seq_printf(s, "AC10 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx0_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC11 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx1_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC12 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx2_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC13 Agg limit = %ld\n", FIELD_GET(MT_DBG_AGG_AALCR_ACx3_AGG_LIMIT_MASK, value)); -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AALCR2(band_idx)); -+ seq_printf(s, "AC20 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx0_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC21 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx1_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC22 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx2_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC23 Agg limit = %ld\n", FIELD_GET(MT_DBG_AGG_AALCR_ACx3_AGG_LIMIT_MASK, value)); -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AALCR3(band_idx)); -+ seq_printf(s, "AC30 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx0_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC31 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx1_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC32 Agg limit = %ld\t", FIELD_GET(MT_DBG_AGG_AALCR_ACx2_AGG_LIMIT_MASK, value)); -+ seq_printf(s, "AC33 Agg limit = %ld\n", FIELD_GET(MT_DBG_AGG_AALCR_ACx3_AGG_LIMIT_MASK, value)); -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AALCR4(band_idx)); -+ seq_printf(s, "ALTX Agg limit = %ld\n", FIELD_GET(MT_DBG_AGG_AALCR4_ALTX0_AGG_LIMIT_MASK, value)); -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AWSCR(band_idx, 0)); -+ seq_printf(s, "Winsize0 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR0_WINSIZE0_MASK, value)); -+ seq_printf(s, "Winsize1 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR0_WINSIZE1_MASK, value)); -+ seq_printf(s, "Winsize2 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR0_WINSIZE2_MASK, value)); -+ seq_printf(s, "Winsize3 limit = %ld\n", FIELD_GET(MT_DBG_AGG_AWSCR0_WINSIZE3_MASK, value)); -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AWSCR(band_idx, 1)); -+ seq_printf(s, "Winsize4 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR1_WINSIZE4_MASK, value)); -+ seq_printf(s, "Winsize5 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR1_WINSIZE5_MASK, value)); -+ seq_printf(s, "Winsize6 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR1_WINSIZE6_MASK, value)); -+ seq_printf(s, "Winsize7 limit = %ld\n", FIELD_GET(MT_DBG_AGG_AWSCR1_WINSIZE7_MASK, value)); -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AWSCR(band_idx, 2)); -+ seq_printf(s, "Winsize8 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR2_WINSIZE8_MASK, value)); -+ seq_printf(s, "Winsize9 limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR2_WINSIZE9_MASK, value)); -+ seq_printf(s, "WinsizeA limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR2_WINSIZEA_MASK, value)); -+ seq_printf(s, "WinsizeB limit = %ld\n", FIELD_GET(MT_DBG_AGG_AWSCR2_WINSIZEB_MASK, value)); -+ -+ -+ value = mt76_rr(dev, MT_DBG_AGG_AWSCR(band_idx, 3)); -+ seq_printf(s, "WinsizeC limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR3_WINSIZEC_MASK, value)); -+ seq_printf(s, "WinsizeD limit = %ld\t", FIELD_GET(MT_DBG_AGG_AWSCR3_WINSIZED_MASK, value)); -+ seq_printf(s, "WinsizeE limit = %ld\n", FIELD_GET(MT_DBG_AGG_AWSCR3_WINSIZEE_MASK, value)); -+ -+ seq_printf(s, "===AMPDU Related Counters===\n"); -+ -+ value = mt76_rr(dev, MT_DBG_MIB_M0ARNG(band_idx, 0)); -+ agg_rang_sel[0] = FIELD_GET(MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL0_MASK, value); -+ agg_rang_sel[1] = FIELD_GET(MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL1_MASK, value); -+ agg_rang_sel[2] = FIELD_GET(MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL2_MASK, value); -+ agg_rang_sel[3] = FIELD_GET(MT_DBG_MIB_M0ARNG0_AGG_RANG_SEL3_MASK, value); -+ -+ value = mt76_rr(dev, MT_DBG_MIB_M0ARNG(band_idx, 1)); -+ agg_rang_sel[4] = FIELD_GET(MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL4_MASK, value); -+ agg_rang_sel[5] = FIELD_GET(MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL5_MASK, value); -+ agg_rang_sel[6] = FIELD_GET(MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL6_MASK, value); -+ agg_rang_sel[7] = FIELD_GET(MT_DBG_MIB_M0ARNG1_AGG_RANG_SEL7_MASK, value); -+ -+ value = mt76_rr(dev, MT_DBG_MIB_M0ARNG(band_idx, 2)); -+ agg_rang_sel[8] = FIELD_GET(MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL8_MASK, value); -+ agg_rang_sel[9] = FIELD_GET(MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL9_MASK, value); -+ agg_rang_sel[10] = FIELD_GET(MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL10_MASK, value); -+ agg_rang_sel[11] = FIELD_GET(MT_DBG_MIB_M0ARNG2_AGG_RANG_SEL11_MASK, value); -+ -+ value = mt76_rr(dev, MT_DBG_MIB_M0ARNG(band_idx, 3)); -+ agg_rang_sel[12] = FIELD_GET(MT_DBG_MIB_M0ARNG3_AGG_RANG_SEL12_MASK, value); -+ agg_rang_sel[13] = FIELD_GET(MT_DBG_MIB_M0ARNG3_AGG_RANG_SEL13_MASK, value); -+ agg_rang_sel[14] = FIELD_GET(MT_DBG_MIB_M0ARNG3_AGG_RANG_SEL14_MASK, value); -+ -+ /* Need to add 1 after read from AGG_RANG_SEL CR */ -+ for (idx = 0; idx < 15; idx++) -+ agg_rang_sel[idx]++; -+ -+ ampdu_cnt[3] = mt76_rr(dev, MT_DBG_MIB_M0DR2(band_idx, 0)); -+ ampdu_cnt[4] = mt76_rr(dev, MT_DBG_MIB_M0DR2(band_idx, 1)); -+ ampdu_cnt[5] = mt76_rr(dev, MT_DBG_MIB_M0DR2(band_idx, 2)); -+ ampdu_cnt[6] = mt76_rr(dev, MT_DBG_MIB_M0DR2(band_idx, 3)); -+ ampdu_cnt[7] = mt76_rr(dev, MT_DBG_MIB_M0DR13(band_idx, 0)); -+ ampdu_cnt[8] = mt76_rr(dev, MT_DBG_MIB_M0DR13(band_idx, 1)); -+ ampdu_cnt[9] = mt76_rr(dev, MT_DBG_MIB_M0DR13(band_idx, 2)); -+ ampdu_cnt[10] = mt76_rr(dev, MT_DBG_MIB_M0DR13(band_idx, 3)); -+ -+ seq_printf(s, "\tTx Agg Range: \t%d \t%d~%d \t%d~%d \t%d~%d \t%d~%d \t%d~%d \t%d~%d \t%d~%d\n", -+ agg_rang_sel[0], -+ agg_rang_sel[0] + 1, agg_rang_sel[1], -+ agg_rang_sel[1] + 1, agg_rang_sel[2], -+ agg_rang_sel[2] + 1, agg_rang_sel[3], -+ agg_rang_sel[3] + 1, agg_rang_sel[4], -+ agg_rang_sel[4] + 1, agg_rang_sel[5], -+ agg_rang_sel[5] + 1, agg_rang_sel[6], -+ agg_rang_sel[6] + 1, agg_rang_sel[7]); -+ -+#define BIT_0_to_15_MASK 0x0000FFFF -+#define BIT_15_to_31_MASK 0xFFFF0000 -+#define SHFIT_16_BIT 16 -+ -+ for (idx = 3; idx < 11; idx++) -+ total_ampdu = total_ampdu + (ampdu_cnt[idx] & BIT_0_to_15_MASK) + ((ampdu_cnt[idx] & BIT_15_to_31_MASK) >> SHFIT_16_BIT); -+ -+ seq_printf(s, "\t\t\t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx\n", -+ (ampdu_cnt[3]) & MT_DBG_MIB_M0DR2_TRX_AGG_RANGE0_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR2_TRX_AGG_RANGE1_CNT_MASK, ampdu_cnt[3]), -+ (ampdu_cnt[4]) & MT_DBG_MIB_M0DR3_TRX_AGG_RANGE2_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR3_TRX_AGG_RANGE3_CNT_MASK, ampdu_cnt[4]), -+ (ampdu_cnt[5]) & MT_DBG_MIB_M0DR4_TRX_AGG_RANGE4_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR4_TRX_AGG_RANGE5_CNT_MASK, ampdu_cnt[5]), -+ (ampdu_cnt[6]) & MT_DBG_MIB_M0DR5_TRX_AGG_RANGE6_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR5_TRX_AGG_RANGE7_CNT_MASK, ampdu_cnt[6])); -+ -+ if (total_ampdu != 0) { -+ seq_printf(s, "\t\t\t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%)\n", -+ ((ampdu_cnt[3]) & MT_DBG_MIB_M0DR2_TRX_AGG_RANGE0_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR2_TRX_AGG_RANGE1_CNT_MASK, ampdu_cnt[3]) * 100 / total_ampdu, -+ ((ampdu_cnt[4]) & MT_DBG_MIB_M0DR3_TRX_AGG_RANGE2_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR3_TRX_AGG_RANGE3_CNT_MASK, ampdu_cnt[4]) * 100 / total_ampdu, -+ ((ampdu_cnt[5]) & MT_DBG_MIB_M0DR4_TRX_AGG_RANGE4_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR4_TRX_AGG_RANGE5_CNT_MASK, ampdu_cnt[5]) * 100 / total_ampdu, -+ ((ampdu_cnt[6]) & MT_DBG_MIB_M0DR5_TRX_AGG_RANGE6_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR5_TRX_AGG_RANGE7_CNT_MASK, ampdu_cnt[6]) * 100 / total_ampdu); -+ } -+ -+ seq_printf(s, "\t\t\t%d~%d\t%d~%d\t%d~%d\t%d~%d\t%d~%d\t%d~%d\t%d~%d\t%d~256\n", -+ agg_rang_sel[7] + 1, agg_rang_sel[8], -+ agg_rang_sel[8] + 1, agg_rang_sel[9], -+ agg_rang_sel[9] + 1, agg_rang_sel[10], -+ agg_rang_sel[10] + 1, agg_rang_sel[11], -+ agg_rang_sel[11] + 1, agg_rang_sel[12], -+ agg_rang_sel[12] + 1, agg_rang_sel[13], -+ agg_rang_sel[13] + 1, agg_rang_sel[14], -+ agg_rang_sel[14] + 1); -+ -+ seq_printf(s, "\t\t\t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx \t0x%lx\n", -+ (ampdu_cnt[7]) & MT_DBG_MIB_M0DR13_TRX_AGG_RANGE8_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR13_TRX_AGG_RANGE9_CNT_MASK, ampdu_cnt[7]), -+ (ampdu_cnt[8]) & MT_DBG_MIB_M0DR14_TRX_AGG_RANGE10_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR14_TRX_AGG_RANGE11_CNT_MASK, ampdu_cnt[8]), -+ (ampdu_cnt[9]) & MT_DBG_MIB_M0DR15_TRX_AGG_RANGE12_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR15_TRX_AGG_RANGE13_CNT_MASK, ampdu_cnt[9]), -+ (ampdu_cnt[10]) & MT_DBG_MIB_M0DR16_TRX_AGG_RANGE14_CNT_MASK, -+ FIELD_GET(MT_DBG_MIB_M0DR16_TRX_AGG_RANGE15_CNT_MASK, ampdu_cnt[10])); -+ -+ if (total_ampdu != 0) { -+ seq_printf(s, "\t\t\t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%) \t(%ld%%)\n", -+ ((ampdu_cnt[7]) & MT_DBG_MIB_M0DR2_TRX_AGG_RANGE0_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR2_TRX_AGG_RANGE1_CNT_MASK, ampdu_cnt[7]) * 100 / total_ampdu, -+ ((ampdu_cnt[8]) & MT_DBG_MIB_M0DR3_TRX_AGG_RANGE2_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR3_TRX_AGG_RANGE3_CNT_MASK, ampdu_cnt[8]) * 100 / total_ampdu, -+ ((ampdu_cnt[9]) & MT_DBG_MIB_M0DR4_TRX_AGG_RANGE4_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR4_TRX_AGG_RANGE5_CNT_MASK, ampdu_cnt[9]) * 100 / total_ampdu, -+ ((ampdu_cnt[10]) & MT_DBG_MIB_M0DR5_TRX_AGG_RANGE6_CNT_MASK) * 100 / total_ampdu, -+ FIELD_GET(MT_DBG_MIB_M0DR5_TRX_AGG_RANGE7_CNT_MASK, ampdu_cnt[10]) * 100 / total_ampdu); -+ } -+ -+ return 0; -+} -+ -+static int mt7915_agginfo_read_band0(struct seq_file *s, void *data) -+{ -+ mt7915_agginfo_read_per_band(s, 0); -+ return 0; -+} -+ -+static int mt7915_agginfo_read_band1(struct seq_file *s, void *data) -+{ -+ mt7915_agginfo_read_per_band(s, 1); -+ return 0; -+} -+ -+/*usage: -+ en: BIT(16) 0: sw amsdu 1: hw amsdu -+ num: GENMASK(15, 8) range 1-8 -+ len: GENMASK(7, 0) unit: 256 bytes */ -+static int mt7915_sta_tx_amsdu_set(void *data, u64 tx_amsdu) -+{ -+/* UWTBL DW 6 */ -+#define WTBL_AMSDU_LEN_MASK GENMASK(5, 0) -+#define WTBL_AMSDU_NUM_MASK GENMASK(8, 6) -+#define WTBL_AMSDU_EN_MASK BIT(9) -+#define UWTBL_HW_AMSDU_DW 6 -+ -+ struct mt7915_dev *dev = data; -+ u32 len = FIELD_GET(GENMASK(7, 0), tx_amsdu); -+ u32 num = FIELD_GET(GENMASK(15, 8), tx_amsdu); -+ u32 uwtbl; -+ -+ mt7915_mcu_set_amsdu_algo(dev, dev->wlan_idx, 0); -+ -+ mt7915_wtbl_read_raw(dev, dev->wlan_idx, WTBL_TYPE_UMAC, -+ UWTBL_HW_AMSDU_DW, 1, &uwtbl); -+ -+ if (len) { -+ uwtbl &= ~WTBL_AMSDU_LEN_MASK; -+ uwtbl |= FIELD_PREP(WTBL_AMSDU_LEN_MASK, len); -+ } -+ -+ uwtbl &= ~WTBL_AMSDU_NUM_MASK; -+ uwtbl |= FIELD_PREP(WTBL_AMSDU_NUM_MASK, num); -+ -+ if (tx_amsdu & BIT(16)) -+ uwtbl |= WTBL_AMSDU_EN_MASK; -+ -+ mt7915_wtbl_write_raw(dev, dev->wlan_idx, WTBL_TYPE_UMAC, -+ UWTBL_HW_AMSDU_DW, uwtbl); -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_tx_amsdu, NULL, -+ mt7915_sta_tx_amsdu_set, "%llx\n"); -+ -+static int mt7915_red_enable_set(void *data, u64 en) -+{ -+ struct mt7915_dev *dev = data; -+ -+ return mt7915_mcu_set_red(dev, en); -+} -+DEFINE_DEBUGFS_ATTRIBUTE(fops_red_en, NULL, -+ mt7915_red_enable_set, "%llx\n"); -+ -+static int mt7915_red_show_sta_set(void *data, u64 wlan_idx) -+{ -+ struct mt7915_dev *dev = data; -+ -+ mt7915_dbg_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), -+ MCU_WA_PARAM_RED_SHOW_STA, -+ wlan_idx, 0, true); -+ -+ return 0; -+} -+DEFINE_DEBUGFS_ATTRIBUTE(fops_red_show_sta, NULL, -+ mt7915_red_show_sta_set, "%llx\n"); -+ -+static int mt7915_red_target_dly_set(void *data, u64 delay) -+{ -+ struct mt7915_dev *dev = data; -+ -+ if (delay > 0 && delay <= 32767) -+ mt7915_dbg_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), -+ MCU_WA_PARAM_RED_TARGET_DELAY, -+ delay, 0, true); -+ -+ return 0; -+} -+DEFINE_DEBUGFS_ATTRIBUTE(fops_red_target_dly, NULL, -+ mt7915_red_target_dly_set, "%llx\n"); -+ -+static int -+mt7915_txpower_level_set(void *data, u64 val) -+{ -+ struct mt7915_dev *dev = data; -+ struct mt7915_phy *ext_phy = mt7915_ext_phy(dev); -+ mt7915_mcu_set_txpower_level(&dev->phy, val); -+ if (ext_phy) -+ mt7915_mcu_set_txpower_level(ext_phy, val); -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_txpower_level, NULL, -+ mt7915_txpower_level_set, "%lld\n"); -+ -+/* usage: echo 0x[arg3][arg2][arg1] > fw_wa_set */ -+static int -+mt7915_wa_set(void *data, u64 val) -+{ -+ struct mt7915_dev *dev = data; -+ u32 arg1, arg2, arg3; -+ -+ arg1 = FIELD_GET(GENMASK_ULL(7, 0), val); -+ arg2 = FIELD_GET(GENMASK_ULL(15, 8), val); -+ arg3 = FIELD_GET(GENMASK_ULL(23, 16), val); -+ -+ mt7915_dbg_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), arg1, arg2, arg3, false); -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_wa_set, NULL, mt7915_wa_set, -+ "0x%llx\n"); -+/* usage: echo 0x[arg3][arg2][arg1] > fw_wa_query */ -+static int -+mt7915_wa_query(void *data, u64 val) -+{ -+ struct mt7915_dev *dev = data; -+ u32 arg1, arg2, arg3; -+ -+ arg1 = FIELD_GET(GENMASK_ULL(7, 0), val); -+ arg2 = FIELD_GET(GENMASK_ULL(15, 8), val); -+ arg3 = FIELD_GET(GENMASK_ULL(23, 16), val); -+ -+ mt7915_dbg_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(QUERY), arg1, arg2, arg3, false); -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_wa_query, NULL, mt7915_wa_query, -+ "0x%llx\n"); -+/* set wa debug level -+ usage: -+ echo 0x[arg] > fw_wa_debug -+ bit0 : DEBUG_WIFI_TX -+ bit1 : DEBUG_CMD_EVENT -+ bit2 : DEBUG_RED -+ bit3 : DEBUG_WARN -+ bit4 : DEBUG_WIFI_RX -+ bit5 : DEBUG_TIME_STAMP -+ bit6 : DEBUG_TX_FREE_DONE_EVENT -+ bit12 : DEBUG_WIFI_TXD */ -+static int -+mt7915_wa_debug(void *data, u64 val) -+{ -+ struct mt7915_dev *dev = data; -+ u32 arg; -+ -+ arg = FIELD_GET(GENMASK_ULL(15, 0), val); -+ -+ mt7915_dbg_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(DEBUG), arg, 0, 0, false); -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_wa_debug, NULL, mt7915_wa_debug, -+ "0x%llx\n"); -+ -+static int mt7915_dump_version(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ struct mt76_dev *mdev = NULL; -+ int i; -+ -+ seq_printf(s, "Version: 2.2.24.3\n"); -+ -+ if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) -+ return 0; -+ -+ mdev = &dev->mt76; -+ seq_printf(s, "Rom Patch Build Time: %.16s\n", mdev->patch_hdr->build_date); -+ seq_printf(s, "WM Patch Build Time: %.16s\n", mdev->wm_hdr->build_date); -+ seq_printf(s, "WA Patch Build Time: %.16s\n", mdev->wa_hdr->build_date); -+ -+ for (i = 0; i < ADIE_MAX_CNT; i++) { -+ seq_printf(s, "adie[%d]: id=0x%04x version=0x%04x\n", -+ i, dev->adie[i].id, dev->adie[i].version); -+ } -+ return 0; -+} -+ -+static void mt7915_show_lp_history(struct seq_file *s, bool fgIsExp) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 macVal, gpr_log_idx, oldest_idx; -+ u32 idx, i; -+ -+ if (!fgIsExp) { -+ /* disable LP recored */ -+ macVal = mt76_rr(dev, 0x89050200); -+ macVal &= (~0x1); -+ mt76_wr(dev, 0x89050200, macVal); -+ udelay(100); -+ } -+ -+ macVal = mt76_rr(dev, 0x89050200); -+ gpr_log_idx = ((macVal >> 16) & 0x1f); -+ oldest_idx = gpr_log_idx + 2; -+ -+ seq_printf(s, " lp history (from old to new):\n"); -+ for (i = 0; i < 16; i++) { -+ idx = ((oldest_idx + 2*i + 1)%32); -+ macVal = mt76_rr(dev, (0x89050204 + idx*4)); -+ seq_printf(s, " %d: 0x%x\n", i, macVal); -+ } -+ -+ if (!fgIsExp) { -+ /* enable LP recored */ -+ macVal = mt76_rr(dev, 0x89050200); -+ macVal |= 0x1; -+ mt76_wr(dev, 0x89050200, macVal); -+ } -+} -+ -+static void mt7915_show_irq_history(struct seq_file *s) -+{ -+#define SYSIRQ_INTERRUPT_HISTORY_NUM 10 -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 macVal, i, start, idx; -+ u8 ucIrqDisIdx, ucIrqResIdx; -+ u32 irq_dis_time[SYSIRQ_INTERRUPT_HISTORY_NUM], irq_dis_lp[SYSIRQ_INTERRUPT_HISTORY_NUM]; -+ u32 irq_res_time[SYSIRQ_INTERRUPT_HISTORY_NUM], irq_res_lp[SYSIRQ_INTERRUPT_HISTORY_NUM]; -+ u32 irq_idx_addr, irq_dis_addr, irq_res_addr; -+ -+ switch (mt76_chip(&dev->mt76)) { -+ case 0x7915: -+ irq_idx_addr = 0x2170BC; -+ irq_dis_addr = 0x2170B8; -+ irq_res_addr = 0x2170B4; -+ break; -+ case 0x7981: -+ irq_idx_addr = 0x02205138; -+ irq_dis_addr = 0x02205140; -+ irq_res_addr = 0x0220513C; -+ break; -+ case 0x7906: -+ irq_idx_addr = 0x02205288; -+ irq_dis_addr = 0x02205290; -+ irq_res_addr = 0x0220528C; -+ break; -+ case 0x7986: -+ default: -+ irq_idx_addr = 0x022051C0; -+ irq_dis_addr = 0x022051C8; -+ irq_res_addr = 0x022051C4; -+ break; -+ } -+ -+ macVal = mt76_rr(dev, irq_idx_addr); -+ ucIrqResIdx = (macVal & 0xff); -+ ucIrqDisIdx = ((macVal >> 8) & 0xff); -+ -+ seq_printf(s, "\n\n\n Irq Idx (Dis=%d Res=%d):\n", -+ ucIrqDisIdx, ucIrqResIdx); -+ -+ start = mt76_rr(dev, irq_dis_addr); -+ for (i = 0; i < SYSIRQ_INTERRUPT_HISTORY_NUM; i++) { -+ macVal = mt76_rr(dev, (start + (i * 8))); -+ irq_dis_time[i] = macVal; -+ macVal = mt76_rr(dev, (start + (i * 8) + 4)); -+ irq_dis_lp[i] = macVal; -+ } -+ -+ start = mt76_rr(dev, irq_res_addr); -+ for (i = 0; i < SYSIRQ_INTERRUPT_HISTORY_NUM; i++) { -+ macVal = mt76_rr(dev, (start + (i * 8))); -+ irq_res_time[i] = macVal; -+ macVal = mt76_rr(dev, (start + (i * 8) + 4)); -+ irq_res_lp[i] = macVal; -+ } -+ -+ seq_printf(s, "\n Dis Irq history (from old to new):\n"); -+ for (i = 0; i < SYSIRQ_INTERRUPT_HISTORY_NUM; i++) { -+ idx = (i + ucIrqDisIdx) % SYSIRQ_INTERRUPT_HISTORY_NUM; -+ seq_printf(s, " [%d].LP = 0x%x time=%u\n", -+ idx, irq_dis_lp[idx], irq_dis_time[idx]); -+ } -+ -+ seq_printf(s, "\n Restore Irq history (from old to new):\n"); -+ for (i = 0; i < SYSIRQ_INTERRUPT_HISTORY_NUM; i++) { -+ idx = (i + ucIrqResIdx) % SYSIRQ_INTERRUPT_HISTORY_NUM; -+ seq_printf(s, " [%d].LP = 0x%x time=%u\n", -+ idx, irq_res_lp[idx], irq_res_time[idx]); -+ } -+} -+ -+static void MemSectionRead(struct mt7915_dev *dev, char *buf, u32 length, u32 addr) -+{ -+ int idx = 0; -+ u32 *ptr =(u32 *)buf; -+ -+ while (idx < length) { -+ *ptr = mt76_rr(dev, (addr + idx)); -+ idx += 4; -+ ptr++; -+ } -+} -+ -+static int MemReadOneByte(struct mt7915_dev *dev, u32 addr) -+{ -+ u32 val, tmpval; -+ -+ val = mt76_rr(dev, (addr & ~(0x3))); -+ tmpval = (val >> (8 * (addr & (0x3)))) & 0xff; -+ return tmpval; -+} -+ -+static void mt7915_show_msg_trace(struct seq_file *s) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ struct cos_msg_trace_t *msg_trace = NULL; -+ u32 ptr_addr, length; -+ u32 idx = 0, cnt = 0; -+ u32 msg_history_num, num_addr; -+ u32 trace_ptr_addr, trace_num_addr; -+ -+ switch (mt76_chip(&dev->mt76)) { -+ case 0x7915: -+ trace_ptr_addr = 0x41F054; -+ trace_num_addr = 0x41F058; -+ num_addr = mt76_rr(dev, 0x41F05C); -+ break; -+ case 0x7981: -+ trace_ptr_addr = 0x02205100; -+ trace_num_addr = 0x02205104; -+ break; -+ case 0x7906: -+ trace_ptr_addr = 0x02205250; -+ trace_num_addr = 0x02205254; -+ break; -+ case 0x7986: -+ default: -+ trace_ptr_addr = 0x02205188; -+ trace_num_addr = 0x0220518C; -+ break; -+ } -+ -+ -+ -+ ptr_addr = mt76_rr(dev, trace_ptr_addr); -+ msg_history_num = mt76_rr(dev, trace_num_addr); -+ idx = (is_mt7915(&dev->mt76) ? MemReadOneByte(dev, num_addr) : (msg_history_num >> 8)) & 0xff; -+ msg_history_num = msg_history_num & 0xff; -+ msg_trace = kzalloc(msg_history_num * sizeof(struct cos_msg_trace_t), GFP_KERNEL); -+ -+ if (!msg_trace) { -+ seq_printf(s, "can not allocate cmd msg_trace\n"); -+ return; -+ } -+ -+ if (idx >= msg_history_num) { -+ kfree(msg_trace); -+ return; -+ } -+ -+ length = msg_history_num * sizeof(struct cos_msg_trace_t); -+ MemSectionRead(dev, (char *)&(msg_trace[0]), length, ptr_addr); -+ seq_printf(s, "\n"); -+ seq_printf(s, " msg trace:\n"); -+ seq_printf(s, " format: t_id=task_id/task_prempt_cnt/msg_read_idx\n"); -+ -+ while (1) { -+ seq_printf(s, " (m_%d)t_id=%x/%d/%d, m_id=%d, ts_en=%u, ts_de = %u, ts_fin=%u, wait=%d, exe=%d\n", -+ idx, -+ msg_trace[idx].dest_id, -+ msg_trace[idx].pcount, -+ msg_trace[idx].qread, -+ msg_trace[idx].msg_id, -+ msg_trace[idx].ts_enq, -+ msg_trace[idx].ts_deq, -+ msg_trace[idx].ts_finshq, -+ (msg_trace[idx].ts_deq - msg_trace[idx].ts_enq), -+ (msg_trace[idx].ts_finshq - msg_trace[idx].ts_deq)); -+ -+ if (++idx >= msg_history_num) -+ idx = 0; -+ -+ if (++cnt >= msg_history_num) -+ break; -+ } -+ if (msg_trace) -+ kfree(msg_trace); -+} -+ -+static int mt7915_show_assert_line(struct seq_file *s) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ char *msg; -+ u32 addr; -+ u32 macVal = 0; -+ char *ptr; -+ char idx; -+ -+ msg = kmalloc(256, GFP_KERNEL); -+ if (!msg) -+ return 0; -+ -+ memset(msg, 0, 256); -+ addr = 0x00400000; -+ ptr = msg; -+ for (idx = 0 ; idx < 32; idx++) { -+ macVal = 0; -+ macVal = mt76_rr(dev, addr); -+ memcpy(ptr, &macVal, 4); -+ addr += 4; -+ ptr += 4; -+ } -+ -+ *ptr = 0; -+ seq_printf(s, "\n\n"); -+ seq_printf(s, " Assert line\n"); -+ seq_printf(s, " %s\n", msg); -+ if (msg) -+ kfree(msg); -+ -+ return 0; -+} -+ -+ -+static void mt7915_show_sech_trace(struct seq_file *s) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ struct cos_task_info_struct task_info_g[2]; -+ u32 length, idx; -+ u32 addr, km_total_time; -+ u32 task_info_addr, km_total_time_addr; -+ struct cos_task_type tcb; -+ struct cos_task_type *tcb_ptr; -+ char name[2][15] = { -+ "WIFI ", "WIFI2 " -+ }; -+ -+ switch (mt76_chip(&dev->mt76)) { -+ case 0x7915: -+ task_info_addr = 0x215400; -+ km_total_time_addr = 0x219838; -+ break; -+ case 0x7981: -+ task_info_addr = 0x02202978; -+ km_total_time_addr = 0x0220512C; -+ break; -+ case 0x7906: -+ task_info_addr = 0x02202ACC; -+ km_total_time_addr = 0x0220527C; -+ break; -+ case 0x7986: -+ default: -+ task_info_addr = 0x02202A18; -+ km_total_time_addr = 0x022051B4; -+ break; -+ } -+ -+ length = 2 * sizeof(struct cos_task_info_struct); -+ MemSectionRead(dev, (char *)&(task_info_g[0]), length, task_info_addr); -+ -+ km_total_time = mt76_rr(dev, km_total_time_addr); -+ if (km_total_time == 0) { -+ seq_printf(s, "km_total_time zero!\n"); -+ return; -+ } -+ -+ seq_printf(s, "\n\n\n TASK XTIME RATIO PREMPT CNT\n"); -+ for (idx = 0 ; idx < 2 ; idx++) { -+ addr = task_info_g[idx].task_id; -+ MemSectionRead(dev, (char *)&(tcb), sizeof(struct cos_task_type), addr); -+ -+ length = sizeof(struct cos_task_type); -+ -+ tcb_ptr = &(tcb); -+ -+ if (tcb_ptr) { -+ seq_printf(s, " %s %d %d %d\n", -+ name[idx], -+ tcb_ptr->tc_exe_time, -+ (tcb_ptr->tc_exe_time*100/km_total_time), -+ tcb_ptr->tc_pcount); -+ } -+ } -+ -+} -+ -+static void mt7915_show_prog_trace(struct seq_file *s) -+{ -+#define mt7915_cos_access_ptr(_idx, _member) (is_mt7915(&dev->mt76) ? \ -+ mt7915_cos_program_trace_ptr[_idx]._##_member : \ -+ cos_program_trace_ptr[_idx]._##_member) -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ struct cos_program_trace_t *cos_program_trace_ptr = NULL; -+ struct mt7915_cos_program_trace_t *mt7915_cos_program_trace_ptr = NULL; -+ char *buf; -+ u32 trace_ptr; -+ u32 idx; -+ u32 old_idx; -+ u32 old_idx_addr; -+ u32 prev_idx, diff; -+ u32 prev_time, prev_dest_id, prev_msg_sn; -+ u32 old_time, old_dest_id, old_msg_sn; -+ u32 trace_ptr_addr, trace_idx_addr, trace_num_addr, trace_num; -+ int size; -+ -+ switch (mt76_chip(&dev->mt76)) { -+ case 0x7915: -+ trace_ptr_addr = 0x41F0E0; -+ trace_idx_addr = 0x41F0E8; -+ trace_num_addr = mt76_rr(dev, 0x41F0E4); -+ break; -+ case 0x7981: -+ trace_ptr_addr = 0x022050C4; -+ trace_idx_addr = 0x022050C0; -+ break; -+ case 0x7906: -+ trace_ptr_addr = 0x02205214; -+ trace_idx_addr = 0x02205210; -+ break; -+ case 0x7986: -+ default: -+ trace_ptr_addr = 0x0220514C; -+ trace_idx_addr = 0x02205148; -+ break; -+ } -+ -+ size = is_mt7915(&dev->mt76) ? sizeof(struct mt7915_cos_program_trace_t) : sizeof(struct cos_program_trace_t); -+ trace_num = is_mt7915(&dev->mt76) ? MemReadOneByte(dev, trace_num_addr) & 0xff : 32; -+ buf = kzalloc(trace_num * size, GFP_KERNEL); -+ if (!buf) { -+ seq_printf(s, "can not allocate cos_program_trace_ptr memory\n"); -+ return; -+ } -+ -+ trace_ptr = mt76_rr(dev, trace_ptr_addr); -+ old_idx_addr = mt76_rr(dev, trace_idx_addr); -+ old_idx = (is_mt7915(&dev->mt76) ? MemReadOneByte(dev, old_idx_addr) : (old_idx_addr >> 8)) & 0xff; -+ -+ MemSectionRead(dev, &buf[0], trace_num * size, trace_ptr); -+ -+ if (is_mt7915(&dev->mt76)) -+ mt7915_cos_program_trace_ptr = (struct mt7915_cos_program_trace_t *)buf; -+ else -+ cos_program_trace_ptr = (struct cos_program_trace_t *)buf; -+ -+ seq_printf(s, "\n"); -+ seq_printf(s, " program trace:\n"); -+ for (idx = 0 ; idx < trace_num ; idx++) { -+ prev_idx = ((old_idx + trace_num - 1) % trace_num); -+ -+ prev_time = mt7915_cos_access_ptr(prev_idx, ts_gpt2); -+ old_time = mt7915_cos_access_ptr(old_idx, ts_gpt2); -+ prev_dest_id = mt7915_cos_access_ptr(prev_idx, dest_id); -+ old_dest_id = mt7915_cos_access_ptr(old_idx, dest_id); -+ prev_msg_sn = mt7915_cos_access_ptr(prev_idx, msg_sn); -+ old_msg_sn = mt7915_cos_access_ptr(old_idx, msg_sn); -+ -+ seq_printf(s, " (p_%d)t_id=%x/%d, m_id=%d, LP=0x%x, name=%s, ts2=%d, ", -+ old_idx, -+ old_dest_id, -+ old_msg_sn, -+ mt7915_cos_access_ptr(old_idx, msg_id), -+ mt7915_cos_access_ptr(old_idx, LP), -+ mt7915_cos_access_ptr(old_idx, name), -+ old_time); -+ -+ /* diff for gpt2 */ -+ -+ diff = 0xFFFFFFFF; -+ -+ if (prev_time) { -+ if ((prev_dest_id == old_dest_id) && (prev_msg_sn == old_msg_sn)) { -+ if (old_time > prev_time) -+ diff = old_time - prev_time; -+ else -+ diff = 0xFFFFFFFF - prev_time + old_time + 1; -+ } -+ } -+ -+ if (diff == 0xFFFFFFFF) -+ seq_printf(s, "diff2=NA, \n"); -+ else -+ seq_printf(s, "diff2=%8d\n", diff); -+ -+ old_idx++; -+ if (old_idx >= trace_num) -+ old_idx = 0; -+ } -+ if (buf) -+ kfree(buf); -+} -+ -+static int mt7915_fw_wm_info_read(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ u32 macVal, g_exp_type, COS_Interrupt_Count; -+ u8 exp_assert_proc_entry_cnt, exp_assert_state, g_irq_history_num; -+ u16 processing_irqx; -+ u32 processing_lisr, Current_Task_Id, Current_Task_Indx; -+ u8 km_irq_info_idx, km_eint_info_idx, km_sched_info_idx, g_sched_history_num; -+ u32 km_sched_trace_ptr, km_irq_trace_ptr, km_total_time; -+ bool fgIsExp = false, fgIsAssert = false; -+ u32 TaskStart[2], TaskEnd[2]; -+ u32 exp_assert_state_addr, g1_exp_counter_addr; -+ u32 g_exp_type_addr, cos_interrupt_count_addr; -+ u32 processing_irqx_addr, processing_lisr_addr; -+ u32 Current_Task_Id_addr, Current_Task_Indx_addr, last_dequeued_msg_id_addr; -+ u32 km_irq_info_idx_addr, km_eint_info_idx_addr, km_sched_info_idx_addr; -+ u32 g_sched_history_num_addr, km_sched_trace_ptr_addr; -+ u32 km_irq_trace_ptr_addr, km_total_time_addr, last_dequeued_msg_id; -+ u32 TaskStart_0, TaskEnd_0, TaskStart_1, TaskEnd_1; -+ u32 t1_base_addr, t2_base_addr, t3_base_addr, t_addr_ofs; -+ u32 cpu_itype_addr, cpu_eva_addr, cpu_ipc_addr, pc_addr; -+ u32 busy_addr, peak_addr; -+ u32 i, t1, t2, t3; -+ u8 idx, exp_type[64]; -+ -+ switch (mt76_chip(&dev->mt76)) { -+ case 0x7915: -+ g_exp_type_addr = 0x21987C; -+ exp_assert_state_addr = 0x219848; -+ g1_exp_counter_addr = 0x219848; -+ cos_interrupt_count_addr = 0x216F94; -+ processing_irqx_addr = 0x216EF8; -+ processing_lisr_addr = 0x2170AC; -+ Current_Task_Id_addr = 0x216F90; -+ Current_Task_Indx_addr = 0x216F9C; -+ last_dequeued_msg_id_addr = 0x216F70; -+ km_irq_info_idx_addr = 0x219820; -+ km_eint_info_idx_addr = 0x219818; -+ km_sched_info_idx_addr = 0x219828; -+ g_sched_history_num_addr = 0x219828; -+ km_sched_trace_ptr_addr = 0x219824; -+ km_irq_trace_ptr_addr = 0x21981C; -+ km_total_time_addr = 0x219838; -+ TaskStart_0 = 0x2195A0; -+ TaskEnd_0 = 0x21959C; -+ TaskStart_1 = 0x219680; -+ TaskEnd_1 = 0x21967C; -+ t1_base_addr = 0x219558; -+ t2_base_addr = 0x219554; -+ t3_base_addr = 0x219560; -+ cpu_itype_addr = 0x41F088; -+ cpu_eva_addr = 0x41F08C; -+ cpu_ipc_addr = 0x41F094; -+ pc_addr = 0x7C060204; -+ busy_addr = 0x41F030; -+ peak_addr = 0x41F034; -+ break; -+ case 0x7981: -+ g_exp_type_addr = 0x02205054; -+ exp_assert_state_addr = 0x02204AC0; -+ g1_exp_counter_addr = 0x02204F68; -+ cos_interrupt_count_addr = 0x02204FFC; -+ processing_irqx_addr = 0x02204E30; -+ processing_lisr_addr = 0x02204F7C; -+ Current_Task_Id_addr = 0x02204F18; -+ Current_Task_Indx_addr = 0x02204F18; -+ last_dequeued_msg_id_addr = 0x02204E94; -+ km_irq_info_idx_addr = 0x02205114; -+ km_eint_info_idx_addr = 0x0220510C; -+ km_sched_info_idx_addr = 0x0220511C; -+ g_sched_history_num_addr = 0x0220511C; -+ km_sched_trace_ptr_addr = 0x02205118; -+ km_irq_trace_ptr_addr = 0x02205110; -+ km_total_time_addr = 0x0220512C; -+ TaskStart_0 = 0x022028B4; -+ TaskEnd_0 = 0x022028C0; -+ TaskStart_1 = 0x02202A38; -+ TaskEnd_1 = 0x02202934; -+ t1_base_addr = 0x02202718; -+ t2_base_addr = 0x0220287C; -+ t3_base_addr = 0x02202884; -+ cpu_itype_addr = 0x02205058; -+ cpu_eva_addr = 0x02205060; -+ cpu_ipc_addr = 0x0220505C; -+ pc_addr = 0x7C060204; -+ busy_addr = 0x7C053B20; -+ peak_addr = 0x7C053B24; -+ break; -+ case 0x7906: -+ g_exp_type_addr = 0x022051A4; -+ exp_assert_state_addr = 0x02204C14; -+ g1_exp_counter_addr = 0x022050BC; -+ cos_interrupt_count_addr = 0x022001AC; -+ processing_irqx_addr = 0x02204F84; -+ processing_lisr_addr = 0x022050D0; -+ Current_Task_Id_addr = 0x0220406C; -+ Current_Task_Indx_addr = 0x0220500C; -+ last_dequeued_msg_id_addr = 0x02204FE8; -+ km_irq_info_idx_addr = 0x02205264; -+ km_eint_info_idx_addr = 0x0220525C; -+ km_sched_info_idx_addr = 0x0220526C; -+ g_sched_history_num_addr = 0x0220516C; -+ km_sched_trace_ptr_addr = 0x02205268; -+ km_irq_trace_ptr_addr = 0x02205260; -+ km_total_time_addr = 0x0220517C; -+ TaskStart_0 = 0x022028C8; -+ TaskEnd_0 = 0x022028C4; -+ TaskStart_1 = 0x02202A38; -+ TaskEnd_1 = 0x02202934; -+ t1_base_addr = 0x0220286C; -+ t2_base_addr = 0x02202870; -+ t3_base_addr = 0x02202878; -+ cpu_itype_addr = 0x022051A8; -+ cpu_eva_addr = 0x022051B0; -+ cpu_ipc_addr = 0x022051AC; -+ pc_addr = 0x7C060204; -+ busy_addr = 0x7C053B20; -+ peak_addr = 0x7C053B24; -+ break; -+ case 0x7986: -+ default: -+ g_exp_type_addr = 0x022050DC; -+ exp_assert_state_addr = 0x02204B54; -+ g1_exp_counter_addr = 0x02204FFC; -+ cos_interrupt_count_addr = 0x022001AC; -+ processing_irqx_addr = 0x02204EC4; -+ processing_lisr_addr = 0x02205010; -+ Current_Task_Id_addr = 0x02204FAC; -+ Current_Task_Indx_addr = 0x02204F4C; -+ last_dequeued_msg_id_addr = 0x02204F28; -+ km_irq_info_idx_addr = 0x0220519C; -+ km_eint_info_idx_addr = 0x02205194; -+ km_sched_info_idx_addr = 0x022051A4; -+ g_sched_history_num_addr = 0x022051A4; -+ km_sched_trace_ptr_addr = 0x022051A0; -+ km_irq_trace_ptr_addr = 0x02205198; -+ km_total_time_addr = 0x022051B4; -+ TaskStart_0 = 0x02202814; -+ TaskEnd_0 = 0x02202810; -+ TaskStart_1 = 0x02202984; -+ TaskEnd_1 = 0x02202980; -+ t1_base_addr = 0x022027B8; -+ t2_base_addr = 0x022027BC; -+ t3_base_addr = 0x022027C4; -+ cpu_itype_addr = 0x022050E0; -+ cpu_eva_addr = 0x022050E8; -+ cpu_ipc_addr = 0x022050E4; -+ pc_addr = 0x7C060204; -+ busy_addr = 0x7C053B20; -+ peak_addr = 0x7C053B24; -+ break; -+ } -+ -+ macVal = mt76_rr(dev, exp_assert_state_addr); -+ exp_assert_state = (macVal & 0xff); -+ -+ macVal = mt76_rr(dev, g1_exp_counter_addr); -+ exp_assert_proc_entry_cnt = (is_mt7915(&dev->mt76) ? (macVal >> 8) : macVal) & 0xff; -+ -+ macVal = mt76_rr(dev, g_exp_type_addr); -+ g_exp_type = is_mt7915(&dev->mt76) ? ((macVal >> 8) & 0xff) : macVal; -+ -+ COS_Interrupt_Count = mt76_rr(dev, cos_interrupt_count_addr); -+ -+ macVal = mt76_rr(dev, processing_irqx_addr); -+ processing_irqx = (is_mt7915(&dev->mt76) ? (macVal >> 16) : macVal) & 0xffff; -+ -+ processing_lisr = mt76_rr(dev, processing_lisr_addr); -+ Current_Task_Id = mt76_rr(dev, Current_Task_Id_addr); -+ Current_Task_Indx = mt76_rr(dev, Current_Task_Indx_addr); -+ last_dequeued_msg_id = mt76_rr(dev, last_dequeued_msg_id_addr); -+ -+ macVal = mt76_rr(dev, km_eint_info_idx_addr); -+ km_eint_info_idx = (is_mt7915(&dev->mt76) ? macVal : (macVal >> 8)) & 0xff; -+ -+ macVal = mt76_rr(dev, g_sched_history_num_addr); -+ g_sched_history_num = (is_mt7915(&dev->mt76) ? (macVal >> 8) : macVal) & 0xff; -+ km_sched_info_idx = (is_mt7915(&dev->mt76) ? macVal : (macVal >> 8)) & 0xff; -+ -+ km_sched_trace_ptr = mt76_rr(dev, km_sched_trace_ptr_addr); -+ -+ macVal = mt76_rr(dev, km_irq_info_idx_addr); -+ g_irq_history_num = (is_mt7915(&dev->mt76) ? (macVal >> 8) : macVal) & 0xff; -+ km_irq_info_idx = (is_mt7915(&dev->mt76) ? macVal : (macVal >> 16)) & 0xff; -+ -+ km_irq_trace_ptr = mt76_rr(dev, km_irq_trace_ptr_addr); -+ km_total_time = mt76_rr(dev, km_total_time_addr); -+ -+ TaskStart[0] = mt76_rr(dev, TaskStart_0); -+ TaskEnd[0] = mt76_rr(dev, TaskEnd_0); -+ TaskStart[1] = mt76_rr(dev, TaskStart_1); -+ TaskEnd[1] = mt76_rr(dev, TaskEnd_1); -+ -+ seq_printf(s, "================FW DBG INFO===================\n"); -+ seq_printf(s, " exp_assert_proc_entry_cnt = 0x%x\n", -+ exp_assert_proc_entry_cnt); -+ seq_printf(s, " exp_assert_state = 0x%x\n", -+ exp_assert_state); -+ -+ if (exp_assert_proc_entry_cnt == 0) { -+ snprintf(exp_type, sizeof(exp_type), "%s", "exp_type : Normal"); -+ } else if (exp_assert_proc_entry_cnt == 1 && exp_assert_state > 1 && g_exp_type == 5) { -+ snprintf(exp_type, sizeof(exp_type), "%s", "exp_type : Assert"); -+ fgIsExp = true; -+ fgIsAssert = true; -+ } else if (exp_assert_proc_entry_cnt == 1 && exp_assert_state > 1) { -+ snprintf(exp_type, sizeof(exp_type), "%s", "exp_type : Exception"); -+ fgIsExp = true; -+ } else if (exp_assert_proc_entry_cnt > 1) { -+ snprintf(exp_type, sizeof(exp_type), "%s", "exp_type : Exception re-entry"); -+ fgIsExp = true; -+ } else { -+ snprintf(exp_type, sizeof(exp_type), "%s", "exp_type : Unknown?"); -+ } -+ -+ seq_printf(s, " COS_Interrupt_Count = 0x%x\n", COS_Interrupt_Count); -+ seq_printf(s, " processing_irqx = 0x%x\n", processing_irqx); -+ seq_printf(s, " processing_lisr = 0x%x\n", processing_lisr); -+ seq_printf(s, " Current_Task_Id = 0x%x\n", Current_Task_Id); -+ seq_printf(s, " Current_Task_Indx = 0x%x\n", Current_Task_Indx); -+ seq_printf(s, " last_dequeued_msg_id = %d\n", last_dequeued_msg_id); -+ -+ seq_printf(s, " km_irq_info_idx = 0x%x\n", km_irq_info_idx); -+ seq_printf(s, " km_eint_info_idx = 0x%x\n", km_eint_info_idx); -+ seq_printf(s, " km_sched_info_idx = 0x%x\n", km_sched_info_idx); -+ seq_printf(s, " g_sched_history_num = %d\n", g_sched_history_num); -+ seq_printf(s, " km_sched_trace_ptr = 0x%x\n", km_sched_trace_ptr); -+ -+ if (fgIsExp) { -+ seq_printf(s, "\n <1>print sched trace\n"); -+ if (g_sched_history_num > 60) -+ g_sched_history_num = 60; -+ -+ idx = km_sched_info_idx; -+ for (i = 0 ; i < g_sched_history_num ; i++) { -+ t1 = mt76_rr(dev, (km_sched_trace_ptr+(idx*12))); -+ t2 = mt76_rr(dev, (km_sched_trace_ptr+(idx*12)+4)); -+ t3 = mt76_rr(dev, (km_sched_trace_ptr+(idx*12)+8)); -+ seq_printf(s, " (sched_info_%d)sched_t=0x%x, sched_start=%d, PC=0x%x\n", -+ idx, t1, t2, t3); -+ idx++; -+ if (idx >= g_sched_history_num) -+ idx = 0; -+ } -+ -+ seq_printf(s, "\n <2>print irq trace\n"); -+ if (g_irq_history_num > 60) -+ g_irq_history_num = 60; -+ -+ idx = km_irq_info_idx; -+ for (i = 0 ; i < g_irq_history_num ; i++) { -+ t1 = mt76_rr(dev, (km_irq_trace_ptr+(idx*16))); -+ t2 = mt76_rr(dev, (km_irq_trace_ptr+(idx*16) + 4)); -+ seq_printf(s, " (irq_info_%d)irq_t=%x, sched_start=%d\n", -+ idx, t1, t2); -+ idx++; -+ if (idx >= g_irq_history_num) -+ idx = 0; -+ } -+ } -+ -+ seq_printf(s, "\n <3>task q_id.read q_id.write\n"); -+ seq_printf(s, " (WIFI )1 0x%x 0x%x\n", TaskStart[0], TaskEnd[0]); -+ seq_printf(s, " (WIFI2 )2 0x%x 0x%x\n", TaskStart[1], TaskEnd[1]); -+ seq_printf(s, "\n <4>TASK STACK INFO (size in byte)\n"); -+ seq_printf(s, " TASK START END SIZE PEAK INTEGRITY\n"); -+ -+ t_addr_ofs = is_mt7915(&dev->mt76) ? 224 : 368; -+ for (i = 0 ; i < 2 ; i++) { -+ t1 = mt76_rr(dev, t1_base_addr + (i*t_addr_ofs)); -+ t2 = mt76_rr(dev, t2_base_addr + (i*t_addr_ofs)); -+ t3 = mt76_rr(dev, t3_base_addr + (i*t_addr_ofs)); -+ -+ seq_printf(s, " %s 0x%x 0x%x %d\n", -+ i == 0 ? "WIFI" : "WIFI2", t1, t2, t3); -+ } -+ -+ seq_printf(s, "\n <5>fw state\n"); -+ seq_printf(s, " %s\n", exp_type); -+ if (COS_Interrupt_Count > 0) -+ seq_printf(s, " FW in Interrupt CIRQ index (0x%x) CIRQ handler(0x%x)\n" -+ , processing_irqx, processing_lisr); -+ else { -+ if (Current_Task_Id == 0 && Current_Task_Indx == 3) -+ seq_printf(s, " FW in IDLE\n"); -+ -+ if (Current_Task_Id != 0 && Current_Task_Indx != 3) -+ seq_printf(s, " FW in Task , Task id(0x%x) Task index(0x%x)\n", -+ Current_Task_Id, Current_Task_Indx); -+ } -+ -+ macVal = mt76_rr(dev, is_mt7915(&dev->mt76) ? 0x41F080 : g1_exp_counter_addr); -+ seq_printf(s, " EXCP_CNT = 0x%x\n", macVal); -+ -+ seq_printf(s, " EXCP_TYPE = 0x%x\n", g_exp_type); -+ seq_printf(s, " CPU_ITYPE = 0x%x\n", mt76_rr(dev, cpu_itype_addr)); -+ seq_printf(s, " CPU_EVA = 0x%x\n", mt76_rr(dev, cpu_eva_addr)); -+ seq_printf(s, " CPU_IPC = 0x%x\n", mt76_rr(dev, cpu_ipc_addr)); -+ seq_printf(s, " PC = 0x%x\n\n\n", mt76_rr(dev, pc_addr)); -+ -+ mt7915_show_lp_history(s, fgIsExp); -+ mt7915_show_irq_history(s); -+ -+ seq_printf(s, "\n\n cpu utility\n"); -+ seq_printf(s, " Busy:%d%% Peak:%d%%\n\n", -+ mt76_rr(dev, busy_addr), mt76_rr(dev, peak_addr)); -+ -+ mt7915_show_msg_trace(s); -+ mt7915_show_sech_trace(s); -+ mt7915_show_prog_trace(s); -+ -+ if (fgIsAssert) -+ mt7915_show_assert_line(s); -+ -+ seq_printf(s, "============================================\n"); -+ return 0; -+} -+ -+int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ u32 device_id = (dev->mt76.rev) >> 16; -+ int i = 0; -+ -+ for (i = 0; i < ARRAY_SIZE(dbg_reg_s); i++) { -+ if (device_id == dbg_reg_s[i].id) { -+ dev->dbg_reg = &dbg_reg_s[i]; -+ break; -+ } -+ } -+ -+ mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); -+ -+ debugfs_create_file("fw_debug_module", 0600, dir, dev, -+ &fops_fw_debug_module); -+ debugfs_create_file("fw_debug_level", 0600, dir, dev, -+ &fops_fw_debug_level); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "sta_info", dir, -+ mt7915_sta_info); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "wtbl_info", dir, -+ mt7915_wtbl_read); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "uwtbl_info", dir, -+ mt7915_uwtbl_read); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "tr_info", dir, -+ mt7915_trinfo_read); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "drr_info", dir, -+ mt7915_drr_info); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "ple_info", dir, -+ mt7915_pleinfo_read); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "pse_info", dir, -+ mt7915_pseinfo_read); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "mib_info0", dir, -+ mt7915_mibinfo_band0); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "mib_info1", dir, -+ mt7915_mibinfo_band1); -+ -+ debugfs_create_u32("token_idx", 0600, dir, &dev->dbg.token_idx); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "token", dir, -+ mt7915_token_read); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "token_txd", dir, -+ mt7915_token_txd_read); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "amsdu_info", dir, -+ mt7915_amsduinfo_read); -+ -+ debugfs_create_devm_seqfile(dev->mt76.dev, "agg_info0", dir, -+ mt7915_agginfo_read_band0); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "agg_info1", dir, -+ mt7915_agginfo_read_band1); -+ -+ debugfs_create_file("tx_amsdu", 0600, dir, dev, &fops_tx_amsdu); -+ -+ debugfs_create_file("fw_wa_query", 0600, dir, dev, &fops_wa_query); -+ debugfs_create_file("fw_wa_set", 0600, dir, dev, &fops_wa_set); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "fw_version", dir, -+ mt7915_dump_version); -+ debugfs_create_file("fw_wa_debug", 0600, dir, dev, &fops_wa_debug); -+ debugfs_create_devm_seqfile(dev->mt76.dev, "fw_wm_info", dir, -+ mt7915_fw_wm_info_read); -+ -+ debugfs_create_file("red_en", 0600, dir, dev, -+ &fops_red_en); -+ debugfs_create_file("red_show_sta", 0600, dir, dev, -+ &fops_red_show_sta); -+ debugfs_create_file("red_target_dly", 0600, dir, dev, -+ &fops_red_target_dly); -+ -+ debugfs_create_file("txpower_level", 0400, dir, dev, -+ &fops_txpower_level); -+ -+ debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable); -+ -+ return 0; -+} -+#endif -diff --git a/mt7915/mtk_mcu.c b/mt7915/mtk_mcu.c -new file mode 100644 -index 0000000..143dae2 ---- /dev/null -+++ b/mt7915/mtk_mcu.c -@@ -0,0 +1,51 @@ -+#include -+#include -+#include -+#include "mt7915.h" -+#include "mcu.h" -+#include "mac.h" -+ -+int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_sku_val { -+ u8 format_id; -+ u8 val; -+ u8 band; -+ u8 _rsv; -+ } __packed req = { -+ .format_id = 1, -+ .band = phy->mt76->band_idx, -+ .val = !!drop_level, -+ }; -+ int ret; -+ -+ ret = mt76_mcu_send_msg(&dev->mt76, -+ MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, -+ sizeof(req), true); -+ if (ret) -+ return ret; -+ -+ req.format_id = 2; -+ if ((drop_level > 90 && drop_level < 100) || !drop_level) -+ req.val = 0; -+ else if (drop_level > 60 && drop_level <= 90) -+ /* reduce Pwr for 1 dB. */ -+ req.val = 2; -+ else if (drop_level > 30 && drop_level <= 60) -+ /* reduce Pwr for 3 dB. */ -+ req.val = 6; -+ else if (drop_level > 15 && drop_level <= 30) -+ /* reduce Pwr for 6 dB. */ -+ req.val = 12; -+ else if (drop_level > 9 && drop_level <= 15) -+ /* reduce Pwr for 9 dB. */ -+ req.val = 18; -+ else if (drop_level > 0 && drop_level <= 9) -+ /* reduce Pwr for 12 dB. */ -+ req.val = 24; -+ -+ return mt76_mcu_send_msg(&dev->mt76, -+ MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, -+ sizeof(req), true); -+} -diff --git a/mt7915/soc.c b/mt7915/soc.c -index bb3468a..b941a49 100644 ---- a/mt7915/soc.c -+++ b/mt7915/soc.c -@@ -360,6 +360,13 @@ static int mt798x_wmac_sku_setup(struct mt7915_dev *dev, u32 *adie_type) - *adie_type = FIELD_GET(MT_ADIE_CHIP_ID_MASK, adie_main) | - (MT_ADIE_CHIP_ID_MASK & adie_ext); - -+#ifdef MTK_DEBUG -+ dev->adie[ADIE0].id = FIELD_GET(MT_ADIE_CHIP_ID_MASK, adie_main); -+ dev->adie[ADIE0].version = FIELD_GET(MT_ADIE_VERSION_MASK, adie_main); -+ dev->adie[ADIE1].id = FIELD_GET(MT_ADIE_CHIP_ID_MASK, adie_ext); -+ dev->adie[ADIE1].version = FIELD_GET(MT_ADIE_VERSION_MASK, adie_ext); -+#endif -+ - out: - mt76_wmac_spi_unlock(dev); - -diff --git a/tools/fwlog.c b/tools/fwlog.c -index e5d4a10..3d51d9e 100644 ---- a/tools/fwlog.c -+++ b/tools/fwlog.c -@@ -26,7 +26,7 @@ static const char *debugfs_path(const char *phyname, const char *file) - return path; - } - --static int mt76_set_fwlog_en(const char *phyname, bool en) -+static int mt76_set_fwlog_en(const char *phyname, bool en, char *val) - { - FILE *f = fopen(debugfs_path(phyname, "fw_debug_bin"), "w"); - -@@ -35,7 +35,13 @@ static int mt76_set_fwlog_en(const char *phyname, bool en) - return 1; - } - -- fprintf(f, "7"); -+ if (en && val) -+ fprintf(f, "%s", val); -+ else if (en) -+ fprintf(f, "7"); -+ else -+ fprintf(f, "0"); -+ - fclose(f); - - return 0; -@@ -76,6 +82,7 @@ static void handle_signal(int sig) - - int mt76_fwlog(const char *phyname, int argc, char **argv) - { -+#define BUF_SIZE 1504 - struct sockaddr_in local = { - .sin_family = AF_INET, - .sin_addr.s_addr = INADDR_ANY, -@@ -84,9 +91,10 @@ int mt76_fwlog(const char *phyname, int argc, char **argv) - .sin_family = AF_INET, - .sin_port = htons(55688), - }; -- char buf[1504]; -+ char *buf = calloc(BUF_SIZE, sizeof(char)); -+ FILE *logfile = NULL; - int ret = 0; -- int yes = 1; -+ /* int yes = 1; */ - int s, fd; - - if (argc < 1) { -@@ -99,19 +107,28 @@ int mt76_fwlog(const char *phyname, int argc, char **argv) - return 1; - } - -+ if (argc == 3) { -+ fprintf(stdout, "start logging to file %s\n", argv[2]); -+ logfile = fopen(argv[2], "wb"); -+ if (!logfile) { -+ perror("fopen"); -+ return 1; -+ } -+ } -+ - s = socket(PF_INET, SOCK_DGRAM, IPPROTO_UDP); - if (s < 0) { - perror("socket"); - return 1; - } - -- setsockopt(s, SOL_SOCKET, SO_BROADCAST, &yes, sizeof(yes)); -+ /* setsockopt(s, SOL_SOCKET, SO_BROADCAST, &yes, sizeof(yes)); */ - if (bind(s, (struct sockaddr *)&local, sizeof(local)) < 0) { - perror("bind"); - return 1; - } - -- if (mt76_set_fwlog_en(phyname, true)) -+ if (mt76_set_fwlog_en(phyname, true, argv[1])) - return 1; - - fd = open(debugfs_path(phyname, "fwlog_data"), O_RDONLY); -@@ -145,8 +162,8 @@ int mt76_fwlog(const char *phyname, int argc, char **argv) - if (!r) - continue; - -- if (len > sizeof(buf)) { -- fprintf(stderr, "Length error: %d > %d\n", len, (int)sizeof(buf)); -+ if (len > BUF_SIZE) { -+ fprintf(stderr, "Length error: %d > %d\n", len, BUF_SIZE); - ret = 1; - break; - } -@@ -164,14 +181,19 @@ int mt76_fwlog(const char *phyname, int argc, char **argv) - break; - } - -- /* send buf */ -- sendto(s, buf, len, 0, (struct sockaddr *)&remote, sizeof(remote)); -+ if (logfile) -+ fwrite(buf, 1, len, logfile); -+ else -+ /* send buf */ -+ sendto(s, buf, len, 0, (struct sockaddr *)&remote, sizeof(remote)); - } - - close(fd); - - out: -- mt76_set_fwlog_en(phyname, false); -+ mt76_set_fwlog_en(phyname, false, NULL); -+ free(buf); -+ fclose(logfile); - - return ret; - } --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1001-wifi-mt76-mt7915-csi-implement-csi-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1001-wifi-mt76-mt7915-csi-implement-csi-support.patch deleted file mode 100644 index 75db3ee6e..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1001-wifi-mt76-mt7915-csi-implement-csi-support.patch +++ /dev/null @@ -1,1092 +0,0 @@ -From b50df1502bddba9963eadba8d69e6b95a9b87337 Mon Sep 17 00:00:00 2001 -From: Bo Jiao -Date: Mon, 6 Jun 2022 20:13:02 +0800 -Subject: [PATCH] wifi: mt76: mt7915: csi: implement csi support - ---- - mt76_connac_mcu.h | 2 + - mt7915/Makefile | 4 +- - mt7915/init.c | 38 ++++ - mt7915/main.c | 4 + - mt7915/mcu.c | 203 ++++++++++++++++++++ - mt7915/mcu.h | 74 ++++++++ - mt7915/mt7915.h | 60 ++++++ - mt7915/vendor.c | 470 ++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 63 +++++++ - 9 files changed, 916 insertions(+), 2 deletions(-) - create mode 100644 mt7915/vendor.c - create mode 100644 mt7915/vendor.h - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index a8690cd..cda7559 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1029,6 +1029,7 @@ enum { - MCU_EXT_EVENT_WA_TX_STAT = 0x74, - MCU_EXT_EVENT_BCC_NOTIFY = 0x75, - MCU_EXT_EVENT_MURU_CTRL = 0x9f, -+ MCU_EXT_EVENT_CSI_REPORT = 0xc2, - }; - - /* unified event table */ -@@ -1243,6 +1244,7 @@ enum { - MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, - MCU_EXT_CMD_PHY_STAT_INFO = 0xad, - MCU_EXT_CMD_SET_QOS_MAP = 0xb4, -+ MCU_EXT_CMD_CSI_CTRL = 0xc2, - }; - - enum { -diff --git a/mt7915/Makefile b/mt7915/Makefile -index fd71141..65129b4 100644 ---- a/mt7915/Makefile -+++ b/mt7915/Makefile -@@ -1,10 +1,10 @@ - # SPDX-License-Identifier: ISC - --EXTRA_CFLAGS += -DCONFIG_MT76_LEDS -+EXTRA_CFLAGS += -DCONFIG_MT76_LEDS -DCONFIG_MTK_VENDOR - obj-$(CONFIG_MT7915E) += mt7915e.o - - mt7915e-y := pci.o init.o dma.o eeprom.o main.o mcu.o mac.o \ -- debugfs.o mmio.o mtk_debugfs.o mtk_mcu.o -+ debugfs.o mmio.o mtk_debugfs.o mtk_mcu.o vendor.o - - mt7915e-$(CONFIG_NL80211_TESTMODE) += testmode.o - mt7915e-$(CONFIG_MT798X_WMAC) += soc.o -diff --git a/mt7915/init.c b/mt7915/init.c -index 19a68c5..c504ebf 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -697,6 +697,12 @@ mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy) - /* init wiphy according to mphy and phy */ - mt7915_init_wiphy(phy); - -+#ifdef CONFIG_MTK_VENDOR -+ INIT_LIST_HEAD(&phy->csi.csi_list); -+ spin_lock_init(&phy->csi.csi_lock); -+ mt7915_vendor_register(phy); -+#endif -+ - ret = mt76_register_phy(mphy, true, mt76_rates, - ARRAY_SIZE(mt76_rates)); - if (ret) -@@ -1178,6 +1184,24 @@ void mt7915_set_stream_he_caps(struct mt7915_phy *phy) - } - } - -+#ifdef CONFIG_MTK_VENDOR -+static int mt7915_unregister_features(struct mt7915_phy *phy) -+{ -+ struct csi_data *c, *tmp_c; -+ -+ spin_lock_bh(&phy->csi.csi_lock); -+ phy->csi.enable = 0; -+ -+ list_for_each_entry_safe(c, tmp_c, &phy->csi.csi_list, node) { -+ list_del(&c->node); -+ kfree(c); -+ } -+ spin_unlock_bh(&phy->csi.csi_lock); -+ -+ return 0; -+} -+#endif -+ - static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) - { - struct mt7915_phy *phy = mt7915_ext_phy(dev); -@@ -1186,6 +1210,10 @@ static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) - if (!phy) - return; - -+#ifdef CONFIG_MTK_VENDOR -+ mt7915_unregister_features(phy); -+#endif -+ - mt7915_unregister_thermal(phy); - mt76_unregister_phy(mphy); - ieee80211_free_hw(mphy->hw); -@@ -1198,6 +1226,10 @@ static void mt7915_stop_hardware(struct mt7915_dev *dev) - mt7915_dma_cleanup(dev); - tasklet_disable(&dev->mt76.irq_tasklet); - -+#ifdef CONFIG_MTK_VENDOR -+ mt7915_unregister_features(&dev->phy); -+#endif -+ - if (is_mt798x(&dev->mt76)) - mt7986_wmac_disable(dev); - } -@@ -1242,6 +1274,12 @@ int mt7915_register_device(struct mt7915_dev *dev) - dev->mt76.test_ops = &mt7915_testmode_ops; - #endif - -+#ifdef CONFIG_MTK_VENDOR -+ INIT_LIST_HEAD(&dev->phy.csi.csi_list); -+ spin_lock_init(&dev->phy.csi.csi_lock); -+ mt7915_vendor_register(&dev->phy); -+#endif -+ - ret = mt76_register_device(&dev->mt76, true, mt76_rates, - ARRAY_SIZE(mt76_rates)); - if (ret) -diff --git a/mt7915/main.c b/mt7915/main.c -index 3ac3df3..4edb11a 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -811,6 +811,10 @@ void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, - struct mt7915_phy *phy = msta->vif->phy; - int i; - -+#ifdef CONFIG_MTK_VENDOR -+ mt7915_mcu_set_csi(&dev->phy, 2, 8, 1, 0, sta->addr, 0); -+#endif -+ - mt7915_mcu_add_sta(dev, vif, sta, false); - - mt7915_mac_wtbl_update(dev, msta->wcid.idx, -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 1a3647a..65609b4 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -40,6 +40,10 @@ static bool sr_scene_detect = true; - module_param(sr_scene_detect, bool, 0644); - MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); - -+#ifdef CONFIG_MTK_VENDOR -+static int mt7915_mcu_report_csi(struct mt7915_dev *dev, struct sk_buff *skb); -+#endif -+ - static u8 - mt7915_mcu_get_sta_nss(u16 mcs_map) - { -@@ -466,6 +470,11 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - case MCU_EXT_EVENT_FW_LOG_2_HOST: - mt7915_mcu_rx_log_message(dev, skb); - break; -+#ifdef CONFIG_MTK_VENDOR -+ case MCU_EXT_EVENT_CSI_REPORT: -+ mt7915_mcu_report_csi(dev, skb); -+ break; -+#endif - case MCU_EXT_EVENT_BCC_NOTIFY: - mt7915_mcu_rx_bcc_notify(dev, skb); - break; -@@ -4195,6 +4204,200 @@ out: - return ret; - } - -+#ifdef CONFIG_MTK_VENDOR -+int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, -+ u8 cfg, u8 v1, u32 v2, u8 *mac_addr, u32 sta_interval) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_mcu_csi req = { -+ .band = phy != &dev->phy, -+ .mode = mode, -+ .cfg = cfg, -+ .v1 = v1, -+ .v2 = cpu_to_le32(v2), -+ }; -+ -+ if (is_valid_ether_addr(mac_addr)) { -+ ether_addr_copy(req.mac_addr, mac_addr); -+ -+ if (req.v2 == 1 && sta_interval) -+ req.sta_interval = sta_interval; -+ } -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(CSI_CTRL), &req, -+ sizeof(req), true); -+} -+ -+static int csi_integret_segment_data(struct mt7915_phy *phy, struct csi_data *csi) -+{ -+ struct csi_data *csi_temp = NULL; -+ -+ if (csi->segment_num == 0 && -+ csi->remain_last == 0) -+ return CSI_CHAIN_COMPLETE; -+ else if (csi->segment_num == 0 && -+ csi->remain_last == 1) { -+ memcpy(&phy->csi.buffered_csi, -+ csi, sizeof(struct csi_data)); -+ -+ return CSI_CHAIN_SEGMENT_FIRST; -+ } else if (csi->segment_num != 0) { -+ csi_temp = &phy->csi.buffered_csi; -+ if (csi->chain_info != -+ csi_temp->chain_info || -+ csi->segment_num != -+ (csi_temp->segment_num + 1)) -+ return CSI_CHAIN_SEGMENT_ERR; -+ -+ memcpy(&csi_temp->data_i[csi_temp->data_num], -+ csi->data_i, csi->data_num * sizeof(s16)); -+ -+ memcpy(&csi_temp->data_q[csi_temp->data_num], -+ csi->data_q, csi->data_num * sizeof(s16)); -+ -+ csi_temp->data_num += csi->data_num; -+ csi_temp->segment_num = csi->segment_num; -+ csi_temp->remain_last = csi->remain_last; -+ -+ if (csi->remain_last == 0) -+ return CSI_CHAIN_SEGMENT_LAST; -+ else if (csi->remain_last == 1) -+ return CSI_CHAIN_SEGMENT_MIDDLE; -+ } -+ -+ return CSI_CHAIN_ERR; -+} -+ -+static int -+mt7915_mcu_report_csi(struct mt7915_dev *dev, struct sk_buff *skb) -+{ -+ struct mt76_connac2_mcu_rxd *rxd = (struct mt76_connac2_mcu_rxd *)skb->data; -+ struct mt7915_phy *phy = &dev->phy; -+ int len, i; -+ struct mt7915_mcu_csi_report *cr; -+ int ret; -+ struct csi_data *current_csi = NULL; -+ struct csi_data *target_csi = NULL; -+ -+ skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); -+ -+ len = le16_to_cpu(rxd->len) - sizeof(struct mt76_connac2_mcu_rxd) + 24; -+ -+ cr = (struct mt7915_mcu_csi_report *)skb->data; -+ -+ if (phy->csi.interval && -+ le32_to_cpu(cr->ts) < phy->csi.last_record + phy->csi.interval) -+ return 0; -+ -+ current_csi = kzalloc(sizeof(*current_csi), GFP_KERNEL); -+ -+ if (!current_csi) -+ return -ENOMEM; -+ -+ memset(current_csi, 0, sizeof(struct csi_data)); -+ -+#define SET_CSI_DATA(_field) (current_csi->_field = le32_to_cpu((cr->_field))) -+ SET_CSI_DATA(ch_bw); -+ SET_CSI_DATA(rssi); -+ SET_CSI_DATA(snr); -+ SET_CSI_DATA(data_num); -+ SET_CSI_DATA(data_bw); -+ SET_CSI_DATA(pri_ch_idx); -+ SET_CSI_DATA(ext_info); -+ SET_CSI_DATA(rx_mode); -+ SET_CSI_DATA(chain_info); -+ SET_CSI_DATA(ts); -+ -+ if (is_mt798x(&dev->mt76) || is_mt7916(&dev->mt76)) { -+ SET_CSI_DATA(segment_num); -+ SET_CSI_DATA(remain_last); -+ SET_CSI_DATA(pkt_sn); -+ SET_CSI_DATA(tr_stream); -+ } -+ -+ SET_CSI_DATA(band); -+ if (current_csi->band && !phy->mt76->band_idx) -+ phy = mt7915_ext_phy(dev); -+#undef SET_CSI_DATA -+ -+ switch (current_csi->ch_bw) { -+ case CSI_BW20: -+ if (is_mt798x(&dev->mt76) || is_mt7916(&dev->mt76)) -+ current_csi->data_num = CSI_BW20_DATA_COUNT; -+ break; -+ case CSI_BW40: -+ if (is_mt798x(&dev->mt76) || is_mt7916(&dev->mt76)) -+ current_csi->data_num = CSI_BW40_DATA_COUNT; -+ break; -+ default: -+ break; -+ } -+ -+ for (i = 0; i < current_csi->data_num; i++) { -+ current_csi->data_i[i] = le16_to_cpu(cr->data_i[i]); -+ current_csi->data_q[i] = le16_to_cpu(cr->data_q[i]); -+ } -+ -+ memcpy(current_csi->ta, cr->ta, ETH_ALEN); -+ current_csi->tx_idx = le32_get_bits(cr->trx_idx, GENMASK(31, 16)); -+ current_csi->rx_idx = le32_get_bits(cr->trx_idx, GENMASK(15, 0)); -+ -+ /* integret the bw80 segment */ -+ if ((is_mt798x(&dev->mt76) || is_mt7916(&dev->mt76)) && current_csi->ch_bw >= CSI_BW80) { -+ ret = csi_integret_segment_data(phy, current_csi); -+ -+ /* event data error or event drop */ -+ if (ret == CSI_CHAIN_ERR || ret == CSI_CHAIN_SEGMENT_ERR) { -+ kfree(current_csi); -+ return -EINVAL; -+ } -+ -+ if (ret == CSI_CHAIN_SEGMENT_FIRST || ret == CSI_CHAIN_SEGMENT_MIDDLE) { -+ kfree(current_csi); -+ return 0; -+ } else if (ret == CSI_CHAIN_COMPLETE) { -+ target_csi = current_csi; -+ } else if (ret == CSI_CHAIN_SEGMENT_LAST) { -+ target_csi = current_csi; -+ memcpy(target_csi, &phy->csi.buffered_csi, sizeof(struct csi_data)); -+ memset(&phy->csi.buffered_csi, 0, sizeof(struct csi_data)); -+ } -+ } else { -+ target_csi = current_csi; -+ } -+ -+ /* put the csi data into list */ -+ INIT_LIST_HEAD(&target_csi->node); -+ spin_lock_bh(&phy->csi.csi_lock); -+ -+ if (!phy->csi.enable) { -+ kfree(target_csi); -+ spin_unlock_bh(&phy->csi.csi_lock); -+ return 0; -+ } -+ -+ list_add_tail(&target_csi->node, &phy->csi.csi_list); -+ phy->csi.count++; -+ -+ if (phy->csi.count > CSI_MAX_BUF_NUM) { -+ struct csi_data *old; -+ -+ old = list_first_entry(&phy->csi.csi_list, -+ struct csi_data, node); -+ -+ list_del(&old->node); -+ kfree(old); -+ phy->csi.count--; -+ } -+ -+ if (target_csi->chain_info & BIT(15)) /* last chain */ -+ phy->csi.last_record = target_csi->ts; -+ spin_unlock_bh(&phy->csi.csi_lock); -+ -+ return 0; -+} -+#endif -+ - #ifdef MTK_DEBUG - int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp) - { -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 9ae0f07..f32d525 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -604,4 +604,78 @@ mt7915_get_power_bound(struct mt7915_phy *phy, s8 txpower) - enum { - MCU_GET_TX_RATE = 4 - }; -+ -+#ifdef CONFIG_MTK_VENDOR -+struct mt7915_mcu_csi { -+ u8 band; -+ u8 mode; -+ u8 cfg; -+ u8 v1; -+ __le32 v2; -+ u8 mac_addr[ETH_ALEN]; -+ u8 _rsv1[2]; -+ u32 sta_interval; -+ u8 _rsv2[28]; -+} __packed; -+ -+struct csi_tlv { -+ __le32 tag; -+ __le32 len; -+} __packed; -+ -+#define CSI_MAX_BUF_NUM 3000 -+ -+struct mt7915_mcu_csi_report { -+ struct csi_tlv _t0; -+ __le32 ver; -+ struct csi_tlv _t1; -+ __le32 ch_bw; -+ struct csi_tlv _t2; -+ __le32 rssi; -+ struct csi_tlv _t3; -+ __le32 snr; -+ struct csi_tlv _t4; -+ __le32 band; -+ struct csi_tlv _t5; -+ __le32 data_num; -+ struct csi_tlv _t6; -+ __le16 data_i[CSI_BW80_DATA_COUNT]; -+ struct csi_tlv _t7; -+ __le16 data_q[CSI_BW80_DATA_COUNT]; -+ struct csi_tlv _t8; -+ __le32 data_bw; -+ struct csi_tlv _t9; -+ __le32 pri_ch_idx; -+ struct csi_tlv _t10; -+ u8 ta[8]; -+ struct csi_tlv _t11; -+ __le32 ext_info; -+ struct csi_tlv _t12; -+ __le32 rx_mode; -+ struct csi_tlv _t17; -+ __le32 chain_info; -+ struct csi_tlv _t18; -+ __le32 trx_idx; -+ struct csi_tlv _t19; -+ __le32 ts; -+ struct csi_tlv _t20; -+ __le32 pkt_sn; -+ struct csi_tlv _t21; -+ __le32 segment_num; -+ struct csi_tlv _t22; -+ __le32 remain_last; -+ struct csi_tlv _t23; -+ __le32 tr_stream; -+} __packed; -+ -+enum CSI_CHAIN_TYPE { -+ CSI_CHAIN_ERR, -+ CSI_CHAIN_COMPLETE, -+ CSI_CHAIN_SEGMENT_FIRST, -+ CSI_CHAIN_SEGMENT_MIDDLE, -+ CSI_CHAIN_SEGMENT_LAST, -+ CSI_CHAIN_SEGMENT_ERR, -+}; -+#endif -+ - #endif -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 398f851..5a26335 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -195,6 +195,45 @@ struct mt7915_hif { - int irq; - }; - -+#ifdef CONFIG_MTK_VENDOR -+enum csi_bw { -+ CSI_BW20, -+ CSI_BW40, -+ CSI_BW80, -+ CSI_BW160 -+}; -+ -+#define CSI_BW20_DATA_COUNT 64 -+#define CSI_BW40_DATA_COUNT 128 -+#define CSI_BW80_DATA_COUNT 256 -+#define CSI_BW160_DATA_COUNT 512 -+ -+struct csi_data { -+ u8 ch_bw; -+ u16 data_num; -+ s16 data_i[CSI_BW160_DATA_COUNT]; -+ s16 data_q[CSI_BW160_DATA_COUNT]; -+ u8 band; -+ s8 rssi; -+ u8 snr; -+ u32 ts; -+ u8 data_bw; -+ u8 pri_ch_idx; -+ u8 ta[ETH_ALEN]; -+ u32 ext_info; -+ u8 rx_mode; -+ u32 chain_info; -+ u16 tx_idx; -+ u16 rx_idx; -+ u32 segment_num; -+ u8 remain_last; -+ u16 pkt_sn; -+ u8 tr_stream; -+ -+ struct list_head node; -+}; -+#endif -+ - struct mt7915_phy { - struct mt76_phy *mt76; - struct mt7915_dev *dev; -@@ -243,6 +282,21 @@ struct mt7915_phy { - u8 spe_idx; - } test; - #endif -+ -+#ifdef CONFIG_MTK_VENDOR -+ struct { -+ struct list_head csi_list; -+ spinlock_t csi_lock; /* used for csi data push/pop */ -+ u32 count; -+ bool mask; -+ bool reorder; -+ bool enable; -+ -+ struct csi_data buffered_csi; -+ u32 interval; -+ u32 last_record; -+ } csi; -+#endif - }; - - #ifdef MTK_DEBUG -@@ -647,6 +701,12 @@ void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, - bool pci, int *irq); - -+#ifdef CONFIG_MTK_VENDOR -+void mt7915_vendor_register(struct mt7915_phy *phy); -+int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, -+ u8 cfg, u8 v1, u32 v2, u8 *mac_addr, u32 sta_interval); -+#endif -+ - #ifdef MTK_DEBUG - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); - int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp); -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -new file mode 100644 -index 0000000..55da60a ---- /dev/null -+++ b/mt7915/vendor.c -@@ -0,0 +1,470 @@ -+// SPDX-License-Identifier: ISC -+/* -+ * Copyright (C) 2020, MediaTek Inc. All rights reserved. -+ */ -+ -+#include -+ -+#include "mt7915.h" -+#include "mcu.h" -+#include "vendor.h" -+ -+static const struct nla_policy -+csi_ctrl_policy[NUM_MTK_VENDOR_ATTRS_CSI_CTRL] = { -+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG] = {.type = NLA_NESTED }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR] = { .type = NLA_NESTED }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL] = { .type = NLA_U32 }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_STA_INTERVAL] = { .type = NLA_U32 }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM] = { .type = NLA_U16 }, -+ [MTK_VENDOR_ATTR_CSI_CTRL_DATA] = { .type = NLA_NESTED }, -+}; -+ -+struct csi_null_tone { -+ u8 start; -+ u8 end; -+}; -+ -+struct csi_reorder { -+ u8 dest; -+ u8 start; -+ u8 end; -+}; -+ -+struct csi_mask { -+ struct csi_null_tone null[10]; -+ u8 pilot[8]; -+ struct csi_reorder ro[3]; -+}; -+ -+static const struct csi_mask csi_mask_groups[] = { -+ /* OFDM */ -+ { .null = { { 0 }, { 27, 37 } }, -+ .ro = { {0, 0, 63} }, -+ }, -+ { .null = { { 0, 69 }, { 96 }, { 123, 127 } }, -+ .ro = { { 0, 96 }, { 38, 70, 95 }, { 1, 97, 122 } }, -+ }, -+ { .null = { { 0, 5 }, { 32 }, { 59, 127 } }, -+ .ro = { { 0, 32 }, { 38, 6, 31 }, { 1, 33, 58 } }, -+ }, -+ { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 127 } }, -+ .ro = { { 0, 0, 127 } }, -+ }, -+ { .null = { { 0, 133 }, { 160 }, { 187, 255 } }, -+ .ro = { { 0, 160 }, { 1, 161, 186 }, { 38, 134, 159 } }, -+ }, -+ { .null = { { 0, 197 }, { 224 }, { 251, 255 } }, -+ .ro = { { 0, 224 }, { 1, 225, 250 }, { 38, 198, 223 } }, -+ }, -+ { .null = { { 0, 5 }, { 32 }, { 59, 255 } }, -+ .ro = { { 0, 32 }, { 1, 33, 58 }, { 38, 6, 31 } }, -+ }, -+ { .null = { { 0, 69 }, { 96 }, { 123, 255 } }, -+ .ro = { { 0, 96 }, { 1, 97, 122 }, { 38, 70, 95 } }, -+ }, -+ { .null = { { 0, 133 }, { 160 }, { 187, 197 }, { 224 }, { 251, 255 } }, -+ .ro = { { 0, 192 }, { 2, 198, 250 }, { 74, 134, 186 } }, -+ }, -+ { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 255 } }, -+ .ro = { { 0, 64 }, { 2, 70, 122 }, { 74, 6, 58 } }, -+ }, -+ { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 133 }, -+ { 160 }, { 187, 197 }, { 224 }, { 251, 255 } }, -+ .ro = { { 0, 0, 255 } }, -+ }, -+ -+ /* HT/VHT */ -+ { .null = { { 0 }, { 29, 35 } }, -+ .pilot = { 7, 21, 43, 57 }, -+ .ro = { { 0, 0, 63 } }, -+ }, -+ { .null = { { 0, 67 }, { 96 }, { 125, 127 } }, -+ .pilot = { 75, 89, 103, 117 }, -+ .ro = { { 0, 96 }, { 36, 68, 95 }, { 1, 97, 124 } }, -+ }, -+ { .null = { { 0, 3 }, { 32 }, { 61, 127 } }, -+ .pilot = { 11, 25, 39, 53 }, -+ .ro = { { 0, 32 }, { 36, 4, 31 }, { 1, 33, 60 } }, -+ }, -+ { .null = { { 0, 1 }, { 59, 69 }, { 127 } }, -+ .pilot = { 11, 25, 53, 75, 103, 117 }, -+ .ro = { { 0, 0, 127 } }, -+ }, -+ { .null = { { 0, 131 }, { 160 }, { 189, 255 } }, -+ .pilot = { 139, 153, 167, 181 }, -+ .ro = { { 0, 160 }, { 1, 161, 188 }, { 36, 132, 159 } }, -+ }, -+ { .null = { { 0, 195 }, { 224 }, { 253 }, { 255 } }, -+ .pilot = { 203, 217, 231, 245 }, -+ .ro = { { 0, 224 }, { 1, 225, 252 }, { 36, 196, 223 } }, -+ }, -+ { .null = { { 0, 3 }, { 32 }, { 61, 255 } }, -+ .pilot = { 11, 25, 39, 53 }, -+ .ro = { { 0, 32 }, { 1, 33, 60 }, { 36, 4, 31 } }, -+ }, -+ { .null = { { 0, 67 }, { 96 }, { 125, 255 } }, -+ .pilot = { 75, 89, 103, 117 }, -+ .ro = { { 0, 96 }, { 1, 97, 124 }, { 36, 68, 95 } }, -+ }, -+ { .null = { { 0, 133 }, { 191, 193 }, { 251, 255 } }, -+ .pilot = { 139, 167, 181, 203, 217, 245 }, -+ .ro = { { 0, 192 }, { 2, 194, 250 }, { 70, 134, 190 } }, -+ }, -+ { .null = { { 0, 5 }, { 63, 65 }, { 123, 127 } }, -+ .pilot = { 11, 39, 53, 75, 89, 117 }, -+ .ro = { { 0, 64 }, { 2, 66, 122 }, { 70, 6, 62 } }, -+ }, -+ { .null = { { 0, 1 }, { 123, 133 }, { 255 } }, -+ .pilot = { 11, 39, 75, 103, 153, 181, 217, 245 }, -+ .ro = { { 0, 0, 255 } }, -+ }, -+ -+ /* HE */ -+ { .null = { { 0 }, { 31, 33 } }, -+ .pilot = { 12, 29, 35, 52 }, -+ .ro = { { 0, 0, 63 } }, -+ }, -+ { .null = { { 30, 34 }, { 96 } }, -+ .pilot = { 4, 21, 43, 60, 70, 87, 105, 122 }, -+ .ro = { { 0, 96 }, { 34, 66, 95 }, { 1, 97, 126 } }, -+ }, -+ { .null = { { 32 }, { 94, 98 } }, -+ .pilot = { 6, 23, 41, 58, 68, 85, 107, 124 }, -+ .ro = { { 0, 32 }, { 34, 2, 31 }, { 1, 31, 62 } }, -+ }, -+ { .null = { { 0 }, { 62, 66 } }, -+ .pilot = { 9, 26, 36, 53, 75, 92, 102, 119 }, -+ .ro = { { 0, 0, 127 } }, -+ }, -+ { .null = { { 30, 34 }, { 160 } }, -+ .pilot = { 4, 21, 43, 60, 137, 154, 166, 183 }, -+ .ro = { { 0, 160 }, { 1, 161, 190 }, { 34, 130, 159 } }, -+ }, -+ { .null = { { 94, 98 }, { 224 } }, -+ .pilot = { 68, 85, 107, 124, 201, 218, 230, 247 }, -+ .ro = { { 0, 224 }, { 1, 225, 254 }, { 34, 194, 223 } }, -+ }, -+ { .null = { { 32 }, { 158, 162 } }, -+ .pilot = { 9, 26, 38, 55, 132, 149, 171, 188 }, -+ .ro = { { 0, 32 }, { 1, 33, 62 }, { 34, 2, 31 } }, -+ }, -+ { .null = { { 96 }, { 222, 226 } }, -+ .pilot = { 73, 90, 102, 119, 196, 213, 235, 252 }, -+ .ro = { { 0, 96 }, { 1, 97, 126 }, { 34, 66, 95 } }, -+ }, -+ { .null = { { 62, 66 }, { 192 } }, -+ .pilot = { 36, 53, 75, 92, 169, 186, 198, 215 }, -+ .ro = { { 0, 192 }, { 1, 193, 253 }, { 67, 131, 191 } }, -+ }, -+ { .null = { { 64 }, { 190, 194 } }, -+ .pilot = { 41, 58, 70, 87, 164, 181, 203, 220 }, -+ .ro = { { 0, 64 }, { 1, 65, 125 }, { 67, 3, 63 } }, -+ }, -+ { .null = { { 0 }, { 126, 130 } }, -+ .pilot = { 6, 23, 100, 117, 139, 156, 233, 250 }, -+ .ro = { { 0, 0, 255 } }, -+ }, -+}; -+ -+static inline u8 csi_group_idx(u8 mode, u8 ch_bw, u8 data_bw, u8 pri_ch_idx) -+{ -+ if (ch_bw < 2 || data_bw < 1) -+ return mode * 11 + ch_bw * ch_bw + pri_ch_idx; -+ else -+ return mode * 11 + ch_bw * ch_bw + (data_bw + 1) * 2 + pri_ch_idx; -+} -+ -+static int mt7915_vendor_csi_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_CSI_CTRL]; -+ int err; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_CSI_CTRL_MAX, data, data_len, -+ csi_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (is_mt7915(phy->mt76->dev) && phy->mt76->chandef.width > NL80211_CHAN_WIDTH_80) { -+ err = -EINVAL; -+ return err; -+ } -+ -+ if (tb[MTK_VENDOR_ATTR_CSI_CTRL_CFG]) { -+ u8 mode = 0, type = 0, v1 = 0, v2 = 0; -+ u8 mac_addr[ETH_ALEN] = {}; -+ struct nlattr *cur; -+ int rem; -+ u32 sta_interval = 0; -+ -+ nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_CSI_CTRL_CFG], rem) { -+ switch (nla_type(cur)) { -+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE: -+ mode = nla_get_u8(cur); -+ break; -+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE: -+ type = nla_get_u8(cur); -+ break; -+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1: -+ v1 = nla_get_u8(cur); -+ break; -+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2: -+ v2 = nla_get_u8(cur); -+ break; -+ default: -+ return -EINVAL; -+ }; -+ } -+ -+ if (tb[MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR]) { -+ int idx = 0; -+ -+ nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR], rem) { -+ mac_addr[idx++] = nla_get_u8(cur); -+ } -+ -+ /* when configure mac filter, add interval for report interval per sta */ -+ if (tb[MTK_VENDOR_ATTR_CSI_CTRL_STA_INTERVAL]) -+ sta_interval = -+ nla_get_u32(tb[MTK_VENDOR_ATTR_CSI_CTRL_STA_INTERVAL]); -+ } -+ -+ err = mt7915_mcu_set_csi(phy, mode, type, v1, v2, mac_addr, sta_interval); -+ -+ if (err < 0) -+ return err; -+ -+ spin_lock_bh(&phy->csi.csi_lock); -+ -+ phy->csi.enable = !!mode; -+ -+ if (mode == 2 && type == 5) { -+ if (v1 >= 1) -+ phy->csi.mask = 1; -+ if (v1 == 2) -+ phy->csi.reorder = 1; -+ } -+ -+ /* clean up old csi stats */ -+ if ((mode == 0 || mode == 2) && !list_empty(&phy->csi.csi_list)) { -+ struct csi_data *c, *tmp_c; -+ -+ list_for_each_entry_safe(c, tmp_c, &phy->csi.csi_list, -+ node) { -+ list_del(&c->node); -+ kfree(c); -+ phy->csi.count--; -+ } -+ } else if (mode == 1) { -+ phy->csi.last_record = 0; -+ } -+ -+ spin_unlock_bh(&phy->csi.csi_lock); -+ } -+ -+ if (tb[MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL]) -+ phy->csi.interval = nla_get_u32(tb[MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL]); -+ -+ return 0; -+} -+ -+static void -+mt7915_vendor_csi_tone_mask(struct mt7915_phy *phy, struct csi_data *csi) -+{ -+ static const u8 mode_map[] = { -+ [MT_PHY_TYPE_OFDM] = 0, -+ [MT_PHY_TYPE_HT] = 1, -+ [MT_PHY_TYPE_VHT] = 1, -+ [MT_PHY_TYPE_HE_SU] = 2, -+ }; -+ const struct csi_mask *cmask; -+ int i; -+ -+ if (csi->rx_mode == MT_PHY_TYPE_CCK || !phy->csi.mask) -+ return; -+ -+ if (csi->data_bw == IEEE80211_STA_RX_BW_40) -+ csi->pri_ch_idx /= 2; -+ -+ cmask = &csi_mask_groups[csi_group_idx(mode_map[csi->rx_mode], -+ csi->ch_bw, -+ csi->data_bw, -+ csi->pri_ch_idx)]; -+ -+ for (i = 0; i < 10; i++) { -+ const struct csi_null_tone *ntone = &cmask->null[i]; -+ u8 start = ntone->start; -+ u8 end = ntone->end; -+ int j; -+ -+ if (!start && !end && i > 0) -+ break; -+ -+ if (!end) -+ end = start; -+ -+ for (j = start; j <= end; j++) { -+ csi->data_i[j] = 0; -+ csi->data_q[j] = 0; -+ } -+ } -+ -+ for (i = 0; i < 8; i++) { -+ u8 pilot = cmask->pilot[i]; -+ -+ if (!pilot) -+ break; -+ -+ csi->data_i[pilot] = 0; -+ csi->data_q[pilot] = 0; -+ } -+ -+ if (!phy->csi.reorder) -+ return; -+ -+ for (i = 0; i < 3; i++) { -+ const struct csi_reorder *ro = &cmask->ro[i]; -+ u8 dest = ro->dest; -+ u8 start = ro->start; -+ u8 end = ro->end; -+ -+ if (!dest && !start && !end) -+ break; -+ -+ if (dest == start) -+ continue; -+ -+ if (end) { -+ memmove(&csi->data_i[dest], &csi->data_i[start], -+ end - start + 1); -+ memmove(&csi->data_q[dest], &csi->data_q[start], -+ end - start + 1); -+ } else { -+ csi->data_i[dest] = csi->data_i[start]; -+ csi->data_q[dest] = csi->data_q[start]; -+ } -+ } -+} -+ -+static int -+mt7915_vendor_csi_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+#define RESERVED_SET BIT(31) -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_CSI_CTRL]; -+ int err = 0; -+ -+ if (*storage & RESERVED_SET) { -+ if ((*storage & GENMASK(15, 0)) == 0) -+ return -ENOENT; -+ (*storage)--; -+ } -+ -+ if (data) { -+ err = nla_parse(tb, MTK_VENDOR_ATTR_CSI_CTRL_MAX, data, data_len, -+ csi_ctrl_policy, NULL); -+ if (err) -+ return err; -+ } -+ -+ if (!(*storage & RESERVED_SET) && tb[MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM]) { -+ *storage = nla_get_u16(tb[MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM]); -+ *storage |= RESERVED_SET; -+ } -+ -+ spin_lock_bh(&phy->csi.csi_lock); -+ -+ if (!list_empty(&phy->csi.csi_list)) { -+ struct csi_data *csi; -+ void *a, *b; -+ int i; -+ -+ csi = list_first_entry(&phy->csi.csi_list, struct csi_data, node); -+ -+ mt7915_vendor_csi_tone_mask(phy, csi); -+ -+ a = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_CTRL_DATA); -+ -+ if (nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_VER, 1) || -+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_RSSI, csi->rssi) || -+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_SNR, csi->snr) || -+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_BW, csi->data_bw) || -+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_CH_IDX, csi->pri_ch_idx) || -+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_MODE, csi->rx_mode)) -+ goto out; -+ -+ if (nla_put_u16(skb, MTK_VENDOR_ATTR_CSI_DATA_TX_ANT, csi->tx_idx) || -+ nla_put_u16(skb, MTK_VENDOR_ATTR_CSI_DATA_RX_ANT, csi->rx_idx)) -+ goto out; -+ -+ if (nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_INFO, csi->ext_info) || -+ nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_CHAIN_INFO, csi->chain_info) || -+ nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_TS, csi->ts)) -+ goto out; -+ -+ b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_TA); -+ for (i = 0; i < ARRAY_SIZE(csi->ta); i++) -+ if (nla_put_u8(skb, i, csi->ta[i])) -+ goto out; -+ nla_nest_end(skb, b); -+ -+ if (nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_NUM, csi->data_num)) -+ goto out; -+ -+ b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_I); -+ for (i = 0; i < csi->data_num; i++) -+ if (nla_put_u16(skb, i, csi->data_i[i])) -+ goto out; -+ nla_nest_end(skb, b); -+ -+ b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_Q); -+ for (i = 0; i < csi->data_num; i++) -+ if (nla_put_u16(skb, i, csi->data_q[i])) -+ goto out; -+ nla_nest_end(skb, b); -+ -+ nla_nest_end(skb, a); -+ -+ list_del(&csi->node); -+ kfree(csi); -+ phy->csi.count--; -+ -+ err = phy->csi.count; -+ } -+out: -+ spin_unlock_bh(&phy->csi.csi_lock); -+ -+ return err; -+} -+ -+static const struct wiphy_vendor_command mt7915_vendor_commands[] = { -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_csi_ctrl, -+ .dumpit = mt7915_vendor_csi_ctrl_dump, -+ .policy = csi_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_CSI_CTRL_MAX, -+ } -+}; -+ -+void mt7915_vendor_register(struct mt7915_phy *phy) -+{ -+ phy->mt76->hw->wiphy->vendor_commands = mt7915_vendor_commands; -+ phy->mt76->hw->wiphy->n_vendor_commands = ARRAY_SIZE(mt7915_vendor_commands); -+} -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -new file mode 100644 -index 0000000..e1f5fd3 ---- /dev/null -+++ b/mt7915/vendor.h -@@ -0,0 +1,63 @@ -+/* SPDX-License-Identifier: ISC */ -+#ifndef __MT7915_VENDOR_H -+#define __MT7915_VENDOR_H -+ -+#define MTK_NL80211_VENDOR_ID 0x0ce7 -+ -+enum mtk_nl80211_vendor_subcmds { -+ MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL = 0xc2, -+}; -+ -+enum mtk_vendor_attr_csi_ctrl { -+ MTK_VENDOR_ATTR_CSI_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_CSI_CTRL_CFG, -+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE, -+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE, -+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1, -+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2, -+ MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR, -+ MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL, -+ MTK_VENDOR_ATTR_CSI_CTRL_STA_INTERVAL, -+ -+ MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM, -+ -+ MTK_VENDOR_ATTR_CSI_CTRL_DATA, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_CSI_CTRL, -+ MTK_VENDOR_ATTR_CSI_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_CSI_CTRL - 1 -+}; -+ -+enum mtk_vendor_attr_csi_data { -+ MTK_VENDOR_ATTR_CSI_DATA_UNSPEC, -+ MTK_VENDOR_ATTR_CSI_DATA_PAD, -+ -+ MTK_VENDOR_ATTR_CSI_DATA_VER, -+ MTK_VENDOR_ATTR_CSI_DATA_TS, -+ MTK_VENDOR_ATTR_CSI_DATA_RSSI, -+ MTK_VENDOR_ATTR_CSI_DATA_SNR, -+ MTK_VENDOR_ATTR_CSI_DATA_BW, -+ MTK_VENDOR_ATTR_CSI_DATA_CH_IDX, -+ MTK_VENDOR_ATTR_CSI_DATA_TA, -+ MTK_VENDOR_ATTR_CSI_DATA_NUM, -+ MTK_VENDOR_ATTR_CSI_DATA_I, -+ MTK_VENDOR_ATTR_CSI_DATA_Q, -+ MTK_VENDOR_ATTR_CSI_DATA_INFO, -+ MTK_VENDOR_ATTR_CSI_DATA_RSVD1, -+ MTK_VENDOR_ATTR_CSI_DATA_RSVD2, -+ MTK_VENDOR_ATTR_CSI_DATA_RSVD3, -+ MTK_VENDOR_ATTR_CSI_DATA_RSVD4, -+ MTK_VENDOR_ATTR_CSI_DATA_TX_ANT, -+ MTK_VENDOR_ATTR_CSI_DATA_RX_ANT, -+ MTK_VENDOR_ATTR_CSI_DATA_MODE, -+ MTK_VENDOR_ATTR_CSI_DATA_CHAIN_INFO, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_CSI_DATA, -+ MTK_VENDOR_ATTR_CSI_DATA_MAX = -+ NUM_MTK_VENDOR_ATTRS_CSI_DATA - 1 -+}; -+ -+#endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1002-wifi-mt76-mt7915-air-monitor-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1002-wifi-mt76-mt7915-air-monitor-support.patch deleted file mode 100644 index b2156ede1..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1002-wifi-mt76-mt7915-air-monitor-support.patch +++ /dev/null @@ -1,549 +0,0 @@ -From 1a63c07be0a813d1342346c937cd2f949439b837 Mon Sep 17 00:00:00 2001 -From: Bo Jiao -Date: Tue, 11 Jan 2022 12:03:23 +0800 -Subject: [PATCH] wifi: mt76: mt7915: air monitor support - ---- - mt76_connac_mcu.h | 2 + - mt7915/mac.c | 4 + - mt7915/main.c | 3 + - mt7915/mt7915.h | 32 ++++ - mt7915/vendor.c | 361 ++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 38 +++++ - 6 files changed, 440 insertions(+) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index cda7559..3aa4e59 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1243,6 +1243,8 @@ enum { - MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, - MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, - MCU_EXT_CMD_PHY_STAT_INFO = 0xad, -+ /* for vendor csi and air monitor */ -+ MCU_EXT_CMD_SMESH_CTRL = 0xae, - MCU_EXT_CMD_SET_QOS_MAP = 0xb4, - MCU_EXT_CMD_CSI_CTRL = 0xc2, - }; -diff --git a/mt7915/mac.c b/mt7915/mac.c -index d99864f..e38905a 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -531,6 +531,10 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb, - seq_ctrl = le16_to_cpu(hdr->seq_ctrl); - qos_ctl = *ieee80211_get_qos_ctl(hdr); - } -+#ifdef CONFIG_MTK_VENDOR -+ if (phy->amnt_ctrl.enable) -+ mt7915_vendor_amnt_fill_rx(phy, skb); -+#endif - } else { - status->flag |= RX_FLAG_8023; - mt7915_wed_check_ppe(dev, &dev->mt76.q_rx[q], msta, skb, -diff --git a/mt7915/main.c b/mt7915/main.c -index 4edb11a..847c74b 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -800,6 +800,9 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, - addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 30); - mt76_rmw_field(dev, addr, GENMASK(7, 0), 0xa0); - -+#ifdef CONFIG_MTK_VENDOR -+ mt7915_vendor_amnt_sta_remove(mvif->phy, sta); -+#endif - return mt7915_mcu_add_rate_ctrl(dev, vif, sta, false); - } - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 5a26335..576e70a 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -232,6 +232,33 @@ struct csi_data { - - struct list_head node; - }; -+ -+#define MT7915_AIR_MONITOR_MAX_ENTRY 16 -+#define MT7915_AIR_MONITOR_MAX_GROUP MT7915_AIR_MONITOR_MAX_ENTRY >> 1 -+ -+struct mt7915_air_monitor_group { -+ bool enable; -+ bool used[2]; -+}; -+ -+struct mt7915_air_monitor_entry { -+ bool enable; -+ -+ u8 group_idx; -+ u8 group_used_idx; -+ u8 muar_idx; -+ u8 addr[ETH_ALEN]; -+ unsigned int last_seen; -+ s8 rssi[4]; -+ struct ieee80211_sta *sta; -+}; -+ -+struct mt7915_air_monitor_ctrl { -+ u8 enable; -+ -+ struct mt7915_air_monitor_group group[MT7915_AIR_MONITOR_MAX_GROUP]; -+ struct mt7915_air_monitor_entry entry[MT7915_AIR_MONITOR_MAX_ENTRY]; -+}; - #endif - - struct mt7915_phy { -@@ -296,6 +323,8 @@ struct mt7915_phy { - u32 interval; - u32 last_record; - } csi; -+ -+ struct mt7915_air_monitor_ctrl amnt_ctrl; - #endif - }; - -@@ -705,6 +734,9 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, - void mt7915_vendor_register(struct mt7915_phy *phy); - int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, - u8 cfg, u8 v1, u32 v2, u8 *mac_addr, u32 sta_interval); -+void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb); -+int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, -+ struct ieee80211_sta *sta); - #endif - - #ifdef MTK_DEBUG -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 55da60a..c964b14 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -448,6 +448,355 @@ out: - return err; - } - -+static const struct nla_policy -+amnt_ctrl_policy[NUM_MTK_VENDOR_ATTRS_AMNT_CTRL] = { -+ [MTK_VENDOR_ATTR_AMNT_CTRL_SET] = {.type = NLA_NESTED }, -+ [MTK_VENDOR_ATTR_AMNT_CTRL_DUMP] = { .type = NLA_NESTED }, -+}; -+ -+static const struct nla_policy -+amnt_set_policy[NUM_MTK_VENDOR_ATTRS_AMNT_SET] = { -+ [MTK_VENDOR_ATTR_AMNT_SET_INDEX] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_AMNT_SET_MACADDR] = { .type = NLA_NESTED }, -+}; -+ -+static const struct nla_policy -+amnt_dump_policy[NUM_MTK_VENDOR_ATTRS_AMNT_DUMP] = { -+ [MTK_VENDOR_ATTR_AMNT_DUMP_INDEX] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_AMNT_DUMP_LEN] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_AMNT_DUMP_RESULT] = { .type = NLA_NESTED }, -+}; -+ -+struct mt7915_amnt_data { -+ u8 idx; -+ u8 addr[ETH_ALEN]; -+ s8 rssi[4]; -+ u32 last_seen; -+}; -+ -+struct mt7915_smesh { -+ u8 band; -+ u8 write; -+ u8 enable; -+ bool a2; -+ bool a1; -+ bool data; -+ bool mgnt; -+ bool ctrl; -+} __packed; -+ -+struct mt7915_smesh_event { -+ u8 band; -+ __le32 value; -+} __packed; -+ -+static int -+mt7915_vendor_smesh_ctrl(struct mt7915_phy *phy, u8 write, -+ u8 enable, u32 *value) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_smesh req = { -+ .band = phy != &dev->phy, -+ .write = write, -+ .enable = enable, -+ .a2 = 1, -+ .a1 = 1, -+ .data = 1, -+ }; -+ struct mt7915_smesh_event *res; -+ struct sk_buff *skb; -+ int ret = 0; -+ -+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(SMESH_CTRL), -+ &req, sizeof(req), !write, &skb); -+ -+ if (ret || write) -+ return ret; -+ -+ res = (struct mt7915_smesh_event *) skb->data; -+ -+ if (!value) -+ return -EINVAL; -+ -+ *value = res->value; -+ -+ dev_kfree_skb(skb); -+ -+ return 0; -+} -+ -+static int -+mt7915_vendor_amnt_muar(struct mt7915_phy *phy, u8 muar_idx, u8 *addr) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 mode; -+ u8 force_clear; -+ u8 clear_bitmap[8]; -+ u8 entry_count; -+ u8 write; -+ u8 band; -+ -+ u8 index; -+ u8 bssid; -+ u8 addr[ETH_ALEN]; -+ } __packed req = { -+ .entry_count = 1, -+ .write = 1, -+ .band = phy != &dev->phy, -+ .index = muar_idx, -+ }; -+ -+ ether_addr_copy(req.addr, addr); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req, -+ sizeof(req), true); -+} -+ -+static int -+mt7915_vendor_amnt_set_en(struct mt7915_phy *phy, u8 enable) -+{ -+ u32 status; -+ int ret; -+ -+ ret = mt7915_vendor_smesh_ctrl(phy, 0, enable, &status); -+ if (ret) -+ return ret; -+ -+ status = status & 0xff; -+ -+ if (status == enable) -+ return 0; -+ -+ ret = mt7915_vendor_smesh_ctrl(phy, 1, enable, &status); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int -+mt7915_vendor_amnt_set_addr(struct mt7915_phy *phy, u8 index, u8 *addr) -+{ -+ struct mt7915_air_monitor_ctrl *amnt_ctrl = &phy->amnt_ctrl; -+ struct mt7915_air_monitor_group *group; -+ struct mt7915_air_monitor_entry *entry = &amnt_ctrl->entry[index]; -+ const u8 zero_addr[ETH_ALEN] = {}; -+ int enable = !ether_addr_equal(addr, zero_addr); -+ int ret, i, j; -+ -+ if (enable == 1 && entry->enable == 1) { -+ ether_addr_copy(entry->addr, addr); -+ } else if (enable == 1 && entry->enable == 0){ -+ for (i = 0; i < MT7915_AIR_MONITOR_MAX_GROUP; i++) { -+ group = &(amnt_ctrl->group[i]); -+ if (group->used[0] == 0) -+ j = 0; -+ else if (group->used[1] == 0) -+ j = 1; -+ else -+ continue; -+ -+ group->enable = 1; -+ group->used[j] = 1; -+ entry->enable = 1; -+ entry->group_idx = i; -+ entry->group_used_idx = j; -+ entry->muar_idx = 32 + 2 * i + 2 * i + 2 * j; -+ ether_addr_copy(entry->addr, addr); -+ break; -+ } -+ } else { -+ group = &(amnt_ctrl->group[entry->group_idx]); -+ -+ group->used[entry->group_used_idx] = 0; -+ if (group->used[0] == 0 && group->used[1] == 0) -+ group->enable = 0; -+ -+ entry->enable = 0; -+ ether_addr_copy(entry->addr, addr); -+ } -+ -+ amnt_ctrl->enable &= ~(1 << entry->group_idx); -+ amnt_ctrl->enable |= entry->enable << entry->group_idx; -+ ret = mt7915_vendor_amnt_muar(phy, entry->muar_idx, addr); -+ if (ret) -+ return ret; -+ -+ return mt7915_vendor_amnt_set_en(phy, amnt_ctrl->enable); -+} -+ -+void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb) -+{ -+ struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; -+ struct mt7915_air_monitor_ctrl *ctrl = &phy->amnt_ctrl; -+ struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb); -+ __le16 fc = hdr->frame_control; -+ u8 addr[ETH_ALEN]; -+ int i; -+ -+ if (!ieee80211_has_fromds(fc)) -+ ether_addr_copy(addr, hdr->addr2); -+ else if (ieee80211_has_tods(fc)) -+ ether_addr_copy(addr, hdr->addr4); -+ else -+ ether_addr_copy(addr, hdr->addr3); -+ -+ for (i = 0; i < MT7915_AIR_MONITOR_MAX_ENTRY; i++) { -+ struct mt7915_air_monitor_entry *entry; -+ -+ if (ether_addr_equal(addr, ctrl->entry[i].addr)) { -+ entry = &ctrl->entry[i]; -+ entry->rssi[0] = status->chain_signal[0]; -+ entry->rssi[1] = status->chain_signal[1]; -+ entry->rssi[2] = status->chain_signal[2]; -+ entry->rssi[3] = status->chain_signal[3]; -+ entry->last_seen = jiffies; -+ } -+ } -+ -+ if (ieee80211_has_tods(fc) && -+ !ether_addr_equal(hdr->addr3, phy->mt76->macaddr)) -+ return; -+ else if (!ether_addr_equal(hdr->addr1, phy->mt76->macaddr)) -+ return; -+} -+ -+int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, -+ struct ieee80211_sta *sta) -+{ -+ u8 zero[ETH_ALEN] = {}; -+ int i; -+ -+ if (!phy->amnt_ctrl.enable) -+ return 0; -+ -+ for (i = 0; i < MT7915_AIR_MONITOR_MAX_ENTRY; i++) -+ if (ether_addr_equal(sta->addr, phy->amnt_ctrl.entry[i].addr)) -+ return mt7915_vendor_amnt_set_addr(phy, i, zero); -+ -+ return 0; -+} -+ -+static int -+mt7915_vendor_amnt_ctrl(struct wiphy *wiphy, struct wireless_dev *wdev, -+ const void *data, int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct nlattr *tb1[NUM_MTK_VENDOR_ATTRS_AMNT_CTRL]; -+ struct nlattr *tb2[NUM_MTK_VENDOR_ATTRS_AMNT_SET]; -+ struct nlattr *cur; -+ u8 index = 0, i = 0; -+ u8 mac_addr[ETH_ALEN] = {}; -+ int err, rem; -+ -+ err = nla_parse(tb1, MTK_VENDOR_ATTR_AMNT_CTRL_MAX, data, data_len, -+ amnt_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (!tb1[MTK_VENDOR_ATTR_AMNT_CTRL_SET]) -+ return -EINVAL; -+ -+ err = nla_parse_nested(tb2, MTK_VENDOR_ATTR_AMNT_SET_MAX, -+ tb1[MTK_VENDOR_ATTR_AMNT_CTRL_SET], amnt_set_policy, NULL); -+ -+ if (!tb2[MTK_VENDOR_ATTR_AMNT_SET_INDEX] || -+ !tb2[MTK_VENDOR_ATTR_AMNT_SET_MACADDR]) -+ return -EINVAL; -+ -+ index = nla_get_u8(tb2[MTK_VENDOR_ATTR_AMNT_SET_INDEX]); -+ nla_for_each_nested(cur, tb2[MTK_VENDOR_ATTR_AMNT_SET_MACADDR], rem) { -+ mac_addr[i++] = nla_get_u8(cur); -+ } -+ -+ return mt7915_vendor_amnt_set_addr(phy, index, mac_addr); -+} -+ -+static int -+mt7915_amnt_dump(struct mt7915_phy *phy, struct sk_buff *skb, -+ u8 amnt_idx, int *attrtype) -+{ -+ struct mt7915_air_monitor_entry *entry = -+ &phy->amnt_ctrl.entry[amnt_idx]; -+ struct mt7915_amnt_data data; -+ u32 last_seen = 0; -+ -+ if (entry->enable == 0) -+ return 0; -+ -+ last_seen = jiffies_to_msecs(jiffies - entry->last_seen); -+ -+ data.idx = amnt_idx; -+ ether_addr_copy(data.addr, entry->addr); -+ data.rssi[0] = entry->rssi[0]; -+ data.rssi[1] = entry->rssi[1]; -+ data.rssi[2] = entry->rssi[2]; -+ data.rssi[3] = entry->rssi[3]; -+ data.last_seen = last_seen; -+ -+ nla_put(skb, (*attrtype)++, sizeof(struct mt7915_amnt_data), &data); -+ -+ return 1; -+} -+ -+static int -+mt7915_vendor_amnt_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct nlattr *tb1[NUM_MTK_VENDOR_ATTRS_AMNT_CTRL]; -+ struct nlattr *tb2[NUM_MTK_VENDOR_ATTRS_AMNT_DUMP]; -+ void *a, *b; -+ int err = 0, attrtype = 0, i, len = 0; -+ u8 amnt_idx; -+ -+ if (*storage == 1) -+ return -ENOENT; -+ *storage = 1; -+ -+ err = nla_parse(tb1, MTK_VENDOR_ATTR_AMNT_CTRL_MAX, data, data_len, -+ amnt_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (!tb1[MTK_VENDOR_ATTR_AMNT_CTRL_DUMP]) -+ return -EINVAL; -+ -+ err = nla_parse_nested(tb2, MTK_VENDOR_ATTR_AMNT_DUMP_MAX, -+ tb1[MTK_VENDOR_ATTR_AMNT_CTRL_DUMP], -+ amnt_dump_policy, NULL); -+ if (err) -+ return err; -+ -+ if (!tb2[MTK_VENDOR_ATTR_AMNT_DUMP_INDEX]) -+ return -EINVAL; -+ -+ amnt_idx = nla_get_u8(tb2[MTK_VENDOR_ATTR_AMNT_DUMP_INDEX]); -+ -+ a = nla_nest_start(skb, MTK_VENDOR_ATTR_AMNT_CTRL_DUMP); -+ b = nla_nest_start(skb, MTK_VENDOR_ATTR_AMNT_DUMP_RESULT); -+ -+ if (amnt_idx != 0xff) { -+ len += mt7915_amnt_dump(phy, skb, amnt_idx, &attrtype); -+ } else { -+ for (i = 0; i < MT7915_AIR_MONITOR_MAX_ENTRY; i++) { -+ len += mt7915_amnt_dump(phy, skb, i, &attrtype); -+ } -+ } -+ -+ nla_nest_end(skb, b); -+ -+ nla_put_u8(skb, MTK_VENDOR_ATTR_AMNT_DUMP_LEN, len); -+ -+ nla_nest_end(skb, a); -+ -+ return len + 1; -+} -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -460,6 +809,18 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .dumpit = mt7915_vendor_csi_ctrl_dump, - .policy = csi_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_CSI_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_amnt_ctrl, -+ .dumpit = mt7915_vendor_amnt_ctrl_dump, -+ .policy = amnt_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_AMNT_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index e1f5fd3..1863eee 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -5,6 +5,7 @@ - #define MTK_NL80211_VENDOR_ID 0x0ce7 - - enum mtk_nl80211_vendor_subcmds { -+ MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL = 0xae, - MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL = 0xc2, - }; - -@@ -60,4 +61,41 @@ enum mtk_vendor_attr_csi_data { - NUM_MTK_VENDOR_ATTRS_CSI_DATA - 1 - }; - -+enum mtk_vendor_attr_mnt_ctrl { -+ MTK_VENDOR_ATTR_AMNT_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_AMNT_CTRL_SET, -+ MTK_VENDOR_ATTR_AMNT_CTRL_DUMP, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_AMNT_CTRL, -+ MTK_VENDOR_ATTR_AMNT_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_AMNT_CTRL - 1 -+}; -+ -+enum mtk_vendor_attr_mnt_set { -+ MTK_VENDOR_ATTR_AMNT_SET_UNSPEC, -+ -+ MTK_VENDOR_ATTR_AMNT_SET_INDEX, -+ MTK_VENDOR_ATTR_AMNT_SET_MACADDR, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_AMNT_SET, -+ MTK_VENDOR_ATTR_AMNT_SET_MAX = -+ NUM_MTK_VENDOR_ATTRS_AMNT_SET - 1 -+}; -+ -+enum mtk_vendor_attr_mnt_dump { -+ MTK_VENDOR_ATTR_AMNT_DUMP_UNSPEC, -+ -+ MTK_VENDOR_ATTR_AMNT_DUMP_INDEX, -+ MTK_VENDOR_ATTR_AMNT_DUMP_LEN, -+ MTK_VENDOR_ATTR_AMNT_DUMP_RESULT, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_AMNT_DUMP, -+ MTK_VENDOR_ATTR_AMNT_DUMP_MAX = -+ NUM_MTK_VENDOR_ATTRS_AMNT_DUMP - 1 -+}; -+ - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1003-wifi-mt76-mt7915-add-support-for-muru_onoff-via.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1003-wifi-mt76-mt7915-add-support-for-muru_onoff-via.patch deleted file mode 100644 index d7b9f550c..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1003-wifi-mt76-mt7915-add-support-for-muru_onoff-via.patch +++ /dev/null @@ -1,140 +0,0 @@ -From a0249520b2ff800bcff8ed1f8531dddccc97d29b Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Tue, 4 Apr 2023 02:23:57 +0800 -Subject: [PATCH 1003/1053] wifi: mt76: mt7915: add support for muru_onoff via - ---- - mt7915/init.c | 1 + - mt7915/mcu.c | 10 ++++++++-- - mt7915/mcu.h | 6 ++++++ - mt7915/mt7915.h | 2 ++ - mt7915/mtk_debugfs.c | 33 +++++++++++++++++++++++++++++++++ - 5 files changed, 50 insertions(+), 2 deletions(-) - -diff --git a/mt7915/init.c b/mt7915/init.c -index 6d23dfd..fc42974 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -363,6 +363,7 @@ mt7915_init_wiphy(struct mt7915_phy *phy) - IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; - - phy->slottime = 9; -+ phy->muru_onoff = OFDMA_DL | OFDMA_UL | MUMIMO_DL | MUMIMO_UL; - - hw->sta_data_size = sizeof(struct mt7915_sta); - hw->vif_data_size = sizeof(struct mt7915_vif); -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 9baf52b..6f73a7b 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -965,6 +965,7 @@ mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb, - { - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; -+ struct mt7915_phy *phy = mvif->phy; - struct sta_rec_muru *muru; - struct tlv *tlv; - -@@ -976,13 +977,18 @@ mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb, - - muru = (struct sta_rec_muru *)tlv; - -- muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer || -+ muru->cfg.mimo_dl_en = (mvif->cap.he_mu_ebfer || - mvif->cap.vht_mu_ebfer || -- mvif->cap.vht_mu_ebfee; -+ mvif->cap.vht_mu_ebfee) && -+ !!(phy->muru_onoff & MUMIMO_DL); - if (!is_mt7915(&dev->mt76)) - muru->cfg.mimo_ul_en = true; - muru->cfg.ofdma_dl_en = true; - -+ muru->cfg.mimo_ul_en = !!(phy->muru_onoff & MUMIMO_UL); -+ muru->cfg.ofdma_dl_en = !!(phy->muru_onoff & OFDMA_DL); -+ muru->cfg.ofdma_ul_en = !!(phy->muru_onoff & OFDMA_UL); -+ - if (sta->deflink.vht_cap.vht_supported) - muru->mimo_dl.vht_mu_bfee = - !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index f32d525..f44146e 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -678,4 +678,10 @@ enum CSI_CHAIN_TYPE { - }; - #endif - -+/* MURU */ -+#define OFDMA_DL BIT(0) -+#define OFDMA_UL BIT(1) -+#define MUMIMO_DL BIT(2) -+#define MUMIMO_UL BIT(3) -+ - #endif -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 35ccfa3..e21a101 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -289,6 +289,8 @@ struct mt7915_phy { - u32 rx_ampdu_ts; - u32 ampdu_ref; - -+ u8 muru_onoff; -+ - struct mt76_mib_stats mib; - struct mt76_channel_state state_ts; - -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index d2b5b7d..f521740 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -2554,6 +2554,38 @@ static int mt7915_token_txd_read(struct seq_file *s, void *data) - return 0; - } - -+static int mt7915_muru_onoff_get(void *data, u64 *val) -+{ -+ struct mt7915_phy *phy = data; -+ -+ *val = phy->muru_onoff; -+ -+ printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n", -+ !!(phy->muru_onoff & MUMIMO_UL), -+ !!(phy->muru_onoff & MUMIMO_DL), -+ !!(phy->muru_onoff & OFDMA_UL), -+ !!(phy->muru_onoff & OFDMA_DL)); -+ -+ return 0; -+} -+ -+static int mt7915_muru_onoff_set(void *data, u64 val) -+{ -+ struct mt7915_phy *phy = data; -+ -+ if (val > 15) { -+ printk("Wrong value! The value is between 0 ~ 15.\n"); -+ goto exit; -+ } -+ -+ phy->muru_onoff = val; -+exit: -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_onoff, mt7915_muru_onoff_get, -+ mt7915_muru_onoff_set, "%llx\n"); -+ - static int mt7915_amsduinfo_read(struct seq_file *s, void *data) - { - struct mt7915_dev *dev = dev_get_drvdata(s->private); -@@ -3680,6 +3712,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - - mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); - -+ debugfs_create_file("muru_onoff", 0600, dir, phy, &fops_muru_onoff); - debugfs_create_file("fw_debug_module", 0600, dir, dev, - &fops_fw_debug_module); - debugfs_create_file("fw_debug_level", 0600, dir, dev, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1004-wifi-mt76-mt7915-certification-patches.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1004-wifi-mt76-mt7915-certification-patches.patch deleted file mode 100644 index 6f8ce965f..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1004-wifi-mt76-mt7915-certification-patches.patch +++ /dev/null @@ -1,1137 +0,0 @@ -From e98f4b4ccc941705436b9cdfbd22b2e72b2ef055 Mon Sep 17 00:00:00 2001 -From: MeiChia Chiu -Date: Mon, 6 Jun 2022 20:15:51 +0800 -Subject: [PATCH] wifi: mt76: mt7915: certification patches - ---- - mt76_connac_mcu.h | 1 + - mt7915/mac.c | 23 +++ - mt7915/main.c | 13 +- - mt7915/mcu.c | 466 +++++++++++++++++++++++++++++++++++++++++++ - mt7915/mcu.h | 207 ++++++++++++++++++- - mt7915/mt7915.h | 13 ++ - mt7915/mtk_debugfs.c | 7 +- - mt7915/vendor.c | 188 +++++++++++++++++ - mt7915/vendor.h | 42 ++++ - 9 files changed, 955 insertions(+), 5 deletions(-) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 3aa4e59..d62b7df 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1246,6 +1246,7 @@ enum { - /* for vendor csi and air monitor */ - MCU_EXT_CMD_SMESH_CTRL = 0xae, - MCU_EXT_CMD_SET_QOS_MAP = 0xb4, -+ MCU_EXT_CMD_CERT_CFG = 0xb7, - MCU_EXT_CMD_CSI_CTRL = 0xc2, - }; - -diff --git a/mt7915/mac.c b/mt7915/mac.c -index e38905a..43cff27 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -8,6 +8,7 @@ - #include "../dma.h" - #include "mac.h" - #include "mcu.h" -+#include "vendor.h" - - #define to_rssi(field, rcpi) ((FIELD_GET(field, rcpi) - 220) / 2) - -@@ -2002,6 +2003,21 @@ static void mt7915_mac_sta_stats_work(struct mt7915_phy *phy) - spin_unlock_bh(&phy->stats_lock); - } - -+#ifdef CONFIG_MTK_VENDOR -+void mt7915_capi_sta_rc_work(void *data, struct ieee80211_sta *sta) -+{ -+ struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; -+ struct mt7915_dev *dev = msta->vif->phy->dev; -+ u32 *changed = data; -+ -+ spin_lock_bh(&dev->mt76.sta_poll_lock); -+ msta->changed |= *changed; -+ if (list_empty(&msta->rc_list)) -+ list_add_tail(&msta->rc_list, &dev->sta_rc_list); -+ spin_unlock_bh(&dev->mt76.sta_poll_lock); -+} -+#endif -+ - void mt7915_mac_sta_rc_work(struct work_struct *work) - { - struct mt7915_dev *dev = container_of(work, struct mt7915_dev, rc_work); -@@ -2024,6 +2040,13 @@ void mt7915_mac_sta_rc_work(struct work_struct *work) - sta = container_of((void *)msta, struct ieee80211_sta, drv_priv); - vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); - -+#ifdef CONFIG_MTK_VENDOR -+ if (changed & CAPI_RFEATURE_CHANGED) { -+ mt7915_mcu_set_rfeature_starec(&changed, dev, vif, sta); -+ spin_lock_bh(&dev->mt76.sta_poll_lock); -+ continue; -+ } -+#endif - if (changed & (IEEE80211_RC_SUPP_RATES_CHANGED | - IEEE80211_RC_NSS_CHANGED | - IEEE80211_RC_BW_CHANGED)) -diff --git a/mt7915/main.c b/mt7915/main.c -index 847c74b..8835cda 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -771,6 +771,9 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, - struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - bool ext_phy = mvif->phy != &dev->phy; -+#ifdef CONFIG_MTK_VENDOR -+ struct mt7915_phy *phy = ext_phy ? mt7915_ext_phy(dev) : &dev->phy; -+#endif - int ret, idx; - u32 addr; - -@@ -803,7 +806,15 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, - #ifdef CONFIG_MTK_VENDOR - mt7915_vendor_amnt_sta_remove(mvif->phy, sta); - #endif -- return mt7915_mcu_add_rate_ctrl(dev, vif, sta, false); -+ ret = mt7915_mcu_add_rate_ctrl(dev, vif, sta, false); -+ if (ret) -+ return ret; -+ -+#ifdef CONFIG_MTK_VENDOR -+ if (phy->muru_onoff & MUMIMO_DL_CERT) -+ mt7915_mcu_set_mimo(phy, 0); -+#endif -+ return 0; - } - - void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index b38c3d1..b50a2c2 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -4402,6 +4402,472 @@ mt7915_mcu_report_csi(struct mt7915_dev *dev, struct sk_buff *skb) - - return 0; - } -+void mt7915_set_wireless_vif(void *data, u8 *mac, struct ieee80211_vif *vif) -+{ -+ u8 mode, val; -+ struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; -+ struct mt7915_phy *phy = mvif->phy; -+ -+ mode = FIELD_GET(RATE_CFG_MODE, *((u32 *)data)); -+ val = FIELD_GET(RATE_CFG_VAL, *((u32 *)data)); -+ -+ switch (mode) { -+ case RATE_PARAM_FIXED_OFDMA: -+ if (val == 3) /* DL 20 and 80 */ -+ phy->muru_onoff = OFDMA_DL; /* Enable OFDMA DL only */ -+ else -+ phy->muru_onoff = val; -+ break; -+ case RATE_PARAM_FIXED_MIMO: -+ if (val == 0) -+ phy->muru_onoff = MUMIMO_DL_CERT | MUMIMO_DL; -+ break; -+ } -+} -+ -+void mt7915_mcu_set_rfeature_starec(void *data, struct mt7915_dev *dev, -+ struct ieee80211_vif *vif, struct ieee80211_sta *sta) -+{ -+ struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; -+ struct mt7915_vif *mvif = msta->vif; -+ struct sta_rec_ra_fixed *ra; -+ struct sk_buff *skb; -+ struct tlv *tlv; -+ u8 mode, val; -+ int len = sizeof(struct sta_req_hdr) + sizeof(*ra); -+ -+ mode = FIELD_GET(RATE_CFG_MODE, *((u32 *)data)); -+ val = FIELD_GET(RATE_CFG_VAL, *((u32 *)data)); -+ -+ skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, &msta->wcid, len); -+ if (IS_ERR(skb)) -+ return; -+ -+ tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); -+ ra = (struct sta_rec_ra_fixed *)tlv; -+ -+ switch (mode) { -+ case RATE_PARAM_FIXED_GI: -+ ra->field = cpu_to_le32(RATE_PARAM_FIXED_GI); -+ ra->phy.sgi = val * 85; -+ break; -+ case RATE_PARAM_FIXED_HE_LTF: -+ ra->field = cpu_to_le32(RATE_PARAM_FIXED_HE_LTF); -+ ra->phy.he_ltf = val * 85; -+ break; -+ case RATE_PARAM_FIXED_MCS: -+ ra->field = cpu_to_le32(RATE_PARAM_FIXED_MCS); -+ ra->phy.mcs = val; -+ break; -+ } -+ -+ mt76_mcu_skb_send_msg(&dev->mt76, skb, -+ MCU_EXT_CMD(STA_REC_UPDATE), true); -+} -+ -+int mt7915_mcu_set_mu_prot_frame_th(struct mt7915_phy *phy, u32 val) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ __le32 threshold; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_PROT_FRAME_THR), -+ .threshold = val, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+} -+ -+int mt7915_mcu_set_mu_edca(struct mt7915_phy *phy, u8 val) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ u8 override; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_CERT_MU_EDCA_OVERRIDE), -+ .override = val, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+} -+ -+int mt7915_mcu_set_muru_cfg(struct mt7915_phy *phy, struct mt7915_muru *muru) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ struct mt7915_muru muru; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_MANUAL_CFG), -+ }; -+ -+ memcpy(&req.muru, muru, sizeof(struct mt7915_muru)); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+} -+ -+int mt7915_set_muru_cfg(struct mt7915_phy *phy, u8 action, u8 val) -+{ -+ struct mt7915_muru muru; -+ struct mt7915_muru_dl *dl = &muru.dl; -+ struct mt7915_muru_ul *ul = &muru.ul; -+ struct mt7915_muru_comm *comm = &muru.comm; -+ -+ memset(&muru, 0, sizeof(muru)); -+ -+ switch (action) { -+ case MURU_DL_USER_CNT: -+ dl->user_num = val; -+ comm->ppdu_format |= MURU_PPDU_HE_MU; -+ comm->sch_type |= MURU_OFDMA_SCH_TYPE_DL; -+ muru.cfg_comm = cpu_to_le32(MURU_COMM_SET); -+ muru.cfg_dl = cpu_to_le32(MURU_USER_CNT); -+ return mt7915_mcu_set_muru_cfg(phy, &muru); -+ case MURU_UL_USER_CNT: -+ ul->user_num = val; -+ comm->ppdu_format |= MURU_PPDU_HE_TRIG; -+ comm->sch_type |= MURU_OFDMA_SCH_TYPE_UL; -+ muru.cfg_comm = cpu_to_le32(MURU_COMM_SET); -+ muru.cfg_ul = cpu_to_le32(MURU_USER_CNT); -+ return mt7915_mcu_set_muru_cfg(phy, &muru); -+ default: -+ return 0; -+ } -+} -+ -+void mt7915_mcu_set_ppdu_tx_type(struct mt7915_phy *phy, u8 ppdu_type) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ u8 enable_su; -+ } __packed ppdu_type_req = { -+ .cmd = cpu_to_le32(MURU_SET_SUTX), -+ }; -+ -+ switch(ppdu_type) { -+ case CAPI_SU: -+ ppdu_type_req.enable_su = 1; -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), -+ &ppdu_type_req, sizeof(ppdu_type_req), false); -+ mt7915_set_muru_cfg(phy, MURU_DL_USER_CNT, 0); -+ break; -+ case CAPI_MU: -+ ppdu_type_req.enable_su = 0; -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), -+ &ppdu_type_req, sizeof(ppdu_type_req), false); -+ break; -+ default: -+ break; -+ } -+} -+ -+void mt7915_mcu_set_nusers_ofdma(struct mt7915_phy *phy, u8 type, u8 ofdma_user_cnt) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ u8 enable_su; -+ } __packed nusers_ofdma_req = { -+ .cmd = cpu_to_le32(MURU_SET_SUTX), -+ .enable_su = 0, -+ }; -+ -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), -+ &nusers_ofdma_req, sizeof(nusers_ofdma_req), false); -+ -+ mt7915_mcu_set_mu_dl_ack_policy(phy, MU_DL_ACK_POLICY_SU_BAR); -+ mt7915_mcu_set_mu_prot_frame_th(phy, 9999); -+ switch(type) { -+ case MURU_UL_USER_CNT: -+ mt7915_set_muru_cfg(phy, MURU_UL_USER_CNT, ofdma_user_cnt); -+ break; -+ case MURU_DL_USER_CNT: -+ default: -+ mt7915_set_muru_cfg(phy, MURU_DL_USER_CNT, ofdma_user_cnt); -+ break; -+ } -+} -+ -+void mt7915_mcu_set_mimo(struct mt7915_phy *phy, u8 direction) -+{ -+#define MUMIMO_SET_FIXED_RATE 10 -+#define MUMIMO_SET_FIXED_GRP_RATE 11 -+#define MUMIMO_SET_FORCE_MU 12 -+ struct mt7915_dev *dev = phy->dev; -+ struct cfg80211_chan_def *chandef = &phy->mt76->chandef; -+ struct { -+ __le32 cmd; -+ __le16 sub_cmd; -+ __le16 disable_ra; -+ } __packed fixed_rate_req = { -+ .cmd = cpu_to_le32(MURU_SET_MUMIMO_CTRL), -+ .sub_cmd = cpu_to_le16(MUMIMO_SET_FIXED_RATE), -+ .disable_ra = cpu_to_le16(1), -+ }; -+ struct { -+ __le32 cmd; -+ __le32 sub_cmd; -+ struct { -+ u8 user_cnt:2; -+ u8 rsv:2; -+ u8 ns0:1; -+ u8 ns1:1; -+ u8 ns2:1; -+ u8 ns3:1; -+ -+ __le16 wlan_id_user0; -+ __le16 wlan_id_user1; -+ __le16 wlan_id_user2; -+ __le16 wlan_id_user3; -+ -+ u8 dl_mcs_user0:4; -+ u8 dl_mcs_user1:4; -+ u8 dl_mcs_user2:4; -+ u8 dl_mcs_user3:4; -+ -+ u8 ul_mcs_user0:4; -+ u8 ul_mcs_user1:4; -+ u8 ul_mcs_user2:4; -+ u8 ul_mcs_user3:4; -+ -+ u8 ru_alloc; -+ u8 cap; -+ u8 gi; -+ u8 dl_ul; -+ } grp_rate_conf; -+ } fixed_grp_rate_req = { -+ .cmd = cpu_to_le32(MURU_SET_MUMIMO_CTRL), -+ .sub_cmd = cpu_to_le32(MUMIMO_SET_FIXED_GRP_RATE), -+ .grp_rate_conf = { -+ .user_cnt = 1, -+ .ru_alloc = 134, -+ .gi = 0, -+ .cap = 1, -+ .dl_ul = 0, -+ .wlan_id_user0 = cpu_to_le16(1), -+ .dl_mcs_user0 = 4, -+ .wlan_id_user1 = cpu_to_le16(2), -+ .dl_mcs_user1 = 4, -+ }, -+ }; -+ struct { -+ __le32 cmd; -+ __le16 sub_cmd; -+ bool force_mu; -+ } __packed force_mu_req = { -+ .cmd = cpu_to_le32(MURU_SET_MUMIMO_CTRL), -+ .sub_cmd = cpu_to_le16(MUMIMO_SET_FORCE_MU), -+ .force_mu = true, -+ }; -+ -+ switch (chandef->width) { -+ case NL80211_CHAN_WIDTH_20_NOHT: -+ case NL80211_CHAN_WIDTH_20: -+ fixed_grp_rate_req.grp_rate_conf.ru_alloc = 122; -+ break; -+ case NL80211_CHAN_WIDTH_80: -+ default: -+ break; -+ } -+ -+ mt7915_mcu_set_mu_dl_ack_policy(phy, MU_DL_ACK_POLICY_SU_BAR); -+ -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), -+ &fixed_rate_req, sizeof(fixed_rate_req), false); -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), -+ &fixed_grp_rate_req, sizeof(fixed_grp_rate_req), false); -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), -+ &force_mu_req, sizeof(force_mu_req), false); -+} -+ -+void mt7915_mcu_set_dynalgo(struct mt7915_phy *phy, u8 enable) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ u8 enable; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_20M_DYN_ALGO), -+ .enable = enable, -+ }; -+ -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), -+ &req, sizeof(req), false); -+} -+ -+void mt7915_mcu_set_cert(struct mt7915_phy *phy, u8 type) -+{ -+#define CFGINFO_CERT_CFG 4 -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ struct basic_info{ -+ u8 dbdc_idx; -+ u8 rsv[3]; -+ __le32 tlv_num; -+ u8 tlv_buf[0]; -+ } hdr; -+ struct cert_cfg{ -+ __le16 tag; -+ __le16 length; -+ u8 cert_program; -+ u8 rsv[3]; -+ } tlv; -+ } req = { -+ .hdr = { -+ .dbdc_idx = phy != &dev->phy, -+ .tlv_num = cpu_to_le32(1), -+ }, -+ .tlv = { -+ .tag = cpu_to_le16(CFGINFO_CERT_CFG), -+ .length = cpu_to_le16(sizeof(struct cert_cfg)), -+ .cert_program = type, /* 1: CAPI Enable */ -+ } -+ }; -+ -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(CERT_CFG), -+ &req, sizeof(req), false); -+} -+ -+void mt7915_mcu_set_bypass_smthint(struct mt7915_phy *phy, u8 val) -+{ -+#define BF_CMD_CFG_PHY 36 -+#define BF_PHY_SMTH_INTL_BYPASS 0 -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 cmd_category_id; -+ u8 action; -+ u8 band_idx; -+ u8 smthintbypass; -+ u8 rsv[12]; -+ } req = { -+ .cmd_category_id = BF_CMD_CFG_PHY, -+ .action = BF_PHY_SMTH_INTL_BYPASS, -+ .band_idx = phy != &dev->phy, -+ .smthintbypass = val, -+ }; -+ -+ mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), -+ &req, sizeof(req), false); -+} -+ -+int mt7915_mcu_set_bsrp_ctrl(struct mt7915_phy *phy, u16 interval, -+ u16 ru_alloc, u32 ppdu_dur, u8 trig_flow, u8 ext_cmd) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ __le16 bsrp_interval; -+ __le16 bsrp_ru_alloc; -+ __le32 ppdu_duration; -+ u8 trigger_flow; -+ u8 ext_cmd_bsrp; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_BSRP_CTRL), -+ .bsrp_interval = cpu_to_le16(interval), -+ .bsrp_ru_alloc = cpu_to_le16(ru_alloc), -+ .ppdu_duration = cpu_to_le32(ppdu_dur), -+ .trigger_flow = trig_flow, -+ .ext_cmd_bsrp = ext_cmd, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+} -+ -+int mt7915_mcu_set_mu_dl_ack_policy(struct mt7915_phy *phy, u8 policy_num) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ u8 ack_policy; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_MU_DL_ACK_POLICY), -+ .ack_policy = policy_num, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+} -+ -+int mt7915_mcu_set_txbf_sound_info(struct mt7915_phy *phy, u8 action, -+ u8 v1, u8 v2, u8 v3) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 cmd_category_id; -+ u8 action; -+ u8 read_clear; -+ u8 vht_opt; -+ u8 he_opt; -+ u8 glo_opt; -+ __le16 wlan_idx; -+ u8 sound_interval; -+ u8 sound_stop; -+ u8 max_sound_sta; -+ u8 tx_time; -+ u8 mcs; -+ bool ldpc; -+ u8 inf; -+ u8 rsv; -+ } __packed req = { -+ .cmd_category_id = BF_CMD_TXSND_INFO, -+ .action = action, -+ }; -+ -+ switch (action) { -+ case BF_SND_CFG_OPT: -+ req.vht_opt = v1; -+ req.he_opt = v2; -+ req.glo_opt = v3; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), false); -+} -+ -+int mt7915_mcu_set_rfeature_trig_type(struct mt7915_phy *phy, u8 enable, u8 trig_type) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ int ret = 0; -+ struct { -+ __le32 cmd; -+ u8 trig_type; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_TRIG_TYPE), -+ .trig_type = trig_type, -+ }; -+ -+ if (enable) { -+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+ if (ret) -+ return ret; -+ } -+ -+ switch (trig_type) { -+ case CAPI_BASIC: -+ return mt7915_mcu_set_bsrp_ctrl(phy, 5, 67, 0, 0, enable); -+ case CAPI_BRP: -+ return mt7915_mcu_set_txbf_sound_info(phy, BF_SND_CFG_OPT, -+ 0x0, 0x0, 0x1b); -+ case CAPI_MU_BAR: -+ return mt7915_mcu_set_mu_dl_ack_policy(phy, -+ MU_DL_ACK_POLICY_MU_BAR); -+ case CAPI_BSRP: -+ return mt7915_mcu_set_bsrp_ctrl(phy, 5, 67, 4, 0, enable); -+ default: -+ return 0; -+ } -+} - #endif - - #ifdef MTK_DEBUG -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index f44146e..eef2fc0 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -486,10 +486,14 @@ enum { - RATE_PARAM_FIXED = 3, - RATE_PARAM_MMPS_UPDATE = 5, - RATE_PARAM_FIXED_HE_LTF = 7, -- RATE_PARAM_FIXED_MCS, -+ RATE_PARAM_FIXED_MCS = 8, - RATE_PARAM_FIXED_GI = 11, - RATE_PARAM_AUTO = 20, - RATE_PARAM_SPE_UPDATE = 22, -+#ifdef CONFIG_MTK_VENDOR -+ RATE_PARAM_FIXED_MIMO = 30, -+ RATE_PARAM_FIXED_OFDMA = 31, -+#endif - }; - - #define RATE_CFG_MCS GENMASK(3, 0) -@@ -501,6 +505,9 @@ enum { - #define RATE_CFG_PHY_TYPE GENMASK(27, 24) - #define RATE_CFG_HE_LTF GENMASK(31, 28) - -+#define RATE_CFG_MODE GENMASK(15, 8) -+#define RATE_CFG_VAL GENMASK(7, 0) -+ - enum { - TX_POWER_LIMIT_ENABLE, - TX_POWER_LIMIT_TABLE = 0x4, -@@ -683,5 +690,203 @@ enum CSI_CHAIN_TYPE { - #define OFDMA_UL BIT(1) - #define MUMIMO_DL BIT(2) - #define MUMIMO_UL BIT(3) -+#define MUMIMO_DL_CERT BIT(4) -+ -+#ifdef CONFIG_MTK_VENDOR -+struct mt7915_muru_comm { -+ u8 ppdu_format; -+ u8 sch_type; -+ u8 band; -+ u8 wmm_idx; -+ u8 spe_idx; -+ u8 proc_type; -+}; -+ -+struct mt7915_muru_dl { -+ u8 user_num; -+ u8 tx_mode; -+ u8 bw; -+ u8 gi; -+ u8 ltf; -+ /* sigB */ -+ u8 mcs; -+ u8 dcm; -+ u8 cmprs; -+ -+ u8 ru[8]; -+ u8 c26[2]; -+ u8 ack_policy; -+ -+ struct { -+ __le16 wlan_idx; -+ u8 ru_alloc_seg; -+ u8 ru_idx; -+ u8 ldpc; -+ u8 nss; -+ u8 mcs; -+ u8 mu_group_idx; -+ u8 vht_groud_id; -+ u8 vht_up; -+ u8 he_start_stream; -+ u8 he_mu_spatial; -+ u8 ack_policy; -+ __le16 tx_power_alpha; -+ } usr[16]; -+}; -+ -+struct mt7915_muru_ul { -+ u8 user_num; -+ -+ /* UL TX */ -+ u8 trig_type; -+ __le16 trig_cnt; -+ __le16 trig_intv; -+ u8 bw; -+ u8 gi_ltf; -+ __le16 ul_len; -+ u8 pad; -+ u8 trig_ta[ETH_ALEN]; -+ u8 ru[8]; -+ u8 c26[2]; -+ -+ struct { -+ __le16 wlan_idx; -+ u8 ru_alloc; -+ u8 ru_idx; -+ u8 ldpc; -+ u8 nss; -+ u8 mcs; -+ u8 target_rssi; -+ __le32 trig_pkt_size; -+ } usr[16]; -+ -+ /* HE TB RX Debug */ -+ __le32 rx_hetb_nonsf_en_bitmap; -+ __le32 rx_hetb_cfg[2]; -+ -+ /* DL TX */ -+ u8 ba_type; -+}; -+ -+struct mt7915_muru { -+ __le32 cfg_comm; -+ __le32 cfg_dl; -+ __le32 cfg_ul; -+ -+ struct mt7915_muru_comm comm; -+ struct mt7915_muru_dl dl; -+ struct mt7915_muru_ul ul; -+}; -+ -+#define MURU_PPDU_HE_TRIG BIT(2) -+#define MURU_PPDU_HE_MU BIT(3) -+ -+#define MURU_OFDMA_SCH_TYPE_DL BIT(0) -+#define MURU_OFDMA_SCH_TYPE_UL BIT(1) -+ -+/* Common Config */ -+#define MURU_COMM_PPDU_FMT BIT(0) -+#define MURU_COMM_SCH_TYPE BIT(1) -+#define MURU_COMM_SET (MURU_COMM_PPDU_FMT | MURU_COMM_SCH_TYPE) -+/* DL&UL User config*/ -+#define MURU_USER_CNT BIT(4) -+ -+enum { -+ CAPI_SU, -+ CAPI_MU, -+ CAPI_ER_SU, -+ CAPI_TB, -+ CAPI_LEGACY -+}; -+ -+enum { -+ CAPI_BASIC, -+ CAPI_BRP, -+ CAPI_MU_BAR, -+ CAPI_MU_RTS, -+ CAPI_BSRP, -+ CAPI_GCR_MU_BAR, -+ CAPI_BQRP, -+ CAPI_NDP_FRP -+}; -+ -+enum { -+ MURU_SET_BSRP_CTRL = 1, -+ MURU_SET_SUTX = 16, -+ MURU_SET_MUMIMO_CTRL = 17, -+ MURU_SET_MANUAL_CFG = 100, -+ MURU_SET_MU_DL_ACK_POLICY = 200, -+ MURU_SET_TRIG_TYPE = 201, -+ MURU_SET_20M_DYN_ALGO = 202, -+ MURU_SET_PROT_FRAME_THR = 204, -+ MURU_SET_CERT_MU_EDCA_OVERRIDE = 205, -+}; -+ -+enum { -+ MU_DL_ACK_POLICY_MU_BAR = 3, -+ MU_DL_ACK_POLICY_TF_FOR_ACK = 4, -+ MU_DL_ACK_POLICY_SU_BAR = 5, -+}; -+ -+enum { -+ BF_SOUNDING_OFF = 0, -+ BF_SOUNDING_ON, -+ BF_DATA_PACKET_APPLY, -+ BF_PFMU_MEM_ALLOCATE, -+ BF_PFMU_MEM_RELEASE, -+ BF_PFMU_TAG_READ, -+ BF_PFMU_TAG_WRITE, -+ BF_PROFILE_READ, -+ BF_PROFILE_WRITE, -+ BF_PN_READ, -+ BF_PN_WRITE, -+ BF_PFMU_MEM_ALLOC_MAP_READ, -+ BF_AID_SET, -+ BF_STA_REC_READ, -+ BF_PHASE_CALIBRATION, -+ BF_IBF_PHASE_COMP, -+ BF_LNA_GAIN_CONFIG, -+ BF_PROFILE_WRITE_20M_ALL, -+ BF_APCLIENT_CLUSTER, -+ BF_AWARE_CTRL, -+ BF_HW_ENABLE_STATUS_UPDATE, -+ BF_REPT_CLONED_STA_TO_NORMAL_STA, -+ BF_GET_QD, -+ BF_BFEE_HW_CTRL, -+ BF_PFMU_SW_TAG_WRITE, -+ BF_MOD_EN_CTRL, -+ BF_DYNSND_EN_INTR, -+ BF_DYNSND_CFG_DMCS_TH, -+ BF_DYNSND_EN_PFID_INTR, -+ BF_CONFIG, -+ BF_PFMU_DATA_WRITE, -+ BF_FBRPT_DBG_INFO_READ, -+ BF_CMD_TXSND_INFO, -+ BF_CMD_PLY_INFO, -+ BF_CMD_MU_METRIC, -+ BF_CMD_TXCMD, -+ BF_CMD_CFG_PHY, -+ BF_CMD_SND_CNT, -+ BF_CMD_MAX -+}; -+ -+enum { -+ BF_SND_READ_INFO = 0, -+ BF_SND_CFG_OPT, -+ BF_SND_CFG_INTV, -+ BF_SND_STA_STOP, -+ BF_SND_CFG_MAX_STA, -+ BF_SND_CFG_BFRP, -+ BF_SND_CFG_INF -+}; -+ -+enum { -+ MURU_UPDATE = 0, -+ MURU_DL_USER_CNT, -+ MURU_UL_USER_CNT, -+ MURU_DL_INIT, -+ MURU_UL_INIT, -+}; -+#endif - - #endif -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 30fb064..136e89f 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -733,6 +733,19 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, - bool pci, int *irq); - - #ifdef CONFIG_MTK_VENDOR -+void mt7915_capi_sta_rc_work(void *data, struct ieee80211_sta *sta); -+void mt7915_set_wireless_vif(void *data, u8 *mac, struct ieee80211_vif *vif); -+void mt7915_mcu_set_rfeature_starec(void *data, struct mt7915_dev *dev, -+ struct ieee80211_vif *vif, struct ieee80211_sta *sta); -+int mt7915_mcu_set_rfeature_trig_type(struct mt7915_phy *phy, u8 enable, u8 trig_type); -+int mt7915_mcu_set_mu_dl_ack_policy(struct mt7915_phy *phy, u8 policy_num); -+void mt7915_mcu_set_ppdu_tx_type(struct mt7915_phy *phy, u8 ppdu_type); -+void mt7915_mcu_set_nusers_ofdma(struct mt7915_phy *phy, u8 type, u8 ofdma_user_cnt); -+void mt7915_mcu_set_mimo(struct mt7915_phy *phy, u8 direction); -+void mt7915_mcu_set_dynalgo(struct mt7915_phy *phy, u8 enable); -+int mt7915_mcu_set_mu_edca(struct mt7915_phy *phy, u8 val); -+void mt7915_mcu_set_cert(struct mt7915_phy *phy, u8 type); -+void mt7915_mcu_set_bypass_smthint(struct mt7915_phy *phy, u8 val); - void mt7915_vendor_register(struct mt7915_phy *phy); - int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, - u8 cfg, u8 v1, u32 v2, u8 *mac_addr, u32 sta_interval); -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 2f55a84..84f8fae 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -2560,7 +2560,8 @@ static int mt7915_muru_onoff_get(void *data, u64 *val) - - *val = phy->muru_onoff; - -- printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n", -+ printk("cert mumimo dl:%d, normal mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n", -+ !!(phy->muru_onoff & MUMIMO_DL_CERT), - !!(phy->muru_onoff & MUMIMO_UL), - !!(phy->muru_onoff & MUMIMO_DL), - !!(phy->muru_onoff & OFDMA_UL), -@@ -2573,8 +2574,8 @@ static int mt7915_muru_onoff_set(void *data, u64 val) - { - struct mt7915_phy *phy = data; - -- if (val > 15) { -- printk("Wrong value! The value is between 0 ~ 15.\n"); -+ if (val > 31) { -+ printk("Wrong value! The value is between 0 ~ 31.\n"); - goto exit; - } - -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index c964b14..7a71894 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -23,6 +23,29 @@ csi_ctrl_policy[NUM_MTK_VENDOR_ATTRS_CSI_CTRL] = { - [MTK_VENDOR_ATTR_CSI_CTRL_DATA] = { .type = NLA_NESTED }, - }; - -+static const struct nla_policy -+wireless_ctrl_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL] = { -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_MCS] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE] = {.type = NLA_U16 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT] = {.type = NLA_U8 }, -+}; -+ -+static const struct nla_policy -+rfeature_ctrl_policy[NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL] = { -+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_LTF] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG] = { .type = NLA_NESTED }, -+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_EN] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TXBF] = { .type = NLA_U8 }, -+}; -+ - struct csi_null_tone { - u8 start; - u8 end; -@@ -797,6 +820,149 @@ mt7915_vendor_amnt_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, - return len + 1; - } - -+static int mt7915_vendor_rfeature_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct mt7915_dev *dev = phy->dev; -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL]; -+ int err; -+ u32 val; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_RFEATURE_CTRL_MAX, data, data_len, -+ rfeature_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ val = CAPI_RFEATURE_CHANGED; -+ -+ if (tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI]) { -+ val |= FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_FIXED_GI)| -+ FIELD_PREP(RATE_CFG_VAL, nla_get_u8(tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI])); -+ ieee80211_iterate_stations_atomic(hw, mt7915_capi_sta_rc_work, &val); -+ ieee80211_queue_work(hw, &dev->rc_work); -+ } -+ else if (tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_LTF]) { -+ val |= FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_FIXED_HE_LTF)| -+ FIELD_PREP(RATE_CFG_VAL, nla_get_u8(tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_LTF])); -+ ieee80211_iterate_stations_atomic(hw, mt7915_capi_sta_rc_work, &val); -+ ieee80211_queue_work(hw, &dev->rc_work); -+ } -+ else if (tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG]) { -+ u8 enable, trig_type; -+ int rem; -+ struct nlattr *cur; -+ -+ nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG], rem) { -+ switch(nla_type(cur)) { -+ case MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_EN: -+ enable = nla_get_u8(cur); -+ break; -+ case MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE: -+ trig_type = nla_get_u8(cur); -+ break; -+ default: -+ return -EINVAL; -+ }; -+ } -+ -+ err = mt7915_mcu_set_rfeature_trig_type(phy, enable, trig_type); -+ if (err) -+ return err; -+ } -+ else if (tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY]) { -+ u8 ack_policy; -+ -+ ack_policy = nla_get_u8(tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY]); -+#define HE_TB_PPDU_ACK 4 -+ switch (ack_policy) { -+ case HE_TB_PPDU_ACK: -+ return mt7915_mcu_set_mu_dl_ack_policy(phy, ack_policy); -+ default: -+ return 0; -+ } -+ } -+ else if (tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TXBF]) { -+ u8 trig_txbf; -+ -+ trig_txbf = nla_get_u8(tb[MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TXBF]); -+ /* CAPI only issues trig_txbf=disable */ -+ } -+ -+ return 0; -+} -+ -+static int mt7915_vendor_wireless_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct mt7915_dev *dev = phy->dev; -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL]; -+ int err; -+ u8 val8; -+ u16 val16; -+ u32 val32; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX, data, data_len, -+ wireless_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ val32 = CAPI_WIRELESS_CHANGED; -+ -+ if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_MCS]) { -+ val32 &= ~CAPI_WIRELESS_CHANGED; -+ val32 |= CAPI_RFEATURE_CHANGED | -+ FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_FIXED_MCS) | -+ FIELD_PREP(RATE_CFG_VAL, nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_MCS])); -+ ieee80211_iterate_stations_atomic(hw, mt7915_capi_sta_rc_work, &val32); -+ ieee80211_queue_work(hw, &dev->rc_work); -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA]); -+ val32 |= FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_FIXED_OFDMA) | -+ FIELD_PREP(RATE_CFG_VAL, val8); -+ ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL, -+ mt7915_set_wireless_vif, &val32); -+ if (val8 == 3) /* DL20and80 */ -+ mt7915_mcu_set_dynalgo(phy, 1); /* Enable dynamic algo */ -+ mt7915_mcu_set_mu_prot_frame_th(phy, 9999); -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE]) { -+ val16 = nla_get_u16(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE]); -+ hw->max_tx_aggregation_subframes = val16; -+ hw->max_rx_aggregation_subframes = val16; -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA]); -+ mt7915_mcu_set_mu_edca(phy, val8); -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE]); -+ mt7915_mcu_set_ppdu_tx_type(phy, val8); -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA]); -+ if (FIELD_GET(OFDMA_UL, phy->muru_onoff) == 1) -+ mt7915_mcu_set_nusers_ofdma(phy, MURU_UL_USER_CNT, val8); -+ else -+ mt7915_mcu_set_nusers_ofdma(phy, MURU_DL_USER_CNT, val8); -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO]); -+ val32 |= FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_FIXED_MIMO) | -+ FIELD_PREP(RATE_CFG_VAL, val8); -+ ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL, -+ mt7915_set_wireless_vif, &val32); -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT]); -+ mt7915_mcu_set_cert(phy, val8); /* Cert Enable for OMI */ -+ mt7915_mcu_set_bypass_smthint(phy, val8); /* Cert bypass smooth interpolation */ -+ } -+ -+ return 0; -+} -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -821,6 +987,28 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .dumpit = mt7915_vendor_amnt_ctrl_dump, - .policy = amnt_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_AMNT_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_RFEATURE_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_rfeature_ctrl, -+ .policy = rfeature_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_RFEATURE_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_wireless_ctrl, -+ .policy = wireless_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 1863eee..1a18cae 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -7,6 +7,48 @@ - enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL = 0xae, - MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL = 0xc2, -+ MTK_NL80211_VENDOR_SUBCMD_RFEATURE_CTRL = 0xc3, -+ MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4, -+}; -+ -+enum mtk_capi_control_changed { -+ CAPI_RFEATURE_CHANGED = BIT(16), -+ CAPI_WIRELESS_CHANGED = BIT(17), -+}; -+ -+enum mtk_vendor_attr_wireless_ctrl { -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_MCS, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_OFDMA, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT = 9, -+ -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA, /* reserve */ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL - 1 -+}; -+ -+enum mtk_vendor_attr_rfeature_ctrl { -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI, -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_LTF, -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG, -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_EN, -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE, -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY, -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TXBF, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL, -+ MTK_VENDOR_ATTR_RFEATURE_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL - 1 - }; - - enum mtk_vendor_attr_csi_ctrl { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1005-wifi-mt76-mt7915-add-mt76-vendor-muru-onoff-command.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1005-wifi-mt76-mt7915-add-mt76-vendor-muru-onoff-command.patch deleted file mode 100644 index 137028bb5..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1005-wifi-mt76-mt7915-add-mt76-vendor-muru-onoff-command.patch +++ /dev/null @@ -1,144 +0,0 @@ -From 7f14adae86830929258aad73e8290a7fd2b4e03e Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Tue, 4 Apr 2023 02:27:44 +0800 -Subject: [PATCH 1005/1053] wifi: mt76: mt7915: add mt76 vendor muru onoff - command - ---- - mt7915/mcu.c | 7 +++++++ - mt7915/mcu.h | 1 + - mt7915/vendor.c | 43 +++++++++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 12 ++++++++++++ - 4 files changed, 63 insertions(+) - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index cd533ae..63fb826 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -4422,6 +4422,13 @@ void mt7915_set_wireless_vif(void *data, u8 *mac, struct ieee80211_vif *vif) - if (val == 0) - phy->muru_onoff = MUMIMO_DL_CERT | MUMIMO_DL; - break; -+ case RATE_PARAM_AUTO_MU: -+ if (val < 0 || val > 15) { -+ printk("Wrong value! The value is between 0-15.\n"); -+ break; -+ } -+ phy->muru_onoff = val; -+ break; - } - } - -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index eef2fc0..8650053 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -493,6 +493,7 @@ enum { - #ifdef CONFIG_MTK_VENDOR - RATE_PARAM_FIXED_MIMO = 30, - RATE_PARAM_FIXED_OFDMA = 31, -+ RATE_PARAM_AUTO_MU = 32, - #endif - }; - -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 7a71894..a8b1fa8 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -35,6 +35,11 @@ wireless_ctrl_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL] = { - [MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT] = {.type = NLA_U8 }, - }; - -+static const struct nla_policy -+mu_ctrl_policy[NUM_MTK_VENDOR_ATTRS_MU_CTRL] = { -+ [MTK_VENDOR_ATTR_MU_CTRL_ONOFF] = {.type = NLA_U8 }, -+}; -+ - static const struct nla_policy - rfeature_ctrl_policy[NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL] = { - [MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI] = {.type = NLA_U8 }, -@@ -963,6 +968,33 @@ static int mt7915_vendor_wireless_ctrl(struct wiphy *wiphy, - return 0; - } - -+static int mt7915_vendor_mu_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_MU_CTRL]; -+ int err; -+ u8 val8; -+ u32 val32 = 0; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_MU_CTRL_MAX, data, data_len, -+ mu_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (tb[MTK_VENDOR_ATTR_MU_CTRL_ONOFF]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_MU_CTRL_ONOFF]); -+ val32 |= FIELD_PREP(RATE_CFG_MODE, RATE_PARAM_AUTO_MU) | -+ FIELD_PREP(RATE_CFG_VAL, val8); -+ ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL, -+ mt7915_set_wireless_vif, &val32); -+ } -+ -+ return 0; -+} -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -1009,6 +1041,17 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .doit = mt7915_vendor_wireless_ctrl, - .policy = wireless_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_MU_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_mu_ctrl, -+ .policy = mu_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_MU_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 1a18cae..a4a9180 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -9,6 +9,7 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL = 0xc2, - MTK_NL80211_VENDOR_SUBCMD_RFEATURE_CTRL = 0xc3, - MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4, -+ MTK_NL80211_VENDOR_SUBCMD_MU_CTRL = 0xc5, - }; - - enum mtk_capi_control_changed { -@@ -34,6 +35,17 @@ enum mtk_vendor_attr_wireless_ctrl { - NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL - 1 - }; - -+enum mtk_vendor_attr_mu_ctrl { -+ MTK_VENDOR_ATTR_MU_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_MU_CTRL_ONOFF, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_MU_CTRL, -+ MTK_VENDOR_ATTR_MU_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_MU_CTRL - 1 -+}; -+ - enum mtk_vendor_attr_rfeature_ctrl { - MTK_VENDOR_ATTR_RFEATURE_CTRL_UNSPEC, - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1006-wifi-mt76-mt7915-drop-undefined-action-frame.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1006-wifi-mt76-mt7915-drop-undefined-action-frame.patch deleted file mode 100644 index 71d9c03f5..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1006-wifi-mt76-mt7915-drop-undefined-action-frame.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 3b76edcb079437bf742c4442c4db4609cf10d6b6 Mon Sep 17 00:00:00 2001 -From: Peter Chiu -Date: Thu, 14 Apr 2022 15:18:02 +0800 -Subject: [PATCH 1006/1053] wifi: mt76: mt7915: drop undefined action frame - ---- - mt7915/mac.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 43cff27..6b99437 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -744,6 +744,8 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - struct mt76_tx_info *tx_info) - { - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data; -+ struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)tx_info->skb->data; -+ __le16 fc = hdr->frame_control; - struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); - struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); - struct ieee80211_key_conf *key = info->control.hw_key; -@@ -775,6 +777,10 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); - t->skb = tx_info->skb; - -+ if (ieee80211_is_action(fc) && -+ mgmt->u.action.category == 0xff) -+ return -1; -+ - id = mt76_token_consume(mdev, &t, phy_idx); - if (id < 0) - return id; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1007-wifi-mt76-testmode-rework-testmode-init-registers.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1007-wifi-mt76-testmode-rework-testmode-init-registers.patch deleted file mode 100644 index 8f2d84103..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1007-wifi-mt76-testmode-rework-testmode-init-registers.patch +++ /dev/null @@ -1,479 +0,0 @@ -From 6668ef935f03e166732511ed063f706b9139cd19 Mon Sep 17 00:00:00 2001 -From: Shayne Chen -Date: Mon, 6 Jun 2022 19:46:26 +0800 -Subject: [PATCH 1007/1053] wifi: mt76: testmode: rework testmode init - registers - ---- - mac80211.c | 3 +- - mt76.h | 5 ++ - mt76_connac_mcu.h | 1 + - mt7915/mcu.h | 1 + - mt7915/mmio.c | 2 + - mt7915/regs.h | 16 +++++- - mt7915/testmode.c | 134 +++++++++++++++++++++++++++++++++++----------- - mt7915/testmode.h | 28 ++++++++++ - testmode.c | 6 ++- - testmode.h | 3 ++ - 10 files changed, 164 insertions(+), 35 deletions(-) - -diff --git a/mac80211.c b/mac80211.c -index b30a74e..3f5c2ed 100644 ---- a/mac80211.c -+++ b/mac80211.c -@@ -804,7 +804,8 @@ void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb) - } - - #ifdef CONFIG_NL80211_TESTMODE -- if (phy->test.state == MT76_TM_STATE_RX_FRAMES) { -+ if (!(phy->test.flag & MT_TM_FW_RX_COUNT) && -+ phy->test.state == MT76_TM_STATE_RX_FRAMES) { - phy->test.rx_stats.packets[q]++; - if (status->flag & RX_FLAG_FAILED_FCS_CRC) - phy->test.rx_stats.fcs_error[q]++; -diff --git a/mt76.h b/mt76.h -index a07c7df..fe5b136 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -709,6 +709,8 @@ struct mt76_testmode_ops { - int (*dump_stats)(struct mt76_phy *phy, struct sk_buff *msg); - }; - -+#define MT_TM_FW_RX_COUNT BIT(0) -+ - struct mt76_testmode_data { - enum mt76_testmode_state state; - -@@ -740,6 +742,8 @@ struct mt76_testmode_data { - - u8 addr[3][ETH_ALEN]; - -+ u8 flag; -+ - u32 tx_pending; - u32 tx_queued; - u16 tx_queued_limit; -@@ -747,6 +751,7 @@ struct mt76_testmode_data { - struct { - u64 packets[__MT_RXQ_MAX]; - u64 fcs_error[__MT_RXQ_MAX]; -+ u64 len_mismatch; - } rx_stats; - }; - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 53262ce..75cb4e9 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1239,6 +1239,7 @@ enum { - MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, - MCU_EXT_CMD_SET_RDD_TH = 0x9d, - MCU_EXT_CMD_MURU_CTRL = 0x9f, -+ MCU_EXT_CMD_RX_STAT = 0xa4, - MCU_EXT_CMD_SET_SPR = 0xa8, - MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, - MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 8650053..7653b5e 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -9,6 +9,7 @@ - enum { - MCU_ATE_SET_TRX = 0x1, - MCU_ATE_SET_FREQ_OFFSET = 0xa, -+ MCU_ATE_SET_PHY_COUNT = 0x11, - MCU_ATE_SET_SLOT_TIME = 0x13, - MCU_ATE_CLEAN_TXQUEUE = 0x1c, - }; -diff --git a/mt7915/mmio.c b/mt7915/mmio.c -index 6004d64..694fc1b 100644 ---- a/mt7915/mmio.c -+++ b/mt7915/mmio.c -@@ -120,6 +120,7 @@ static const u32 mt7986_reg[] = { - }; - - static const u32 mt7915_offs[] = { -+ [TMAC_TCR2] = 0x05c, - [TMAC_CDTR] = 0x090, - [TMAC_ODTR] = 0x094, - [TMAC_ATCR] = 0x098, -@@ -194,6 +195,7 @@ static const u32 mt7915_offs[] = { - }; - - static const u32 mt7916_offs[] = { -+ [TMAC_TCR2] = 0x004, - [TMAC_CDTR] = 0x0c8, - [TMAC_ODTR] = 0x0cc, - [TMAC_ATCR] = 0x00c, -diff --git a/mt7915/regs.h b/mt7915/regs.h -index 3452a7e..8bb6a9f 100644 ---- a/mt7915/regs.h -+++ b/mt7915/regs.h -@@ -48,6 +48,7 @@ enum reg_rev { - }; - - enum offs_rev { -+ TMAC_TCR2, - TMAC_CDTR, - TMAC_ODTR, - TMAC_ATCR, -@@ -202,6 +203,12 @@ enum offs_rev { - #define MT_TRB_RXPSR0_RX_WTBL_PTR GENMASK(25, 16) - #define MT_TRB_RXPSR0_RX_RMAC_PTR GENMASK(9, 0) - -+#define MT_MDP_TOP_DBG_WDT_CTRL MT_MDP(0x0d0) -+#define MT_MDP_TOP_DBG_WDT_CTRL_TDP_DIS_BLK BIT(7) -+ -+#define MT_MDP_TOP_DBG_CTRL MT_MDP(0x0dc) -+#define MT_MDP_TOP_DBG_CTRL_ENQ_MODE BIT(30) -+ - /* TMAC: band 0(0x820e4000), band 1(0x820f4000) */ - #define MT_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000) - #define MT_WF_TMAC(_band, ofs) (MT_WF_TMAC_BASE(_band) + (ofs)) -@@ -210,6 +217,9 @@ enum offs_rev { - #define MT_TMAC_TCR0_TX_BLINK GENMASK(7, 6) - #define MT_TMAC_TCR0_TBTT_STOP_CTRL BIT(25) - -+#define MT_TMAC_TCR2(_band) MT_WF_TMAC(_band, __OFFS(TMAC_TCR2)) -+#define MT_TMAC_TCR2_SCH_DET_DIS BIT(19) -+ - #define MT_TMAC_CDTR(_band) MT_WF_TMAC(_band, __OFFS(TMAC_CDTR)) - #define MT_TMAC_ODTR(_band) MT_WF_TMAC(_band, __OFFS(TMAC_ODTR)) - #define MT_TIMEOUT_VAL_PLCP GENMASK(15, 0) -@@ -489,8 +499,10 @@ enum offs_rev { - #define MT_AGG_PCR0_VHT_PROT BIT(13) - #define MT_AGG_PCR0_PTA_WIN_DIS BIT(15) - --#define MT_AGG_PCR1_RTS0_NUM_THRES GENMASK(31, 23) --#define MT_AGG_PCR1_RTS0_LEN_THRES GENMASK(19, 0) -+#define MT_AGG_PCR1_RTS0_NUM_THRES GENMASK(31, 23) -+#define MT_AGG_PCR1_RTS0_LEN_THRES GENMASK(19, 0) -+#define MT_AGG_PCR1_RTS0_NUM_THRES_MT7916 GENMASK(29, 24) -+#define MT_AGG_PCR1_RTS0_LEN_THRES_MT7916 GENMASK(22, 0) - - #define MT_AGG_ACR0(_band) MT_WF_AGG(_band, __OFFS(AGG_ACR0)) - #define MT_AGG_ACR_CFEND_RATE GENMASK(13, 0) -diff --git a/mt7915/testmode.c b/mt7915/testmode.c -index 0d76ae3..4693919 100644 ---- a/mt7915/testmode.c -+++ b/mt7915/testmode.c -@@ -30,7 +30,7 @@ struct reg_band { - { _list.band[0] = MT_##_reg(0, _idx); \ - _list.band[1] = MT_##_reg(1, _idx); } - --#define TM_REG_MAX_ID 17 -+#define TM_REG_MAX_ID 20 - static struct reg_band reg_backup_list[TM_REG_MAX_ID]; - - -@@ -133,6 +133,21 @@ mt7915_tm_clean_hwq(struct mt7915_phy *phy, u8 wcid) - sizeof(req), false); - } - -+static int -+mt7915_tm_set_phy_count(struct mt7915_phy *phy, u8 control) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_tm_cmd req = { -+ .testmode_en = 1, -+ .param_idx = MCU_ATE_SET_PHY_COUNT, -+ .param.cfg.enable = control, -+ .param.cfg.band = phy != &dev->phy, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, -+ sizeof(req), false); -+} -+ - static int - mt7915_tm_set_slot_time(struct mt7915_phy *phy, u8 slot_time, u8 sifs) - { -@@ -336,7 +351,7 @@ mt7915_tm_reg_backup_restore(struct mt7915_phy *phy) - { - int n_regs = ARRAY_SIZE(reg_backup_list); - struct mt7915_dev *dev = phy->dev; -- u32 *b = phy->test.reg_backup; -+ u32 *b = phy->test.reg_backup, val; - u8 band = phy->mt76->band_idx; - int i; - -@@ -349,18 +364,28 @@ mt7915_tm_reg_backup_restore(struct mt7915_phy *phy) - REG_BAND(reg_backup_list[6], AGG_MRCR); - REG_BAND(reg_backup_list[7], TMAC_TFCR0); - REG_BAND(reg_backup_list[8], TMAC_TCR0); -- REG_BAND(reg_backup_list[9], AGG_ATCR1); -- REG_BAND(reg_backup_list[10], AGG_ATCR3); -- REG_BAND(reg_backup_list[11], TMAC_TRCR0); -- REG_BAND(reg_backup_list[12], TMAC_ICR0); -- REG_BAND_IDX(reg_backup_list[13], ARB_DRNGR0, 0); -- REG_BAND_IDX(reg_backup_list[14], ARB_DRNGR0, 1); -- REG_BAND(reg_backup_list[15], WF_RFCR); -- REG_BAND(reg_backup_list[16], WF_RFCR1); -+ REG_BAND(reg_backup_list[9], TMAC_TCR2); -+ REG_BAND(reg_backup_list[10], AGG_ATCR1); -+ REG_BAND(reg_backup_list[11], AGG_ATCR3); -+ REG_BAND(reg_backup_list[12], TMAC_TRCR0); -+ REG_BAND(reg_backup_list[13], TMAC_ICR0); -+ REG_BAND_IDX(reg_backup_list[14], ARB_DRNGR0, 0); -+ REG_BAND_IDX(reg_backup_list[15], ARB_DRNGR0, 1); -+ REG_BAND(reg_backup_list[16], WF_RFCR); -+ REG_BAND(reg_backup_list[17], WF_RFCR1); -+ -+ if (is_mt7916(&dev->mt76)) { -+ reg_backup_list[18].band[band] = MT_MDP_TOP_DBG_WDT_CTRL; -+ reg_backup_list[19].band[band] = MT_MDP_TOP_DBG_CTRL; -+ } - - if (phy->mt76->test.state == MT76_TM_STATE_OFF) { -- for (i = 0; i < n_regs; i++) -- mt76_wr(dev, reg_backup_list[i].band[band], b[i]); -+ for (i = 0; i < n_regs; i++) { -+ u8 reg = reg_backup_list[i].band[band]; -+ -+ if (reg) -+ mt76_wr(dev, reg, b[i]); -+ } - return; - } - -@@ -380,8 +405,13 @@ mt7915_tm_reg_backup_restore(struct mt7915_phy *phy) - MT_AGG_PCR0_BW40_PROT | MT_AGG_PCR0_BW80_PROT); - mt76_set(dev, MT_AGG_PCR0(band, 0), MT_AGG_PCR0_PTA_WIN_DIS); - -- mt76_wr(dev, MT_AGG_PCR0(band, 1), MT_AGG_PCR1_RTS0_NUM_THRES | -- MT_AGG_PCR1_RTS0_LEN_THRES); -+ if (is_mt7915(&dev->mt76)) -+ val = MT_AGG_PCR1_RTS0_NUM_THRES | MT_AGG_PCR1_RTS0_LEN_THRES; -+ else -+ val = MT_AGG_PCR1_RTS0_NUM_THRES_MT7916 | -+ MT_AGG_PCR1_RTS0_LEN_THRES_MT7916; -+ -+ mt76_wr(dev, MT_AGG_PCR0(band, 1), val); - - mt76_clear(dev, MT_AGG_MRCR(band), MT_AGG_MRCR_BAR_CNT_LIMIT | - MT_AGG_MRCR_LAST_RTS_CTS_RN | MT_AGG_MRCR_RTS_FAIL_LIMIT | -@@ -394,10 +424,19 @@ mt7915_tm_reg_backup_restore(struct mt7915_phy *phy) - - mt76_wr(dev, MT_TMAC_TFCR0(band), 0); - mt76_clear(dev, MT_TMAC_TCR0(band), MT_TMAC_TCR0_TBTT_STOP_CTRL); -+ mt76_set(dev, MT_TMAC_TCR2(band), MT_TMAC_TCR2_SCH_DET_DIS); - - /* config rx filter for testmode rx */ - mt76_wr(dev, MT_WF_RFCR(band), 0xcf70a); - mt76_wr(dev, MT_WF_RFCR1(band), 0); -+ -+ if (is_mt7916(&dev->mt76)) { -+ /* enable MDP Tx block mode */ -+ mt76_clear(dev, MT_MDP_TOP_DBG_WDT_CTRL, -+ MT_MDP_TOP_DBG_WDT_CTRL_TDP_DIS_BLK); -+ mt76_clear(dev, MT_MDP_TOP_DBG_CTRL, -+ MT_MDP_TOP_DBG_CTRL_ENQ_MODE); -+ } - } - - static void -@@ -417,6 +456,8 @@ mt7915_tm_init(struct mt7915_phy *phy, bool en) - mt7915_mcu_add_bss_info(phy, phy->monitor_vif, en); - mt7915_mcu_add_sta(dev, phy->monitor_vif, NULL, en); - -+ phy->mt76->test.flag |= MT_TM_FW_RX_COUNT; -+ - if (!en) - mt7915_tm_set_tam_arb(phy, en, 0); - } -@@ -479,18 +520,63 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en) - mt7915_tm_set_trx(phy, TM_MAC_TX, en); - } - -+static int -+mt7915_tm_get_rx_stats(struct mt7915_phy *phy, bool clear) -+{ -+#define CMD_RX_STAT_BAND 0x3 -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt7915_tm_rx_stat_band *rs_band; -+ struct mt7915_dev *dev = phy->dev; -+ struct sk_buff *skb; -+ struct { -+ u8 format_id; -+ u8 band; -+ u8 _rsv[2]; -+ } __packed req = { -+ .format_id = CMD_RX_STAT_BAND, -+ .band = phy->mt76->band_idx, -+ }; -+ int ret; -+ -+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(RX_STAT), -+ &req, sizeof(req), true, &skb); -+ if (ret) -+ return ret; -+ -+ rs_band = (struct mt7915_tm_rx_stat_band *)skb->data; -+ /* pr_info("mdrdy_cnt = %d\n", le32_to_cpu(rs_band->mdrdy_cnt)); */ -+ /* pr_info("fcs_err = %d\n", le16_to_cpu(rs_band->fcs_err)); */ -+ /* pr_info("len_mismatch = %d\n", le16_to_cpu(rs_band->len_mismatch)); */ -+ /* pr_info("fcs_ok = %d\n", le16_to_cpu(rs_band->fcs_succ)); */ -+ -+ if (!clear) { -+ enum mt76_rxq_id q = req.band ? MT_RXQ_BAND1 : MT_RXQ_MAIN; -+ -+ td->rx_stats.packets[q] += le32_to_cpu(rs_band->mdrdy_cnt); -+ td->rx_stats.fcs_error[q] += le16_to_cpu(rs_band->fcs_err); -+ td->rx_stats.len_mismatch += le16_to_cpu(rs_band->len_mismatch); -+ } -+ -+ dev_kfree_skb(skb); -+ -+ return 0; -+} -+ - static void - mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en) - { - mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false); - - if (en) { -- struct mt7915_dev *dev = phy->dev; -- - mt7915_tm_update_channel(phy); - - /* read-clear */ -- mt76_rr(dev, MT_MIB_SDR3(phy->mt76->band_idx)); -+ mt7915_tm_get_rx_stats(phy, true); -+ -+ /* clear fw count */ -+ mt7915_tm_set_phy_count(phy, 0); -+ mt7915_tm_set_phy_count(phy, 1); -+ - mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en); - } - } -@@ -721,12 +807,8 @@ static int - mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg) - { - struct mt7915_phy *phy = mphy->priv; -- struct mt7915_dev *dev = phy->dev; -- enum mt76_rxq_id q; - void *rx, *rssi; -- u16 fcs_err; - int i; -- u32 cnt; - - rx = nla_nest_start(msg, MT76_TM_STATS_ATTR_LAST_RX); - if (!rx) -@@ -770,15 +852,7 @@ mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg) - - nla_nest_end(msg, rx); - -- cnt = mt76_rr(dev, MT_MIB_SDR3(phy->mt76->band_idx)); -- fcs_err = is_mt7915(&dev->mt76) ? FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK, cnt) : -- FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK_MT7916, cnt); -- -- q = phy->mt76->band_idx ? MT_RXQ_BAND1 : MT_RXQ_MAIN; -- mphy->test.rx_stats.packets[q] += fcs_err; -- mphy->test.rx_stats.fcs_error[q] += fcs_err; -- -- return 0; -+ return mt7915_tm_get_rx_stats(phy, false); - } - - const struct mt76_testmode_ops mt7915_testmode_ops = { -diff --git a/mt7915/testmode.h b/mt7915/testmode.h -index 5573ac3..a1c54c8 100644 ---- a/mt7915/testmode.h -+++ b/mt7915/testmode.h -@@ -33,6 +33,12 @@ struct mt7915_tm_clean_txq { - u8 rsv; - }; - -+struct mt7915_tm_cfg { -+ u8 enable; -+ u8 band; -+ u8 _rsv[2]; -+}; -+ - struct mt7915_tm_cmd { - u8 testmode_en; - u8 param_idx; -@@ -43,6 +49,7 @@ struct mt7915_tm_cmd { - struct mt7915_tm_freq_offset freq; - struct mt7915_tm_slot_time slot; - struct mt7915_tm_clean_txq clean; -+ struct mt7915_tm_cfg cfg; - u8 test[72]; - } param; - } __packed; -@@ -102,4 +109,25 @@ enum { - TAM_ARB_OP_MODE_FORCE_SU = 5, - }; - -+struct mt7915_tm_rx_stat_band { -+ u8 category; -+ -+ /* mac */ -+ __le16 fcs_err; -+ __le16 len_mismatch; -+ __le16 fcs_succ; -+ __le32 mdrdy_cnt; -+ /* phy */ -+ __le16 fcs_err_cck; -+ __le16 fcs_err_ofdm; -+ __le16 pd_cck; -+ __le16 pd_ofdm; -+ __le16 sig_err_cck; -+ __le16 sfd_err_cck; -+ __le16 sig_err_ofdm; -+ __le16 tag_err_ofdm; -+ __le16 mdrdy_cnt_cck; -+ __le16 mdrdy_cnt_ofdm; -+}; -+ - #endif -diff --git a/testmode.c b/testmode.c -index ca4fecc..9e05b86 100644 ---- a/testmode.c -+++ b/testmode.c -@@ -448,8 +448,7 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_LDPC], &td->tx_rate_ldpc, 0, 1) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_STBC], &td->tx_rate_stbc, 0, 1) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_LTF], &td->tx_ltf, 0, 2) || -- mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_ANTENNA], -- &td->tx_antenna_mask, 0, 0xff) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_ANTENNA], &td->tx_antenna_mask, 1, 0xff) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_SPE_IDX], &td->tx_spe_idx, 0, 27) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_DUTY_CYCLE], - &td->tx_duty_cycle, 0, 99) || -@@ -561,6 +560,9 @@ mt76_testmode_dump_stats(struct mt76_phy *phy, struct sk_buff *msg) - nla_put_u64_64bit(msg, MT76_TM_STATS_ATTR_RX_PACKETS, rx_packets, - MT76_TM_STATS_ATTR_PAD) || - nla_put_u64_64bit(msg, MT76_TM_STATS_ATTR_RX_FCS_ERROR, rx_fcs_error, -+ MT76_TM_STATS_ATTR_PAD) || -+ nla_put_u64_64bit(msg, MT76_TM_STATS_ATTR_RX_LEN_MISMATCH, -+ td->rx_stats.len_mismatch, - MT76_TM_STATS_ATTR_PAD)) - return -EMSGSIZE; - -diff --git a/testmode.h b/testmode.h -index 5e2792d..8961326 100644 ---- a/testmode.h -+++ b/testmode.h -@@ -101,6 +101,8 @@ enum mt76_testmode_attr { - * @MT76_TM_STATS_ATTR_RX_FCS_ERROR: number of rx packets with FCS error (u64) - * @MT76_TM_STATS_ATTR_LAST_RX: information about the last received packet - * see &enum mt76_testmode_rx_attr -+ * @MT76_TM_STATS_ATTR_RX_LEN_MISMATCH: number of rx packets with length -+ * mismatch error (u64) - */ - enum mt76_testmode_stats_attr { - MT76_TM_STATS_ATTR_UNSPEC, -@@ -113,6 +115,7 @@ enum mt76_testmode_stats_attr { - MT76_TM_STATS_ATTR_RX_PACKETS, - MT76_TM_STATS_ATTR_RX_FCS_ERROR, - MT76_TM_STATS_ATTR_LAST_RX, -+ MT76_TM_STATS_ATTR_RX_LEN_MISMATCH, - - /* keep last */ - NUM_MT76_TM_STATS_ATTRS, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1008-wifi-mt76-testmode-additional-supports.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1008-wifi-mt76-testmode-additional-supports.patch deleted file mode 100644 index fa6094e9c..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1008-wifi-mt76-testmode-additional-supports.patch +++ /dev/null @@ -1,3253 +0,0 @@ -From e6c4c7343a54ef607d8ceafa4615a32165c121fd Mon Sep 17 00:00:00 2001 -From: Shayne Chen -Date: Thu, 21 Apr 2022 15:43:19 +0800 -Subject: [PATCH] wifi: mt76: testmode: additional supports - -Signed-off-by: Shayne Chen -Signed-off-by: StanleyYP Wang ---- - dma.c | 3 +- - mac80211.c | 12 + - mt76.h | 119 ++++- - mt76_connac_mcu.c | 4 + - mt76_connac_mcu.h | 2 + - mt7915/eeprom.c | 2 +- - mt7915/init.c | 2 +- - mt7915/mac.c | 40 +- - mt7915/main.c | 2 +- - mt7915/mcu.c | 22 +- - mt7915/mcu.h | 29 +- - mt7915/mmio.c | 2 + - mt7915/mt7915.h | 17 +- - mt7915/regs.h | 3 + - mt7915/testmode.c | 1244 ++++++++++++++++++++++++++++++++++++++++++--- - mt7915/testmode.h | 278 ++++++++++ - testmode.c | 289 +++++++++-- - testmode.h | 79 +++ - tools/fields.c | 90 +++- - tx.c | 3 +- - 20 files changed, 2073 insertions(+), 169 deletions(-) - -diff --git a/dma.c b/dma.c -index ccdd564..bc8afcf 100644 ---- a/dma.c -+++ b/dma.c -@@ -614,8 +614,7 @@ free: - if (mt76_is_testmode_skb(dev, skb, &hw)) { - struct mt76_phy *phy = hw->priv; - -- if (tx_info.skb == phy->test.tx_skb) -- phy->test.tx_done--; -+ phy->test.tx_done--; - } - #endif - -diff --git a/mac80211.c b/mac80211.c -index 3f5c2ed..305cae7 100644 ---- a/mac80211.c -+++ b/mac80211.c -@@ -55,6 +55,13 @@ static const struct ieee80211_channel mt76_channels_5ghz[] = { - CHAN5G(60, 5300), - CHAN5G(64, 5320), - -+ CHAN5G(68, 5340), -+ CHAN5G(80, 5400), -+ CHAN5G(84, 5420), -+ CHAN5G(88, 5440), -+ CHAN5G(92, 5460), -+ CHAN5G(96, 5480), -+ - CHAN5G(100, 5500), - CHAN5G(104, 5520), - CHAN5G(108, 5540), -@@ -76,6 +83,11 @@ static const struct ieee80211_channel mt76_channels_5ghz[] = { - CHAN5G(169, 5845), - CHAN5G(173, 5865), - CHAN5G(177, 5885), -+ -+ CHAN5G(184, 4920), -+ CHAN5G(188, 4940), -+ CHAN5G(192, 4960), -+ CHAN5G(196, 4980), - }; - - static const struct ieee80211_channel mt76_channels_6ghz[] = { -diff --git a/mt76.h b/mt76.h -index fe5b136..a7d424f 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -707,6 +707,21 @@ struct mt76_testmode_ops { - int (*set_params)(struct mt76_phy *phy, struct nlattr **tb, - enum mt76_testmode_state new_state); - int (*dump_stats)(struct mt76_phy *phy, struct sk_buff *msg); -+ int (*set_eeprom)(struct mt76_phy *phy, u32 offset, u8 *val, u8 action); -+}; -+ -+struct mt76_testmode_entry_data { -+ struct sk_buff *tx_skb; -+ -+ u16 tx_mpdu_len; -+ u8 tx_rate_idx; -+ u8 tx_rate_nss; -+ u8 tx_rate_ldpc; -+ -+ u8 addr[3][ETH_ALEN]; -+ u8 aid; -+ u8 ru_alloc; -+ u8 ru_idx; - }; - - #define MT_TM_FW_RX_COUNT BIT(0) -@@ -715,16 +730,13 @@ struct mt76_testmode_data { - enum mt76_testmode_state state; - - u32 param_set[DIV_ROUND_UP(NUM_MT76_TM_ATTRS, 32)]; -- struct sk_buff *tx_skb; -+ -+ u8 sku_en; - - u32 tx_count; -- u16 tx_mpdu_len; - - u8 tx_rate_mode; -- u8 tx_rate_idx; -- u8 tx_rate_nss; - u8 tx_rate_sgi; -- u8 tx_rate_ldpc; - u8 tx_rate_stbc; - u8 tx_ltf; - -@@ -740,10 +752,37 @@ struct mt76_testmode_data { - u8 tx_power[4]; - u8 tx_power_control; - -- u8 addr[3][ETH_ALEN]; -+ struct list_head tm_entry_list; -+ struct mt76_wcid *cur_entry; -+ u8 entry_num; -+ union { -+ struct mt76_testmode_entry_data ed; -+ struct { -+ /* must be the same as mt76_testmode_entry_data */ -+ struct sk_buff *tx_skb; -+ -+ u16 tx_mpdu_len; -+ u8 tx_rate_idx; -+ u8 tx_rate_nss; -+ u8 tx_rate_ldpc; -+ -+ u8 addr[3][ETH_ALEN]; -+ u8 aid; -+ u8 ru_alloc; -+ u8 ru_idx; -+ }; -+ }; - - u8 flag; - -+ struct { -+ u8 type; -+ u8 enable; -+ } cfg; -+ -+ u8 txbf_act; -+ u16 txbf_param[8]; -+ - u32 tx_pending; - u32 tx_queued; - u16 tx_queued_limit; -@@ -1348,6 +1387,68 @@ static inline bool mt76_testmode_enabled(struct mt76_phy *phy) - #endif - } - -+#ifdef CONFIG_NL80211_TESTMODE -+static inline struct mt76_wcid * -+mt76_testmode_first_entry(struct mt76_phy *phy) -+{ -+ if (list_empty(&phy->test.tm_entry_list) && !phy->test.aid) -+ return &phy->dev->global_wcid; -+ -+ return list_first_entry(&phy->test.tm_entry_list, -+ typeof(struct mt76_wcid), -+ list); -+} -+ -+static inline struct mt76_wcid * -+mt76_testmode_next_entry(struct mt76_phy *phy, struct mt76_wcid *wcid) -+{ -+ if (wcid == &phy->dev->global_wcid) -+ return NULL; -+ -+ return list_next_entry(wcid, list); -+} -+ -+static inline struct mt76_testmode_entry_data * -+mt76_testmode_entry_data(struct mt76_phy *phy, struct mt76_wcid *wcid) -+{ -+ if (!wcid) -+ return NULL; -+ if (wcid == &phy->dev->global_wcid) -+ return &phy->test.ed; -+ -+ return (struct mt76_testmode_entry_data *)((u8 *)wcid + -+ phy->hw->sta_data_size); -+} -+ -+#define mt76_tm_for_each_entry(phy, wcid, ed) \ -+ for (wcid = mt76_testmode_first_entry(phy), \ -+ ed = mt76_testmode_entry_data(phy, wcid); \ -+ ((phy->test.aid && \ -+ !list_entry_is_head(wcid, &phy->test.tm_entry_list, list)) || \ -+ (!phy->test.aid && wcid == &phy->dev->global_wcid)) && ed; \ -+ wcid = mt76_testmode_next_entry(phy, wcid), \ -+ ed = mt76_testmode_entry_data(phy, wcid)) -+#endif -+ -+static inline bool __mt76_is_testmode_skb(struct mt76_phy *phy, -+ struct sk_buff *skb) -+{ -+#ifdef CONFIG_NL80211_TESTMODE -+ struct mt76_testmode_entry_data *ed = &phy->test.ed; -+ struct mt76_wcid *wcid; -+ -+ if (skb == ed->tx_skb) -+ return true; -+ -+ mt76_tm_for_each_entry(phy, wcid, ed) -+ if (skb == ed->tx_skb) -+ return true; -+ return false; -+#else -+ return false; -+#endif -+} -+ - static inline bool mt76_is_testmode_skb(struct mt76_dev *dev, - struct sk_buff *skb, - struct ieee80211_hw **hw) -@@ -1358,7 +1459,8 @@ static inline bool mt76_is_testmode_skb(struct mt76_dev *dev, - for (i = 0; i < ARRAY_SIZE(dev->phys); i++) { - struct mt76_phy *phy = dev->phys[i]; - -- if (phy && skb == phy->test.tx_skb) { -+ if (phy && mt76_testmode_enabled(phy) && -+ __mt76_is_testmode_skb(phy, skb)) { - *hw = dev->phys[i]->hw; - return true; - } -@@ -1460,7 +1562,8 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb, - struct netlink_callback *cb, void *data, int len); - int mt76_testmode_set_state(struct mt76_phy *phy, enum mt76_testmode_state state); --int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len); -+int mt76_testmode_init_skb(struct mt76_phy *phy, u32 len, -+ struct sk_buff **tx_skb, u8 (*addr)[ETH_ALEN]); - - static inline void mt76_testmode_reset(struct mt76_phy *phy, bool disable) - { -diff --git a/mt76_connac_mcu.c b/mt76_connac_mcu.c -index a8f097d..44cd646 100644 ---- a/mt76_connac_mcu.c -+++ b/mt76_connac_mcu.c -@@ -407,6 +407,7 @@ void mt76_connac_mcu_sta_basic_tlv(struct mt76_dev *dev, struct sk_buff *skb, - switch (vif->type) { - case NL80211_IFTYPE_MESH_POINT: - case NL80211_IFTYPE_AP: -+ case NL80211_IFTYPE_MONITOR: - if (vif->p2p && !is_mt7921(dev)) - conn_type = CONNECTION_P2P_GC; - else -@@ -588,6 +589,9 @@ void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, - rx->rca2 = 1; - rx->rv = 1; - -+ if (vif->type == NL80211_IFTYPE_MONITOR) -+ rx->rca1 = 0; -+ - if (!is_connac_v1(dev)) - return; - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 22d477f..0f408d9 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1023,6 +1023,7 @@ enum { - MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, - MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, - MCU_EXT_EVENT_ASSERT_DUMP = 0x23, -+ MCU_EXT_EVENT_BF_STATUS_READ = 0x35, - MCU_EXT_EVENT_RDD_REPORT = 0x3a, - MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, - MCU_EXT_EVENT_BSS_ACQ_PKT_CNT = 0x52, -@@ -1246,6 +1247,7 @@ enum { - MCU_EXT_CMD_PHY_STAT_INFO = 0xad, - /* for vendor csi and air monitor */ - MCU_EXT_CMD_SMESH_CTRL = 0xae, -+ MCU_EXT_CMD_RX_STAT_USER_CTRL = 0xb3, - MCU_EXT_CMD_SET_QOS_MAP = 0xb4, - MCU_EXT_CMD_CERT_CFG = 0xb7, - MCU_EXT_CMD_CSI_CTRL = 0xc2, -diff --git a/mt7915/eeprom.c b/mt7915/eeprom.c -index bfdbc15..f4876fe 100644 ---- a/mt7915/eeprom.c -+++ b/mt7915/eeprom.c -@@ -142,7 +142,7 @@ static int mt7915_eeprom_load(struct mt7915_dev *dev) - /* read eeprom data from efuse */ - block_num = DIV_ROUND_UP(eeprom_size, eeprom_blk_size); - for (i = 0; i < block_num; i++) { -- ret = mt7915_mcu_get_eeprom(dev, i * eeprom_blk_size); -+ ret = mt7915_mcu_get_eeprom(dev, i * eeprom_blk_size, NULL); - if (ret < 0) - return ret; - } -diff --git a/mt7915/init.c b/mt7915/init.c -index 0350250..5c4aa1e 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -727,7 +727,7 @@ static void mt7915_init_work(struct work_struct *work) - struct mt7915_dev *dev = container_of(work, struct mt7915_dev, - init_work); - -- mt7915_mcu_set_eeprom(dev); -+ mt7915_mcu_set_eeprom(dev, dev->flash_mode); - mt7915_mac_init(dev); - mt7915_txbf_init(dev); - } -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 6b99437..7d3397e 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -586,6 +586,7 @@ mt7915_mac_fill_rx_vector(struct mt7915_dev *dev, struct sk_buff *skb) - wb_rssi = le32_to_cpu(rxv[9]); - - phy->test.last_rcpi[i] = rcpi & 0xff; -+ phy->test.last_rssi[i] = to_rssi(GENMASK(7, 0), rcpi); - phy->test.last_ib_rssi[i] = ib_rssi & 0xff; - phy->test.last_wb_rssi[i] = wb_rssi & 0xff; - } -@@ -611,16 +612,38 @@ mt7915_mac_write_txwi_tm(struct mt7915_phy *phy, __le32 *txwi, - { - #ifdef CONFIG_NL80211_TESTMODE - struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_testmode_entry_data *ed; -+ struct mt76_wcid *wcid; - const struct ieee80211_rate *r; -- u8 bw, mode, nss = td->tx_rate_nss; -- u8 rate_idx = td->tx_rate_idx; -+ u8 bw, mode, nss, rate_idx, ldpc; - u16 rateval = 0; - u32 val; - bool cck = false; - int band; - -- if (skb != phy->mt76->test.tx_skb) -+ txwi[3] &= ~cpu_to_le32(MT_TXD3_SN_VALID); -+ txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, -+ phy->test.spe_idx)); -+ -+ if (td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU) { -+ txwi[1] |= cpu_to_le32(BIT(18)); -+ txwi[2] = 0; -+ txwi[3] &= ~cpu_to_le32(MT_TXD3_NO_ACK); -+ le32p_replace_bits(&txwi[3], 0x1f, MT_TXD3_REM_TX_COUNT); -+ - return; -+ } -+ -+ mt76_tm_for_each_entry(phy->mt76, wcid, ed) -+ if (ed->tx_skb == skb) -+ break; -+ -+ if (!ed) -+ return; -+ -+ nss = ed->tx_rate_nss; -+ rate_idx = ed->tx_rate_idx; -+ ldpc = ed->tx_rate_ldpc; - - switch (td->tx_rate_mode) { - case MT76_TM_TX_MODE_HT: -@@ -651,7 +674,7 @@ mt7915_mac_write_txwi_tm(struct mt7915_phy *phy, __le32 *txwi, - rate_idx += 4; - - r = &phy->mt76->hw->wiphy->bands[band]->bitrates[rate_idx]; -- val = cck ? r->hw_value_short : r->hw_value; -+ val = r->hw_value; - - mode = val >> 8; - rate_idx = val & 0xff; -@@ -710,13 +733,14 @@ mt7915_mac_write_txwi_tm(struct mt7915_phy *phy, __le32 *txwi, - if (mode >= MT_PHY_TYPE_HE_SU) - val |= FIELD_PREP(MT_TXD6_HELTF, td->tx_ltf); - -- if (td->tx_rate_ldpc || (bw > 0 && mode >= MT_PHY_TYPE_HE_SU)) -+ if (ldpc || (bw > 0 && mode >= MT_PHY_TYPE_HE_SU)) - val |= MT_TXD6_LDPC; - - txwi[3] &= ~cpu_to_le32(MT_TXD3_SN_VALID); -+ if (phy->test.bf_en) -+ val |= MT_TXD6_TX_IBF | MT_TXD6_TX_EBF; -+ - txwi[6] |= cpu_to_le32(val); -- txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, -- phy->test.spe_idx)); - #endif - } - -@@ -1420,7 +1444,7 @@ mt7915_mac_restart(struct mt7915_dev *dev) - goto out; - - /* set the necessary init items */ -- ret = mt7915_mcu_set_eeprom(dev); -+ ret = mt7915_mcu_set_eeprom(dev, dev->flash_mode); - if (ret) - goto out; - -diff --git a/mt7915/main.c b/mt7915/main.c -index 8835cda..e53754c 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -238,7 +238,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, - mvif->phy = phy; - mvif->mt76.band_idx = phy->mt76->band_idx; - -- mvif->mt76.wmm_idx = vif->type != NL80211_IFTYPE_AP; -+ mvif->mt76.wmm_idx = (vif->type != NL80211_IFTYPE_AP && vif->type != NL80211_IFTYPE_MONITOR); - if (ext_phy) - mvif->mt76.wmm_idx += 2; - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 0d1bab1..05919e9 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -478,6 +478,11 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - case MCU_EXT_EVENT_BCC_NOTIFY: - mt7915_mcu_rx_bcc_notify(dev, skb); - break; -+#ifdef CONFIG_NL80211_TESTMODE -+ case MCU_EXT_EVENT_BF_STATUS_READ: -+ mt7915_tm_txbf_status_read(dev, skb); -+ break; -+#endif - case MCU_EXT_EVENT_BSS_ACQ_PKT_CNT: - mt7915_mcu_rx_bss_acq_pkt_cnt(dev, skb); - break; -@@ -512,6 +517,7 @@ void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb) - rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP || - rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC || - rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY || -+ rxd->ext_eid == MCU_EXT_EVENT_BF_STATUS_READ || - !rxd->seq) && - !(rxd->eid == MCU_CMD_EXT_CID && - rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT)) -@@ -2853,7 +2859,8 @@ int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd) - } - #endif - -- if (mt76_connac_spe_idx(phy->mt76->antenna_mask)) -+ if (mt76_connac_spe_idx(phy->mt76->antenna_mask) && -+ !mt76_testmode_enabled(phy->mt76)) - req.tx_path_num = fls(phy->mt76->antenna_mask); - - if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR) -@@ -2921,21 +2928,21 @@ static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev) - return 0; - } - --int mt7915_mcu_set_eeprom(struct mt7915_dev *dev) -+int mt7915_mcu_set_eeprom(struct mt7915_dev *dev, bool flash_mode) - { - struct mt7915_mcu_eeprom req = { - .buffer_mode = EE_MODE_EFUSE, - .format = EE_FORMAT_WHOLE, - }; - -- if (dev->flash_mode) -+ if (flash_mode) - return mt7915_mcu_set_eeprom_flash(dev); - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE), - &req, sizeof(req), true); - } - --int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset) -+int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf) - { - struct mt7915_mcu_eeprom_info req = { - .addr = cpu_to_le32(round_down(offset, -@@ -2944,7 +2951,7 @@ int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset) - struct mt7915_mcu_eeprom_info *res; - struct sk_buff *skb; - int ret; -- u8 *buf; -+ u8 *buf = read_buf; - - ret = mt76_mcu_send_and_get_msg(&dev->mt76, - MCU_EXT_QUERY(EFUSE_ACCESS), -@@ -2953,8 +2960,11 @@ int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset) - return ret; - - res = (struct mt7915_mcu_eeprom_info *)skb->data; -- buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); -+ -+ if (!buf) -+ buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); - memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE); -+ - dev_kfree_skb(skb); - - return 0; -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 7653b5e..c791c7f 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -8,10 +8,15 @@ - - enum { - MCU_ATE_SET_TRX = 0x1, -+ MCU_ATE_SET_TSSI = 0x5, -+ MCU_ATE_SET_DPD = 0x6, -+ MCU_ATE_SET_RATE_POWER_OFFSET = 0x7, -+ MCU_ATE_SET_THERMAL_COMP = 0x8, - MCU_ATE_SET_FREQ_OFFSET = 0xa, - MCU_ATE_SET_PHY_COUNT = 0x11, - MCU_ATE_SET_SLOT_TIME = 0x13, - MCU_ATE_CLEAN_TXQUEUE = 0x1c, -+ MCU_ATE_SET_MU_RX_AID = 0x1e, - }; - - struct mt7915_mcu_thermal_ctrl { -@@ -542,6 +547,12 @@ enum { - - enum { - MT_BF_SOUNDING_ON = 1, -+ MT_BF_DATA_PACKET_APPLY = 2, -+ MT_BF_PFMU_TAG_READ = 5, -+ MT_BF_PFMU_TAG_WRITE = 6, -+ MT_BF_PHASE_CAL = 14, -+ MT_BF_IBF_PHASE_COMP = 15, -+ MT_BF_PROFILE_WRITE_ALL = 17, - MT_BF_TYPE_UPDATE = 20, - MT_BF_MODULE_UPDATE = 25 - }; -@@ -787,10 +798,20 @@ struct mt7915_muru { - #define MURU_OFDMA_SCH_TYPE_UL BIT(1) - - /* Common Config */ --#define MURU_COMM_PPDU_FMT BIT(0) --#define MURU_COMM_SCH_TYPE BIT(1) --#define MURU_COMM_SET (MURU_COMM_PPDU_FMT | MURU_COMM_SCH_TYPE) --/* DL&UL User config*/ -+/* #define MURU_COMM_PPDU_FMT BIT(0) */ -+/* #define MURU_COMM_SCH_TYPE BIT(1) */ -+/* #define MURU_COMM_SET (MURU_COMM_PPDU_FMT | MURU_COMM_SCH_TYPE) */ -+#define MURU_COMM_PPDU_FMT BIT(0) -+#define MURU_COMM_SCH_TYPE BIT(1) -+#define MURU_COMM_BAND BIT(2) -+#define MURU_COMM_WMM BIT(3) -+#define MURU_COMM_SPE_IDX BIT(4) -+#define MURU_COMM_PROC_TYPE BIT(5) -+#define MURU_COMM_SET (MURU_COMM_PPDU_FMT | MURU_COMM_SCH_TYPE) -+#define MURU_COMM_SET_TM (MURU_COMM_PPDU_FMT | MURU_COMM_BAND | \ -+ MURU_COMM_WMM | MURU_COMM_SPE_IDX) -+ -+/* DL&UL User config */ - #define MURU_USER_CNT BIT(4) - - enum { -diff --git a/mt7915/mmio.c b/mt7915/mmio.c -index 694fc1b..222e2cf 100644 ---- a/mt7915/mmio.c -+++ b/mt7915/mmio.c -@@ -134,6 +134,7 @@ static const u32 mt7915_offs[] = { - [ARB_DRNGR0] = 0x194, - [ARB_SCR] = 0x080, - [RMAC_MIB_AIRTIME14] = 0x3b8, -+ [AGG_AALCR0] = 0x048, - [AGG_AWSCR0] = 0x05c, - [AGG_PCR0] = 0x06c, - [AGG_ACR0] = 0x084, -@@ -209,6 +210,7 @@ static const u32 mt7916_offs[] = { - [ARB_DRNGR0] = 0x1e0, - [ARB_SCR] = 0x000, - [RMAC_MIB_AIRTIME14] = 0x0398, -+ [AGG_AALCR0] = 0x028, - [AGG_AWSCR0] = 0x030, - [AGG_PCR0] = 0x040, - [AGG_ACR0] = 0x054, -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 136e89f..37abf56 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -304,11 +304,15 @@ struct mt7915_phy { - - s32 last_freq_offset; - u8 last_rcpi[4]; -+ s8 last_rssi[4]; - s8 last_ib_rssi[4]; - s8 last_wb_rssi[4]; - u8 last_snr; - - u8 spe_idx; -+ -+ bool bf_en; -+ bool bf_ever_en; - } test; - #endif - -@@ -421,6 +425,14 @@ struct mt7915_dev { - void __iomem *dcm; - void __iomem *sku; - -+#ifdef CONFIG_NL80211_TESTMODE -+ struct { -+ void *txbf_phase_cal; -+ void *txbf_pfmu_data; -+ void *txbf_pfmu_tag; -+ } test; -+#endif -+ - #ifdef MTK_DEBUG - u16 wlan_idx; - struct { -@@ -601,8 +613,8 @@ int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev, - struct ieee80211_vif *vif, - struct ieee80211_sta *sta, - void *data, u32 field); --int mt7915_mcu_set_eeprom(struct mt7915_dev *dev); --int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset); -+int mt7915_mcu_set_eeprom(struct mt7915_dev *dev, bool flash_mode); -+int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf); - int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num); - int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable, - bool hdr_trans); -@@ -641,6 +653,7 @@ int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); - int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); - void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_exit(struct mt7915_dev *dev); -+int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_wmm_pbc_work(struct work_struct *work); - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif); - -diff --git a/mt7915/regs.h b/mt7915/regs.h -index 8bb6a9f..1236da9 100644 ---- a/mt7915/regs.h -+++ b/mt7915/regs.h -@@ -62,6 +62,7 @@ enum offs_rev { - ARB_DRNGR0, - ARB_SCR, - RMAC_MIB_AIRTIME14, -+ AGG_AALCR0, - AGG_AWSCR0, - AGG_PCR0, - AGG_ACR0, -@@ -486,6 +487,8 @@ enum offs_rev { - #define MT_WF_AGG_BASE(_band) ((_band) ? 0x820f2000 : 0x820e2000) - #define MT_WF_AGG(_band, ofs) (MT_WF_AGG_BASE(_band) + (ofs)) - -+#define MT_AGG_AALCR0(_band, _n) MT_WF_AGG(_band, (__OFFS(AGG_AALCR0) + \ -+ (_n) * 4)) - #define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, (__OFFS(AGG_AWSCR0) + \ - (_n) * 4)) - #define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, (__OFFS(AGG_PCR0) + \ -diff --git a/mt7915/testmode.c b/mt7915/testmode.c -index 4693919..32dc85c 100644 ---- a/mt7915/testmode.c -+++ b/mt7915/testmode.c -@@ -9,6 +9,10 @@ - enum { - TM_CHANGED_TXPOWER, - TM_CHANGED_FREQ_OFFSET, -+ TM_CHANGED_SKU_EN, -+ TM_CHANGED_AID, -+ TM_CHANGED_CFG, -+ TM_CHANGED_TXBF_ACT, - - /* must be last */ - NUM_TM_CHANGED -@@ -17,6 +21,10 @@ enum { - static const u8 tm_change_map[] = { - [TM_CHANGED_TXPOWER] = MT76_TM_ATTR_TX_POWER, - [TM_CHANGED_FREQ_OFFSET] = MT76_TM_ATTR_FREQ_OFFSET, -+ [TM_CHANGED_SKU_EN] = MT76_TM_ATTR_SKU_EN, -+ [TM_CHANGED_AID] = MT76_TM_ATTR_AID, -+ [TM_CHANGED_CFG] = MT76_TM_ATTR_CFG, -+ [TM_CHANGED_TXBF_ACT] = MT76_TM_ATTR_TXBF_ACT, - }; - - struct reg_band { -@@ -33,6 +41,57 @@ struct reg_band { - #define TM_REG_MAX_ID 20 - static struct reg_band reg_backup_list[TM_REG_MAX_ID]; - -+static void mt7915_tm_update_entry(struct mt7915_phy *phy); -+ -+static u8 mt7915_tm_chan_bw(enum nl80211_chan_width width) -+{ -+ static const u8 width_to_bw[] = { -+ [NL80211_CHAN_WIDTH_40] = TM_CBW_40MHZ, -+ [NL80211_CHAN_WIDTH_80] = TM_CBW_80MHZ, -+ [NL80211_CHAN_WIDTH_80P80] = TM_CBW_8080MHZ, -+ [NL80211_CHAN_WIDTH_160] = TM_CBW_160MHZ, -+ [NL80211_CHAN_WIDTH_5] = TM_CBW_5MHZ, -+ [NL80211_CHAN_WIDTH_10] = TM_CBW_10MHZ, -+ [NL80211_CHAN_WIDTH_20] = TM_CBW_20MHZ, -+ [NL80211_CHAN_WIDTH_20_NOHT] = TM_CBW_20MHZ, -+ }; -+ -+ if (width >= ARRAY_SIZE(width_to_bw)) -+ return 0; -+ -+ return width_to_bw[width]; -+} -+ -+static int -+mt7915_tm_check_antenna(struct mt7915_phy *phy) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt7915_dev *dev = phy->dev; -+ u8 band_idx = phy->mt76->band_idx; -+ u32 chainmask = phy->mt76->chainmask; -+ -+ chainmask = chainmask >> (dev->chainshift * band_idx); -+ if (td->tx_antenna_mask & ~chainmask) { -+ dev_err(dev->mt76.dev, -+ "tx antenna mask %d exceeds hardware limitation (chainmask %d)\n", -+ td->tx_antenna_mask, chainmask); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static void -+mt7915_tm_update_channel(struct mt7915_phy *phy) -+{ -+ mutex_unlock(&phy->dev->mt76.mutex); -+ mt7915_set_channel(phy); -+ mutex_lock(&phy->dev->mt76.mutex); -+ -+ mt7915_mcu_set_chan_info(phy, MCU_EXT_CMD(SET_RX_PATH)); -+ -+ mt7915_tm_update_entry(phy); -+} - - static int - mt7915_tm_set_tx_power(struct mt7915_phy *phy) -@@ -119,18 +178,28 @@ mt7915_tm_set_trx(struct mt7915_phy *phy, int type, bool en) - } - - static int --mt7915_tm_clean_hwq(struct mt7915_phy *phy, u8 wcid) -+mt7915_tm_clean_hwq(struct mt7915_phy *phy) - { -+ struct mt76_testmode_entry_data *ed; -+ struct mt76_wcid *wcid; - struct mt7915_dev *dev = phy->dev; - struct mt7915_tm_cmd req = { - .testmode_en = 1, - .param_idx = MCU_ATE_CLEAN_TXQUEUE, -- .param.clean.wcid = wcid, - .param.clean.band = phy->mt76->band_idx, - }; - -- return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, -- sizeof(req), false); -+ mt76_tm_for_each_entry(phy->mt76, wcid, ed) { -+ int ret; -+ -+ req.param.clean.wcid = wcid->idx; -+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), -+ &req, sizeof(req), false); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; - } - - static int -@@ -141,7 +210,7 @@ mt7915_tm_set_phy_count(struct mt7915_phy *phy, u8 control) - .testmode_en = 1, - .param_idx = MCU_ATE_SET_PHY_COUNT, - .param.cfg.enable = control, -- .param.cfg.band = phy != &dev->phy, -+ .param.cfg.band = phy->mt76->band_idx, - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, -@@ -182,12 +251,739 @@ mt7915_tm_set_tam_arb(struct mt7915_phy *phy, bool enable, bool mu) - return mt7915_mcu_set_muru_ctrl(dev, MURU_SET_ARB_OP_MODE, op_mode); - } - -+static int -+mt7915_tm_set_cfg(struct mt7915_phy *phy) -+{ -+ static const u8 cfg_cmd[] = { -+ [MT76_TM_CFG_TSSI] = MCU_ATE_SET_TSSI, -+ [MT76_TM_CFG_DPD] = MCU_ATE_SET_DPD, -+ [MT76_TM_CFG_RATE_POWER_OFFSET] = MCU_ATE_SET_RATE_POWER_OFFSET, -+ [MT76_TM_CFG_THERMAL_COMP] = MCU_ATE_SET_THERMAL_COMP, -+ }; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_tm_cmd req = { -+ .testmode_en = !(phy->mt76->test.state == MT76_TM_STATE_OFF), -+ .param_idx = cfg_cmd[td->cfg.type], -+ .param.cfg.enable = td->cfg.enable, -+ .param.cfg.band = phy->mt76->band_idx, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, -+ sizeof(req), false); -+} -+ -+static int -+mt7915_tm_add_txbf(struct mt7915_phy *phy, struct ieee80211_vif *vif, -+ struct ieee80211_sta *sta, u8 pfmu_idx, u8 nr, -+ u8 nc, bool ebf) -+{ -+ struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; -+ struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; -+ struct mt7915_dev *dev = phy->dev; -+ struct sk_buff *skb; -+ struct sta_rec_bf *bf; -+ struct tlv *tlv; -+ u8 ndp_rate; -+ -+ if (nr == 1) -+ ndp_rate = 8; -+ else if (nr == 2) -+ ndp_rate = 16; -+ else -+ ndp_rate = 24; -+ -+ skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, -+ &msta->wcid); -+ if (IS_ERR(skb)) -+ return PTR_ERR(skb); -+ -+ tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); -+ bf = (struct sta_rec_bf *)tlv; -+ -+ bf->pfmu = cpu_to_le16(pfmu_idx); -+ bf->sounding_phy = 1; -+ bf->bf_cap = ebf; -+ bf->ncol = nc; -+ bf->nrow = nr; -+ bf->ndp_rate = ndp_rate; -+ bf->ibf_timeout = 0xff; -+ bf->tx_mode = MT_PHY_TYPE_HT; -+ -+ if (ebf) { -+ bf->mem[0].row = 0; -+ bf->mem[1].row = 1; -+ bf->mem[2].row = 2; -+ bf->mem[3].row = 3; -+ } else { -+ bf->mem[0].row = 4; -+ bf->mem[1].row = 5; -+ bf->mem[2].row = 6; -+ bf->mem[3].row = 7; -+ } -+ -+ return mt76_mcu_skb_send_msg(&dev->mt76, skb, -+ MCU_EXT_CMD(STA_REC_UPDATE), true); -+} -+ -+static int -+mt7915_tm_entry_add(struct mt7915_phy *phy, u8 aid) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_testmode_entry_data *ed; -+ struct ieee80211_sband_iftype_data *sdata; -+ struct ieee80211_supported_band *sband; -+ struct ieee80211_sta *sta; -+ struct mt7915_sta *msta; -+ int tid, ret; -+ -+ if (td->entry_num >= MT76_TM_MAX_ENTRY_NUM) -+ return -EINVAL; -+ -+ sta = kzalloc(sizeof(*sta) + phy->mt76->hw->sta_data_size + -+ sizeof(*ed), GFP_KERNEL); -+ if (!sta) -+ return -ENOMEM; -+ -+ msta = (struct mt7915_sta *)sta->drv_priv; -+ ed = mt76_testmode_entry_data(phy->mt76, &msta->wcid); -+ memcpy(ed, &td->ed, sizeof(*ed)); -+ -+ if (phy->mt76->chandef.chan->band == NL80211_BAND_5GHZ) { -+ sband = &phy->mt76->sband_5g.sband; -+ sdata = phy->iftype[NL80211_BAND_5GHZ]; -+ } else if (phy->mt76->chandef.chan->band == NL80211_BAND_6GHZ) { -+ sband = &phy->mt76->sband_6g.sband; -+ sdata = phy->iftype[NL80211_BAND_6GHZ]; -+ } else { -+ sband = &phy->mt76->sband_2g.sband; -+ sdata = phy->iftype[NL80211_BAND_2GHZ]; -+ } -+ -+ memcpy(sta->addr, ed->addr[0], ETH_ALEN); -+ if (phy->test.bf_en) { -+ u8 addr[ETH_ALEN] = {0x00, 0x11, 0x11, 0x11, 0x11, 0x11}; -+ -+ memcpy(sta->addr, addr, ETH_ALEN); -+ } -+ -+ if (td->tx_rate_mode >= MT76_TM_TX_MODE_HT) -+ memcpy(&sta->deflink.ht_cap, &sband->ht_cap, sizeof(sta->deflink.ht_cap)); -+ if (td->tx_rate_mode >= MT76_TM_TX_MODE_VHT) -+ memcpy(&sta->deflink.vht_cap, &sband->vht_cap, sizeof(sta->deflink.vht_cap)); -+ if (td->tx_rate_mode >= MT76_TM_TX_MODE_HE_SU) -+ memcpy(&sta->deflink.he_cap, &sdata[NL80211_IFTYPE_STATION].he_cap, -+ sizeof(sta->deflink.he_cap)); -+ sta->aid = aid; -+ sta->wme = 1; -+ -+ ret = mt7915_mac_sta_add(&phy->dev->mt76, phy->monitor_vif, sta); -+ if (ret) { -+ kfree(sta); -+ return ret; -+ } -+ -+ /* prevent from starting tx ba session */ -+ for (tid = 0; tid < 8; tid++) -+ set_bit(tid, &msta->wcid.ampdu_state); -+ -+ list_add_tail(&msta->wcid.list, &td->tm_entry_list); -+ td->entry_num++; -+ -+ return 0; -+} -+ -+static void -+mt7915_tm_entry_remove(struct mt7915_phy *phy, u8 aid) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_wcid *wcid, *tmp; -+ -+ if (list_empty(&td->tm_entry_list)) -+ return; -+ -+ list_for_each_entry_safe(wcid, tmp, &td->tm_entry_list, list) { -+ struct mt76_testmode_entry_data *ed; -+ struct mt7915_dev *dev = phy->dev; -+ struct ieee80211_sta *sta; -+ -+ ed = mt76_testmode_entry_data(phy->mt76, wcid); -+ if (aid && ed->aid != aid) -+ continue; -+ -+ sta = wcid_to_sta(wcid); -+ mt7915_mac_sta_remove(&dev->mt76, phy->monitor_vif, sta); -+ mt76_wcid_mask_clear(dev->mt76.wcid_mask, wcid->idx); -+ -+ list_del_init(&wcid->list); -+ kfree(sta); -+ phy->mt76->test.entry_num--; -+ } -+} -+ -+static int -+mt7915_tm_set_entry(struct mt7915_phy *phy) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_testmode_entry_data *ed; -+ struct mt76_wcid *wcid; -+ -+ if (!td->aid) { -+ if (td->state > MT76_TM_STATE_IDLE) -+ mt76_testmode_set_state(phy->mt76, MT76_TM_STATE_IDLE); -+ mt7915_tm_entry_remove(phy, td->aid); -+ return 0; -+ } -+ -+ mt76_tm_for_each_entry(phy->mt76, wcid, ed) { -+ if (ed->aid == td->aid) { -+ struct sk_buff *skb; -+ -+ local_bh_disable(); -+ skb = ed->tx_skb; -+ memcpy(ed, &td->ed, sizeof(*ed)); -+ ed->tx_skb = skb; -+ local_bh_enable(); -+ -+ return 0; -+ } -+ } -+ -+ return mt7915_tm_entry_add(phy, td->aid); -+} -+ -+static void -+mt7915_tm_update_entry(struct mt7915_phy *phy) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_testmode_entry_data *ed, tmp; -+ struct mt76_wcid *wcid, *last; -+ -+ if (!td->aid || phy->test.bf_en) -+ return; -+ -+ memcpy(&tmp, &td->ed, sizeof(tmp)); -+ last = list_last_entry(&td->tm_entry_list, -+ struct mt76_wcid, list); -+ -+ mt76_tm_for_each_entry(phy->mt76, wcid, ed) { -+ memcpy(&td->ed, ed, sizeof(td->ed)); -+ mt7915_tm_entry_remove(phy, td->aid); -+ mt7915_tm_entry_add(phy, td->aid); -+ if (wcid == last) -+ break; -+ } -+ -+ memcpy(&td->ed, &tmp, sizeof(td->ed)); -+} -+ -+static int -+mt7915_tm_txbf_init(struct mt7915_phy *phy, u16 *val) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt7915_dev *dev = phy->dev; -+ bool enable = val[0]; -+ void *phase_cal, *pfmu_data, *pfmu_tag; -+ u8 addr[ETH_ALEN] = {0x00, 0x22, 0x22, 0x22, 0x22, 0x22}; -+ -+ if (!enable) { -+ phy->test.bf_en = 0; -+ return 0; -+ } -+ -+ if (!dev->test.txbf_phase_cal) { -+ phase_cal = devm_kzalloc(dev->mt76.dev, -+ sizeof(struct mt7915_tm_txbf_phase) * -+ MAX_PHASE_GROUP_NUM, -+ GFP_KERNEL); -+ if (!phase_cal) -+ return -ENOMEM; -+ -+ dev->test.txbf_phase_cal = phase_cal; -+ } -+ -+ if (!dev->test.txbf_pfmu_data) { -+ pfmu_data = devm_kzalloc(dev->mt76.dev, 512, GFP_KERNEL); -+ if (!pfmu_data) -+ return -ENOMEM; -+ -+ dev->test.txbf_pfmu_data = pfmu_data; -+ } -+ -+ if (!dev->test.txbf_pfmu_tag) { -+ pfmu_tag = devm_kzalloc(dev->mt76.dev, -+ sizeof(struct mt7915_tm_pfmu_tag), GFP_KERNEL); -+ if (!pfmu_tag) -+ return -ENOMEM; -+ -+ dev->test.txbf_pfmu_tag = pfmu_tag; -+ } -+ -+ memcpy(phy->monitor_vif->addr, addr, ETH_ALEN); -+ mt7915_mcu_add_dev_info(phy, phy->monitor_vif, true); -+ -+ td->tx_rate_mode = MT76_TM_TX_MODE_HT; -+ td->tx_mpdu_len = 1024; -+ td->tx_rate_sgi = 0; -+ td->tx_ipg = 100; -+ phy->test.bf_en = 1; -+ -+ return mt7915_tm_set_trx(phy, TM_MAC_TX, true); -+} -+ -+static int -+mt7915_tm_txbf_phase_comp(struct mt7915_phy *phy, u16 *val) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 category; -+ u8 wlan_idx_lo; -+ u8 bw; -+ u8 jp_band; -+ u8 dbdc_idx; -+ bool read_from_e2p; -+ bool disable; -+ u8 wlan_idx_hi; -+ u8 buf[40]; -+ } __packed req = { -+ .category = MT_BF_IBF_PHASE_COMP, -+ .bw = val[0], -+ .jp_band = (val[2] == 1) ? 1 : 0, -+ .dbdc_idx = phy->mt76->band_idx, -+ .read_from_e2p = val[3], -+ .disable = val[4], -+ }; -+ struct mt7915_tm_txbf_phase *phase = -+ (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -+ -+ wait_event_timeout(dev->mt76.tx_wait, phase[val[2]].status != 0, HZ); -+ memcpy(req.buf, &phase[val[2]].phase, sizeof(req.buf)); -+ -+ pr_info("ibf cal process: phase comp info\n"); -+ print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 1, -+ &req, sizeof(req), 0); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), true); -+} -+ -+static int -+mt7915_tm_txbf_profile_tag_read(struct mt7915_phy *phy, u8 pfmu_idx) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 format_id; -+ u8 pfmu_idx; -+ bool bfer; -+ u8 dbdc_idx; -+ } __packed req = { -+ .format_id = MT_BF_PFMU_TAG_READ, -+ .pfmu_idx = pfmu_idx, -+ .bfer = 1, -+ .dbdc_idx = phy != &dev->phy, -+ }; -+ struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag; -+ -+ tag->t1.pfmu_idx = 0; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), true); -+} -+ -+static int -+mt7915_tm_txbf_profile_tag_write(struct mt7915_phy *phy, u8 pfmu_idx, -+ struct mt7915_tm_pfmu_tag *tag) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 format_id; -+ u8 pfmu_idx; -+ bool bfer; -+ u8 dbdc_idx; -+ u8 buf[64]; -+ } __packed req = { -+ .format_id = MT_BF_PFMU_TAG_WRITE, -+ .pfmu_idx = pfmu_idx, -+ .bfer = 1, -+ .dbdc_idx = phy != &dev->phy, -+ }; -+ -+ memcpy(req.buf, tag, sizeof(*tag)); -+ wait_event_timeout(dev->mt76.tx_wait, tag->t1.pfmu_idx != 0, HZ); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), false); -+} -+ -+static int -+mt7915_tm_txbf_apply_tx(struct mt7915_phy *phy, u16 wlan_idx, bool ebf, -+ bool ibf, bool phase_cal) -+{ -+#define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) -+#define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 category; -+ u8 wlan_idx_lo; -+ bool ebf; -+ bool ibf; -+ bool mu_txbf; -+ bool phase_cal; -+ u8 wlan_idx_hi; -+ u8 _rsv; -+ } __packed req = { -+ .category = MT_BF_DATA_PACKET_APPLY, -+ .wlan_idx_lo = to_wcid_lo(wlan_idx), -+ .ebf = ebf, -+ .ibf = ibf, -+ .phase_cal = phase_cal, -+ .wlan_idx_hi = to_wcid_hi(wlan_idx), -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), false); -+} -+ -+static int mt7915_tm_txbf_set_rate(struct mt7915_phy *phy, -+ struct mt76_wcid *wcid) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_testmode_entry_data *ed = mt76_testmode_entry_data(phy->mt76, wcid); -+ struct ieee80211_sta *sta = wcid_to_sta(wcid); -+ struct sta_phy rate = {}; -+ -+ if (!sta) -+ return 0; -+ -+ rate.type = MT_PHY_TYPE_HT; -+ rate.bw = mt7915_tm_chan_bw(phy->mt76->chandef.width); -+ rate.nss = ed->tx_rate_nss; -+ rate.mcs = ed->tx_rate_idx; -+ rate.ldpc = (rate.bw || ed->tx_rate_ldpc) * GENMASK(2, 0); -+ -+ return mt7915_mcu_set_fixed_rate_ctrl(dev, phy->monitor_vif, sta, -+ &rate, RATE_PARAM_FIXED); -+} -+ -+static int -+mt7915_tm_txbf_set_tx(struct mt7915_phy *phy, u16 *val) -+{ -+ bool bf_on = val[0], update = val[3]; -+ /* u16 wlan_idx = val[2]; */ -+ struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_wcid *wcid; -+ -+ if (bf_on) { -+ mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false); -+ mt7915_tm_txbf_profile_tag_read(phy, 2); -+ tag->t1.invalid_prof = false; -+ mt7915_tm_txbf_profile_tag_write(phy, 2, tag); -+ -+ phy->test.bf_ever_en = true; -+ -+ if (update) -+ mt7915_tm_txbf_apply_tx(phy, 1, 0, 1, 1); -+ } else { -+ if (!phy->test.bf_ever_en) { -+ if (update) -+ mt7915_tm_txbf_apply_tx(phy, 1, 0, 0, 0); -+ } else { -+ phy->test.bf_ever_en = false; -+ -+ mt7915_tm_txbf_profile_tag_read(phy, 2); -+ tag->t1.invalid_prof = true; -+ mt7915_tm_txbf_profile_tag_write(phy, 2, tag); -+ } -+ } -+ -+ wcid = list_first_entry(&td->tm_entry_list, struct mt76_wcid, list); -+ mt7915_tm_txbf_set_rate(phy, wcid); -+ -+ return 0; -+} -+ -+static int -+mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf) -+{ -+ static const u8 mode_to_lm[] = { -+ [MT76_TM_TX_MODE_CCK] = 0, -+ [MT76_TM_TX_MODE_OFDM] = 0, -+ [MT76_TM_TX_MODE_HT] = 1, -+ [MT76_TM_TX_MODE_VHT] = 2, -+ [MT76_TM_TX_MODE_HE_SU] = 3, -+ [MT76_TM_TX_MODE_HE_EXT_SU] = 3, -+ [MT76_TM_TX_MODE_HE_TB] = 3, -+ [MT76_TM_TX_MODE_HE_MU] = 3, -+ }; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_wcid *wcid; -+ struct ieee80211_vif *vif = phy->monitor_vif; -+ struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag; -+ u8 pfmu_idx = val[0], nc = val[2], nr; -+ int ret; -+ -+ if (td->tx_antenna_mask == 3) -+ nr = 1; -+ else if (td->tx_antenna_mask == 7) -+ nr = 2; -+ else -+ nr = 3; -+ -+ memset(tag, 0, sizeof(*tag)); -+ tag->t1.pfmu_idx = pfmu_idx; -+ tag->t1.ebf = ebf; -+ tag->t1.nr = nr; -+ tag->t1.nc = nc; -+ tag->t1.invalid_prof = true; -+ -+ tag->t1.snr_sts4 = 0xc0; -+ tag->t1.snr_sts5 = 0xff; -+ tag->t1.snr_sts6 = 0xff; -+ tag->t1.snr_sts7 = 0xff; -+ -+ if (ebf) { -+ tag->t1.row_id1 = 0; -+ tag->t1.row_id2 = 1; -+ tag->t1.row_id3 = 2; -+ tag->t1.row_id4 = 3; -+ tag->t1.lm = mode_to_lm[MT76_TM_TX_MODE_HT]; -+ } else { -+ tag->t1.row_id1 = 4; -+ tag->t1.row_id2 = 5; -+ tag->t1.row_id3 = 6; -+ tag->t1.row_id4 = 7; -+ tag->t1.lm = mode_to_lm[MT76_TM_TX_MODE_OFDM]; -+ -+ tag->t2.ibf_timeout = 0xff; -+ tag->t2.ibf_nr = nr; -+ } -+ -+ ret = mt7915_tm_txbf_profile_tag_write(phy, pfmu_idx, tag); -+ if (ret) -+ return ret; -+ -+ wcid = list_first_entry(&td->tm_entry_list, struct mt76_wcid, list); -+ ret = mt7915_tm_add_txbf(phy, vif, wcid_to_sta(wcid), pfmu_idx, nr, nc, ebf); -+ if (ret) -+ return ret; -+ -+ if (!ebf) -+ return mt7915_tm_txbf_apply_tx(phy, 1, false, true, true); -+ -+ return 0; -+} -+ -+static int -+mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val) -+{ -+#define GROUP_L 0 -+#define GROUP_M 1 -+#define GROUP_H 2 -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 category; -+ u8 group_l_m_n; -+ u8 group; -+ bool sx2; -+ u8 cal_type; -+ u8 lna_gain_level; -+ u8 _rsv[2]; -+ } __packed req = { -+ .category = MT_BF_PHASE_CAL, -+ .group = val[0], -+ .group_l_m_n = val[1], -+ .sx2 = val[2], -+ .cal_type = val[3], -+ .lna_gain_level = 0, /* for test purpose */ -+ }; -+ struct mt7915_tm_txbf_phase *phase = -+ (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -+ -+ phase[req.group].status = 0; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), true); -+} -+ -+int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb) -+{ -+#define BF_PFMU_TAG 16 -+#define BF_CAL_PHASE 21 -+ u8 format_id; -+ -+ skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); -+ format_id = *(u8 *)skb->data; -+ -+ if (format_id == BF_PFMU_TAG) { -+ struct mt7915_tm_pfmu_tag *tag = dev->test.txbf_pfmu_tag; -+ -+ skb_pull(skb, 8); -+ memcpy(tag, skb->data, sizeof(struct mt7915_tm_pfmu_tag)); -+ } else if (format_id == BF_CAL_PHASE) { -+ struct mt7915_tm_ibf_cal_info *cal; -+ struct mt7915_tm_txbf_phase *phase = -+ (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -+ -+ cal = (struct mt7915_tm_ibf_cal_info *)skb->data; -+ switch (cal->cal_type) { -+ case IBF_PHASE_CAL_NORMAL: -+ case IBF_PHASE_CAL_NORMAL_INSTRUMENT: -+ if (cal->group_l_m_n != GROUP_M) -+ break; -+ phase = &phase[cal->group]; -+ memcpy(&phase->phase, cal->buf + 16, sizeof(phase->phase)); -+ phase->status = cal->status; -+ break; -+ case IBF_PHASE_CAL_VERIFY: -+ case IBF_PHASE_CAL_VERIFY_INSTRUMENT: -+ break; -+ default: -+ break; -+ } -+ } -+ -+ wake_up(&dev->mt76.tx_wait); -+ -+ return 0; -+} -+ -+static int -+mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ u8 nss = hweight8(td->tx_antenna_mask); -+ u16 pfmu_idx = val[0]; -+ u16 subc_id = val[1]; -+ u16 angle11 = val[2]; -+ u16 angle21 = val[3]; -+ u16 angle31 = val[4]; -+ u16 angle41 = val[5]; -+ s16 phi11 = 0, phi21 = 0, phi31 = 0; -+ struct mt7915_tm_pfmu_data *pfmu_data; -+ -+ if (subc_id > 63) -+ return -EINVAL; -+ -+ if (nss == 2) { -+ phi11 = (s16)(angle21 - angle11); -+ } else if (nss == 3) { -+ phi11 = (s16)(angle31 - angle11); -+ phi21 = (s16)(angle31 - angle21); -+ } else { -+ phi11 = (s16)(angle41 - angle11); -+ phi21 = (s16)(angle41 - angle21); -+ phi31 = (s16)(angle41 - angle31); -+ } -+ -+ pfmu_data = (struct mt7915_tm_pfmu_data *)phy->dev->test.txbf_pfmu_data; -+ pfmu_data = &pfmu_data[subc_id]; -+ -+ if (subc_id < 32) -+ pfmu_data->subc_idx = cpu_to_le16(subc_id + 224); -+ else -+ pfmu_data->subc_idx = cpu_to_le16(subc_id - 32); -+ pfmu_data->phi11 = cpu_to_le16(phi11); -+ pfmu_data->phi21 = cpu_to_le16(phi21); -+ pfmu_data->phi31 = cpu_to_le16(phi31); -+ -+ if (subc_id == 63) { -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 format_id; -+ u8 pfmu_idx; -+ u8 dbdc_idx; -+ u8 _rsv; -+ u8 buf[512]; -+ } __packed req = { -+ .format_id = MT_BF_PROFILE_WRITE_ALL, -+ .pfmu_idx = pfmu_idx, -+ .dbdc_idx = phy != &dev->phy, -+ }; -+ -+ memcpy(req.buf, dev->test.txbf_pfmu_data, 512); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), -+ &req, sizeof(req), true); -+ } -+ -+ return 0; -+} -+ -+static int -+mt7915_tm_txbf_e2p_update(struct mt7915_phy *phy) -+{ -+ struct mt7915_tm_txbf_phase *phase, *p; -+ struct mt7915_dev *dev = phy->dev; -+ u8 *eeprom = dev->mt76.eeprom.data; -+ u16 offset; -+ bool is_7976; -+ int i; -+ -+ is_7976 = mt7915_check_adie(dev, false) || is_mt7916(&dev->mt76); -+ offset = is_7976 ? 0x60a : 0x651; -+ -+ phase = (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -+ for (i = 0; i < MAX_PHASE_GROUP_NUM; i++) { -+ p = &phase[i]; -+ -+ if (!p->status) -+ continue; -+ -+ /* copy phase cal data to eeprom */ -+ memcpy(eeprom + offset + i * sizeof(p->phase), &p->phase, -+ sizeof(p->phase)); -+ } -+ -+ return 0; -+} -+ -+static int -+mt7915_tm_set_txbf(struct mt7915_phy *phy) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ u16 *val = td->txbf_param; -+ -+ pr_info("ibf cal process: act = %u, val = %u, %u, %u, %u, %u\n", -+ td->txbf_act, val[0], val[1], val[2], val[3], val[4]); -+ -+ switch (td->txbf_act) { -+ case MT76_TM_TXBF_ACT_INIT: -+ return mt7915_tm_txbf_init(phy, val); -+ case MT76_TM_TXBF_ACT_UPDATE_CH: -+ mt7915_tm_update_channel(phy); -+ break; -+ case MT76_TM_TXBF_ACT_PHASE_COMP: -+ return mt7915_tm_txbf_phase_comp(phy, val); -+ case MT76_TM_TXBF_ACT_TX_PREP: -+ return mt7915_tm_txbf_set_tx(phy, val); -+ case MT76_TM_TXBF_ACT_IBF_PROF_UPDATE: -+ return mt7915_tm_txbf_profile_update(phy, val, false); -+ case MT76_TM_TXBF_ACT_EBF_PROF_UPDATE: -+ return mt7915_tm_txbf_profile_update(phy, val, true); -+ case MT76_TM_TXBF_ACT_PHASE_CAL: -+ return mt7915_tm_txbf_phase_cal(phy, val); -+ case MT76_TM_TXBF_ACT_PROF_UPDATE_ALL: -+ return mt7915_tm_txbf_profile_update_all(phy, val); -+ case MT76_TM_TXBF_ACT_E2P_UPDATE: -+ return mt7915_tm_txbf_e2p_update(phy); -+ default: -+ break; -+ }; -+ -+ return 0; -+} -+ - static int - mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min, -- u16 cw_max, u16 txop) -+ u16 cw_max, u16 txop, u8 tx_cmd) - { - struct mt7915_vif *mvif = (struct mt7915_vif *)phy->monitor_vif->drv_priv; -- struct mt7915_mcu_tx req = { .total = 1 }; -+ struct mt7915_mcu_tx req = { -+ .valid = true, -+ .mode = tx_cmd, -+ .total = 1, -+ }; - struct edca *e = &req.edca[0]; - - e->queue = qid + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS; -@@ -263,7 +1059,8 @@ done: - - return mt7915_tm_set_wmm_qid(phy, - mt76_connac_lmac_mapping(IEEE80211_AC_BE), -- aifsn, cw, cw, 0); -+ aifsn, cw, cw, 0, -+ mode == MT76_TM_TX_MODE_HE_MU); - } - - static int -@@ -339,7 +1136,7 @@ mt7915_tm_set_tx_len(struct mt7915_phy *phy, u32 tx_time) - bitrate = cfg80211_calculate_bitrate(&rate); - tx_len = bitrate * tx_time / 10 / 8; - -- ret = mt76_testmode_alloc_skb(phy->mt76, tx_len); -+ ret = mt76_testmode_init_skb(phy->mt76, tx_len, &td->tx_skb, td->addr); - if (ret) - return ret; - -@@ -447,7 +1244,9 @@ mt7915_tm_init(struct mt7915_phy *phy, bool en) - if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) - return; - -- mt7915_mcu_set_sku_en(phy, !en); -+ phy->sku_limit_en = !en; -+ phy->sku_path_en = !en; -+ mt7915_mcu_set_sku_en(phy); - - mt7915_tm_mode_ctrl(dev, en); - mt7915_tm_reg_backup_restore(phy); -@@ -458,64 +1257,227 @@ mt7915_tm_init(struct mt7915_phy *phy, bool en) - - phy->mt76->test.flag |= MT_TM_FW_RX_COUNT; - -- if (!en) -+ if (!en) { - mt7915_tm_set_tam_arb(phy, en, 0); -+ -+ phy->mt76->test.aid = 0; -+ phy->mt76->test.tx_mpdu_len = 0; -+ phy->test.bf_en = 0; -+ mt7915_tm_set_entry(phy); -+ } -+} -+ -+static bool -+mt7915_tm_check_skb(struct mt7915_phy *phy) -+{ -+ struct mt76_testmode_entry_data *ed; -+ struct mt76_wcid *wcid; -+ -+ mt76_tm_for_each_entry(phy->mt76, wcid, ed) { -+ struct ieee80211_tx_info *info; -+ -+ if (!ed->tx_skb) -+ return false; -+ -+ info = IEEE80211_SKB_CB(ed->tx_skb); -+ info->control.vif = phy->monitor_vif; -+ } -+ -+ return true; -+} -+ -+static int -+mt7915_tm_set_ba(struct mt7915_phy *phy) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_wcid *wcid; -+ struct ieee80211_vif *vif = phy->monitor_vif; -+ struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; -+ struct ieee80211_ampdu_params params = { .buf_size = 256 }; -+ -+ list_for_each_entry(wcid, &td->tm_entry_list, list) { -+ int tid, ret; -+ -+ params.sta = wcid_to_sta(wcid); -+ for (tid = 0; tid < 8; tid++) { -+ params.tid = tid; -+ ret = mt7915_mcu_add_tx_ba(phy->dev, ¶ms, true); -+ if (ret) -+ return ret; -+ } -+ } -+ -+ mt76_wr(dev, MT_AGG_AALCR0(mvif->mt76.band_idx, mvif->mt76.wmm_idx), -+ 0x01010101); -+ -+ return 0; -+} -+ -+static int -+mt7915_tm_set_muru_cfg(struct mt7915_phy *phy, struct mt7915_tm_muru *muru) -+{ -+/* #define MURU_SET_MANUAL_CFG 100 */ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ struct mt7915_tm_muru muru; -+ } __packed req = { -+ .cmd = cpu_to_le32(MURU_SET_MANUAL_CFG), -+ }; -+ -+ memcpy(&req.muru, muru, sizeof(struct mt7915_tm_muru)); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+} -+ -+static int -+mt7915_tm_set_muru_dl(struct mt7915_phy *phy) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_testmode_entry_data *ed; -+ struct mt76_wcid *wcid; -+ struct cfg80211_chan_def *chandef = &phy->mt76->chandef; -+ struct ieee80211_vif *vif = phy->monitor_vif; -+ struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; -+ struct mt7915_tm_muru muru = {}; -+ struct mt7915_tm_muru_comm *comm = &muru.comm; -+ struct mt7915_tm_muru_dl *dl = &muru.dl; -+ int i; -+ -+ comm->ppdu_format = MURU_PPDU_HE_MU; -+ comm->band = mvif->mt76.band_idx; -+ comm->wmm_idx = mvif->mt76.wmm_idx; -+ comm->spe_idx = phy->test.spe_idx; -+ -+ dl->bw = mt7915_tm_chan_bw(chandef->width); -+ dl->gi = td->tx_rate_sgi; -+ dl->ltf = td->tx_ltf; -+ dl->tx_mode = MT_PHY_TYPE_HE_MU; -+ -+ for (i = 0; i < sizeof(dl->ru); i++) -+ dl->ru[i] = 0x71; -+ -+ mt76_tm_for_each_entry(phy->mt76, wcid, ed) { -+ struct mt7915_tm_muru_dl_usr *dl_usr = &dl->usr[dl->user_num]; -+ -+ dl_usr->wlan_idx = cpu_to_le16(wcid->idx); -+ dl_usr->ru_alloc_seg = ed->aid < 8 ? 0 : 1; -+ dl_usr->ru_idx = ed->ru_idx; -+ dl_usr->mcs = ed->tx_rate_idx; -+ dl_usr->nss = ed->tx_rate_nss - 1; -+ dl_usr->ldpc = ed->tx_rate_ldpc; -+ dl->ru[dl->user_num] = ed->ru_alloc; -+ -+ dl->user_num++; -+ } -+ -+ muru.cfg_comm = cpu_to_le32(MURU_COMM_SET_TM); -+ muru.cfg_dl = cpu_to_le32(MURU_DL_SET); -+ -+ return mt7915_tm_set_muru_cfg(phy, &muru); -+} -+ -+static int -+mt7915_tm_set_muru_pkt_cnt(struct mt7915_phy *phy, bool enable, u32 tx_count) -+{ -+#define MURU_SET_TX_PKT_CNT 105 -+#define MURU_SET_TX_EN 106 -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 cmd; -+ u8 band; -+ u8 enable; -+ u8 _rsv[2]; -+ __le32 tx_count; -+ } __packed req = { -+ .band = phy->mt76->band_idx, -+ .enable = enable, -+ .tx_count = enable ? cpu_to_le32(tx_count) : 0, -+ }; -+ int ret; -+ -+ req.cmd = enable ? cpu_to_le32(MURU_SET_TX_PKT_CNT) : -+ cpu_to_le32(MURU_SET_TX_EN); -+ -+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); -+ if (ret) -+ return ret; -+ -+ req.cmd = enable ? cpu_to_le32(MURU_SET_TX_EN) : -+ cpu_to_le32(MURU_SET_TX_PKT_CNT); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req, -+ sizeof(req), false); - } - - static void --mt7915_tm_update_channel(struct mt7915_phy *phy) -+mt7915_tm_tx_frames_mu(struct mt7915_phy *phy, bool enable) - { -- mutex_unlock(&phy->dev->mt76.mutex); -- mt7915_set_channel(phy); -- mutex_lock(&phy->dev->mt76.mutex); -+ struct mt76_testmode_data *td = &phy->mt76->test; - -- mt7915_mcu_set_chan_info(phy, MCU_EXT_CMD(SET_RX_PATH)); -+ if (enable) { -+ struct mt7915_dev *dev = phy->dev; -+ -+ mt7915_tm_set_ba(phy); -+ mt7915_tm_set_muru_dl(phy); -+ mt76_rr(dev, MT_MIB_DR8(phy != &dev->phy)); -+ } else { -+ /* set to zero for counting real tx free num */ -+ td->tx_done = 0; -+ } -+ -+ mt7915_tm_set_muru_pkt_cnt(phy, enable, td->tx_count); -+ usleep_range(100000, 200000); - } - - static void - mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en) - { - struct mt76_testmode_data *td = &phy->mt76->test; -- struct mt7915_dev *dev = phy->dev; -- struct ieee80211_tx_info *info; -- u8 duty_cycle = td->tx_duty_cycle; -- u32 tx_time = td->tx_time; -- u32 ipg = td->tx_ipg; - - mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false); -- mt7915_tm_clean_hwq(phy, dev->mt76.global_wcid.idx); -+ mt7915_tm_set_trx(phy, TM_MAC_TX, false); - - if (en) { -- mt7915_tm_update_channel(phy); -+ u32 tx_time = td->tx_time, ipg = td->tx_ipg; -+ u8 duty_cycle = td->tx_duty_cycle; -+ -+ if (!phy->test.bf_en) -+ mt7915_tm_update_channel(phy); - - if (td->tx_spe_idx) - phy->test.spe_idx = td->tx_spe_idx; - else - phy->test.spe_idx = mt76_connac_spe_idx(td->tx_antenna_mask); -- } - -- mt7915_tm_set_tam_arb(phy, en, -- td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU); -+ /* if all three params are set, duty_cycle will be ignored */ -+ if (duty_cycle && tx_time && !ipg) { -+ ipg = tx_time * 100 / duty_cycle - tx_time; -+ } else if (duty_cycle && !tx_time && ipg) { -+ if (duty_cycle < 100) -+ tx_time = duty_cycle * ipg / (100 - duty_cycle); -+ } - -- /* if all three params are set, duty_cycle will be ignored */ -- if (duty_cycle && tx_time && !ipg) { -- ipg = tx_time * 100 / duty_cycle - tx_time; -- } else if (duty_cycle && !tx_time && ipg) { -- if (duty_cycle < 100) -- tx_time = duty_cycle * ipg / (100 - duty_cycle); -- } -+ mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode); -+ mt7915_tm_set_tx_len(phy, tx_time); - -- mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode); -- mt7915_tm_set_tx_len(phy, tx_time); -+ if (ipg) -+ td->tx_queued_limit = MT76_TM_TIMEOUT * 1000000 / ipg / 2; - -- if (ipg) -- td->tx_queued_limit = MT76_TM_TIMEOUT * 1000000 / ipg / 2; -+ if (!mt7915_tm_check_skb(phy)) -+ return; -+ } else { -+ mt7915_tm_clean_hwq(phy); -+ } - -- if (!en || !td->tx_skb) -- return; -+ mt7915_tm_set_tam_arb(phy, en, -+ td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU); - -- info = IEEE80211_SKB_CB(td->tx_skb); -- info->control.vif = phy->monitor_vif; -+ if (td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU) -+ mt7915_tm_tx_frames_mu(phy, en); - - mt7915_tm_set_trx(phy, TM_MAC_TX, en); - } -@@ -544,10 +1506,6 @@ mt7915_tm_get_rx_stats(struct mt7915_phy *phy, bool clear) - return ret; - - rs_band = (struct mt7915_tm_rx_stat_band *)skb->data; -- /* pr_info("mdrdy_cnt = %d\n", le32_to_cpu(rs_band->mdrdy_cnt)); */ -- /* pr_info("fcs_err = %d\n", le16_to_cpu(rs_band->fcs_err)); */ -- /* pr_info("len_mismatch = %d\n", le16_to_cpu(rs_band->len_mismatch)); */ -- /* pr_info("fcs_ok = %d\n", le16_to_cpu(rs_band->fcs_succ)); */ - - if (!clear) { - enum mt76_rxq_id q = req.band ? MT_RXQ_BAND1 : MT_RXQ_MAIN; -@@ -562,13 +1520,61 @@ mt7915_tm_get_rx_stats(struct mt7915_phy *phy, bool clear) - return 0; - } - -+static int -+mt7915_tm_set_rx_user_idx(struct mt7915_phy *phy, u8 aid) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_wcid *wcid = NULL; -+ struct mt76_testmode_entry_data *ed; -+ struct { -+ u8 band; -+ u8 _rsv; -+ __le16 wlan_idx; -+ } __packed req = { -+ .band = phy->mt76->band_idx, -+ }; -+ -+ mt76_tm_for_each_entry(phy->mt76, wcid, ed) -+ if (ed->aid == aid) -+ break; -+ -+ if (!wcid) -+ return -EINVAL; -+ -+ req.wlan_idx = cpu_to_le16(wcid->idx); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_STAT_USER_CTRL), -+ &req, sizeof(req), false); -+} -+ -+static int -+mt7915_tm_set_muru_aid(struct mt7915_phy *phy, u16 aid) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_tm_cmd req = { -+ .testmode_en = 1, -+ .param_idx = MCU_ATE_SET_MU_RX_AID, -+ .param.rx_aid.band = cpu_to_le32(phy->mt76->band_idx), -+ .param.rx_aid.aid = cpu_to_le16(aid), -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req, -+ sizeof(req), false); -+} -+ - static void - mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en) - { -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ -+ mt7915_tm_set_trx(phy, TM_MAC_TX, false); - mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false); - - if (en) { -- mt7915_tm_update_channel(phy); -+ if (!phy->test.bf_en) -+ mt7915_tm_update_channel(phy); -+ if (td->aid) -+ mt7915_tm_set_rx_user_idx(phy, td->aid); - - /* read-clear */ - mt7915_tm_get_rx_stats(phy, true); -@@ -576,9 +1582,12 @@ mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en) - /* clear fw count */ - mt7915_tm_set_phy_count(phy, 0); - mt7915_tm_set_phy_count(phy, 1); -- -- mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en); - } -+ -+ if (td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU) -+ mt7915_tm_set_muru_aid(phy, en ? td->aid : 0xf800); -+ -+ mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en); - } - - static int -@@ -617,34 +1626,7 @@ mt7915_tm_set_tx_cont(struct mt7915_phy *phy, bool en) - tx_cont->tx_ant = td->tx_antenna_mask; - tx_cont->band = band; - -- switch (chandef->width) { -- case NL80211_CHAN_WIDTH_40: -- tx_cont->bw = CMD_CBW_40MHZ; -- break; -- case NL80211_CHAN_WIDTH_80: -- tx_cont->bw = CMD_CBW_80MHZ; -- break; -- case NL80211_CHAN_WIDTH_80P80: -- tx_cont->bw = CMD_CBW_8080MHZ; -- break; -- case NL80211_CHAN_WIDTH_160: -- tx_cont->bw = CMD_CBW_160MHZ; -- break; -- case NL80211_CHAN_WIDTH_5: -- tx_cont->bw = CMD_CBW_5MHZ; -- break; -- case NL80211_CHAN_WIDTH_10: -- tx_cont->bw = CMD_CBW_10MHZ; -- break; -- case NL80211_CHAN_WIDTH_20: -- tx_cont->bw = CMD_CBW_20MHZ; -- break; -- case NL80211_CHAN_WIDTH_20_NOHT: -- tx_cont->bw = CMD_CBW_20MHZ; -- break; -- default: -- return -EINVAL; -- } -+ tx_cont->bw = mt7915_tm_chan_bw(chandef->width); - - if (!en) { - req.op.rf.param.func_data = cpu_to_le32(band); -@@ -728,6 +1710,18 @@ mt7915_tm_update_params(struct mt7915_phy *phy, u32 changed) - mt7915_tm_set_freq_offset(phy, en, en ? td->freq_offset : 0); - if (changed & BIT(TM_CHANGED_TXPOWER)) - mt7915_tm_set_tx_power(phy); -+ if (changed & BIT(TM_CHANGED_SKU_EN)) { -+ phy->sku_limit_en = td->sku_en; -+ phy->sku_path_en = td->sku_en; -+ mt7915_mcu_set_sku_en(phy); -+ mt7915_mcu_set_txpower_sku(phy); -+ } -+ if (changed & BIT(TM_CHANGED_AID)) -+ mt7915_tm_set_entry(phy); -+ if (changed & BIT(TM_CHANGED_CFG)) -+ mt7915_tm_set_cfg(phy); -+ if (changed & BIT(TM_CHANGED_TXBF_ACT)) -+ mt7915_tm_set_txbf(phy); - } - - static int -@@ -737,6 +1731,11 @@ mt7915_tm_set_state(struct mt76_phy *mphy, enum mt76_testmode_state state) - struct mt7915_phy *phy = mphy->priv; - enum mt76_testmode_state prev_state = td->state; - -+ if (!phy->monitor_vif) { -+ dev_err(phy->dev->mt76.dev, "Please make sure monitor interface is up\n"); -+ return -ENOTCONN; -+ } -+ - mphy->test.state = state; - - if (prev_state == MT76_TM_STATE_TX_FRAMES || -@@ -757,7 +1756,7 @@ mt7915_tm_set_state(struct mt76_phy *mphy, enum mt76_testmode_state state) - (state == MT76_TM_STATE_OFF && - prev_state == MT76_TM_STATE_IDLE)) { - u32 changed = 0; -- int i; -+ int i, ret; - - for (i = 0; i < ARRAY_SIZE(tm_change_map); i++) { - u16 cur = tm_change_map[i]; -@@ -766,6 +1765,10 @@ mt7915_tm_set_state(struct mt76_phy *mphy, enum mt76_testmode_state state) - changed |= BIT(i); - } - -+ ret = mt7915_tm_check_antenna(phy); -+ if (ret) -+ return ret; -+ - mt7915_tm_update_params(phy, changed); - } - -@@ -778,10 +1781,8 @@ mt7915_tm_set_params(struct mt76_phy *mphy, struct nlattr **tb, - { - struct mt76_testmode_data *td = &mphy->test; - struct mt7915_phy *phy = mphy->priv; -- struct mt7915_dev *dev = phy->dev; -- u32 chainmask = mphy->chainmask, changed = 0; -- bool ext_phy = phy != &dev->phy; -- int i; -+ u32 changed = 0; -+ int i, ret; - - BUILD_BUG_ON(NUM_TM_CHANGED >= 32); - -@@ -789,9 +1790,9 @@ mt7915_tm_set_params(struct mt76_phy *mphy, struct nlattr **tb, - td->state == MT76_TM_STATE_OFF) - return 0; - -- chainmask = ext_phy ? chainmask >> dev->chainshift : chainmask; -- if (td->tx_antenna_mask > chainmask) -- return -EINVAL; -+ ret = mt7915_tm_check_antenna(phy); -+ if (ret) -+ return ret; - - for (i = 0; i < ARRAY_SIZE(tm_change_map); i++) { - if (tb[tm_change_map[i]]) -@@ -807,6 +1808,7 @@ static int - mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg) - { - struct mt7915_phy *phy = mphy->priv; -+ struct mt7915_dev *dev = phy->dev; - void *rx, *rssi; - int i; - -@@ -827,6 +1829,16 @@ mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg) - - nla_nest_end(msg, rssi); - -+ rssi = nla_nest_start(msg, MT76_TM_RX_ATTR_RSSI); -+ if (!rssi) -+ return -ENOMEM; -+ -+ for (i = 0; i < ARRAY_SIZE(phy->test.last_rssi); i++) -+ if (nla_put_s8(msg, i, phy->test.last_rssi[i])) -+ return -ENOMEM; -+ -+ nla_nest_end(msg, rssi); -+ - rssi = nla_nest_start(msg, MT76_TM_RX_ATTR_IB_RSSI); - if (!rssi) - return -ENOMEM; -@@ -852,11 +1864,75 @@ mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg) - - nla_nest_end(msg, rx); - -+ if (mphy->test.tx_rate_mode == MT76_TM_TX_MODE_HE_MU) -+ mphy->test.tx_done += mt76_rr(dev, MT_MIB_DR8(phy != &dev->phy)); -+ - return mt7915_tm_get_rx_stats(phy, false); - } - -+static int -+mt7915_tm_write_back_to_efuse(struct mt7915_dev *dev) -+{ -+ struct mt7915_mcu_eeprom_info req = {}; -+ u8 read_buf[MT76_TM_EEPROM_BLOCK_SIZE], *eeprom = dev->mt76.eeprom.data; -+ int i, ret = -EINVAL; -+ -+ /* prevent from damaging chip id in efuse */ -+ if (mt76_chip(&dev->mt76) != get_unaligned_le16(eeprom)) -+ goto out; -+ -+ for (i = 0; i < mt7915_eeprom_size(dev); i += MT76_TM_EEPROM_BLOCK_SIZE) { -+ req.addr = cpu_to_le32(i); -+ memcpy(req.data, eeprom + i, MT76_TM_EEPROM_BLOCK_SIZE); -+ -+ ret = mt7915_mcu_get_eeprom(dev, i, read_buf); -+ if (ret < 0) -+ return ret; -+ -+ if (!memcmp(req.data, read_buf, MT76_TM_EEPROM_BLOCK_SIZE)) -+ continue; -+ -+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_ACCESS), -+ &req, sizeof(req), true); -+ if (ret) -+ return ret; -+ } -+ -+out: -+ return ret; -+} -+ -+static int -+mt7915_tm_set_eeprom(struct mt76_phy *mphy, u32 offset, u8 *val, u8 action) -+{ -+ struct mt7915_phy *phy = mphy->priv; -+ struct mt7915_dev *dev = phy->dev; -+ u8 *eeprom = dev->mt76.eeprom.data; -+ int ret = 0; -+ -+ if (offset >= mt7915_eeprom_size(dev)) -+ return -EINVAL; -+ -+ switch (action) { -+ case MT76_TM_EEPROM_ACTION_UPDATE_DATA: -+ memcpy(eeprom + offset, val, MT76_TM_EEPROM_BLOCK_SIZE); -+ break; -+ case MT76_TM_EEPROM_ACTION_UPDATE_BUFFER_MODE: -+ ret = mt7915_mcu_set_eeprom(dev, true); -+ break; -+ case MT76_TM_EEPROM_ACTION_WRITE_TO_EFUSE: -+ ret = mt7915_tm_write_back_to_efuse(dev); -+ break; -+ default: -+ break; -+ } -+ -+ return ret; -+} -+ - const struct mt76_testmode_ops mt7915_testmode_ops = { - .set_state = mt7915_tm_set_state, - .set_params = mt7915_tm_set_params, - .dump_stats = mt7915_tm_dump_stats, -+ .set_eeprom = mt7915_tm_set_eeprom, - }; -diff --git a/mt7915/testmode.h b/mt7915/testmode.h -index a1c54c8..eb0e043 100644 ---- a/mt7915/testmode.h -+++ b/mt7915/testmode.h -@@ -4,6 +4,8 @@ - #ifndef __MT7915_TESTMODE_H - #define __MT7915_TESTMODE_H - -+#include "mcu.h" -+ - struct mt7915_tm_trx { - u8 type; - u8 enable; -@@ -39,6 +41,11 @@ struct mt7915_tm_cfg { - u8 _rsv[2]; - }; - -+struct mt7915_tm_mu_rx_aid { -+ __le32 band; -+ __le16 aid; -+}; -+ - struct mt7915_tm_cmd { - u8 testmode_en; - u8 param_idx; -@@ -50,6 +57,7 @@ struct mt7915_tm_cmd { - struct mt7915_tm_slot_time slot; - struct mt7915_tm_clean_txq clean; - struct mt7915_tm_cfg cfg; -+ struct mt7915_tm_mu_rx_aid rx_aid; - u8 test[72]; - } param; - } __packed; -@@ -109,6 +117,16 @@ enum { - TAM_ARB_OP_MODE_FORCE_SU = 5, - }; - -+enum { -+ TM_CBW_20MHZ, -+ TM_CBW_40MHZ, -+ TM_CBW_80MHZ, -+ TM_CBW_10MHZ, -+ TM_CBW_5MHZ, -+ TM_CBW_160MHZ, -+ TM_CBW_8080MHZ, -+}; -+ - struct mt7915_tm_rx_stat_band { - u8 category; - -@@ -130,4 +148,264 @@ struct mt7915_tm_rx_stat_band { - __le16 mdrdy_cnt_ofdm; - }; - -+struct mt7915_tm_muru_comm { -+ u8 ppdu_format; -+ u8 sch_type; -+ u8 band; -+ u8 wmm_idx; -+ u8 spe_idx; -+ u8 proc_type; -+}; -+ -+struct mt7915_tm_muru_dl_usr { -+ __le16 wlan_idx; -+ u8 ru_alloc_seg; -+ u8 ru_idx; -+ u8 ldpc; -+ u8 nss; -+ u8 mcs; -+ u8 mu_group_idx; -+ u8 vht_groud_id; -+ u8 vht_up; -+ u8 he_start_stream; -+ u8 he_mu_spatial; -+ u8 ack_policy; -+ __le16 tx_power_alpha; -+}; -+ -+struct mt7915_tm_muru_dl { -+ u8 user_num; -+ u8 tx_mode; -+ u8 bw; -+ u8 gi; -+ u8 ltf; -+ /* sigB */ -+ u8 mcs; -+ u8 dcm; -+ u8 cmprs; -+ -+ u8 tx_power; -+ u8 ru[8]; -+ u8 c26[2]; -+ u8 ack_policy; -+ -+ struct mt7915_tm_muru_dl_usr usr[16]; -+}; -+ -+struct mt7915_tm_muru_ul_usr { -+ __le16 wlan_idx; -+ u8 ru_alloc; -+ u8 ru_idx; -+ u8 ldpc; -+ u8 nss; -+ u8 mcs; -+ u8 target_rssi; -+ __le32 trig_pkt_size; -+}; -+ -+struct mt7915_tm_muru_ul { -+ u8 user_num; -+ -+ /* UL TX */ -+ u8 trig_type; -+ __le16 trig_cnt; -+ __le16 trig_intv; -+ u8 bw; -+ u8 gi_ltf; -+ __le16 ul_len; -+ u8 pad; -+ u8 trig_ta[ETH_ALEN]; -+ u8 ru[8]; -+ u8 c26[2]; -+ -+ struct mt7915_tm_muru_ul_usr usr[16]; -+ /* HE TB RX Debug */ -+ __le32 rx_hetb_nonsf_en_bitmap; -+ __le32 rx_hetb_cfg[2]; -+ -+ /* DL TX */ -+ u8 ba_type; -+}; -+ -+struct mt7915_tm_muru { -+ __le32 cfg_comm; -+ __le32 cfg_dl; -+ __le32 cfg_ul; -+ -+ struct mt7915_tm_muru_comm comm; -+ struct mt7915_tm_muru_dl dl; -+ struct mt7915_tm_muru_ul ul; -+}; -+ -+#define MURU_PPDU_HE_MU BIT(3) -+ -+/* Common Config */ -+/* #define MURU_COMM_PPDU_FMT BIT(0) */ -+/* #define MURU_COMM_SCH_TYPE BIT(1) */ -+/* #define MURU_COMM_BAND BIT(2) */ -+/* #define MURU_COMM_WMM BIT(3) */ -+/* #define MURU_COMM_SPE_IDX BIT(4) */ -+/* #define MURU_COMM_PROC_TYPE BIT(5) */ -+/* #define MURU_COMM_SET (MURU_COMM_PPDU_FMT | MURU_COMM_BAND | \ */ -+/* MURU_COMM_WMM | MURU_COMM_SPE_IDX) */ -+/* DL Config */ -+#define MURU_DL_BW BIT(0) -+#define MURU_DL_GI BIT(1) -+#define MURU_DL_TX_MODE BIT(2) -+#define MURU_DL_TONE_PLAN BIT(3) -+#define MURU_DL_USER_CNT BIT(4) -+#define MURU_DL_LTF BIT(5) -+#define MURU_DL_SIGB_MCS BIT(6) -+#define MURU_DL_SIGB_DCM BIT(7) -+#define MURU_DL_SIGB_CMPRS BIT(8) -+#define MURU_DL_ACK_POLICY BIT(9) -+#define MURU_DL_TXPOWER BIT(10) -+/* DL Per User Config */ -+#define MURU_DL_USER_WLAN_ID BIT(16) -+#define MURU_DL_USER_COD BIT(17) -+#define MURU_DL_USER_MCS BIT(18) -+#define MURU_DL_USER_NSS BIT(19) -+#define MURU_DL_USER_RU_ALLOC BIT(20) -+#define MURU_DL_USER_MUMIMO_GRP BIT(21) -+#define MURU_DL_USER_MUMIMO_VHT BIT(22) -+#define MURU_DL_USER_ACK_POLICY BIT(23) -+#define MURU_DL_USER_MUMIMO_HE BIT(24) -+#define MURU_DL_USER_PWR_ALPHA BIT(25) -+#define MURU_DL_SET (GENMASK(7, 0) | GENMASK(20, 16) | BIT(25)) -+ -+#define MAX_PHASE_GROUP_NUM 9 -+ -+struct mt7915_tm_txbf_phase { -+ u8 status; -+ struct { -+ u8 r0_uh; -+ u8 r0_h; -+ u8 r0_m; -+ u8 r0_l; -+ u8 r0_ul; -+ u8 r1_uh; -+ u8 r1_h; -+ u8 r1_m; -+ u8 r1_l; -+ u8 r1_ul; -+ u8 r2_uh; -+ u8 r2_h; -+ u8 r2_m; -+ u8 r2_l; -+ u8 r2_ul; -+ u8 r3_uh; -+ u8 r3_h; -+ u8 r3_m; -+ u8 r3_l; -+ u8 r3_ul; -+ u8 r2_uh_sx2; -+ u8 r2_h_sx2; -+ u8 r2_m_sx2; -+ u8 r2_l_sx2; -+ u8 r2_ul_sx2; -+ u8 r3_uh_sx2; -+ u8 r3_h_sx2; -+ u8 r3_m_sx2; -+ u8 r3_l_sx2; -+ u8 r3_ul_sx2; -+ u8 m_t0_h; -+ u8 m_t1_h; -+ u8 m_t2_h; -+ u8 m_t2_h_sx2; -+ u8 r0_reserved; -+ u8 r1_reserved; -+ u8 r2_reserved; -+ u8 r3_reserved; -+ u8 r2_sx2_reserved; -+ u8 r3_sx2_reserved; -+ } phase; -+}; -+ -+struct mt7915_tm_pfmu_tag1 { -+ __le32 pfmu_idx:10; -+ __le32 ebf:1; -+ __le32 data_bw:2; -+ __le32 lm:2; -+ __le32 is_mu:1; -+ __le32 nr:3, nc:3; -+ __le32 codebook:2; -+ __le32 ngroup:2; -+ __le32 _rsv:2; -+ __le32 invalid_prof:1; -+ __le32 rmsd:3; -+ -+ __le32 col_id1:6, row_id1:10; -+ __le32 col_id2:6, row_id2:10; -+ __le32 col_id3:6, row_id3:10; -+ __le32 col_id4:6, row_id4:10; -+ -+ __le32 ru_start_id:7; -+ __le32 _rsv1:1; -+ __le32 ru_end_id:7; -+ __le32 _rsv2:1; -+ __le32 mob_cal_en:1; -+ __le32 _rsv3:15; -+ -+ __le32 snr_sts0:8, snr_sts1:8, snr_sts2:8, snr_sts3:8; -+ __le32 snr_sts4:8, snr_sts5:8, snr_sts6:8, snr_sts7:8; -+ -+ __le32 _rsv4; -+} __packed; -+ -+struct mt7915_tm_pfmu_tag2 { -+ __le32 smart_ant:24; -+ __le32 se_idx:5; -+ __le32 _rsv:3; -+ -+ __le32 _rsv1:8; -+ __le32 rmsd_thres:3; -+ __le32 _rsv2:5; -+ __le32 ibf_timeout:8; -+ __le32 _rsv3:8; -+ -+ __le32 _rsv4:16; -+ __le32 ibf_data_bw:2; -+ __le32 ibf_nc:3; -+ __le32 ibf_nr:3; -+ __le32 ibf_ru:8; -+ -+ __le32 mob_delta_t:8; -+ __le32 mob_lq_result:7; -+ __le32 _rsv5:1; -+ __le32 _rsv6:16; -+ -+ __le32 _rsv7; -+} __packed; -+ -+struct mt7915_tm_pfmu_tag { -+ struct mt7915_tm_pfmu_tag1 t1; -+ struct mt7915_tm_pfmu_tag2 t2; -+}; -+ -+struct mt7915_tm_pfmu_data { -+ __le16 subc_idx; -+ __le16 phi11; -+ __le16 phi21; -+ __le16 phi31; -+}; -+ -+struct mt7915_tm_ibf_cal_info { -+ u8 format_id; -+ u8 group_l_m_n; -+ u8 group; -+ bool sx2; -+ u8 status; -+ u8 cal_type; -+ u8 _rsv[2]; -+ u8 buf[1000]; -+} __packed; -+ -+enum { -+ IBF_PHASE_CAL_UNSPEC, -+ IBF_PHASE_CAL_NORMAL, -+ IBF_PHASE_CAL_VERIFY, -+ IBF_PHASE_CAL_NORMAL_INSTRUMENT, -+ IBF_PHASE_CAL_VERIFY_INSTRUMENT, -+}; -+ - #endif -diff --git a/testmode.c b/testmode.c -index 9e05b86..7587047 100644 ---- a/testmode.c -+++ b/testmode.c -@@ -8,6 +8,7 @@ const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS] = { - [MT76_TM_ATTR_RESET] = { .type = NLA_FLAG }, - [MT76_TM_ATTR_STATE] = { .type = NLA_U8 }, - [MT76_TM_ATTR_TX_COUNT] = { .type = NLA_U32 }, -+ [MT76_TM_ATTR_SKU_EN] = { .type = NLA_U8 }, - [MT76_TM_ATTR_TX_LENGTH] = { .type = NLA_U32 }, - [MT76_TM_ATTR_TX_RATE_MODE] = { .type = NLA_U8 }, - [MT76_TM_ATTR_TX_RATE_NSS] = { .type = NLA_U8 }, -@@ -28,28 +29,16 @@ const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS] = { - }; - EXPORT_SYMBOL_GPL(mt76_tm_policy); - --void mt76_testmode_tx_pending(struct mt76_phy *phy) -+static void -+mt76_testmode_queue_tx(struct mt76_phy *phy, struct mt76_wcid *wcid, -+ struct sk_buff *skb, struct mt76_queue *q, int qid, -+ u16 limit) - { - struct mt76_testmode_data *td = &phy->test; - struct mt76_dev *dev = phy->dev; -- struct mt76_wcid *wcid = &dev->global_wcid; -- struct sk_buff *skb = td->tx_skb; -- struct mt76_queue *q; -- u16 tx_queued_limit; -- int qid; -- -- if (!skb || !td->tx_pending) -- return; -+ u16 count = limit; - -- qid = skb_get_queue_mapping(skb); -- q = phy->q_tx[qid]; -- -- tx_queued_limit = td->tx_queued_limit ? td->tx_queued_limit : 1000; -- -- spin_lock_bh(&q->lock); -- -- while (td->tx_pending > 0 && -- td->tx_queued - td->tx_done < tx_queued_limit && -+ while (td->tx_pending > 0 && count && - q->queued < q->ndesc / 2) { - int ret; - -@@ -58,13 +47,68 @@ void mt76_testmode_tx_pending(struct mt76_phy *phy) - if (ret < 0) - break; - -- td->tx_pending--; -+ count--; -+ -+ /* tx_count == UINT_MAX for continuous tx */ -+ if (td->tx_count != UINT_MAX) -+ td->tx_pending--; - td->tx_queued++; -+ -+ if (td->tx_rate_mode != MT76_TM_TX_MODE_HE_MU) -+ if (td->tx_queued - td->tx_done >= limit) -+ break; - } - - dev->queue_ops->kick(dev, q); -+} -+ -+void mt76_testmode_tx_pending(struct mt76_phy *phy) -+{ -+ struct mt76_testmode_data *td = &phy->test; -+ struct mt76_testmode_entry_data *ed; -+ struct mt76_queue *q; -+ int qid; -+ u16 tx_queued_limit; -+ u32 remain; -+ bool is_mu; -+ -+ if (!td->tx_pending) -+ return; -+ -+ /* tx_queued_limit = td->tx_queued_limit ?: 100; */ -+ tx_queued_limit = 100; -+ -+ if (!td->aid) { -+ qid = skb_get_queue_mapping(td->tx_skb); -+ q = phy->q_tx[qid]; -+ spin_lock_bh(&q->lock); -+ mt76_testmode_queue_tx(phy, &phy->dev->global_wcid, -+ td->tx_skb, q, qid, tx_queued_limit); -+ spin_unlock_bh(&q->lock); -+ -+ return; -+ } -+ -+ is_mu = td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU; -+ ed = mt76_testmode_entry_data(phy, td->cur_entry); -+ qid = skb_get_queue_mapping(ed->tx_skb); -+ q = phy->q_tx[qid]; -+ -+ spin_lock_bh(&q->lock); -+ -+ remain = is_mu ? 1 : (td->tx_pending % td->tx_count) ?: td->tx_count; -+ if (remain < tx_queued_limit) -+ tx_queued_limit = remain; -+ -+ mt76_testmode_queue_tx(phy, td->cur_entry, ed->tx_skb, q, qid, tx_queued_limit); -+ -+ if ((td->tx_count != UINT_MAX && td->tx_pending % td->tx_count == 0) || is_mu) -+ td->cur_entry = list_next_entry(td->cur_entry, list); - - spin_unlock_bh(&q->lock); -+ -+ if (is_mu && td->tx_pending) -+ mt76_worker_schedule(&phy->dev->tx_worker); - } - - static u32 -@@ -90,15 +134,31 @@ mt76_testmode_max_mpdu_len(struct mt76_phy *phy, u8 tx_rate_mode) - } - - static void --mt76_testmode_free_skb(struct mt76_phy *phy) -+mt76_testmode_free_skb(struct sk_buff **tx_skb) -+{ -+ if (!(*tx_skb)) -+ return; -+ -+ dev_kfree_skb(*tx_skb); -+ *tx_skb = NULL; -+} -+ -+static void -+mt76_testmode_free_skb_all(struct mt76_phy *phy) - { - struct mt76_testmode_data *td = &phy->test; -+ struct mt76_testmode_entry_data *ed = &td->ed; -+ struct mt76_wcid *wcid; -+ -+ mt76_testmode_free_skb(&ed->tx_skb); - -- dev_kfree_skb(td->tx_skb); -- td->tx_skb = NULL; -+ mt76_tm_for_each_entry(phy, wcid, ed) -+ mt76_testmode_free_skb(&ed->tx_skb); - } - --int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len) -+static int -+mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len, -+ struct sk_buff **tx_skb, u8 (*addr)[ETH_ALEN]) - { - #define MT_TXP_MAX_LEN 4095 - u16 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_DATA | -@@ -119,7 +179,8 @@ int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len) - nfrags = len / MT_TXP_MAX_LEN; - head_len = nfrags ? MT_TXP_MAX_LEN : len; - -- if (len > IEEE80211_MAX_FRAME_LEN) -+ if (len > IEEE80211_MAX_FRAME_LEN || -+ td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU) - fc |= IEEE80211_STYPE_QOS_DATA; - - head = alloc_skb(head_len, GFP_KERNEL); -@@ -128,9 +189,9 @@ int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len) - - hdr = __skb_put_zero(head, sizeof(*hdr)); - hdr->frame_control = cpu_to_le16(fc); -- memcpy(hdr->addr1, td->addr[0], ETH_ALEN); -- memcpy(hdr->addr2, td->addr[1], ETH_ALEN); -- memcpy(hdr->addr3, td->addr[2], ETH_ALEN); -+ memcpy(hdr->addr1, addr[0], ETH_ALEN); -+ memcpy(hdr->addr2, addr[1], ETH_ALEN); -+ memcpy(hdr->addr3, addr[2], ETH_ALEN); - skb_set_queue_mapping(head, IEEE80211_AC_BE); - get_random_bytes(__skb_put(head, head_len - sizeof(*hdr)), - head_len - sizeof(*hdr)); -@@ -154,7 +215,7 @@ int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len) - - frag = alloc_skb(frag_len, GFP_KERNEL); - if (!frag) { -- mt76_testmode_free_skb(phy); -+ mt76_testmode_free_skb(tx_skb); - dev_kfree_skb(head); - return -ENOMEM; - } -@@ -167,23 +228,22 @@ int mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len) - frag_tail = &(*frag_tail)->next; - } - -- mt76_testmode_free_skb(phy); -- td->tx_skb = head; -+ mt76_testmode_free_skb(tx_skb); -+ *tx_skb = head; - - return 0; - } --EXPORT_SYMBOL(mt76_testmode_alloc_skb); - --static int --mt76_testmode_tx_init(struct mt76_phy *phy) -+int mt76_testmode_init_skb(struct mt76_phy *phy, u32 len, -+ struct sk_buff **tx_skb, u8 (*addr)[ETH_ALEN]) - { - struct mt76_testmode_data *td = &phy->test; - struct ieee80211_tx_info *info; - struct ieee80211_tx_rate *rate; -- u8 max_nss = hweight8(phy->antenna_mask); -+ u8 max_nss = hweight8(phy->chainmask); - int ret; - -- ret = mt76_testmode_alloc_skb(phy, td->tx_mpdu_len); -+ ret = mt76_testmode_alloc_skb(phy, len, tx_skb, addr); - if (ret) - return ret; - -@@ -193,7 +253,7 @@ mt76_testmode_tx_init(struct mt76_phy *phy) - if (td->tx_antenna_mask) - max_nss = min_t(u8, max_nss, hweight8(td->tx_antenna_mask)); - -- info = IEEE80211_SKB_CB(td->tx_skb); -+ info = IEEE80211_SKB_CB(*tx_skb); - rate = &info->control.rates[0]; - rate->count = 1; - rate->idx = td->tx_rate_idx; -@@ -265,6 +325,25 @@ mt76_testmode_tx_init(struct mt76_phy *phy) - out: - return 0; - } -+EXPORT_SYMBOL(mt76_testmode_init_skb); -+ -+static int -+mt76_testmode_tx_init(struct mt76_phy *phy) -+{ -+ struct mt76_testmode_entry_data *ed; -+ struct mt76_wcid *wcid; -+ -+ mt76_tm_for_each_entry(phy, wcid, ed) { -+ int ret; -+ -+ ret = mt76_testmode_init_skb(phy, ed->tx_mpdu_len, -+ &ed->tx_skb, ed->addr); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} - - static void - mt76_testmode_tx_start(struct mt76_phy *phy) -@@ -275,6 +354,14 @@ mt76_testmode_tx_start(struct mt76_phy *phy) - td->tx_queued = 0; - td->tx_done = 0; - td->tx_pending = td->tx_count; -+ if (td->tx_rate_mode == MT76_TM_TX_MODE_HE_MU) -+ td->tx_pending = 1; -+ if (td->entry_num) { -+ td->tx_pending *= td->entry_num; -+ td->cur_entry = list_first_entry(&td->tm_entry_list, -+ struct mt76_wcid, list); -+ } -+ - mt76_worker_schedule(&dev->tx_worker); - } - -@@ -293,7 +380,7 @@ mt76_testmode_tx_stop(struct mt76_phy *phy) - wait_event_timeout(dev->tx_wait, td->tx_done == td->tx_queued, - MT76_TM_TIMEOUT * HZ); - -- mt76_testmode_free_skb(phy); -+ mt76_testmode_free_skb_all(phy); - } - - static inline void -@@ -324,6 +411,8 @@ mt76_testmode_init_defaults(struct mt76_phy *phy) - memcpy(td->addr[0], phy->macaddr, ETH_ALEN); - memcpy(td->addr[1], phy->macaddr, ETH_ALEN); - memcpy(td->addr[2], phy->macaddr, ETH_ALEN); -+ -+ INIT_LIST_HEAD(&phy->test.tm_entry_list); - } - - static int -@@ -333,8 +422,12 @@ __mt76_testmode_set_state(struct mt76_phy *phy, enum mt76_testmode_state state) - struct mt76_dev *dev = phy->dev; - int err; - -- if (prev_state == MT76_TM_STATE_TX_FRAMES) -+ if (prev_state == MT76_TM_STATE_TX_FRAMES) { -+ /* MU needs to clean hwq for free done event */ -+ if (phy->test.tx_rate_mode == MT76_TM_TX_MODE_HE_MU) -+ dev->test_ops->set_state(phy, MT76_TM_STATE_IDLE); - mt76_testmode_tx_stop(phy); -+ } - - if (state == MT76_TM_STATE_TX_FRAMES) { - err = mt76_testmode_tx_init(phy); -@@ -404,6 +497,44 @@ mt76_tm_get_u8(struct nlattr *attr, u8 *dest, u8 min, u8 max) - return 0; - } - -+static int -+mt76_testmode_set_eeprom(struct mt76_phy *phy, struct nlattr **tb) -+{ -+ struct mt76_dev *dev = phy->dev; -+ u8 action, val[MT76_TM_EEPROM_BLOCK_SIZE]; -+ u32 offset = 0; -+ int err = -EINVAL; -+ -+ if (!dev->test_ops->set_eeprom) -+ return -EOPNOTSUPP; -+ -+ if (mt76_tm_get_u8(tb[MT76_TM_ATTR_EEPROM_ACTION], &action, -+ 0, MT76_TM_EEPROM_ACTION_MAX)) -+ goto out; -+ -+ if (tb[MT76_TM_ATTR_EEPROM_OFFSET]) { -+ struct nlattr *cur; -+ int rem, idx = 0; -+ -+ offset = nla_get_u32(tb[MT76_TM_ATTR_EEPROM_OFFSET]); -+ if (!!(offset % MT76_TM_EEPROM_BLOCK_SIZE) || -+ !tb[MT76_TM_ATTR_EEPROM_VAL]) -+ goto out; -+ -+ nla_for_each_nested(cur, tb[MT76_TM_ATTR_EEPROM_VAL], rem) { -+ if (nla_len(cur) != 1 || idx >= ARRAY_SIZE(val)) -+ goto out; -+ -+ val[idx++] = nla_get_u8(cur); -+ } -+ } -+ -+ err = dev->test_ops->set_eeprom(phy, offset, val, action); -+ -+out: -+ return err; -+} -+ - int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - void *data, int len) - { -@@ -427,6 +558,11 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - - mutex_lock(&dev->mutex); - -+ if (tb[MT76_TM_ATTR_EEPROM_ACTION]) { -+ err = mt76_testmode_set_eeprom(phy, tb); -+ goto out; -+ } -+ - if (tb[MT76_TM_ATTR_RESET]) { - mt76_testmode_set_state(phy, MT76_TM_STATE_OFF); - memset(td, 0, sizeof(*td)); -@@ -434,6 +570,9 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - - mt76_testmode_init_defaults(phy); - -+ if (tb[MT76_TM_ATTR_SKU_EN]) -+ td->sku_en = nla_get_u8(tb[MT76_TM_ATTR_SKU_EN]); -+ - if (tb[MT76_TM_ATTR_TX_COUNT]) - td->tx_count = nla_get_u32(tb[MT76_TM_ATTR_TX_COUNT]); - -@@ -453,7 +592,10 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_DUTY_CYCLE], - &td->tx_duty_cycle, 0, 99) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_POWER_CONTROL], -- &td->tx_power_control, 0, 1)) -+ &td->tx_power_control, 0, 1) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_AID], &td->aid, 0, 16) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_RU_ALLOC], &td->ru_alloc, 0, 0xff) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_RU_IDX], &td->ru_idx, 0, 68)) - goto out; - - if (tb[MT76_TM_ATTR_TX_LENGTH]) { -@@ -485,8 +627,7 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - - if (tb[MT76_TM_ATTR_TX_POWER]) { - struct nlattr *cur; -- int idx = 0; -- int rem; -+ int rem, idx = 0; - - nla_for_each_nested(cur, tb[MT76_TM_ATTR_TX_POWER], rem) { - if (nla_len(cur) != 1 || -@@ -506,11 +647,45 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - if (nla_len(cur) != ETH_ALEN || idx >= 3) - goto out; - -- memcpy(td->addr[idx], nla_data(cur), ETH_ALEN); -+ memcpy(td->addr[idx++], nla_data(cur), ETH_ALEN); -+ } -+ } -+ -+ if (tb[MT76_TM_ATTR_CFG]) { -+ struct nlattr *cur; -+ int rem, idx = 0; -+ -+ nla_for_each_nested(cur, tb[MT76_TM_ATTR_CFG], rem) { -+ if (nla_len(cur) != 1 || idx >= 2) -+ goto out; -+ -+ if (idx == 0) -+ td->cfg.type = nla_get_u8(cur); -+ else -+ td->cfg.enable = nla_get_u8(cur); - idx++; - } - } - -+ if (tb[MT76_TM_ATTR_TXBF_ACT]) { -+ struct nlattr *cur; -+ int rem, idx = 0; -+ -+ if (!tb[MT76_TM_ATTR_TXBF_PARAM] || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_TXBF_ACT], &td->txbf_act, -+ 0, MT76_TM_TXBF_ACT_MAX)) -+ goto out; -+ -+ memset(td->txbf_param, 0, sizeof(td->txbf_param)); -+ nla_for_each_nested(cur, tb[MT76_TM_ATTR_TXBF_PARAM], rem) { -+ if (nla_len(cur) != 2 || -+ idx >= ARRAY_SIZE(td->txbf_param)) -+ goto out; -+ -+ td->txbf_param[idx++] = nla_get_u16(cur); -+ } -+ } -+ - if (dev->test_ops->set_params) { - err = dev->test_ops->set_params(phy, tb, state); - if (err) -@@ -575,6 +750,7 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, - struct mt76_phy *phy = hw->priv; - struct mt76_dev *dev = phy->dev; - struct mt76_testmode_data *td = &phy->test; -+ struct mt76_testmode_entry_data *ed = &td->ed; - struct nlattr *tb[NUM_MT76_TM_ATTRS] = {}; - int err = 0; - void *a; -@@ -607,6 +783,19 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, - goto out; - } - -+ if (tb[MT76_TM_ATTR_AID]) { -+ struct mt76_wcid *wcid; -+ u8 aid; -+ -+ err = mt76_tm_get_u8(tb[MT76_TM_ATTR_AID], &aid, 1, 16); -+ if (err) -+ goto out; -+ -+ mt76_tm_for_each_entry(phy, wcid, ed) -+ if (ed->aid == aid) -+ ed = mt76_testmode_entry_data(phy, wcid); -+ } -+ - mt76_testmode_init_defaults(phy); - - err = -EMSGSIZE; -@@ -619,12 +808,9 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, - goto out; - - if (nla_put_u32(msg, MT76_TM_ATTR_TX_COUNT, td->tx_count) || -- nla_put_u32(msg, MT76_TM_ATTR_TX_LENGTH, td->tx_mpdu_len) || -+ nla_put_u8(msg, MT76_TM_ATTR_SKU_EN, td->sku_en) || - nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE, td->tx_rate_mode) || -- nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_NSS, td->tx_rate_nss) || -- nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, td->tx_rate_idx) || - nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_SGI, td->tx_rate_sgi) || -- nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_LDPC, td->tx_rate_ldpc) || - nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_STBC, td->tx_rate_stbc) || - (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_LTF) && - nla_put_u8(msg, MT76_TM_ATTR_TX_LTF, td->tx_ltf)) || -@@ -641,7 +827,16 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, - (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_POWER_CONTROL) && - nla_put_u8(msg, MT76_TM_ATTR_TX_POWER_CONTROL, td->tx_power_control)) || - (mt76_testmode_param_present(td, MT76_TM_ATTR_FREQ_OFFSET) && -- nla_put_u8(msg, MT76_TM_ATTR_FREQ_OFFSET, td->freq_offset))) -+ nla_put_u32(msg, MT76_TM_ATTR_FREQ_OFFSET, td->freq_offset))) -+ goto out; -+ -+ if (nla_put_u32(msg, MT76_TM_ATTR_TX_LENGTH, ed->tx_mpdu_len) || -+ nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_NSS, ed->tx_rate_nss) || -+ nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, ed->tx_rate_idx) || -+ nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_LDPC, ed->tx_rate_ldpc) || -+ nla_put_u8(msg, MT76_TM_ATTR_AID, ed->aid) || -+ nla_put_u8(msg, MT76_TM_ATTR_RU_ALLOC, ed->ru_alloc) || -+ nla_put_u8(msg, MT76_TM_ATTR_RU_IDX, ed->ru_idx)) - goto out; - - if (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_POWER)) { -diff --git a/testmode.h b/testmode.h -index 8961326..7a68625 100644 ---- a/testmode.h -+++ b/testmode.h -@@ -6,6 +6,8 @@ - #define __MT76_TESTMODE_H - - #define MT76_TM_TIMEOUT 10 -+#define MT76_TM_MAX_ENTRY_NUM 16 -+#define MT76_TM_EEPROM_BLOCK_SIZE 16 - - /** - * enum mt76_testmode_attr - testmode attributes inside NL80211_ATTR_TESTDATA -@@ -18,6 +20,7 @@ - * @MT76_TM_ATTR_MTD_PART: mtd partition used for eeprom data (string) - * @MT76_TM_ATTR_MTD_OFFSET: offset of eeprom data within the partition (u32) - * -+ * @MT76_TM_ATTR_SKU_EN: config txpower sku is enabled or disabled in testmode (u8) - * @MT76_TM_ATTR_TX_COUNT: configured number of frames to send when setting - * state to MT76_TM_STATE_TX_FRAMES (u32) - * @MT76_TM_ATTR_TX_PENDING: pending frames during MT76_TM_STATE_TX_FRAMES (u32) -@@ -47,6 +50,15 @@ - * @MT76_TM_ATTR_DRV_DATA: driver specific netlink attrs (nested) - * - * @MT76_TM_ATTR_MAC_ADDRS: array of nested MAC addresses (nested) -+ * -+ * @MT76_TM_ATTR_EEPROM_ACTION: eeprom setting actions -+ * (u8, see &enum mt76_testmode_eeprom_action) -+ * @MT76_TM_ATTR_EEPROM_OFFSET: offset of eeprom data block for writing (u32) -+ * @MT76_TM_ATTR_EEPROM_VAL: values for writing into a 16-byte data block -+ * (nested, u8 attrs) -+ * -+ * @MT76_TM_ATTR_CFG: config testmode rf feature (nested, see &mt76_testmode_cfg) -+ * - */ - enum mt76_testmode_attr { - MT76_TM_ATTR_UNSPEC, -@@ -57,6 +69,7 @@ enum mt76_testmode_attr { - MT76_TM_ATTR_MTD_PART, - MT76_TM_ATTR_MTD_OFFSET, - -+ MT76_TM_ATTR_SKU_EN, - MT76_TM_ATTR_TX_COUNT, - MT76_TM_ATTR_TX_LENGTH, - MT76_TM_ATTR_TX_RATE_MODE, -@@ -84,6 +97,17 @@ enum mt76_testmode_attr { - MT76_TM_ATTR_DRV_DATA, - - MT76_TM_ATTR_MAC_ADDRS, -+ MT76_TM_ATTR_AID, -+ MT76_TM_ATTR_RU_ALLOC, -+ MT76_TM_ATTR_RU_IDX, -+ -+ MT76_TM_ATTR_EEPROM_ACTION, -+ MT76_TM_ATTR_EEPROM_OFFSET, -+ MT76_TM_ATTR_EEPROM_VAL, -+ -+ MT76_TM_ATTR_CFG, -+ MT76_TM_ATTR_TXBF_ACT, -+ MT76_TM_ATTR_TXBF_PARAM, - - /* keep last */ - NUM_MT76_TM_ATTRS, -@@ -128,6 +152,7 @@ enum mt76_testmode_stats_attr { - * - * @MT76_TM_RX_ATTR_FREQ_OFFSET: frequency offset (s32) - * @MT76_TM_RX_ATTR_RCPI: received channel power indicator (array, u8) -+ * @MT76_TM_RX_ATTR_RSSI: received signal strength indicator (array, s8) - * @MT76_TM_RX_ATTR_IB_RSSI: internal inband RSSI (array, s8) - * @MT76_TM_RX_ATTR_WB_RSSI: internal wideband RSSI (array, s8) - * @MT76_TM_RX_ATTR_SNR: signal-to-noise ratio (u8) -@@ -137,6 +162,7 @@ enum mt76_testmode_rx_attr { - - MT76_TM_RX_ATTR_FREQ_OFFSET, - MT76_TM_RX_ATTR_RCPI, -+ MT76_TM_RX_ATTR_RSSI, - MT76_TM_RX_ATTR_IB_RSSI, - MT76_TM_RX_ATTR_WB_RSSI, - MT76_TM_RX_ATTR_SNR, -@@ -198,4 +224,57 @@ enum mt76_testmode_tx_mode { - - extern const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS]; - -+/** -+ * enum mt76_testmode_eeprom_action - eeprom setting actions -+ * -+ * @MT76_TM_EEPROM_ACTION_UPDATE_DATA: update rf values to specific -+ * eeprom data block -+ * @MT76_TM_EEPROM_ACTION_UPDATE_BUFFER_MODE: send updated eeprom data to fw -+ * @MT76_TM_EEPROM_ACTION_WRITE_TO_EFUSE: write eeprom data back to efuse -+ */ -+enum mt76_testmode_eeprom_action { -+ MT76_TM_EEPROM_ACTION_UPDATE_DATA, -+ MT76_TM_EEPROM_ACTION_UPDATE_BUFFER_MODE, -+ MT76_TM_EEPROM_ACTION_WRITE_TO_EFUSE, -+ -+ /* keep last */ -+ NUM_MT76_TM_EEPROM_ACTION, -+ MT76_TM_EEPROM_ACTION_MAX = NUM_MT76_TM_EEPROM_ACTION - 1, -+}; -+ -+/** -+ * enum mt76_testmode_cfg - packet tx phy mode -+ * -+ * @MT76_TM_EEPROM_ACTION_UPDATE_DATA: update rf values to specific -+ * eeprom data block -+ * @MT76_TM_EEPROM_ACTION_UPDATE_BUFFER_MODE: send updated eeprom data to fw -+ * @MT76_TM_EEPROM_ACTION_WRITE_TO_EFUSE: write eeprom data back to efuse -+ */ -+enum mt76_testmode_cfg { -+ MT76_TM_CFG_TSSI, -+ MT76_TM_CFG_DPD, -+ MT76_TM_CFG_RATE_POWER_OFFSET, -+ MT76_TM_CFG_THERMAL_COMP, -+ -+ /* keep last */ -+ NUM_MT76_TM_CFG, -+ MT76_TM_CFG_MAX = NUM_MT76_TM_CFG - 1, -+}; -+ -+enum mt76_testmode_txbf_act { -+ MT76_TM_TXBF_ACT_INIT, -+ MT76_TM_TXBF_ACT_UPDATE_CH, -+ MT76_TM_TXBF_ACT_PHASE_COMP, -+ MT76_TM_TXBF_ACT_TX_PREP, -+ MT76_TM_TXBF_ACT_IBF_PROF_UPDATE, -+ MT76_TM_TXBF_ACT_EBF_PROF_UPDATE, -+ MT76_TM_TXBF_ACT_PHASE_CAL, -+ MT76_TM_TXBF_ACT_PROF_UPDATE_ALL, -+ MT76_TM_TXBF_ACT_E2P_UPDATE, -+ -+ /* keep last */ -+ NUM_MT76_TM_TXBF_ACT, -+ MT76_TM_TXBF_ACT_MAX = NUM_MT76_TM_TXBF_ACT - 1, -+}; -+ - #endif -diff --git a/tools/fields.c b/tools/fields.c -index e3f6908..406ba77 100644 ---- a/tools/fields.c -+++ b/tools/fields.c -@@ -10,6 +10,7 @@ static const char * const testmode_state[] = { - [MT76_TM_STATE_IDLE] = "idle", - [MT76_TM_STATE_TX_FRAMES] = "tx_frames", - [MT76_TM_STATE_RX_FRAMES] = "rx_frames", -+ [MT76_TM_STATE_TX_CONT] = "tx_cont", - }; - - static const char * const testmode_tx_mode[] = { -@@ -65,7 +66,7 @@ static bool parse_u8(const struct tm_field *field, int idx, - - static void print_u8(const struct tm_field *field, struct nlattr *attr) - { -- printf("%d", nla_get_u8(attr)); -+ printf("%u", nla_get_u8(attr)); - } - - static void print_s8(const struct tm_field *field, struct nlattr *attr) -@@ -86,12 +87,12 @@ static void print_s32(const struct tm_field *field, struct nlattr *attr) - - static void print_u32(const struct tm_field *field, struct nlattr *attr) - { -- printf("%d", nla_get_u32(attr)); -+ printf("%u", nla_get_u32(attr)); - } - - static void print_u64(const struct tm_field *field, struct nlattr *attr) - { -- printf("%lld", (unsigned long long)nla_get_u64(attr)); -+ printf("%llu", (unsigned long long)nla_get_u64(attr)); - } - - static bool parse_flag(const struct tm_field *field, int idx, -@@ -201,6 +202,63 @@ static void print_extra_stats(const struct tm_field *field, struct nlattr **tb) - printf("%srx_per=%.02f%%\n", prefix, 100 * failed / total); - } - -+static bool parse_mac(const struct tm_field *field, int idx, -+ struct nl_msg *msg, const char *val) -+{ -+#define ETH_ALEN 6 -+ bool ret = true; -+ char *str, *cur, *ap; -+ void *a; -+ -+ ap = str = strdup(val); -+ -+ a = nla_nest_start(msg, idx); -+ -+ idx = 0; -+ while ((cur = strsep(&ap, ",")) != NULL) { -+ unsigned char addr[ETH_ALEN]; -+ char *val, *tmp = cur; -+ int i = 0; -+ -+ while ((val = strsep(&tmp, ":")) != NULL) { -+ if (i >= ETH_ALEN) -+ break; -+ -+ addr[i++] = strtoul(val, NULL, 16); -+ } -+ -+ nla_put(msg, idx, ETH_ALEN, addr); -+ -+ idx++; -+ } -+ -+ nla_nest_end(msg, a); -+ -+ free(str); -+ -+ return ret; -+} -+ -+static void print_mac(const struct tm_field *field, struct nlattr *attr) -+{ -+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] -+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x" -+ unsigned char addr[3][6]; -+ struct nlattr *cur; -+ int idx = 0; -+ int rem; -+ -+ nla_for_each_nested(cur, attr, rem) { -+ if (nla_len(cur) != 6) -+ continue; -+ memcpy(addr[idx++], nla_data(cur), 6); -+ } -+ -+ printf("" MACSTR "," MACSTR "," MACSTR "", -+ MAC2STR(addr[0]), MAC2STR(addr[1]), MAC2STR(addr[2])); -+ -+ return; -+} - - #define FIELD_GENERIC(_field, _name, ...) \ - [FIELD_NAME(_field)] = { \ -@@ -250,10 +308,18 @@ static void print_extra_stats(const struct tm_field *field, struct nlattr **tb) - ##__VA_ARGS__ \ - ) - -+#define FIELD_MAC(_field, _name) \ -+ [FIELD_NAME(_field)] = { \ -+ .name = _name, \ -+ .parse = parse_mac, \ -+ .print = print_mac \ -+ } -+ - #define FIELD_NAME(_field) MT76_TM_RX_ATTR_##_field - static const struct tm_field rx_fields[NUM_MT76_TM_RX_ATTRS] = { - FIELD_RO(s32, FREQ_OFFSET, "freq_offset"), - FIELD_ARRAY_RO(u8, RCPI, "rcpi"), -+ FIELD_ARRAY_RO(s8, RSSI, "rssi"), - FIELD_ARRAY_RO(s8, IB_RSSI, "ib_rssi"), - FIELD_ARRAY_RO(s8, WB_RSSI, "wb_rssi"), - FIELD_RO(s8, SNR, "snr"), -@@ -261,6 +327,7 @@ static const struct tm_field rx_fields[NUM_MT76_TM_RX_ATTRS] = { - static struct nla_policy rx_policy[NUM_MT76_TM_RX_ATTRS] = { - [MT76_TM_RX_ATTR_FREQ_OFFSET] = { .type = NLA_U32 }, - [MT76_TM_RX_ATTR_RCPI] = { .type = NLA_NESTED }, -+ [MT76_TM_RX_ATTR_RSSI] = { .type = NLA_NESTED }, - [MT76_TM_RX_ATTR_IB_RSSI] = { .type = NLA_NESTED }, - [MT76_TM_RX_ATTR_WB_RSSI] = { .type = NLA_NESTED }, - [MT76_TM_RX_ATTR_SNR] = { .type = NLA_U8 }, -@@ -291,6 +358,7 @@ static const struct tm_field testdata_fields[NUM_MT76_TM_ATTRS] = { - FIELD_ENUM(STATE, "state", testmode_state), - FIELD_RO(string, MTD_PART, "mtd_part"), - FIELD_RO(u32, MTD_OFFSET, "mtd_offset"), -+ FIELD(u8, SKU_EN, "sku_en"), - FIELD(u32, TX_COUNT, "tx_count"), - FIELD(u32, TX_LENGTH, "tx_length"), - FIELD_ENUM(TX_RATE_MODE, "tx_rate_mode", testmode_tx_mode), -@@ -300,10 +368,18 @@ static const struct tm_field testdata_fields[NUM_MT76_TM_ATTRS] = { - FIELD(u8, TX_RATE_LDPC, "tx_rate_ldpc"), - FIELD(u8, TX_RATE_STBC, "tx_rate_stbc"), - FIELD(u8, TX_LTF, "tx_ltf"), -+ FIELD(u8, TX_DUTY_CYCLE, "tx_duty_cycle"), -+ FIELD(u32, TX_IPG, "tx_ipg"), -+ FIELD(u32, TX_TIME, "tx_time"), - FIELD(u8, TX_POWER_CONTROL, "tx_power_control"), - FIELD_ARRAY(u8, TX_POWER, "tx_power"), - FIELD(u8, TX_ANTENNA, "tx_antenna"), -+ FIELD(u8, TX_SPE_IDX, "tx_spe_idx"), - FIELD(u32, FREQ_OFFSET, "freq_offset"), -+ FIELD(u8, AID, "aid"), -+ FIELD(u8, RU_ALLOC, "ru_alloc"), -+ FIELD(u8, RU_IDX, "ru_idx"), -+ FIELD_MAC(MAC_ADDRS, "mac_addrs"), - FIELD_NESTED_RO(STATS, stats, "", - .print_extra = print_extra_stats), - }; -@@ -313,6 +389,7 @@ static struct nla_policy testdata_policy[NUM_MT76_TM_ATTRS] = { - [MT76_TM_ATTR_STATE] = { .type = NLA_U8 }, - [MT76_TM_ATTR_MTD_PART] = { .type = NLA_STRING }, - [MT76_TM_ATTR_MTD_OFFSET] = { .type = NLA_U32 }, -+ [MT76_TM_ATTR_SKU_EN] = { .type = NLA_U8 }, - [MT76_TM_ATTR_TX_COUNT] = { .type = NLA_U32 }, - [MT76_TM_ATTR_TX_LENGTH] = { .type = NLA_U32 }, - [MT76_TM_ATTR_TX_RATE_MODE] = { .type = NLA_U8 }, -@@ -322,9 +399,16 @@ static struct nla_policy testdata_policy[NUM_MT76_TM_ATTRS] = { - [MT76_TM_ATTR_TX_RATE_LDPC] = { .type = NLA_U8 }, - [MT76_TM_ATTR_TX_RATE_STBC] = { .type = NLA_U8 }, - [MT76_TM_ATTR_TX_LTF] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_TX_DUTY_CYCLE] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_TX_IPG] = { .type = NLA_U32 }, -+ [MT76_TM_ATTR_TX_TIME] = { .type = NLA_U32 }, - [MT76_TM_ATTR_TX_POWER_CONTROL] = { .type = NLA_U8 }, - [MT76_TM_ATTR_TX_ANTENNA] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_TX_SPE_IDX] = { .type = NLA_U8 }, - [MT76_TM_ATTR_FREQ_OFFSET] = { .type = NLA_U32 }, -+ [MT76_TM_ATTR_AID] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_RU_ALLOC] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_RU_IDX] = { .type = NLA_U8 }, - [MT76_TM_ATTR_STATS] = { .type = NLA_NESTED }, - }; - -diff --git a/tx.c b/tx.c -index 0fdf7d8..db0d4df 100644 ---- a/tx.c -+++ b/tx.c -@@ -259,8 +259,7 @@ void __mt76_tx_complete_skb(struct mt76_dev *dev, u16 wcid_idx, struct sk_buff * - if (mt76_is_testmode_skb(dev, skb, &hw)) { - struct mt76_phy *phy = hw->priv; - -- if (skb == phy->test.tx_skb) -- phy->test.tx_done++; -+ phy->test.tx_done++; - if (phy->test.tx_queued == phy->test.tx_done) - wake_up(&dev->tx_wait); - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1009-wifi-mt76-testmode-add-pre-cal-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1009-wifi-mt76-testmode-add-pre-cal-support.patch deleted file mode 100644 index 3ccce52f3..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1009-wifi-mt76-testmode-add-pre-cal-support.patch +++ /dev/null @@ -1,740 +0,0 @@ -From 2d9fc3393a175ec0b132e6186df69baaad77e428 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Wed, 31 Aug 2022 20:06:52 +0800 -Subject: [PATCH 1009/1053] wifi: mt76: testmode: add pre-cal support - -Signed-off-by: StanleyYP Wang ---- - eeprom.c | 6 +- - mt76.h | 1 + - mt76_connac_mcu.h | 1 + - mt7915/mcu.c | 3 + - mt7915/mt7915.h | 1 + - mt7915/testmode.c | 425 +++++++++++++++++++++++++++++++++++++++++++++- - mt7915/testmode.h | 36 ++++ - testmode.c | 15 +- - testmode.h | 17 ++ - tools/fields.c | 8 + - 10 files changed, 506 insertions(+), 7 deletions(-) - -diff --git a/eeprom.c b/eeprom.c -index a267397..3625b16 100644 ---- a/eeprom.c -+++ b/eeprom.c -@@ -94,8 +94,10 @@ int mt76_get_of_data_from_mtd(struct mt76_dev *dev, void *eep, int offset, int l - } - - #ifdef CONFIG_NL80211_TESTMODE -- dev->test_mtd.name = devm_kstrdup(dev->dev, part, GFP_KERNEL); -- dev->test_mtd.offset = offset; -+ if (len == dev->eeprom.size) { -+ dev->test_mtd.name = devm_kstrdup(dev->dev, part, GFP_KERNEL); -+ dev->test_mtd.offset = offset; -+ } - #endif - - out_put_node: -diff --git a/mt76.h b/mt76.h -index 3fe18cd..22d76bb 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -708,6 +708,7 @@ struct mt76_testmode_ops { - enum mt76_testmode_state new_state); - int (*dump_stats)(struct mt76_phy *phy, struct sk_buff *msg); - int (*set_eeprom)(struct mt76_phy *phy, u32 offset, u8 *val, u8 action); -+ int (*dump_precal)(struct mt76_phy *phy, struct sk_buff *msg, int flag, int type); - }; - - struct mt76_testmode_entry_data { -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 0972010..b75d340 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1019,6 +1019,7 @@ enum { - - /* ext event table */ - enum { -+ MCU_EXT_EVENT_RF_TEST = 0x4, - MCU_EXT_EVENT_PS_SYNC = 0x5, - MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13, - MCU_EXT_EVENT_THERMAL_PROTECT = 0x22, -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 233411c..ad58e3b 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -482,6 +482,9 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - case MCU_EXT_EVENT_BF_STATUS_READ: - mt7915_tm_txbf_status_read(dev, skb); - break; -+ case MCU_EXT_EVENT_RF_TEST: -+ mt7915_tm_rf_test_event(dev, skb); -+ break; - #endif - case MCU_EXT_EVENT_BSS_ACQ_PKT_CNT: - mt7915_mcu_rx_bss_acq_pkt_cnt(dev, skb); -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 1846e2f..dd2e80b 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -654,6 +654,7 @@ int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); - void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_exit(struct mt7915_dev *dev); - int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb); -+void mt7915_tm_rf_test_event(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_wmm_pbc_work(struct work_struct *work); - - static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) -diff --git a/mt7915/testmode.c b/mt7915/testmode.c -index 32dc85c..4b34430 100644 ---- a/mt7915/testmode.c -+++ b/mt7915/testmode.c -@@ -5,6 +5,7 @@ - #include "mac.h" - #include "mcu.h" - #include "testmode.h" -+#include "eeprom.h" - - enum { - TM_CHANGED_TXPOWER, -@@ -1604,18 +1605,16 @@ mt7915_tm_rf_switch_mode(struct mt7915_dev *dev, u32 oper) - static int - mt7915_tm_set_tx_cont(struct mt7915_phy *phy, bool en) - { --#define TX_CONT_START 0x05 --#define TX_CONT_STOP 0x06 - struct mt7915_dev *dev = phy->dev; - struct cfg80211_chan_def *chandef = &phy->mt76->chandef; - int freq1 = ieee80211_frequency_to_channel(chandef->center_freq1); - struct mt76_testmode_data *td = &phy->mt76->test; -- u32 func_idx = en ? TX_CONT_START : TX_CONT_STOP; -+ u32 func_idx = en ? RF_TEST_TX_CONT_START : RF_TEST_TX_CONT_STOP; - u8 rate_idx = td->tx_rate_idx, mode; - u8 band = phy->mt76->band_idx; - u16 rateval; - struct mt7915_tm_rf_test req = { -- .action = 1, -+ .action = RF_ACT_IN_RFTEST, - .icap_len = 120, - .op.rf.func_idx = cpu_to_le32(func_idx), - }; -@@ -1700,6 +1699,316 @@ out: - sizeof(req), true); - } - -+static int -+mt7915_tm_group_prek(struct mt7915_phy *phy, enum mt76_testmode_state state) -+{ -+ u8 *eeprom; -+ u32 i, group_size, dpd_size, size, offs, *pre_cal; -+ int ret = 0; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_dev *mdev = &dev->mt76; -+ struct mt7915_tm_rf_test req = { -+ .action = RF_ACT_IN_RFTEST, -+ .icap_len = 8, -+ .op.rf.func_idx = cpu_to_le32(RF_TEST_RE_CAL), -+ }; -+ -+ if (!dev->flash_mode && !dev->bin_file_mode) { -+ dev_err(dev->mt76.dev, "Currently not in FLASH or BIN MODE,return!\n"); -+ return 1; -+ } -+ -+ eeprom = mdev->eeprom.data; -+ dev->cur_prek_offset = 0; -+ group_size = mt7915_get_cal_group_size(dev); -+ dpd_size = is_mt7915(&dev->mt76) ? MT_EE_CAL_DPD_SIZE_V1 : MT_EE_CAL_DPD_SIZE_V2; -+ size = group_size + dpd_size; -+ offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; -+ -+ switch (state) { -+ case MT76_TM_STATE_GROUP_PREK: -+ req.op.rf.param.cal_param.func_data = cpu_to_le32(RF_PRE_CAL); -+ -+ if (!dev->cal) { -+ dev->cal = devm_kzalloc(mdev->dev, size, GFP_KERNEL); -+ if (!dev->cal) -+ return -ENOMEM; -+ } -+ -+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_TEST), &req, -+ sizeof(req), true); -+ -+ if (!ret) -+ eeprom[offs] |= MT_EE_WIFI_CAL_GROUP; -+ break; -+ case MT76_TM_STATE_GROUP_PREK_DUMP: -+ pre_cal = (u32 *)dev->cal; -+ if (!pre_cal) { -+ dev_info(dev->mt76.dev, "Not group pre-cal yet!\n"); -+ return ret; -+ } -+ dev_info(dev->mt76.dev, "Group Pre-Cal:\n"); -+ for (i = 0; i < (group_size / sizeof(u32)); i += 4) { -+ dev_info(dev->mt76.dev, "[0x%08lx] 0x%8x 0x%8x 0x%8x 0x%8x\n", -+ i * sizeof(u32), pre_cal[i], pre_cal[i + 1], -+ pre_cal[i + 2], pre_cal[i + 3]); -+ } -+ break; -+ case MT76_TM_STATE_GROUP_PREK_CLEAN: -+ pre_cal = (u32 *)dev->cal; -+ if (!pre_cal) -+ return ret; -+ memset(pre_cal, 0, group_size); -+ eeprom[offs] &= ~MT_EE_WIFI_CAL_GROUP; -+ break; -+ default: -+ return -EINVAL; -+ } -+ return ret; -+} -+ -+static int -+mt7915_tm_dpd_prek(struct mt7915_phy *phy, enum mt76_testmode_state state) -+{ -+#define DPD_2G_CH_BW20_BITMAP_0 0x444 -+#define DPD_5G_CH_BW20_BITMAP_0 0xffffc0ff -+#define DPD_5G_CH_BW20_BITMAP_1 0x3 -+#define DPD_5G_CH_BW20_BITMAP_7915_0 0x7dffc0ff -+#define DPD_6G_CH_BW20_BITMAP_0 0xffffffff -+#define DPD_6G_CH_BW20_BITMAP_1 0x07ffffff -+ bool is_set = false; -+ u8 band, do_precal, *eeprom; -+ u16 bw20_size, bw160_size; -+ u32 i, j, *bw160_freq, bw160_5g_freq[] = {5250, 5570, 5815}; -+ u32 bw160_6g_freq[] = {6025, 6185, 6345, 6505, 6665, 6825, 6985}; -+ u32 shift, freq, group_size, dpd_size, size, offs, *pre_cal, dpd_ch_bw20_bitmap[2] = {0}; -+ __le32 func_data = 0; -+ int ret = 0; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_dev *mdev = &dev->mt76; -+ struct mt76_phy *mphy = phy->mt76; -+ struct cfg80211_chan_def chandef_backup, *chandef = &mphy->chandef; -+ struct ieee80211_channel chan_backup, chan, *bw20_ch; -+ struct mt7915_tm_rf_test req = { -+ .action = RF_ACT_IN_RFTEST, -+ .icap_len = 8, -+ .op.rf.func_idx = cpu_to_le32(RF_TEST_RE_CAL), -+ }; -+ -+ if (!dev->flash_mode && !dev->bin_file_mode) { -+ dev_err(dev->mt76.dev, "Currently not in FLASH or BIN MODE,return!\n"); -+ return -EOPNOTSUPP; -+ } -+ -+ eeprom = mdev->eeprom.data; -+ dev->cur_prek_offset = 0; -+ group_size = mt7915_get_cal_group_size(dev); -+ dev->dpd_chan_num_2g = hweight32(DPD_2G_CH_BW20_BITMAP_0); -+ if (is_mt7915(&dev->mt76)) { -+ dev->dpd_chan_num_5g = hweight32(DPD_5G_CH_BW20_BITMAP_7915_0); -+ dev->dpd_chan_num_6g = 0; -+ dpd_size = MT_EE_CAL_DPD_SIZE_V1; -+ offs = MT_EE_DO_PRE_CAL; -+ } else { -+ dev->dpd_chan_num_5g = hweight32(DPD_5G_CH_BW20_BITMAP_0) + -+ hweight32(DPD_5G_CH_BW20_BITMAP_1) + -+ ARRAY_SIZE(bw160_5g_freq); -+ dev->dpd_chan_num_6g = hweight32(DPD_6G_CH_BW20_BITMAP_0) + -+ hweight32(DPD_6G_CH_BW20_BITMAP_1) + -+ ARRAY_SIZE(bw160_6g_freq); -+ dpd_size = MT_EE_CAL_DPD_SIZE_V2; -+ offs = MT_EE_DO_PRE_CAL_V2; -+ } -+ size = group_size + dpd_size; -+ -+ switch (state) { -+ case MT76_TM_STATE_DPD_2G: -+ if (!is_set) { -+ func_data = cpu_to_le32(RF_DPD_FLAT_CAL); -+ dpd_ch_bw20_bitmap[0] = DPD_2G_CH_BW20_BITMAP_0; -+ bw20_ch = mphy->sband_2g.sband.channels; -+ bw160_freq = NULL; -+ bw160_size = 0; -+ band = NL80211_BAND_2GHZ; -+ do_precal = MT_EE_WIFI_CAL_DPD_2G; -+ is_set = true; -+ } -+ fallthrough; -+ case MT76_TM_STATE_DPD_5G: -+ if (!is_set) { -+ if (is_mt7915(&dev->mt76)) { -+ func_data = cpu_to_le32(RF_DPD_FLAT_CAL); -+ dpd_ch_bw20_bitmap[0] = DPD_5G_CH_BW20_BITMAP_7915_0; -+ bw160_size = 0; -+ dev->cur_prek_offset -= dev->dpd_chan_num_5g * MT_EE_CAL_UNIT * 2; -+ } else { -+ func_data = cpu_to_le32(RF_DPD_FLAT_5G_CAL); -+ dpd_ch_bw20_bitmap[0] = DPD_5G_CH_BW20_BITMAP_0; -+ dpd_ch_bw20_bitmap[1] = DPD_5G_CH_BW20_BITMAP_1; -+ bw160_size = ARRAY_SIZE(bw160_5g_freq); -+ } -+ bw20_ch = mphy->sband_5g.sband.channels; -+ bw160_freq = bw160_5g_freq; -+ band = NL80211_BAND_5GHZ; -+ do_precal = MT_EE_WIFI_CAL_DPD_5G; -+ is_set = true; -+ } -+ fallthrough; -+ case MT76_TM_STATE_DPD_6G: -+ if (!is_set) { -+ func_data = cpu_to_le32(RF_DPD_FLAT_6G_CAL); -+ dpd_ch_bw20_bitmap[0] = DPD_6G_CH_BW20_BITMAP_0; -+ dpd_ch_bw20_bitmap[1] = DPD_6G_CH_BW20_BITMAP_1; -+ bw20_ch = mphy->sband_6g.sband.channels; -+ bw160_freq = bw160_6g_freq; -+ bw160_size = ARRAY_SIZE(bw160_6g_freq); -+ band = NL80211_BAND_6GHZ; -+ do_precal = MT_EE_WIFI_CAL_DPD_6G; -+ is_set = true; -+ } -+ -+ if (!bw20_ch) -+ return -EOPNOTSUPP; -+ if (!dev->cal) { -+ dev->cal = devm_kzalloc(mdev->dev, size, GFP_KERNEL); -+ if (!dev->cal) -+ return -ENOMEM; -+ } -+ -+ req.op.rf.param.cal_param.func_data = func_data; -+ req.op.rf.param.cal_param.band_idx = phy->mt76->band_idx; -+ -+ memcpy(&chan_backup, chandef->chan, sizeof(struct ieee80211_channel)); -+ memcpy(&chandef_backup, chandef, sizeof(struct cfg80211_chan_def)); -+ -+ bw20_size = hweight32(dpd_ch_bw20_bitmap[0]) + hweight32(dpd_ch_bw20_bitmap[1]); -+ for (i = 0, j = 0; i < bw20_size + bw160_size; i++) { -+ if (i < bw20_size) { -+ freq = dpd_ch_bw20_bitmap[0] ? 0 : 1; -+ shift = ffs(dpd_ch_bw20_bitmap[freq]); -+ j += shift; -+ memcpy(&chan, &bw20_ch[j - 1], sizeof(struct ieee80211_channel)); -+ chandef->width = NL80211_CHAN_WIDTH_20; -+ dpd_ch_bw20_bitmap[0] >>= shift; -+ } else { -+ freq = bw160_freq[i - bw20_size]; -+ chan.center_freq = freq; -+ chan.hw_value = ieee80211_frequency_to_channel(freq); -+ chan.band = band; -+ chandef->width = NL80211_CHAN_WIDTH_160; -+ } -+ -+ memcpy(chandef->chan, &chan, sizeof(struct ieee80211_channel)); -+ if (is_mt7915(&dev->mt76)) -+ mphy->hw->conf.flags &= ~IEEE80211_CONF_OFFCHANNEL; -+ else -+ mphy->hw->conf.flags |= IEEE80211_CONF_OFFCHANNEL; -+ -+ mt7915_mcu_set_chan_info(phy, MCU_EXT_CMD(CHANNEL_SWITCH)); -+ -+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_TEST), &req, -+ sizeof(req), true); -+ if (ret) { -+ dev_err(dev->mt76.dev, "DPD Pre-cal: mcu send msg failed!\n"); -+ break; -+ } -+ } -+ memcpy(chandef, &chandef_backup, sizeof(struct cfg80211_chan_def)); -+ memcpy(chandef->chan, &chan_backup, sizeof(struct ieee80211_channel)); -+ mt7915_mcu_set_chan_info(phy, MCU_EXT_CMD(CHANNEL_SWITCH)); -+ -+ if (!ret) -+ eeprom[offs] |= do_precal; -+ -+ break; -+ case MT76_TM_STATE_DPD_DUMP: -+ pre_cal = (u32 *)dev->cal; -+ if (!dev->cal) { -+ dev_info(dev->mt76.dev, "Not DPD pre-cal yet!\n"); -+ return ret; -+ } -+ dev_info(dev->mt76.dev, "DPD Pre-Cal:\n"); -+ for (i = 0; i < dpd_size / sizeof(u32); i += 4) { -+ j = i + (group_size / sizeof(u32)); -+ dev_info(dev->mt76.dev, "[0x%08lx] 0x%8x 0x%8x 0x%8x 0x%8x\n", -+ j * sizeof(u32), pre_cal[j], pre_cal[j + 1], -+ pre_cal[j + 2], pre_cal[j + 3]); -+ } -+ break; -+ case MT76_TM_STATE_DPD_CLEAN: -+ pre_cal = (u32 *)dev->cal; -+ if (!pre_cal) -+ return ret; -+ memset(pre_cal + (group_size / sizeof(u32)), 0, dpd_size); -+ do_precal = MT_EE_WIFI_CAL_DPD; -+ eeprom[offs] &= ~do_precal; -+ break; -+ default: -+ return -EINVAL; -+ } -+ return ret; -+} -+ -+void mt7915_tm_re_cal_event(struct mt7915_dev *dev, struct mt7915_tm_rf_test_result *result, -+ struct mt7915_tm_rf_test_data *data) -+{ -+#define DPD_PER_CHAN_SIZE_7915 2 -+#define DPD_PER_CHAN_SIZE_7986 3 -+ u32 base, dpd_offest_2g, dpd_offest_5g, cal_idx = 0, cal_type = 0, len = 0; -+ u8 *pre_cal; -+ -+ pre_cal = dev->cal; -+ dpd_offest_5g = dev->dpd_chan_num_6g * DPD_PER_CHAN_SIZE_7986 * MT_EE_CAL_UNIT; -+ dpd_offest_2g = dpd_offest_5g + dev->dpd_chan_num_5g * MT_EE_CAL_UNIT * -+ (is_mt7915(&dev->mt76) ? DPD_PER_CHAN_SIZE_7915 : DPD_PER_CHAN_SIZE_7986); -+ cal_idx = le32_to_cpu(data->cal_idx); -+ cal_type = le32_to_cpu(data->cal_type); -+ len = le32_to_cpu(result->payload_len); -+ len = len - sizeof(struct mt7915_tm_rf_test_data); -+ -+ switch (cal_type) { -+ case RF_PRE_CAL: -+ base = 0; -+ break; -+ case RF_DPD_FLAT_CAL: -+ base = mt7915_get_cal_group_size(dev) + dpd_offest_2g; -+ break; -+ case RF_DPD_FLAT_5G_CAL: -+ base = mt7915_get_cal_group_size(dev) + dpd_offest_5g; -+ break; -+ case RF_DPD_FLAT_6G_CAL: -+ base = mt7915_get_cal_group_size(dev); -+ break; -+ default: -+ dev_info(dev->mt76.dev, "Unknown calibration type!\n"); -+ return; -+ } -+ pre_cal += (base + dev->cur_prek_offset); -+ -+ memcpy(pre_cal, data->data, len); -+ dev->cur_prek_offset += len; -+} -+ -+void mt7915_tm_rf_test_event(struct mt7915_dev *dev, struct sk_buff *skb) -+{ -+ struct mt7915_tm_rf_test_result *result; -+ struct mt7915_tm_rf_test_data *data; -+ static u32 event_type; -+ -+ result = (struct mt7915_tm_rf_test_result *)skb->data; -+ data = (struct mt7915_tm_rf_test_data *)result->event; -+ -+ event_type = le32_to_cpu(result->func_idx); -+ -+ switch (event_type) { -+ case RF_TEST_RE_CAL: -+ mt7915_tm_re_cal_event(dev, result, data); -+ break; -+ default: -+ break; -+ } -+} -+ - static void - mt7915_tm_update_params(struct mt7915_phy *phy, u32 changed) - { -@@ -1750,6 +2059,10 @@ mt7915_tm_set_state(struct mt76_phy *mphy, enum mt76_testmode_state state) - else if (prev_state == MT76_TM_STATE_OFF || - state == MT76_TM_STATE_OFF) - mt7915_tm_init(phy, !(state == MT76_TM_STATE_OFF)); -+ else if (state >= MT76_TM_STATE_GROUP_PREK && state <= MT76_TM_STATE_GROUP_PREK_CLEAN) -+ return mt7915_tm_group_prek(phy, state); -+ else if (state >= MT76_TM_STATE_DPD_2G && state <= MT76_TM_STATE_DPD_CLEAN) -+ return mt7915_tm_dpd_prek(phy, state); - - if ((state == MT76_TM_STATE_IDLE && - prev_state == MT76_TM_STATE_OFF) || -@@ -1930,9 +2243,113 @@ mt7915_tm_set_eeprom(struct mt76_phy *mphy, u32 offset, u8 *val, u8 action) - return ret; - } - -+static int -+mt7915_tm_dump_precal(struct mt76_phy *mphy, struct sk_buff *msg, int flag, int type) -+{ -+#define DPD_PER_CHAN_SIZE_MASK GENMASK(31, 30) -+#define DPD_CHAN_NUM_2G_MASK GENMASK(29, 20) -+#define DPD_CHAN_NUM_5G_MASK GENMASK(19, 10) -+#define DPD_CHAN_NUM_6G_MASK GENMASK(9, 0) -+ struct mt7915_phy *phy = mphy->priv; -+ struct mt7915_dev *dev = phy->dev; -+ u32 i, group_size, dpd_size, total_size, dpd_per_chan_size, dpd_info = 0; -+ u32 base, size, total_chan_num, offs, transmit_size = 1000; -+ u8 *pre_cal, *eeprom; -+ void *precal; -+ enum prek_ops { -+ PREK_GET_INFO, -+ PREK_SYNC_ALL, -+ PREK_SYNC_GROUP, -+ PREK_SYNC_DPD_2G, -+ PREK_SYNC_DPD_5G, -+ PREK_SYNC_DPD_6G, -+ PREK_CLEAN_GROUP, -+ PREK_CLEAN_DPD, -+ }; -+ -+ if (!dev->cal) { -+ dev_info(dev->mt76.dev, "Not pre-cal yet!\n"); -+ return 0; -+ } -+ -+ group_size = mt7915_get_cal_group_size(dev); -+ dpd_size = is_mt7915(&dev->mt76) ? MT_EE_CAL_DPD_SIZE_V1 : MT_EE_CAL_DPD_SIZE_V2; -+ dpd_per_chan_size = is_mt7915(&dev->mt76) ? 2 : 3; -+ total_size = group_size + dpd_size; -+ pre_cal = dev->cal; -+ eeprom = dev->mt76.eeprom.data; -+ offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; -+ -+ total_chan_num = dev->dpd_chan_num_2g + dev->dpd_chan_num_5g + dev->dpd_chan_num_6g; -+ -+ switch (type) { -+ case PREK_SYNC_ALL: -+ base = 0; -+ size = total_size; -+ break; -+ case PREK_SYNC_GROUP: -+ base = 0; -+ size = group_size; -+ break; -+ case PREK_SYNC_DPD_6G: -+ base = group_size; -+ size = dpd_size * dev->dpd_chan_num_6g / total_chan_num; -+ break; -+ case PREK_SYNC_DPD_5G: -+ base = group_size + dev->dpd_chan_num_6g * dpd_per_chan_size * MT_EE_CAL_UNIT; -+ size = dpd_size * dev->dpd_chan_num_5g / total_chan_num; -+ break; -+ case PREK_SYNC_DPD_2G: -+ base = group_size + (dev->dpd_chan_num_6g + dev->dpd_chan_num_5g) * -+ dpd_per_chan_size * MT_EE_CAL_UNIT; -+ size = dpd_size * dev->dpd_chan_num_2g / total_chan_num; -+ break; -+ case PREK_GET_INFO: -+ break; -+ default: -+ return 0; -+ } -+ -+ if (!flag) { -+ if (eeprom[offs] & MT_EE_WIFI_CAL_DPD) { -+ dpd_info |= u32_encode_bits(dpd_per_chan_size, DPD_PER_CHAN_SIZE_MASK) | -+ u32_encode_bits(dev->dpd_chan_num_2g, DPD_CHAN_NUM_2G_MASK) | -+ u32_encode_bits(dev->dpd_chan_num_5g, DPD_CHAN_NUM_5G_MASK) | -+ u32_encode_bits(dev->dpd_chan_num_6g, DPD_CHAN_NUM_6G_MASK); -+ } -+ dev->cur_prek_offset = 0; -+ precal = nla_nest_start(msg, MT76_TM_ATTR_PRECAL_INFO); -+ if (!precal) -+ return -ENOMEM; -+ nla_put_u32(msg, 0, group_size); -+ nla_put_u32(msg, 1, dpd_size); -+ nla_put_u32(msg, 2, dpd_info); -+ nla_put_u32(msg, 3, transmit_size); -+ nla_put_u32(msg, 4, eeprom[offs]); -+ nla_nest_end(msg, precal); -+ } else { -+ precal = nla_nest_start(msg, MT76_TM_ATTR_PRECAL); -+ if (!precal) -+ return -ENOMEM; -+ -+ transmit_size = (dev->cur_prek_offset + transmit_size < size) ? -+ transmit_size : (size - dev->cur_prek_offset); -+ for (i = 0; i < transmit_size; i++) { -+ if (nla_put_u8(msg, i, pre_cal[base + dev->cur_prek_offset + i])) -+ return -ENOMEM; -+ } -+ dev->cur_prek_offset += transmit_size; -+ -+ nla_nest_end(msg, precal); -+ } -+ -+ return 0; -+} -+ - const struct mt76_testmode_ops mt7915_testmode_ops = { - .set_state = mt7915_tm_set_state, - .set_params = mt7915_tm_set_params, - .dump_stats = mt7915_tm_dump_stats, - .set_eeprom = mt7915_tm_set_eeprom, -+ .dump_precal = mt7915_tm_dump_precal, - }; -diff --git a/mt7915/testmode.h b/mt7915/testmode.h -index eb0e043..7569826 100644 ---- a/mt7915/testmode.h -+++ b/mt7915/testmode.h -@@ -81,6 +81,11 @@ struct tm_tx_cont { - u8 txfd_mode; - }; - -+struct tm_cal_param { -+ __le32 func_data; -+ u8 band_idx; -+}; -+ - struct mt7915_tm_rf_test { - u8 action; - u8 icap_len; -@@ -96,6 +101,7 @@ struct mt7915_tm_rf_test { - __le32 cal_dump; - - struct tm_tx_cont tx_cont; -+ struct tm_cal_param cal_param; - - u8 _pad[80]; - } param; -@@ -103,6 +109,20 @@ struct mt7915_tm_rf_test { - } op; - } __packed; - -+struct mt7915_tm_rf_test_result { -+ struct mt76_connac2_mcu_rxd rxd; -+ -+ u32 func_idx; -+ u32 payload_len; -+ u8 event[0]; -+} __packed; -+ -+struct mt7915_tm_rf_test_data { -+ u32 cal_idx; -+ u32 cal_type; -+ u8 data[0]; -+} __packed; -+ - enum { - RF_OPER_NORMAL, - RF_OPER_RF_TEST, -@@ -111,6 +131,22 @@ enum { - RF_OPER_WIFI_SPECTRUM, - }; - -+enum { -+ RF_ACT_SWITCH_MODE, -+ RF_ACT_IN_RFTEST, -+}; -+ -+enum { -+ RF_TEST_RE_CAL = 0x01, -+ RF_TEST_TX_CONT_START = 0x05, -+ RF_TEST_TX_CONT_STOP = 0x06, -+}; -+ -+#define RF_DPD_FLAT_CAL BIT(28) -+#define RF_PRE_CAL BIT(29) -+#define RF_DPD_FLAT_5G_CAL GENMASK(29, 28) -+#define RF_DPD_FLAT_6G_CAL (BIT(30) | BIT(28)) -+ - enum { - TAM_ARB_OP_MODE_NORMAL = 1, - TAM_ARB_OP_MODE_TEST, -diff --git a/testmode.c b/testmode.c -index 7587047..070b296 100644 ---- a/testmode.c -+++ b/testmode.c -@@ -771,6 +771,18 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, - - mutex_lock(&dev->mutex); - -+ if (tb[MT76_TM_ATTR_PRECAL] || tb[MT76_TM_ATTR_PRECAL_INFO]) { -+ int flag, type; -+ -+ err = -EINVAL; -+ flag = tb[MT76_TM_ATTR_PRECAL] ? 1 : 0; -+ type = flag ? nla_get_u8(tb[MT76_TM_ATTR_PRECAL_INFO]) : 0; -+ if (dev->test_ops->dump_precal) -+ err = dev->test_ops->dump_precal(phy, msg, flag, type); -+ -+ goto out; -+ } -+ - if (tb[MT76_TM_ATTR_STATS]) { - err = -EINVAL; - -@@ -804,7 +816,8 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, - - if (dev->test_mtd.name && - (nla_put_string(msg, MT76_TM_ATTR_MTD_PART, dev->test_mtd.name) || -- nla_put_u32(msg, MT76_TM_ATTR_MTD_OFFSET, dev->test_mtd.offset))) -+ nla_put_u32(msg, MT76_TM_ATTR_MTD_OFFSET, dev->test_mtd.offset) || -+ nla_put_u8(msg, MT76_TM_ATTR_BAND_IDX, phy->band_idx))) - goto out; - - if (nla_put_u32(msg, MT76_TM_ATTR_TX_COUNT, td->tx_count) || -diff --git a/testmode.h b/testmode.h -index 7a68625..e4c1b52 100644 ---- a/testmode.h -+++ b/testmode.h -@@ -19,6 +19,7 @@ - * - * @MT76_TM_ATTR_MTD_PART: mtd partition used for eeprom data (string) - * @MT76_TM_ATTR_MTD_OFFSET: offset of eeprom data within the partition (u32) -+ * @MT76_TM_ATTR_BAND_IDX: band idx of the chip (u8) - * - * @MT76_TM_ATTR_SKU_EN: config txpower sku is enabled or disabled in testmode (u8) - * @MT76_TM_ATTR_TX_COUNT: configured number of frames to send when setting -@@ -41,6 +42,11 @@ - * - * @MT76_TM_ATTR_STATS: statistics (nested, see &enum mt76_testmode_stats_attr) - * -+ * @MT76_TM_ATTR_PRECAL: Pre-cal data (u8) -+ * @MT76_TM_ATTR_PRECAL_INFO: group size, dpd size, dpd_info, transmit size, -+ * eeprom cal indicator (u32), -+ * dpd_info = [dpd_per_chan_size, chan_num_2g, -+ * chan_num_5g, chan_num_6g] - * @MT76_TM_ATTR_TX_SPE_IDX: tx spatial extension index (u8) - * - * @MT76_TM_ATTR_TX_DUTY_CYCLE: packet tx duty cycle (u8) -@@ -68,6 +74,7 @@ enum mt76_testmode_attr { - - MT76_TM_ATTR_MTD_PART, - MT76_TM_ATTR_MTD_OFFSET, -+ MT76_TM_ATTR_BAND_IDX, - - MT76_TM_ATTR_SKU_EN, - MT76_TM_ATTR_TX_COUNT, -@@ -87,6 +94,8 @@ enum mt76_testmode_attr { - MT76_TM_ATTR_FREQ_OFFSET, - - MT76_TM_ATTR_STATS, -+ MT76_TM_ATTR_PRECAL, -+ MT76_TM_ATTR_PRECAL_INFO, - - MT76_TM_ATTR_TX_SPE_IDX, - -@@ -188,6 +197,14 @@ enum mt76_testmode_state { - MT76_TM_STATE_TX_FRAMES, - MT76_TM_STATE_RX_FRAMES, - MT76_TM_STATE_TX_CONT, -+ MT76_TM_STATE_GROUP_PREK, -+ MT76_TM_STATE_GROUP_PREK_DUMP, -+ MT76_TM_STATE_GROUP_PREK_CLEAN, -+ MT76_TM_STATE_DPD_2G, -+ MT76_TM_STATE_DPD_5G, -+ MT76_TM_STATE_DPD_6G, -+ MT76_TM_STATE_DPD_DUMP, -+ MT76_TM_STATE_DPD_CLEAN, - MT76_TM_STATE_ON, - - /* keep last */ -diff --git a/tools/fields.c b/tools/fields.c -index 406ba77..27801db 100644 ---- a/tools/fields.c -+++ b/tools/fields.c -@@ -11,6 +11,14 @@ static const char * const testmode_state[] = { - [MT76_TM_STATE_TX_FRAMES] = "tx_frames", - [MT76_TM_STATE_RX_FRAMES] = "rx_frames", - [MT76_TM_STATE_TX_CONT] = "tx_cont", -+ [MT76_TM_STATE_GROUP_PREK] = "group_prek", -+ [MT76_TM_STATE_GROUP_PREK_DUMP] = "group_prek_dump", -+ [MT76_TM_STATE_GROUP_PREK_CLEAN] = "group_prek_clean", -+ [MT76_TM_STATE_DPD_2G] = "dpd_2g", -+ [MT76_TM_STATE_DPD_5G] = "dpd_5g", -+ [MT76_TM_STATE_DPD_6G] = "dpd_6g", -+ [MT76_TM_STATE_DPD_DUMP] = "dpd_dump", -+ [MT76_TM_STATE_DPD_CLEAN] = "dpd_clean", - }; - - static const char * const testmode_tx_mode[] = { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1010-wifi-mt76-testmode-add-iBF-command-mode-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1010-wifi-mt76-testmode-add-iBF-command-mode-support.patch deleted file mode 100644 index c4d423eea..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1010-wifi-mt76-testmode-add-iBF-command-mode-support.patch +++ /dev/null @@ -1,242 +0,0 @@ -From be62cd03caedf8de9f3d6f2ef8883f85be51b9c7 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Mon, 12 Sep 2022 18:16:54 +0800 -Subject: [PATCH 1010/1053] wifi: mt76: testmode: add iBF command mode support - -Signed-off-by: StanleyYP Wang ---- - mt7915/testmode.c | 21 ++++++++++++++------- - testmode.c | 41 +++++++++++++++++++++++++++++++++++++++++ - testmode.h | 2 ++ - tools/fields.c | 28 ++++++++++++++++++++++++++++ - 4 files changed, 85 insertions(+), 7 deletions(-) - -diff --git a/mt7915/testmode.c b/mt7915/testmode.c -index 4b34430..453319e 100644 ---- a/mt7915/testmode.c -+++ b/mt7915/testmode.c -@@ -722,6 +722,7 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf) - struct ieee80211_vif *vif = phy->monitor_vif; - struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag; - u8 pfmu_idx = val[0], nc = val[2], nr; -+ bool is_atenl = val[6]; - int ret; - - if (td->tx_antenna_mask == 3) -@@ -769,7 +770,7 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf) - if (ret) - return ret; - -- if (!ebf) -+ if (!ebf && is_atenl) - return mt7915_tm_txbf_apply_tx(phy, 1, false, true, true); - - return 0; -@@ -796,7 +797,7 @@ mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val) - .group_l_m_n = val[1], - .sx2 = val[2], - .cal_type = val[3], -- .lna_gain_level = 0, /* for test purpose */ -+ .lna_gain_level = val[4], - }; - struct mt7915_tm_txbf_phase *phase = - (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -@@ -835,6 +836,8 @@ int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb) - phase = &phase[cal->group]; - memcpy(&phase->phase, cal->buf + 16, sizeof(phase->phase)); - phase->status = cal->status; -+ /* for passing iTest script */ -+ dev_info(dev->mt76.dev, "Calibrated result = %d\n", phase->status); - break; - case IBF_PHASE_CAL_VERIFY: - case IBF_PHASE_CAL_VERIFY_INSTRUMENT: -@@ -887,7 +890,6 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val) - pfmu_data->phi11 = cpu_to_le16(phi11); - pfmu_data->phi21 = cpu_to_le16(phi21); - pfmu_data->phi31 = cpu_to_le16(phi31); -- - if (subc_id == 63) { - struct mt7915_dev *dev = phy->dev; - struct { -@@ -945,8 +947,8 @@ mt7915_tm_set_txbf(struct mt7915_phy *phy) - struct mt76_testmode_data *td = &phy->mt76->test; - u16 *val = td->txbf_param; - -- pr_info("ibf cal process: act = %u, val = %u, %u, %u, %u, %u\n", -- td->txbf_act, val[0], val[1], val[2], val[3], val[4]); -+ pr_info("ibf cal process: act = %u, val = %u, %u, %u, %u, %u, %u\n", -+ td->txbf_act, val[0], val[1], val[2], val[3], val[4], val[5]); - - switch (td->txbf_act) { - case MT76_TM_TXBF_ACT_INIT: -@@ -964,10 +966,17 @@ mt7915_tm_set_txbf(struct mt7915_phy *phy) - return mt7915_tm_txbf_profile_update(phy, val, true); - case MT76_TM_TXBF_ACT_PHASE_CAL: - return mt7915_tm_txbf_phase_cal(phy, val); -+ case MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD: - case MT76_TM_TXBF_ACT_PROF_UPDATE_ALL: - return mt7915_tm_txbf_profile_update_all(phy, val); - case MT76_TM_TXBF_ACT_E2P_UPDATE: - return mt7915_tm_txbf_e2p_update(phy); -+ case MT76_TM_TXBF_ACT_APPLY_TX: { -+ u16 wlan_idx = val[0]; -+ bool ebf = !!val[1], ibf = !!val[2], phase_cal = !!val[4]; -+ -+ return mt7915_tm_txbf_apply_tx(phy, wlan_idx, ebf, ibf, phase_cal); -+ } - default: - break; - }; -@@ -1094,7 +1103,6 @@ mt7915_tm_set_tx_len(struct mt7915_phy *phy, u32 tx_time) - rate.legacy = sband->bitrates[rate.mcs].bitrate; - break; - case MT76_TM_TX_MODE_HT: -- rate.mcs += rate.nss * 8; - flags |= RATE_INFO_FLAGS_MCS; - - if (td->tx_rate_sgi) -@@ -1461,7 +1469,6 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en) - if (duty_cycle < 100) - tx_time = duty_cycle * ipg / (100 - duty_cycle); - } -- - mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode); - mt7915_tm_set_tx_len(phy, tx_time); - -diff --git a/testmode.c b/testmode.c -index 070b296..b1986ad 100644 ---- a/testmode.c -+++ b/testmode.c -@@ -535,6 +535,42 @@ out: - return err; - } - -+static int -+mt76_testmode_txbf_profile_update_all_cmd(struct mt76_phy *phy, struct nlattr **tb, u32 state) -+{ -+#define PARAM_UNIT 5 -+ static u8 pfmu_idx; -+ struct mt76_testmode_data *td = &phy->test; -+ struct mt76_dev *dev = phy->dev; -+ struct nlattr *cur; -+ u16 tmp_val[PARAM_UNIT], *val = td->txbf_param; -+ int idx, rem, ret, i = 0; -+ -+ memset(td->txbf_param, 0, sizeof(td->txbf_param)); -+ nla_for_each_nested(cur, tb[MT76_TM_ATTR_TXBF_PARAM], rem) { -+ if (nla_len(cur) != 2) -+ return -EINVAL; -+ idx = i % PARAM_UNIT; -+ tmp_val[idx] = nla_get_u16(cur); -+ if (idx == 1 && (tmp_val[idx] == 0xf0 || tmp_val[idx] == 0xff)) { -+ pfmu_idx = tmp_val[0]; -+ return 0; -+ } -+ if (idx == PARAM_UNIT - 1) { -+ val[0] = pfmu_idx; -+ memcpy(val + 1, tmp_val, sizeof(tmp_val)); -+ if (dev->test_ops->set_params) { -+ ret = dev->test_ops->set_params(phy, tb, state); -+ if (ret) -+ return ret; -+ } -+ } -+ i++; -+ } -+ -+ return 0; -+} -+ - int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - void *data, int len) - { -@@ -676,6 +712,11 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - 0, MT76_TM_TXBF_ACT_MAX)) - goto out; - -+ if (td->txbf_act == MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD) { -+ err = mt76_testmode_txbf_profile_update_all_cmd(phy, tb, state); -+ goto out; -+ } -+ - memset(td->txbf_param, 0, sizeof(td->txbf_param)); - nla_for_each_nested(cur, tb[MT76_TM_ATTR_TXBF_PARAM], rem) { - if (nla_len(cur) != 2 || -diff --git a/testmode.h b/testmode.h -index e4c1b52..1d7aef8 100644 ---- a/testmode.h -+++ b/testmode.h -@@ -285,8 +285,10 @@ enum mt76_testmode_txbf_act { - MT76_TM_TXBF_ACT_TX_PREP, - MT76_TM_TXBF_ACT_IBF_PROF_UPDATE, - MT76_TM_TXBF_ACT_EBF_PROF_UPDATE, -+ MT76_TM_TXBF_ACT_APPLY_TX, - MT76_TM_TXBF_ACT_PHASE_CAL, - MT76_TM_TXBF_ACT_PROF_UPDATE_ALL, -+ MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD, - MT76_TM_TXBF_ACT_E2P_UPDATE, - - /* keep last */ -diff --git a/tools/fields.c b/tools/fields.c -index 27801db..b0ee84d 100644 ---- a/tools/fields.c -+++ b/tools/fields.c -@@ -32,6 +32,20 @@ static const char * const testmode_tx_mode[] = { - [MT76_TM_TX_MODE_HE_MU] = "he_mu", - }; - -+static const char * const testmode_txbf_act[] = { -+ [MT76_TM_TXBF_ACT_INIT] = "init", -+ [MT76_TM_TXBF_ACT_UPDATE_CH] = "update_ch", -+ [MT76_TM_TXBF_ACT_PHASE_COMP] = "phase_comp", -+ [MT76_TM_TXBF_ACT_TX_PREP] = "tx_prep", -+ [MT76_TM_TXBF_ACT_IBF_PROF_UPDATE] = "ibf_prof_update", -+ [MT76_TM_TXBF_ACT_EBF_PROF_UPDATE] = "ebf_prof_update", -+ [MT76_TM_TXBF_ACT_APPLY_TX] = "apply_tx", -+ [MT76_TM_TXBF_ACT_PHASE_CAL] = "phase_cal", -+ [MT76_TM_TXBF_ACT_PROF_UPDATE_ALL] = "prof_update", -+ [MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD] = "prof_update_all", -+ [MT76_TM_TXBF_ACT_E2P_UPDATE] = "e2p_update", -+}; -+ - static void print_enum(const struct tm_field *field, struct nlattr *attr) - { - unsigned int i = nla_get_u8(attr); -@@ -82,6 +96,17 @@ static void print_s8(const struct tm_field *field, struct nlattr *attr) - printf("%d", (int8_t)nla_get_u8(attr)); - } - -+static bool parse_u16_hex(const struct tm_field *field, int idx, -+ struct nl_msg *msg, const char *val) -+{ -+ return !nla_put_u16(msg, idx, strtoul(val, NULL, 16)); -+} -+ -+static void print_u16_hex(const struct tm_field *field, struct nlattr *attr) -+{ -+ printf("%d", nla_get_u16(attr)); -+} -+ - static bool parse_u32(const struct tm_field *field, int idx, - struct nl_msg *msg, const char *val) - { -@@ -387,6 +412,8 @@ static const struct tm_field testdata_fields[NUM_MT76_TM_ATTRS] = { - FIELD(u8, AID, "aid"), - FIELD(u8, RU_ALLOC, "ru_alloc"), - FIELD(u8, RU_IDX, "ru_idx"), -+ FIELD_ENUM(TXBF_ACT, "txbf_act", testmode_txbf_act), -+ FIELD_ARRAY(u16_hex, TXBF_PARAM, "txbf_param"), - FIELD_MAC(MAC_ADDRS, "mac_addrs"), - FIELD_NESTED_RO(STATS, stats, "", - .print_extra = print_extra_stats), -@@ -418,6 +445,7 @@ static struct nla_policy testdata_policy[NUM_MT76_TM_ATTRS] = { - [MT76_TM_ATTR_RU_ALLOC] = { .type = NLA_U8 }, - [MT76_TM_ATTR_RU_IDX] = { .type = NLA_U8 }, - [MT76_TM_ATTR_STATS] = { .type = NLA_NESTED }, -+ [MT76_TM_ATTR_TXBF_ACT] = { .type = NLA_U8 }, - }; - - const struct tm_field msg_field = { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1011-wifi-mt76-testmode-add-ZWDFS-test-mode-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1011-wifi-mt76-testmode-add-ZWDFS-test-mode-support.patch deleted file mode 100644 index b42e14190..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1011-wifi-mt76-testmode-add-ZWDFS-test-mode-support.patch +++ /dev/null @@ -1,744 +0,0 @@ -From 460f28c1cba4632a4bd046d0a93d1569f69acea0 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Thu, 27 Oct 2022 17:42:07 +0800 -Subject: [PATCH] wifi: mt76: testmode: add ZWDFS test mode support - -Signed-off-by: StanleyYP Wang ---- - mt76.h | 9 ++ - mt76_connac_mcu.h | 2 + - mt7915/mcu.c | 66 +++++++++++ - mt7915/mcu.h | 46 ++++++++ - mt7915/mt7915.h | 4 + - mt7915/regs.h | 2 + - mt7915/testmode.c | 288 ++++++++++++++++++++++++++++++++++++++++++++++ - testmode.c | 25 +++- - testmode.h | 45 ++++++++ - tools/fields.c | 22 ++++ - 10 files changed, 508 insertions(+), 1 deletion(-) - -diff --git a/mt76.h b/mt76.h -index 20577af..53b0964 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -793,6 +793,15 @@ struct mt76_testmode_data { - u64 fcs_error[__MT_RXQ_MAX]; - u64 len_mismatch; - } rx_stats; -+ -+ u8 offchan_ch; -+ u8 offchan_center_ch; -+ u8 offchan_bw; -+ -+ u8 ipi_threshold; -+ u32 ipi_period; -+ u8 ipi_antenna_idx; -+ u8 ipi_reset; - }; - - struct mt76_vif { -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 6511060..9ac1c46 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1241,6 +1241,7 @@ enum { - MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, - MCU_EXT_CMD_SET_RDD_TH = 0x9d, - MCU_EXT_CMD_MURU_CTRL = 0x9f, -+ MCU_EXT_CMD_IPI_HIST_CTRL = 0xa3, - MCU_EXT_CMD_RX_STAT = 0xa4, - MCU_EXT_CMD_SET_SPR = 0xa8, - MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, -@@ -1252,6 +1253,7 @@ enum { - MCU_EXT_CMD_SET_QOS_MAP = 0xb4, - MCU_EXT_CMD_CERT_CFG = 0xb7, - MCU_EXT_CMD_CSI_CTRL = 0xc2, -+ MCU_EXT_CMD_IPI_HIST_SCAN = 0xc5, - }; - - enum { -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 5f3fec8..2025ef3 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -2759,6 +2759,7 @@ mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy, - req.monitor_chan = chandef->chan->hw_value; - req.monitor_central_chan = - ieee80211_frequency_to_channel(chandef->center_freq1); -+ req.monitor_bw = mt76_connac_chan_bw(chandef); - req.band_idx = phy->mt76->band_idx; - req.scan_mode = 2; - break; -@@ -4955,6 +4956,71 @@ int mt7915_mcu_set_amsdu_algo(struct mt7915_dev *dev, u16 wcid, u8 enable) - } - #endif - -+int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct sk_buff *skb; -+ int ret; -+ struct { -+ u8 ipi_hist_idx; -+ u8 band_idx; -+ u8 set_val; -+ u8 rsv; -+ int idle_power_th; -+ u32 idle_power_max_cnt; -+ u32 idle_power_duration; -+ u32 idle_power_cmd_type; -+ } __packed req = { -+ .ipi_hist_idx = cmd, -+ .band_idx = phy->mt76->band_idx, -+ }; -+ -+ if (!wait_resp) -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(IPI_HIST_CTRL), -+ &req, sizeof(req), true); -+ -+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(IPI_HIST_CTRL), -+ &req, sizeof(req), wait_resp, &skb); -+ -+ if (ret) -+ return ret; -+ -+ memcpy(data, skb->data, sizeof(struct mt7915_mcu_rdd_ipi_ctrl)); -+ dev_kfree_skb(skb); -+ -+ return 0; -+} -+ -+int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct sk_buff *skb; -+ int ret; -+ struct rdd_ipi_hist_scan { -+ u8 mode; -+ u8 pd_setting; -+ u8 band_idx; -+ u8 rsv; -+ } __packed req = { -+ .mode = mode, -+ .pd_setting = 1, -+ .band_idx = phy->mt76->band_idx, -+ }; -+ -+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(IPI_HIST_SCAN), -+ &req, sizeof(req), wait_resp, &skb); -+ if (ret) -+ return ret; -+ -+ if (!wait_resp) -+ return 0; -+ -+ memcpy(data, skb->data, sizeof(struct mt7915_mcu_rdd_ipi_scan)); -+ dev_kfree_skb(skb); -+ -+ return 0; -+} -+ - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) - { - #define IP_DSCP_NUM 64 -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index c791c7f..066246b 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -698,6 +698,52 @@ enum CSI_CHAIN_TYPE { - }; - #endif - -+enum { -+ RDD_SET_IPI_CR_INIT, /* CR initialization */ -+ RDD_SET_IPI_HIST_RESET, /* Reset IPI histogram counter */ -+ RDD_SET_IDLE_POWER, /* Idle power info */ -+ RDD_SET_IPI_HIST_NUM -+}; -+ -+enum { -+ RDD_IPI_HIST_0, /* IPI count for power <= -92 (dBm) */ -+ RDD_IPI_HIST_1, /* IPI count for -92 < power <= -89 (dBm) */ -+ RDD_IPI_HIST_2, /* IPI count for -89 < power <= -86 (dBm) */ -+ RDD_IPI_HIST_3, /* IPI count for -86 < power <= -83 (dBm) */ -+ RDD_IPI_HIST_4, /* IPI count for -83 < power <= -80 (dBm) */ -+ RDD_IPI_HIST_5, /* IPI count for -80 < power <= -75 (dBm) */ -+ RDD_IPI_HIST_6, /* IPI count for -75 < power <= -70 (dBm) */ -+ RDD_IPI_HIST_7, /* IPI count for -70 < power <= -65 (dBm) */ -+ RDD_IPI_HIST_8, /* IPI count for -65 < power <= -60 (dBm) */ -+ RDD_IPI_HIST_9, /* IPI count for -60 < power <= -55 (dBm) */ -+ RDD_IPI_HIST_10, /* IPI count for -55 < power (dBm) */ -+ RDD_IPI_FREE_RUN_CNT, /* IPI count for counter++ per 8 us */ -+ RDD_IPI_HIST_ALL_CNT, /* Get all IPI */ -+ RDD_IPI_HIST_0_TO_10_CNT, /* Get IPI histogram 0 to 10 */ -+ RDD_IPI_HIST_2_TO_10_CNT, /* Get IPI histogram 2 to 10 */ -+ RDD_TX_ASSERT_TIME, /* Get band 1 TX assert time */ -+ RDD_IPI_HIST_NUM -+}; -+ -+#define RDM_NF_MAX_WF_IDX 8 -+#define POWER_INDICATE_HIST_MAX RDD_IPI_FREE_RUN_CNT -+#define IPI_HIST_TYPE_NUM (POWER_INDICATE_HIST_MAX + 1) -+ -+struct mt7915_mcu_rdd_ipi_ctrl { -+ u8 ipi_hist_idx; -+ u8 band_idx; -+ u8 rsv[2]; -+ u32 ipi_hist_val[IPI_HIST_TYPE_NUM]; -+ u32 tx_assert_time; /* unit: us */ -+} __packed; -+ -+struct mt7915_mcu_rdd_ipi_scan { -+ u32 ipi_hist_val[RDM_NF_MAX_WF_IDX][POWER_INDICATE_HIST_MAX]; -+ u8 band_idx; -+ u8 rsv[2]; -+ u8 tx_assert_time; /* unit: us */ -+} __packed; -+ - /* MURU */ - #define OFDMA_DL BIT(0) - #define OFDMA_UL BIT(1) -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index b716b57..ec33afd 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -293,6 +293,7 @@ struct mt7915_phy { - - struct mt76_mib_stats mib; - struct mt76_channel_state state_ts; -+ struct delayed_work ipi_work; - - u8 stats_work_count; - struct list_head stats_list; -@@ -768,6 +769,9 @@ int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, - struct ieee80211_sta *sta); - #endif - -+int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp); -+int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp); -+ - #ifdef MTK_DEBUG - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); - int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp); -diff --git a/mt7915/regs.h b/mt7915/regs.h -index 1236da9..7e9b76b 100644 ---- a/mt7915/regs.h -+++ b/mt7915/regs.h -@@ -1211,6 +1211,8 @@ enum offs_rev { - #define MT_WF_IRPI_NSS(phy, nss) MT_WF_IRPI(0x6000 + ((phy) << 20) + ((nss) << 16)) - #define MT_WF_IRPI_NSS_MT7916(phy, nss) MT_WF_IRPI(0x1000 + ((phy) << 20) + ((nss) << 16)) - -+#define MT_WF_IPI_RESET 0x831a3008 -+ - /* PHY */ - #define MT_WF_PHY_BASE 0x83080000 - #define MT_WF_PHY(ofs) (MT_WF_PHY_BASE + (ofs)) -diff --git a/mt7915/testmode.c b/mt7915/testmode.c -index 453319e..caa3590 100644 ---- a/mt7915/testmode.c -+++ b/mt7915/testmode.c -@@ -14,6 +14,12 @@ enum { - TM_CHANGED_AID, - TM_CHANGED_CFG, - TM_CHANGED_TXBF_ACT, -+ TM_CHANGED_OFF_CHAN_CH, -+ TM_CHANGED_OFF_CHAN_CENTER_CH, -+ TM_CHANGED_OFF_CHAN_BW, -+ TM_CHANGED_IPI_THRESHOLD, -+ TM_CHANGED_IPI_PERIOD, -+ TM_CHANGED_IPI_RESET, - - /* must be last */ - NUM_TM_CHANGED -@@ -26,6 +32,12 @@ static const u8 tm_change_map[] = { - [TM_CHANGED_AID] = MT76_TM_ATTR_AID, - [TM_CHANGED_CFG] = MT76_TM_ATTR_CFG, - [TM_CHANGED_TXBF_ACT] = MT76_TM_ATTR_TXBF_ACT, -+ [TM_CHANGED_OFF_CHAN_CH] = MT76_TM_ATTR_OFF_CH_SCAN_CH, -+ [TM_CHANGED_OFF_CHAN_CENTER_CH] = MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH, -+ [TM_CHANGED_OFF_CHAN_BW] = MT76_TM_ATTR_OFF_CH_SCAN_BW, -+ [TM_CHANGED_IPI_THRESHOLD] = MT76_TM_ATTR_IPI_THRESHOLD, -+ [TM_CHANGED_IPI_PERIOD] = MT76_TM_ATTR_IPI_PERIOD, -+ [TM_CHANGED_IPI_RESET] = MT76_TM_ATTR_IPI_RESET, - }; - - struct reg_band { -@@ -984,6 +996,272 @@ mt7915_tm_set_txbf(struct mt7915_phy *phy) - return 0; - } - -+static u8 -+mt7915_tm_get_center_chan(struct mt7915_phy *phy, struct cfg80211_chan_def *chandef, -+ int width_mhz) -+{ -+ struct mt76_phy *mphy = phy->mt76; -+ const struct ieee80211_channel *chan = mphy->sband_5g.sband.channels; -+ u32 bitmap, i, offset, size = 32; -+ u16 first_control = 0, control_chan = chandef->chan->hw_value; -+ static const u32 width_to_bitmap[] = { -+ [NL80211_CHAN_WIDTH_20_NOHT] = 0x0, -+ [NL80211_CHAN_WIDTH_20] = 0x0, -+ [NL80211_CHAN_WIDTH_40] = 0x55554055, -+ [NL80211_CHAN_WIDTH_80] = 0x44444011, -+ [NL80211_CHAN_WIDTH_80P80] = 0x0, -+ [NL80211_CHAN_WIDTH_160] = 0x04004001, -+ }; -+ -+ bitmap = width_to_bitmap[chandef->width]; -+ if (!bitmap) -+ return control_chan; -+ -+ offset = width_mhz / 10 - 2; -+ for (i = 0; i < size; i++) { -+ if (!((1 << i) & bitmap)) -+ continue; -+ -+ if (control_chan >= chan[i].hw_value) -+ first_control = chan[i].hw_value; -+ else -+ break; -+ } -+ -+ if (chandef->width == NL80211_CHAN_WIDTH_40 && -+ control_chan >= chan[size].hw_value) -+ return chan[size].hw_value + offset; -+ else if (first_control == 0) -+ return control_chan; -+ -+ return first_control + offset; -+} -+ -+static int -+mt7915_tm_set_offchan(struct mt7915_phy *phy, bool no_center) -+{ -+ struct mt76_phy *mphy = phy->mt76; -+ struct mt7915_dev *dev = phy->dev; -+ struct ieee80211_hw *hw = mphy->hw; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct cfg80211_chan_def chandef = {}; -+ struct ieee80211_channel *chan; -+ int ret, freq = ieee80211_channel_to_frequency(td->offchan_ch, NL80211_BAND_5GHZ); -+ int width_mhz; -+ const int bw_to_mhz[] = { -+ [NL80211_CHAN_WIDTH_20_NOHT] = 20, -+ [NL80211_CHAN_WIDTH_20] = 20, -+ [NL80211_CHAN_WIDTH_40] = 40, -+ [NL80211_CHAN_WIDTH_80] = 80, -+ [NL80211_CHAN_WIDTH_80P80] = 80, -+ [NL80211_CHAN_WIDTH_160] = 160, -+ }; -+ -+ if (!mphy->cap.has_5ghz || !freq) { -+ ret = -EINVAL; -+ dev_info(dev->mt76.dev, "Failed to set offchan (invalid band or channel)!\n"); -+ goto out; -+ } -+ -+ chandef.width = td->offchan_bw; -+ width_mhz = bw_to_mhz[chandef.width]; -+ chan = ieee80211_get_channel(hw->wiphy, freq); -+ if (!chan) { -+ ret = -EINVAL; -+ dev_info(dev->mt76.dev, "Failed to set offchan (invalid control channel)!\n"); -+ goto out; -+ } -+ chandef.chan = chan; -+ -+ if (no_center) -+ td->offchan_center_ch = mt7915_tm_get_center_chan(phy, &chandef, width_mhz); -+ chandef.center_freq1 = ieee80211_channel_to_frequency(td->offchan_center_ch, -+ NL80211_BAND_5GHZ); -+ if (!cfg80211_chandef_valid(&chandef)) { -+ ret = -EINVAL; -+ dev_info(dev->mt76.dev, "Failed to set offchan, chandef is invalid!\n"); -+ goto out; -+ } -+ -+ memset(&dev->rdd2_chandef, 0, sizeof(struct cfg80211_chan_def)); -+ -+ ret = mt7915_mcu_rdd_background_enable(phy, &chandef); -+ -+ if (ret) -+ goto out; -+ -+ dev->rdd2_phy = phy; -+ dev->rdd2_chandef = chandef; -+ -+ return ret; -+ -+out: -+ td->offchan_ch = 0; -+ td->offchan_center_ch = 0; -+ td->offchan_bw = 0; -+ -+ return ret; -+} -+ -+static void -+mt7915_tm_dump_ipi(struct mt7915_phy *phy, void *data, u8 antenna_num, -+ u8 start_antenna_idx, bool is_scan) -+{ -+#define PRECISION 100 -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt7915_mcu_rdd_ipi_scan *scan_data; -+ struct mt7915_mcu_rdd_ipi_ctrl *ctrl_data; -+ u32 ipi_idx, ipi_free_count, ipi_percentage, ipi_hist_count_th, ipi_hist_total_count; -+ u32 self_idle_ratio, ipi_idle_ratio, channel_load, tx_assert_time; -+ u8 i, antenna_idx = start_antenna_idx; -+ u32 *ipi_hist_data; -+ const char *power_lower_bound, *power_upper_bound; -+ static const char * const ipi_idx_to_power_bound[] = { -+ [RDD_IPI_HIST_0] = "-92", -+ [RDD_IPI_HIST_1] = "-89", -+ [RDD_IPI_HIST_2] = "-86", -+ [RDD_IPI_HIST_3] = "-83", -+ [RDD_IPI_HIST_4] = "-80", -+ [RDD_IPI_HIST_5] = "-75", -+ [RDD_IPI_HIST_6] = "-70", -+ [RDD_IPI_HIST_7] = "-65", -+ [RDD_IPI_HIST_8] = "-60", -+ [RDD_IPI_HIST_9] = "-55", -+ [RDD_IPI_HIST_10] = "inf", -+ }; -+ -+ if (is_scan) { -+ scan_data = (struct mt7915_mcu_rdd_ipi_scan *)data; -+ tx_assert_time = scan_data->tx_assert_time; -+ } else { -+ ctrl_data = (struct mt7915_mcu_rdd_ipi_ctrl *)data; -+ tx_assert_time = ctrl_data->tx_assert_time; -+ } -+ -+ for (i = 0; i < antenna_num; i++) { -+ ipi_free_count = 0; -+ ipi_hist_count_th = 0; -+ ipi_hist_total_count = 0; -+ ipi_hist_data = is_scan ? scan_data->ipi_hist_val[antenna_idx] : -+ ctrl_data->ipi_hist_val; -+ -+ dev_info(dev->mt76.dev, "Antenna index: %d\n", antenna_idx); -+ for (ipi_idx = 0; ipi_idx < POWER_INDICATE_HIST_MAX; ipi_idx++) { -+ power_lower_bound = ipi_idx ? ipi_idx_to_power_bound[ipi_idx - 1] : -+ "-inf"; -+ power_upper_bound = ipi_idx_to_power_bound[ipi_idx]; -+ -+ dev_info(dev->mt76.dev, -+ "IPI %d (power range: (%s, %s] dBm): ipi count = %d\n", -+ ipi_idx, power_lower_bound, -+ power_upper_bound, ipi_hist_data[ipi_idx]); -+ -+ if (td->ipi_threshold <= ipi_idx && ipi_idx <= RDD_IPI_HIST_10) -+ ipi_hist_count_th += ipi_hist_data[ipi_idx]; -+ -+ ipi_hist_total_count += ipi_hist_data[ipi_idx]; -+ } -+ ipi_free_count = is_scan ? ipi_hist_total_count : -+ ipi_hist_data[RDD_IPI_FREE_RUN_CNT]; -+ -+ dev_info(dev->mt76.dev, -+ "IPI threshold %d: ipi_hist_count_th = %d, ipi_free_count = %d\n", -+ td->ipi_threshold, ipi_hist_count_th, ipi_free_count); -+ dev_info(dev->mt76.dev, "TX assert time = %d [ms]\n", -+ tx_assert_time / 1000); -+ -+ // Calculate channel load = (self idle ratio - idle ratio) / self idle ratio -+ if (ipi_hist_count_th >= UINT_MAX / (100 * PRECISION)) -+ ipi_percentage = 100 * PRECISION * -+ (ipi_hist_count_th / (100 * PRECISION)) / -+ (ipi_free_count / (100 * PRECISION)); -+ else -+ ipi_percentage = PRECISION * 100 * ipi_hist_count_th / ipi_free_count; -+ -+ ipi_idle_ratio = ((100 * PRECISION) - ipi_percentage) / PRECISION; -+ -+ self_idle_ratio = PRECISION * 100 * -+ (td->ipi_period - (tx_assert_time / 1000)) / -+ td->ipi_period / PRECISION; -+ -+ if (self_idle_ratio < ipi_idle_ratio) -+ channel_load = 0; -+ else -+ channel_load = self_idle_ratio - ipi_idle_ratio; -+ -+ if (self_idle_ratio <= td->ipi_threshold) { -+ dev_info(dev->mt76.dev, -+ "band[%d]: self idle ratio = %d%%, idle ratio = %d%%\n", -+ phy->mt76->band_idx, self_idle_ratio, ipi_idle_ratio); -+ return; -+ } -+ -+ channel_load = (100 * channel_load) / self_idle_ratio; -+ dev_info(dev->mt76.dev, -+ "band[%d]: chan load = %d%%, self idle ratio = %d%%, idle ratio = %d%%\n", -+ phy->mt76->band_idx, channel_load, self_idle_ratio, ipi_idle_ratio); -+ antenna_idx++; -+ } -+} -+ -+static void -+mt7915_tm_ipi_work(struct work_struct *work) -+{ -+ struct mt7915_phy *phy = container_of(work, struct mt7915_phy, ipi_work.work); -+ struct mt7915_dev *dev = phy->dev; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ u8 start_antenna_idx = 0, antenna_num = 1; -+ -+ if (!is_mt7915(&dev->mt76)) { -+ struct mt7915_mcu_rdd_ipi_scan data; -+ -+ if (phy->mt76->band_idx) -+ start_antenna_idx = 4; -+ -+ /* Use all antenna */ -+ if (td->ipi_antenna_idx == MT76_TM_IPI_ANTENNA_ALL) -+ antenna_num = 4; -+ else -+ start_antenna_idx += td->ipi_antenna_idx; -+ -+ mt7915_mcu_ipi_hist_scan(phy, &data, 0, true); -+ mt7915_tm_dump_ipi(phy, &data, antenna_num, start_antenna_idx, true); -+ } else { -+ struct mt7915_mcu_rdd_ipi_ctrl data; -+ -+ start_antenna_idx = 4; -+ mt7915_mcu_ipi_hist_ctrl(phy, &data, RDD_IPI_HIST_ALL_CNT, true); -+ mt7915_tm_dump_ipi(phy, &data, antenna_num, start_antenna_idx, false); -+ } -+} -+ -+static inline void -+mt7915_tm_reset_ipi(struct mt7915_phy *phy) -+{ -+#define IPI_RESET_BIT BIT(2) -+ struct mt7915_dev *dev = phy->dev; -+ -+ if (is_mt7915(&dev->mt76)) -+ mt7915_mcu_ipi_hist_ctrl(phy, NULL, RDD_SET_IPI_HIST_RESET, false); -+ else -+ mt76_set(dev, MT_WF_IPI_RESET, IPI_RESET_BIT); -+} -+ -+static int -+mt7915_tm_set_ipi(struct mt7915_phy *phy) -+{ -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ -+ mt7915_tm_reset_ipi(phy); -+ -+ cancel_delayed_work(&phy->ipi_work); -+ ieee80211_queue_delayed_work(phy->mt76->hw, &phy->ipi_work, -+ msecs_to_jiffies(td->ipi_period)); -+ -+ return 0; -+} -+ - static int - mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min, - u16 cw_max, u16 txop, u8 tx_cmd) -@@ -1273,6 +1551,8 @@ mt7915_tm_init(struct mt7915_phy *phy, bool en) - phy->mt76->test.tx_mpdu_len = 0; - phy->test.bf_en = 0; - mt7915_tm_set_entry(phy); -+ } else { -+ INIT_DELAYED_WORK(&phy->ipi_work, mt7915_tm_ipi_work); - } - } - -@@ -2038,6 +2318,14 @@ mt7915_tm_update_params(struct mt7915_phy *phy, u32 changed) - mt7915_tm_set_cfg(phy); - if (changed & BIT(TM_CHANGED_TXBF_ACT)) - mt7915_tm_set_txbf(phy); -+ if ((changed & BIT(TM_CHANGED_OFF_CHAN_CH)) && -+ (changed & BIT(TM_CHANGED_OFF_CHAN_BW))) -+ mt7915_tm_set_offchan(phy, !(changed & BIT(TM_CHANGED_OFF_CHAN_CENTER_CH))); -+ if ((changed & BIT(TM_CHANGED_IPI_THRESHOLD)) && -+ (changed & BIT(TM_CHANGED_IPI_PERIOD))) -+ mt7915_tm_set_ipi(phy); -+ if (changed & BIT(TM_CHANGED_IPI_RESET)) -+ mt7915_tm_reset_ipi(phy); - } - - static int -diff --git a/testmode.c b/testmode.c -index b1986ad..b369826 100644 ---- a/testmode.c -+++ b/testmode.c -@@ -26,6 +26,13 @@ const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS] = { - [MT76_TM_ATTR_TX_TIME] = { .type = NLA_U32 }, - [MT76_TM_ATTR_FREQ_OFFSET] = { .type = NLA_U32 }, - [MT76_TM_ATTR_DRV_DATA] = { .type = NLA_NESTED }, -+ [MT76_TM_ATTR_OFF_CH_SCAN_CH] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_OFF_CH_SCAN_PATH] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_IPI_THRESHOLD] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_IPI_PERIOD] = { .type = NLA_U32 }, -+ [MT76_TM_ATTR_IPI_ANTENNA_INDEX] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_IPI_RESET] = { .type = NLA_U8 }, - }; - EXPORT_SYMBOL_GPL(mt76_tm_policy); - -@@ -407,6 +414,7 @@ mt76_testmode_init_defaults(struct mt76_phy *phy) - td->tx_count = 1; - td->tx_rate_mode = MT76_TM_TX_MODE_OFDM; - td->tx_rate_nss = 1; -+ td->ipi_antenna_idx = MT76_TM_IPI_ANTENNA_ALL; - - memcpy(td->addr[0], phy->macaddr, ETH_ALEN); - memcpy(td->addr[1], phy->macaddr, ETH_ALEN); -@@ -615,6 +623,9 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - if (tb[MT76_TM_ATTR_TX_RATE_IDX]) - td->tx_rate_idx = nla_get_u8(tb[MT76_TM_ATTR_TX_RATE_IDX]); - -+ if (tb[MT76_TM_ATTR_IPI_PERIOD]) -+ td->ipi_period = nla_get_u32(tb[MT76_TM_ATTR_IPI_PERIOD]); -+ - if (mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_MODE], &td->tx_rate_mode, - 0, MT76_TM_TX_MODE_MAX) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_NSS], &td->tx_rate_nss, -@@ -631,7 +642,16 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - &td->tx_power_control, 0, 1) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_AID], &td->aid, 0, 16) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_RU_ALLOC], &td->ru_alloc, 0, 0xff) || -- mt76_tm_get_u8(tb[MT76_TM_ATTR_RU_IDX], &td->ru_idx, 0, 68)) -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_RU_IDX], &td->ru_idx, 0, 68) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_OFF_CH_SCAN_CH], &td->offchan_ch, 36, 196) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH], &td->offchan_center_ch, -+ 36, 196) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_OFF_CH_SCAN_BW], -+ &td->offchan_bw, NL80211_CHAN_WIDTH_20_NOHT, NL80211_CHAN_WIDTH_160) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_IPI_THRESHOLD], &td->ipi_threshold, 0, 10) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_IPI_ANTENNA_INDEX], &td->ipi_antenna_idx, -+ MT76_TM_IPI_ANTENNA_0, MT76_TM_IPI_ANTENNA_ALL) || -+ mt76_tm_get_u8(tb[MT76_TM_ATTR_IPI_RESET], &td->ipi_reset, 0, 1)) - goto out; - - if (tb[MT76_TM_ATTR_TX_LENGTH]) { -@@ -866,6 +886,9 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, - nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE, td->tx_rate_mode) || - nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_SGI, td->tx_rate_sgi) || - nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_STBC, td->tx_rate_stbc) || -+ nla_put_u8(msg, MT76_TM_ATTR_OFF_CH_SCAN_CH, td->offchan_ch) || -+ nla_put_u8(msg, MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH, td->offchan_center_ch) || -+ nla_put_u8(msg, MT76_TM_ATTR_OFF_CH_SCAN_BW, td->offchan_bw) || - (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_LTF) && - nla_put_u8(msg, MT76_TM_ATTR_TX_LTF, td->tx_ltf)) || - (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_ANTENNA) && -diff --git a/testmode.h b/testmode.h -index 1d7aef8..b39cf51 100644 ---- a/testmode.h -+++ b/testmode.h -@@ -64,6 +64,20 @@ - * (nested, u8 attrs) - * - * @MT76_TM_ATTR_CFG: config testmode rf feature (nested, see &mt76_testmode_cfg) -+ * @MT76_TM_ATTR_TXBF_ACT: txbf setting actions (u8) -+ * @MT76_TM_ATTR_TXBF_PARAM: txbf parameters (nested) -+ * -+ * @MT76_TM_ATTR_OFF_CH_SCAN_CH: config the channel of background chain (ZWDFS) (u8) -+ * @MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH: config the center channel of background chain (ZWDFS) (u8) -+ * @MT76_TM_ATTR_OFF_CH_SCAN_BW: config the bandwidth of background chain (ZWDFS) (u8) -+ * @MT76_TM_ATTR_OFF_CH_SCAN_PATH: config the tx path of background chain (ZWDFS) (u8) -+ * -+ * @MT76_TM_ATTR_IPI_THRESHOLD: config the IPI index you want to read (u8) -+ * @MT76_TM_ATTR_IPI_PERIOD: config the time period for reading -+ * the histogram of specific IPI index (u8) -+ * @MT76_TM_ATTR_IPI_ANTENNA_INDEX: config the antenna index for reading -+ * the histogram of specific IPI index (u8) -+ * @MT76_TM_ATTR_IPI_RESET: Reset the IPI counter - * - */ - enum mt76_testmode_attr { -@@ -118,6 +132,16 @@ enum mt76_testmode_attr { - MT76_TM_ATTR_TXBF_ACT, - MT76_TM_ATTR_TXBF_PARAM, - -+ MT76_TM_ATTR_OFF_CH_SCAN_CH, -+ MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH, -+ MT76_TM_ATTR_OFF_CH_SCAN_BW, -+ MT76_TM_ATTR_OFF_CH_SCAN_PATH, -+ -+ MT76_TM_ATTR_IPI_THRESHOLD, -+ MT76_TM_ATTR_IPI_PERIOD, -+ MT76_TM_ATTR_IPI_ANTENNA_INDEX, -+ MT76_TM_ATTR_IPI_RESET, -+ - /* keep last */ - NUM_MT76_TM_ATTRS, - MT76_TM_ATTR_MAX = NUM_MT76_TM_ATTRS - 1, -@@ -296,4 +320,25 @@ enum mt76_testmode_txbf_act { - MT76_TM_TXBF_ACT_MAX = NUM_MT76_TM_TXBF_ACT - 1, - }; - -+/** -+ * enum mt76_testmode_ipi_antenna - specify antenna index for ipi count -+ * -+ * @MT76_TM_IPI_ANTENNA_0: use antenna 0 -+ * @MT76_TM_IPI_ANTENNA_1: use antenna 1 -+ * @MT76_TM_IPI_ANTENNA_2: use antenna 2 -+ * @MT76_TM_IPI_ANTENNA_3: use antenna 3 -+ * @MT76_TM_IPI_ANTENNA_ALL: use all antenna -+ */ -+enum mt76_testmode_ipi_antenna { -+ MT76_TM_IPI_ANTENNA_0, -+ MT76_TM_IPI_ANTENNA_1, -+ MT76_TM_IPI_ANTENNA_2, -+ MT76_TM_IPI_ANTENNA_3, -+ MT76_TM_IPI_ANTENNA_ALL, -+ -+ /* keep last */ -+ NUM_MT76_TM_IPI_ANTENNA, -+ MT76_TM_IPI_ANTENNA_MAX = NUM_MT76_TM_IPI_ANTENNA - 1, -+}; -+ - #endif -diff --git a/tools/fields.c b/tools/fields.c -index b0ee84d..e2cf4b9 100644 ---- a/tools/fields.c -+++ b/tools/fields.c -@@ -46,6 +46,14 @@ static const char * const testmode_txbf_act[] = { - [MT76_TM_TXBF_ACT_E2P_UPDATE] = "e2p_update", - }; - -+static const char * const testmode_offchan_bw[] = { -+ [NL80211_CHAN_WIDTH_20_NOHT] = "NOHT", -+ [NL80211_CHAN_WIDTH_20] = "20", -+ [NL80211_CHAN_WIDTH_40] = "40", -+ [NL80211_CHAN_WIDTH_80] = "80", -+ [NL80211_CHAN_WIDTH_160] = "160", -+}; -+ - static void print_enum(const struct tm_field *field, struct nlattr *attr) - { - unsigned int i = nla_get_u8(attr); -@@ -414,6 +422,13 @@ static const struct tm_field testdata_fields[NUM_MT76_TM_ATTRS] = { - FIELD(u8, RU_IDX, "ru_idx"), - FIELD_ENUM(TXBF_ACT, "txbf_act", testmode_txbf_act), - FIELD_ARRAY(u16_hex, TXBF_PARAM, "txbf_param"), -+ FIELD(u8, OFF_CH_SCAN_CH, "offchan_ch"), -+ FIELD(u8, OFF_CH_SCAN_CENTER_CH, "offchan_center_ch"), -+ FIELD_ENUM(OFF_CH_SCAN_BW, "offchan_bw", testmode_offchan_bw), -+ FIELD(u8, IPI_THRESHOLD, "ipi_threshold"), -+ FIELD(u32, IPI_PERIOD, "ipi_period"), -+ FIELD(u8, IPI_ANTENNA_INDEX, "ipi_antenna_idx"), -+ FIELD(u8, IPI_RESET, "ipi_reset"), - FIELD_MAC(MAC_ADDRS, "mac_addrs"), - FIELD_NESTED_RO(STATS, stats, "", - .print_extra = print_extra_stats), -@@ -446,6 +461,13 @@ static struct nla_policy testdata_policy[NUM_MT76_TM_ATTRS] = { - [MT76_TM_ATTR_RU_IDX] = { .type = NLA_U8 }, - [MT76_TM_ATTR_STATS] = { .type = NLA_NESTED }, - [MT76_TM_ATTR_TXBF_ACT] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_OFF_CH_SCAN_CH] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_OFF_CH_SCAN_CENTER_CH] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_OFF_CH_SCAN_BW] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_IPI_THRESHOLD] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_IPI_PERIOD] = { .type = NLA_U32 }, -+ [MT76_TM_ATTR_IPI_ANTENNA_INDEX] = { .type = NLA_U8 }, -+ [MT76_TM_ATTR_IPI_RESET] = { .type = NLA_U8 }, - }; - - const struct tm_field msg_field = { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1012-wifi-mt76-testmode-add-iBF-eBF-cal-and-cert-commands.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1012-wifi-mt76-testmode-add-iBF-eBF-cal-and-cert-commands.patch deleted file mode 100644 index 289bbe401..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1012-wifi-mt76-testmode-add-iBF-eBF-cal-and-cert-commands.patch +++ /dev/null @@ -1,1923 +0,0 @@ -From 2a34bd2105e5021dacaf30c90bb6816f107cabd4 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Thu, 15 Dec 2022 19:45:18 +0800 -Subject: [PATCH] wifi: mt76: testmode: add iBF/eBF cal and cert commands with - golden - -Signed-off-by: StanleyYP Wang ---- - mt76.h | 4 + - mt76_connac_mcu.c | 3 + - mt7915/mac.c | 4 +- - mt7915/main.c | 54 ++--- - mt7915/mcu.c | 29 ++- - mt7915/mcu.h | 172 ++++++++++++++++ - mt7915/mmio.c | 2 + - mt7915/mt7915.h | 16 +- - mt7915/mtk_debugfs.c | 35 ++++ - mt7915/mtk_mcu.c | 247 ++++++++++++++++++++++- - mt7915/regs.h | 4 + - mt7915/testmode.c | 461 ++++++++++++++++++++++++++++--------------- - mt7915/testmode.h | 134 +------------ - testmode.c | 1 + - testmode.h | 9 + - tools/fields.c | 9 + - 16 files changed, 859 insertions(+), 325 deletions(-) - -diff --git a/mt76.h b/mt76.h -index 53b0964..1455144 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -755,6 +755,7 @@ struct mt76_testmode_data { - - struct list_head tm_entry_list; - struct mt76_wcid *cur_entry; -+ struct ieee80211_vif *second_vif; - u8 entry_num; - union { - struct mt76_testmode_entry_data ed; -@@ -783,6 +784,9 @@ struct mt76_testmode_data { - - u8 txbf_act; - u16 txbf_param[8]; -+ bool is_txbf_dut; -+ bool bf_en; -+ bool ebf; - - u32 tx_pending; - u32 tx_queued; -diff --git a/mt76_connac_mcu.c b/mt76_connac_mcu.c -index 44cd646..15e61c9 100644 ---- a/mt76_connac_mcu.c -+++ b/mt76_connac_mcu.c -@@ -2688,6 +2688,7 @@ int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, - u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA; - struct bss_info_basic *bss; - struct tlv *tlv; -+ struct mt76_testmode_data *td = &phy->test; - - tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); - bss = (struct bss_info_basic *)tlv; -@@ -2747,6 +2748,8 @@ int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, - bss->dtim_period = vif->bss_conf.dtim_period; - bss->phy_mode = mt76_connac_get_phy_mode(phy, vif, - chandef->chan->band, NULL); -+ } else if (td->bf_en) { -+ memcpy(bss->bssid, vif->addr, ETH_ALEN); - } else { - memcpy(bss->bssid, phy->macaddr, ETH_ALEN); - } -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 7d3397e..d94a0d5 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -737,8 +737,10 @@ mt7915_mac_write_txwi_tm(struct mt7915_phy *phy, __le32 *txwi, - val |= MT_TXD6_LDPC; - - txwi[3] &= ~cpu_to_le32(MT_TXD3_SN_VALID); -- if (phy->test.bf_en) -+ if (td->bf_en && !td->ebf) - val |= MT_TXD6_TX_IBF | MT_TXD6_TX_EBF; -+ else if (td->bf_en && td->ebf) -+ val |= MT_TXD6_TX_EBF; - - txwi[6] |= cpu_to_le32(val); - #endif -diff --git a/mt7915/main.c b/mt7915/main.c -index e53754c..69477f1 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -205,46 +205,37 @@ static void mt7915_init_bitrate_mask(struct ieee80211_vif *vif) - } - } - --static int mt7915_add_interface(struct ieee80211_hw *hw, -- struct ieee80211_vif *vif) -+int mt7915_init_vif(struct mt7915_phy *phy, struct ieee80211_vif *vif, bool bf_en) - { - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; -- struct mt7915_dev *dev = mt7915_hw_dev(hw); -- struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct mt7915_dev *dev = phy->dev; - struct mt76_txq *mtxq; - bool ext_phy = phy != &dev->phy; - int idx, ret = 0; - -- mutex_lock(&dev->mt76.mutex); -- -- mt76_testmode_reset(phy->mt76, true); -- -- if (vif->type == NL80211_IFTYPE_MONITOR && -- is_zero_ether_addr(vif->addr)) -- phy->monitor_vif = vif; -+ /* To differentiate the mac address of TXD and TXCMD interface */ -+ vif->addr[0] |= bf_en; - - mvif->mt76.idx = __ffs64(~dev->mt76.vif_mask); -- if (mvif->mt76.idx >= (MT7915_MAX_INTERFACES << dev->dbdc_support)) { -- ret = -ENOSPC; -- goto out; -- } -+ if (mvif->mt76.idx >= (MT7915_MAX_INTERFACES << dev->dbdc_support)) -+ return -ENOSPC; - - idx = get_omac_idx(vif->type, phy->omac_mask); -- if (idx < 0) { -- ret = -ENOSPC; -- goto out; -- } -+ if (idx < 0) -+ return -ENOSPC; -+ - mvif->mt76.omac_idx = idx; - mvif->phy = phy; - mvif->mt76.band_idx = phy->mt76->band_idx; - -- mvif->mt76.wmm_idx = (vif->type != NL80211_IFTYPE_AP && vif->type != NL80211_IFTYPE_MONITOR); -+ mvif->mt76.wmm_idx = (vif->type != NL80211_IFTYPE_AP && -+ vif->type != NL80211_IFTYPE_MONITOR) || bf_en; - if (ext_phy) - mvif->mt76.wmm_idx += 2; - - ret = mt7915_mcu_add_dev_info(phy, vif, true); - if (ret) -- goto out; -+ return ret; - - dev->mt76.vif_mask |= BIT_ULL(mvif->mt76.idx); - phy->omac_mask |= BIT_ULL(mvif->mt76.omac_idx); -@@ -280,7 +271,26 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, - mt7915_mcu_add_sta(dev, vif, NULL, true); - rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid); - --out: -+ return ret; -+} -+ -+static int mt7915_add_interface(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif) -+{ -+ struct mt7915_dev *dev = mt7915_hw_dev(hw); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ int ret = 0; -+ -+ mutex_lock(&dev->mt76.mutex); -+ -+ mt76_testmode_reset(phy->mt76, true); -+ -+ if (vif->type == NL80211_IFTYPE_MONITOR && -+ is_zero_ether_addr(vif->addr)) -+ phy->monitor_vif = vif; -+ -+ ret = mt7915_init_vif(phy, vif, false); -+ - mutex_unlock(&dev->mt76.mutex); - - return ret; -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 2025ef3..f5042ae 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -199,6 +199,7 @@ mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, - int ret; - - ret = mt76_connac2_mcu_fill_message(mdev, skb, cmd, wait_seq); -+ - if (ret) - return ret; - -@@ -478,10 +479,12 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - case MCU_EXT_EVENT_BCC_NOTIFY: - mt7915_mcu_rx_bcc_notify(dev, skb); - break; --#ifdef CONFIG_NL80211_TESTMODE -+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG - case MCU_EXT_EVENT_BF_STATUS_READ: -- mt7915_tm_txbf_status_read(dev, skb); -+ mt7915_mcu_txbf_status_read(dev, skb); - break; -+#endif -+#ifdef CONFIG_NL80211_TESTMODE - case MCU_EXT_EVENT_RF_TEST: - mt7915_tm_rf_test_event(dev, skb); - break; -@@ -773,11 +776,22 @@ int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, - if (enable) - mt76_connac_mcu_bss_omac_tlv(skb, vif); - -- mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, -- mvif->sta.wcid.idx, enable); -+ if (vif->type == NL80211_IFTYPE_MONITOR) { -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt76_wcid *wcid; -+ -+ if (!td->aid || list_empty(&td->tm_entry_list)) -+ wcid = &mvif->sta.wcid; -+ else -+ wcid = list_first_entry(&td->tm_entry_list, struct mt76_wcid, list); - -- if (vif->type == NL80211_IFTYPE_MONITOR) -+ mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, -+ wcid->idx, enable); - goto out; -+ } -+ -+ mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, -+ mvif->sta.wcid.idx, enable); - - if (enable) { - mt7915_mcu_bss_rfch_tlv(skb, vif, phy); -@@ -3582,6 +3596,7 @@ int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band) - - int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action) - { -+#define MT_BF_PROCESSING 4 - struct { - u8 action; - union { -@@ -3608,7 +3623,6 @@ int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action) - .action = action, - }; - --#define MT_BF_PROCESSING 4 - switch (action) { - case MT_BF_SOUNDING_ON: - req.snd.snd_mode = MT_BF_PROCESSING; -@@ -4847,6 +4861,9 @@ int mt7915_mcu_set_txbf_sound_info(struct mt7915_phy *phy, u8 action, - req.he_opt = v2; - req.glo_opt = v3; - break; -+ case BF_SND_CFG_INF: -+ req.inf = v1; -+ break; - default: - return -EINVAL; - } -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 066246b..de17c57 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -546,10 +546,12 @@ enum { - }; - - enum { -+ MT_BF_SOUNDING_OFF = 0, - MT_BF_SOUNDING_ON = 1, - MT_BF_DATA_PACKET_APPLY = 2, - MT_BF_PFMU_TAG_READ = 5, - MT_BF_PFMU_TAG_WRITE = 6, -+ MT_BF_STA_REC_READ = 13, - MT_BF_PHASE_CAL = 14, - MT_BF_IBF_PHASE_COMP = 15, - MT_BF_PROFILE_WRITE_ALL = 17, -@@ -557,6 +559,176 @@ enum { - MT_BF_MODULE_UPDATE = 25 - }; - -+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG -+struct mt7915_pfmu_tag1 { -+ __le32 pfmu_idx:10; -+ __le32 ebf:1; -+ __le32 data_bw:2; -+ __le32 lm:2; -+ __le32 is_mu:1; -+ __le32 nr:3, nc:3; -+ __le32 codebook:2; -+ __le32 ngroup:2; -+ __le32 _rsv:2; -+ __le32 invalid_prof:1; -+ __le32 rmsd:3; -+ -+ __le32 col_id1:6, row_id1:10; -+ __le32 col_id2:6, row_id2:10; -+ __le32 col_id3:6, row_id3:10; -+ __le32 col_id4:6, row_id4:10; -+ -+ __le32 ru_start_id:7; -+ __le32 _rsv1:1; -+ __le32 ru_end_id:7; -+ __le32 _rsv2:1; -+ __le32 mob_cal_en:1; -+ __le32 _rsv3:15; -+ -+ __le32 snr_sts0:8, snr_sts1:8, snr_sts2:8, snr_sts3:8; -+ __le32 snr_sts4:8, snr_sts5:8, snr_sts6:8, snr_sts7:8; -+ -+ __le32 _rsv4; -+} __packed; -+ -+struct mt7915_pfmu_tag2 { -+ __le32 smart_ant:24; -+ __le32 se_idx:5; -+ __le32 _rsv:3; -+ -+ __le32 _rsv1:8; -+ __le32 rmsd_thres:3; -+ __le32 _rsv2:5; -+ __le32 ibf_timeout:8; -+ __le32 _rsv3:8; -+ -+ __le32 _rsv4:16; -+ __le32 ibf_data_bw:2; -+ __le32 ibf_nc:3; -+ __le32 ibf_nr:3; -+ __le32 ibf_ru:8; -+ -+ __le32 mob_delta_t:8; -+ __le32 mob_lq_result:7; -+ __le32 _rsv5:1; -+ __le32 _rsv6:16; -+ -+ __le32 _rsv7; -+} __packed; -+ -+struct mt7915_pfmu_tag { -+ struct mt7915_pfmu_tag1 t1; -+ struct mt7915_pfmu_tag2 t2; -+}; -+ -+struct mt7915_bf_status_hdr { -+ u8 format_id; -+ u8 bw; -+ u16 subcarrier_idx; -+ bool bfer; -+ u8 rsv[3]; -+} __packed; -+ -+struct mt7915_bf_status { -+ struct mt7915_bf_status_hdr hdr; -+ u8 buf[1000]; -+} __packed; -+ -+struct mt7915_txbf_phase_out { -+ u8 c0_l; -+ u8 c1_l; -+ u8 c2_l; -+ u8 c3_l; -+ u8 c0_m; -+ u8 c1_m; -+ u8 c2_m; -+ u8 c3_m; -+ u8 c0_h; -+ u8 c1_h; -+ u8 c2_h; -+ u8 c3_h; -+ u8 c0_uh; -+ u8 c1_uh; -+ u8 c2_uh; -+ u8 c3_uh; -+}; -+ -+struct mt7915_txbf_phase { -+ u8 status; -+ struct { -+ u8 r0_uh; -+ u8 r0_h; -+ u8 r0_m; -+ u8 r0_l; -+ u8 r0_ul; -+ u8 r1_uh; -+ u8 r1_h; -+ u8 r1_m; -+ u8 r1_l; -+ u8 r1_ul; -+ u8 r2_uh; -+ u8 r2_h; -+ u8 r2_m; -+ u8 r2_l; -+ u8 r2_ul; -+ u8 r3_uh; -+ u8 r3_h; -+ u8 r3_m; -+ u8 r3_l; -+ u8 r3_ul; -+ u8 r2_uh_sx2; -+ u8 r2_h_sx2; -+ u8 r2_m_sx2; -+ u8 r2_l_sx2; -+ u8 r2_ul_sx2; -+ u8 r3_uh_sx2; -+ u8 r3_h_sx2; -+ u8 r3_m_sx2; -+ u8 r3_l_sx2; -+ u8 r3_ul_sx2; -+ u8 m_t0_h; -+ u8 m_t1_h; -+ u8 m_t2_h; -+ u8 m_t2_h_sx2; -+ u8 r0_reserved; -+ u8 r1_reserved; -+ u8 r2_reserved; -+ u8 r3_reserved; -+ u8 r2_sx2_reserved; -+ u8 r3_sx2_reserved; -+ } phase; -+}; -+ -+struct mt7915_pfmu_data { -+ __le16 subc_idx; -+ __le16 phi11; -+ __le16 phi21; -+ __le16 phi31; -+}; -+ -+struct mt7915_ibf_cal_info { -+ u8 format_id; -+ u8 group_l_m_n; -+ u8 group; -+ bool sx2; -+ u8 status; -+ u8 cal_type; -+ u8 _rsv[2]; -+ u8 buf[1000]; -+} __packed; -+ -+enum { -+ IBF_PHASE_CAL_UNSPEC, -+ IBF_PHASE_CAL_NORMAL, -+ IBF_PHASE_CAL_VERIFY, -+ IBF_PHASE_CAL_NORMAL_INSTRUMENT, -+ IBF_PHASE_CAL_VERIFY_INSTRUMENT, -+}; -+ -+#define MT7915_TXBF_SUBCAR_NUM 64 -+ -+#endif -+ - enum { - MURU_SET_ARB_OP_MODE = 14, - MURU_SET_PLATFORM_TYPE = 25, -diff --git a/mt7915/mmio.c b/mt7915/mmio.c -index 222e2cf..ddf1b72 100644 ---- a/mt7915/mmio.c -+++ b/mt7915/mmio.c -@@ -133,6 +133,7 @@ static const u32 mt7915_offs[] = { - [MDP_BNRCFR1] = 0x074, - [ARB_DRNGR0] = 0x194, - [ARB_SCR] = 0x080, -+ [ARB_TQSAXM0] = 0x030, - [RMAC_MIB_AIRTIME14] = 0x3b8, - [AGG_AALCR0] = 0x048, - [AGG_AWSCR0] = 0x05c, -@@ -209,6 +210,7 @@ static const u32 mt7916_offs[] = { - [MDP_BNRCFR1] = 0x094, - [ARB_DRNGR0] = 0x1e0, - [ARB_SCR] = 0x000, -+ [ARB_TQSAXM0] = 0x180, - [RMAC_MIB_AIRTIME14] = 0x0398, - [AGG_AALCR0] = 0x028, - [AGG_AWSCR0] = 0x030, -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index ec33afd..700efaf 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -312,7 +312,6 @@ struct mt7915_phy { - - u8 spe_idx; - -- bool bf_en; - bool bf_ever_en; - } test; - #endif -@@ -426,7 +425,7 @@ struct mt7915_dev { - void __iomem *dcm; - void __iomem *sku; - --#ifdef CONFIG_NL80211_TESTMODE -+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG - struct { - void *txbf_phase_cal; - void *txbf_pfmu_data; -@@ -574,6 +573,7 @@ int mt7915_dma_reset(struct mt7915_dev *dev, bool force); - int mt7915_dma_start(struct mt7915_dev *dev, bool reset, bool wed_reset); - int mt7915_txbf_init(struct mt7915_dev *dev); - void mt7915_init_txpower(struct mt7915_phy *phy); -+int mt7915_init_vif(struct mt7915_phy *phy, struct ieee80211_vif *vif, bool bf_en); - void mt7915_reset(struct mt7915_dev *dev); - int mt7915_run(struct ieee80211_hw *hw); - int mt7915_mcu_init(struct mt7915_dev *dev); -@@ -654,11 +654,13 @@ int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); - int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); - void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_exit(struct mt7915_dev *dev); --int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb); --void mt7915_tm_rf_test_event(struct mt7915_dev *dev, struct sk_buff *skb); - void mt7915_mcu_wmm_pbc_work(struct work_struct *work); - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif); - -+#ifdef CONFIG_NL80211_TESTMODE -+void mt7915_tm_rf_test_event(struct mt7915_dev *dev, struct sk_buff *skb); -+#endif -+ - static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) - { - return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE; -@@ -792,4 +794,10 @@ enum { - - #endif - -+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG -+int mt7915_mcu_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb); -+int mt7915_mcu_txbf_profile_tag_read(struct mt7915_phy *phy, u8 pfmu_idx, bool bfer); -+int mt7915_mcu_txbf_sta_rec_read(struct mt7915_dev *dev, u16 wlan_idx); -+#endif -+ - #endif -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 84f8fae..9e490ad 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -2888,6 +2888,36 @@ mt7915_txpower_level_set(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(fops_txpower_level, NULL, - mt7915_txpower_level_set, "%lld\n"); - -+static int -+mt7915_txbf_pfmu_tag_read(void *data, u64 val) -+{ -+ struct mt7915_phy *phy = data; -+ u8 pfmu_idx = (u8)val; -+ -+ pr_info("%s: %d pfmu_tag cmd sent out ---\n", __func__, __LINE__); -+ mt7915_mcu_txbf_profile_tag_read(phy, pfmu_idx, true); -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_txbf_pfmu_tag_idx, NULL, -+ mt7915_txbf_pfmu_tag_read, "%llx\n"); -+ -+static int -+mt7915_txbf_sta_rec_read(void *data, u64 val) -+{ -+ struct mt7915_dev *dev = data; -+ u16 wlan_idx = (u16)val; -+ -+ pr_info("%s: %d sta_rec cmd sent out ---\n", __func__, __LINE__); -+ mt7915_mcu_txbf_sta_rec_read(dev, wlan_idx); -+ -+ return 0; -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_txbf_sta_rec, NULL, -+ mt7915_txbf_sta_rec_read, "%llx\n"); -+ - /* usage: echo 0x[arg3][arg2][arg1] > fw_wa_set */ - static int - mt7915_wa_set(void *data, u64 val) -@@ -3777,6 +3807,11 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - debugfs_create_file("txpower_level", 0400, dir, dev, - &fops_txpower_level); - -+ debugfs_create_file("pfmu_tag_read", 0600, dir, phy, -+ &fops_txbf_pfmu_tag_idx); -+ debugfs_create_file("bf_starec_read", 0600, dir, dev, -+ &fops_txbf_sta_rec); -+ - debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable); - - return 0; -diff --git a/mt7915/mtk_mcu.c b/mt7915/mtk_mcu.c -index 143dae2..7a2d28c 100644 ---- a/mt7915/mtk_mcu.c -+++ b/mt7915/mtk_mcu.c -@@ -1,9 +1,10 @@ - #include - #include --#include -+#include - #include "mt7915.h" - #include "mcu.h" - #include "mac.h" -+#include "testmode.h" - - int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level) - { -@@ -49,3 +50,247 @@ int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level) - MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, - sizeof(req), true); - } -+ -+#if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG -+static void mt7915_txbf_dump_pfmu_tag(struct mt7915_dev *dev, struct mt7915_pfmu_tag *tag) -+{ -+ u32 *raw_t1 = (u32 *)&tag->t1; -+ u32 *raw_t2 = (u32 *)&tag->t2; -+ -+ dev_info(dev->mt76.dev, "=================== TXBf Profile Tag1 Info ==================\n"); -+ dev_info(dev->mt76.dev, -+ "DW0 = 0x%08x, DW1 = 0x%08x, DW2 = 0x%08x\n", -+ raw_t1[0], raw_t1[1], raw_t1[2]); -+ dev_info(dev->mt76.dev, -+ "DW4 = 0x%08x, DW5 = 0x%08x, DW6 = 0x%08x\n\n", -+ raw_t1[3], raw_t1[4], raw_t1[5]); -+ dev_info(dev->mt76.dev, "PFMU ID = %d Invalid status = %d\n", -+ tag->t1.pfmu_idx, tag->t1.invalid_prof); -+ dev_info(dev->mt76.dev, "iBf/eBf = %d\n\n", tag->t1.ebf); -+ dev_info(dev->mt76.dev, "DBW = %d\n", tag->t1.data_bw); -+ dev_info(dev->mt76.dev, "SU/MU = %d\n", tag->t1.is_mu); -+ dev_info(dev->mt76.dev, "RMSD = %d\n", tag->t1.rmsd); -+ dev_info(dev->mt76.dev, -+ "nrow = %d, ncol = %d, ng = %d, LM = %d, CodeBook = %d MobCalEn = %d\n", -+ tag->t1.nr, tag->t1.nc, tag->t1.ngroup, tag->t1.lm, tag->t1.codebook, -+ tag->t1.mob_cal_en); -+ dev_info(dev->mt76.dev, "RU start = %d, RU end = %d\n", -+ tag->t1.ru_start_id, tag->t1.ru_end_id); -+ dev_info(dev->mt76.dev, "Mem Col1 = %d, Mem Row1 = %d, Mem Col2 = %d, Mem Row2 = %d\n", -+ tag->t1.col_id1, tag->t1.row_id1, tag->t1.col_id2, tag->t1.row_id2); -+ dev_info(dev->mt76.dev, "Mem Col3 = %d, Mem Row3 = %d, Mem Col4 = %d, Mem Row4 = %d\n\n", -+ tag->t1.col_id3, tag->t1.row_id3, tag->t1.col_id4, tag->t1.row_id4); -+ dev_info(dev->mt76.dev, -+ "STS0_SNR = 0x%02x, STS1_SNR = 0x%02x, STS2_SNR = 0x%02x, STS3_SNR = 0x%02x\n", -+ tag->t1.snr_sts0, tag->t1.snr_sts1, tag->t1.snr_sts2, tag->t1.snr_sts3); -+ dev_info(dev->mt76.dev, -+ "STS4_SNR = 0x%02x, STS5_SNR = 0x%02x, STS6_SNR = 0x%02x, STS7_SNR = 0x%02x\n", -+ tag->t1.snr_sts4, tag->t1.snr_sts5, tag->t1.snr_sts6, tag->t1.snr_sts7); -+ dev_info(dev->mt76.dev, "=============================================================\n"); -+ -+ dev_info(dev->mt76.dev, "=================== TXBf Profile Tag2 Info ==================\n"); -+ dev_info(dev->mt76.dev, -+ "DW0 = 0x%08x, DW1 = 0x%08x, DW2 = 0x%08x\n", -+ raw_t2[0], raw_t2[1], raw_t2[2]); -+ dev_info(dev->mt76.dev, -+ "DW3 = 0x%08x, DW4 = 0x%08x, DW5 = 0x%08x\n\n", -+ raw_t2[3], raw_t2[4], raw_t2[5]); -+ dev_info(dev->mt76.dev, "Smart antenna ID = 0x%x, SE index = %d\n", -+ tag->t2.smart_ant, tag->t2.se_idx); -+ dev_info(dev->mt76.dev, "RMSD threshold = %d\n", tag->t2.rmsd_thres); -+ dev_info(dev->mt76.dev, "Timeout = 0x%x\n", tag->t2.ibf_timeout); -+ dev_info(dev->mt76.dev, "Desired BW = %d, Desired Ncol = %d, Desired Nrow = %d\n", -+ tag->t2.ibf_data_bw, tag->t2.ibf_nc, tag->t2.ibf_nr); -+ dev_info(dev->mt76.dev, "Desired RU Allocation = %d\n", tag->t2.ibf_ru); -+ dev_info(dev->mt76.dev, "Mobility DeltaT = %d, Mobility LQ = %d\n", -+ tag->t2.mob_delta_t, tag->t2.mob_lq_result); -+ dev_info(dev->mt76.dev, "=============================================================\n"); -+} -+ -+static void mt7915_txbf_dump_sta_rec(struct mt7915_dev *dev, struct sta_rec_bf *sta_info) -+{ -+ dev_info(dev->mt76.dev, "===================== BF Station Record =====================\n"); -+ dev_info(dev->mt76.dev, "pfmu = %d\n", sta_info->pfmu); -+ dev_info(dev->mt76.dev, "su_mu = %d\n", sta_info->su_mu); -+ dev_info(dev->mt76.dev, "bf_cap = %d\n", sta_info->bf_cap); -+ dev_info(dev->mt76.dev, "sounding_phy = %d\n", sta_info->sounding_phy); -+ dev_info(dev->mt76.dev, "ndpa_rate = %d\n", sta_info->ndpa_rate); -+ dev_info(dev->mt76.dev, "ndp_rate = %d\n", sta_info->ndp_rate); -+ dev_info(dev->mt76.dev, "rept_poll_rate = %d\n", sta_info->rept_poll_rate); -+ dev_info(dev->mt76.dev, "tx_mode = %d\n", sta_info->tx_mode); -+ dev_info(dev->mt76.dev, "ncol = %d\n", sta_info->ncol); -+ dev_info(dev->mt76.dev, "nrow = %d\n", sta_info->nrow); -+ dev_info(dev->mt76.dev, "bw = %d\n", sta_info->bw); -+ dev_info(dev->mt76.dev, "mem_total = %d\n", sta_info->mem_total); -+ dev_info(dev->mt76.dev, "mem_20m = %d\n", sta_info->mem_20m); -+ dev_info(dev->mt76.dev, "mem_row0 = %d\n", sta_info->mem[0].row); -+ dev_info(dev->mt76.dev, "mem_col0 = %d\n", sta_info->mem[0].col); -+ dev_info(dev->mt76.dev, "mem_row1 = %d\n", sta_info->mem[1].row); -+ dev_info(dev->mt76.dev, "mem_col1 = %d\n", sta_info->mem[1].col); -+ dev_info(dev->mt76.dev, "mem_row2 = %d\n", sta_info->mem[2].row); -+ dev_info(dev->mt76.dev, "mem_col2 = %d\n", sta_info->mem[2].col); -+ dev_info(dev->mt76.dev, "mem_row3 = %d\n", sta_info->mem[3].row); -+ dev_info(dev->mt76.dev, "mem_col3 = %d\n", sta_info->mem[3].col); -+ dev_info(dev->mt76.dev, "smart_ant = 0x%x\n", sta_info->smart_ant); -+ dev_info(dev->mt76.dev, "se_idx = %d\n", sta_info->se_idx); -+ dev_info(dev->mt76.dev, "auto_sounding = %d\n", sta_info->auto_sounding); -+ dev_info(dev->mt76.dev, "ibf_timeout = 0x%x\n", sta_info->ibf_timeout); -+ dev_info(dev->mt76.dev, "ibf_dbw = %d\n", sta_info->ibf_dbw); -+ dev_info(dev->mt76.dev, "ibf_ncol = %d\n", sta_info->ibf_ncol); -+ dev_info(dev->mt76.dev, "ibf_nrow = %d\n", sta_info->ibf_nrow); -+ dev_info(dev->mt76.dev, "nrow_gt_bw80 = %d\n", sta_info->nrow_gt_bw80); -+ dev_info(dev->mt76.dev, "ncol_gt_bw80 = %d\n", sta_info->ncol_gt_bw80); -+ dev_info(dev->mt76.dev, "ru_start_idx = %d\n", sta_info->ru_start_idx); -+ dev_info(dev->mt76.dev, "trigger_su = %d\n", sta_info->trigger_su); -+ dev_info(dev->mt76.dev, "trigger_mu = %d\n", sta_info->trigger_mu); -+ dev_info(dev->mt76.dev, "ng16_su = %d\n", sta_info->ng16_su); -+ dev_info(dev->mt76.dev, "ng16_mu = %d\n", sta_info->ng16_mu); -+ dev_info(dev->mt76.dev, "codebook42_su = %d\n", sta_info->codebook42_su); -+ dev_info(dev->mt76.dev, "codebook75_mu = %d\n", sta_info->codebook75_mu); -+ dev_info(dev->mt76.dev, "he_ltf = %d\n", sta_info->he_ltf); -+ dev_info(dev->mt76.dev, "=============================================================\n"); -+} -+ -+static void mt7915_txbf_dump_cal_phase(struct mt7915_dev *dev, -+ struct mt7915_txbf_phase *phase, int group) -+{ -+ dev_info(dev->mt76.dev, "Group %d and Group M\n", group); -+ dev_info(dev->mt76.dev, "m_t0_h = %d\n", phase->phase.m_t0_h); -+ dev_info(dev->mt76.dev, "m_t1_h = %d\n", phase->phase.m_t1_h); -+ dev_info(dev->mt76.dev, "m_t2_h = %d\n", phase->phase.m_t2_h); -+ -+ dev_info(dev->mt76.dev, "r0_uh = %d\n", phase->phase.r0_uh); -+ dev_info(dev->mt76.dev, "r0_h = %d\n", phase->phase.r0_h); -+ dev_info(dev->mt76.dev, "r0_m = %d\n", phase->phase.r0_m); -+ dev_info(dev->mt76.dev, "r0_l = %d\n", phase->phase.r0_l); -+ -+ dev_info(dev->mt76.dev, "r1_uh = %d\n", phase->phase.r1_uh); -+ dev_info(dev->mt76.dev, "r1_h = %d\n", phase->phase.r1_h); -+ dev_info(dev->mt76.dev, "r1_m = %d\n", phase->phase.r1_m); -+ dev_info(dev->mt76.dev, "r1_l = %d\n", phase->phase.r1_l); -+ -+ dev_info(dev->mt76.dev, "r2_uh = %d\n", phase->phase.r2_uh); -+ dev_info(dev->mt76.dev, "r2_h = %d\n", phase->phase.r2_h); -+ dev_info(dev->mt76.dev, "r2_m = %d\n", phase->phase.r2_m); -+ dev_info(dev->mt76.dev, "r2_l = %d\n", phase->phase.r2_l); -+ -+ dev_info(dev->mt76.dev, "r3_uh = %d\n", phase->phase.r3_uh); -+ dev_info(dev->mt76.dev, "r3_h = %d\n", phase->phase.r3_h); -+ dev_info(dev->mt76.dev, "r3_m = %d\n", phase->phase.r3_m); -+ dev_info(dev->mt76.dev, "r3_l = %d\n", phase->phase.r3_l); -+ dev_info(dev->mt76.dev, "r3_ul = %d\n", phase->phase.r3_ul); -+} -+ -+int mt7915_mcu_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb) -+{ -+#define BF_PFMU_TAG 16 -+#define BF_STA_REC 20 -+#define BF_CAL_PHASE 21 -+#define GROUP_M 1 -+ u8 format_id; -+ -+ skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); -+ format_id = *(u8 *)skb->data; -+ -+ if (format_id == BF_PFMU_TAG) { -+ struct mt7915_pfmu_tag *pfmu_tag; -+ -+ skb_pull(skb, 8); -+ pfmu_tag = (struct mt7915_pfmu_tag *)skb->data; -+ mt7915_txbf_dump_pfmu_tag(dev, pfmu_tag); -+ if (dev->test.txbf_pfmu_tag) -+ memcpy(dev->test.txbf_pfmu_tag, pfmu_tag, sizeof(struct mt7915_pfmu_tag)); -+ } else if (format_id == BF_STA_REC) { -+ struct sta_rec_bf *sta_rec; -+ -+ skb_pull(skb, sizeof(struct mt7915_bf_status_hdr)); -+ /* padding 4 byte since bf_status->buf does not contain tag & len */ -+ skb_push(skb, 4); -+ sta_rec = (struct sta_rec_bf *)skb->data; -+ -+ mt7915_txbf_dump_sta_rec(dev, sta_rec); -+ } else if (format_id == BF_CAL_PHASE) { -+ u8 phase_out_len = sizeof(struct mt7915_txbf_phase_out); -+ struct mt7915_ibf_cal_info *cal; -+ struct mt7915_txbf_phase_out phase_out; -+ struct mt7915_txbf_phase *phase = -+ (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal; -+ -+ cal = (struct mt7915_ibf_cal_info *)skb->data; -+ memcpy(&phase_out, cal->buf, phase_out_len); -+ switch (cal->cal_type) { -+ case IBF_PHASE_CAL_NORMAL: -+ case IBF_PHASE_CAL_NORMAL_INSTRUMENT: -+ /* Only calibrate group M */ -+ if (cal->group_l_m_n != GROUP_M) -+ break; -+ phase = &phase[cal->group]; -+ memcpy(&phase->phase, cal->buf + phase_out_len, sizeof(phase->phase)); -+ phase->status = cal->status; -+ -+ dev_info(dev->mt76.dev, "Calibrated result = %d\n", phase->status); -+ mt7915_txbf_dump_cal_phase(dev, phase, cal->group); -+ break; -+ case IBF_PHASE_CAL_VERIFY: -+ case IBF_PHASE_CAL_VERIFY_INSTRUMENT: -+ dev_info(dev->mt76.dev, "Verification result = %d\n", cal->status); -+ break; -+ default: -+ break; -+ } -+ -+ dev_info(dev->mt76.dev, "c0_h = %d, c1_h = %d, c2_h = %d\n", -+ phase_out.c0_h, phase_out.c1_h, phase_out.c2_h); -+ dev_info(dev->mt76.dev, "c0_m = %d, c1_m = %d, c2_m = %d\n", -+ phase_out.c0_m, phase_out.c1_m, phase_out.c2_m); -+ dev_info(dev->mt76.dev, "c0_l = %d, c1_l = %d, c2_l = %d\n", -+ phase_out.c0_l, phase_out.c1_l, phase_out.c2_l); -+ dev_info(dev->mt76.dev, "c3_m = %d, c3_h = %d\n", phase_out.c3_m, phase_out.c3_h); -+ } -+ -+ wake_up(&dev->mt76.tx_wait); -+ -+ return 0; -+} -+ -+int mt7915_mcu_txbf_profile_tag_read(struct mt7915_phy *phy, u8 pfmu_idx, bool bfer) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 format_id; -+ u8 pfmu_idx; -+ bool bfer; -+ u8 dbdc_idx; -+ } __packed req = { -+ .format_id = MT_BF_PFMU_TAG_READ, -+ .pfmu_idx = pfmu_idx, -+ .bfer = bfer, -+ .dbdc_idx = phy->mt76->band_idx, -+ }; -+ struct mt7915_pfmu_tag *tag = dev->test.txbf_pfmu_tag; -+ -+ /* Reset to 0 for mt7915_tm_txbf_profile_tag_write wait_event */ -+ if (tag) -+ tag->t1.pfmu_idx = 0; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), true); -+} -+ -+int mt7915_mcu_txbf_sta_rec_read(struct mt7915_dev *dev, u16 wlan_idx) -+{ -+ struct { -+ u8 action; -+ u8 wlan_idx_lo; -+ u8 wlan_idx_hi; -+ u8 rsv[5]; -+ } __packed req = { -+ .action = MT_BF_STA_REC_READ, -+ .wlan_idx_lo = to_wcid_lo(wlan_idx), -+ .wlan_idx_hi = to_wcid_hi(wlan_idx), -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -+ sizeof(req), true); -+} -+#endif -diff --git a/mt7915/regs.h b/mt7915/regs.h -index 7e9b76b..4d05e39 100644 ---- a/mt7915/regs.h -+++ b/mt7915/regs.h -@@ -61,6 +61,7 @@ enum offs_rev { - MDP_BNRCFR1, - ARB_DRNGR0, - ARB_SCR, -+ ARB_TQSAXM0, - RMAC_MIB_AIRTIME14, - AGG_AALCR0, - AGG_AWSCR0, -@@ -534,6 +535,9 @@ enum offs_rev { - #define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, (__OFFS(ARB_DRNGR0) + \ - (_n) * 4)) - -+#define MT_ARB_TQSAXM0(_band) MT_WF_ARB(_band, __OFFS(ARB_TQSAXM0)) -+#define MT_ARB_TQSAXM_ALTX_START_MASK GENMASK(12, 8) -+ - /* RMAC: band 0(0x820e5000), band 1(0x820f5000) */ - #define MT_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820e5000) - #define MT_WF_RMAC(_band, ofs) (MT_WF_RMAC_BASE(_band) + (ofs)) -diff --git a/mt7915/testmode.c b/mt7915/testmode.c -index caa3590..faf6014 100644 ---- a/mt7915/testmode.c -+++ b/mt7915/testmode.c -@@ -55,6 +55,8 @@ struct reg_band { - static struct reg_band reg_backup_list[TM_REG_MAX_ID]; - - static void mt7915_tm_update_entry(struct mt7915_phy *phy); -+static int mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode, bool bf_sounding); -+static int mt7915_tm_txbf_set_rate(struct mt7915_phy *phy, struct mt76_wcid *wcid); - - static u8 mt7915_tm_chan_bw(enum nl80211_chan_width width) - { -@@ -94,6 +96,25 @@ mt7915_tm_check_antenna(struct mt7915_phy *phy) - return 0; - } - -+static u8 mt7915_tm_rate_to_phy(u8 tx_rate_mode) -+{ -+ static const u8 rate_to_phy[] = { -+ [MT76_TM_TX_MODE_CCK] = MT_PHY_TYPE_CCK, -+ [MT76_TM_TX_MODE_OFDM] = MT_PHY_TYPE_OFDM, -+ [MT76_TM_TX_MODE_HT] = MT_PHY_TYPE_HT, -+ [MT76_TM_TX_MODE_VHT] = MT_PHY_TYPE_VHT, -+ [MT76_TM_TX_MODE_HE_SU] = MT_PHY_TYPE_HE_SU, -+ [MT76_TM_TX_MODE_HE_EXT_SU] = MT_PHY_TYPE_HE_EXT_SU, -+ [MT76_TM_TX_MODE_HE_TB] = MT_PHY_TYPE_HE_TB, -+ [MT76_TM_TX_MODE_HE_MU] = MT_PHY_TYPE_HE_MU, -+ }; -+ -+ if (tx_rate_mode > MT76_TM_TX_MODE_MAX) -+ return -EINVAL; -+ -+ return rate_to_phy[tx_rate_mode]; -+} -+ - static void - mt7915_tm_update_channel(struct mt7915_phy *phy) - { -@@ -294,17 +315,33 @@ mt7915_tm_add_txbf(struct mt7915_phy *phy, struct ieee80211_vif *vif, - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; - struct mt7915_dev *dev = phy->dev; -+ struct mt76_testmode_data *td = &phy->mt76->test; - struct sk_buff *skb; - struct sta_rec_bf *bf; - struct tlv *tlv; -- u8 ndp_rate; -+ u8 ndp_rate, ndpa_rate, rept_poll_rate, bf_bw; -+ -+ if (td->tx_rate_mode == MT76_TM_TX_MODE_HE_SU) { -+ rept_poll_rate = 0x49; -+ ndpa_rate = 0x49; -+ ndp_rate = 0; -+ } else if (td->tx_rate_mode == MT76_TM_TX_MODE_VHT) { -+ rept_poll_rate = 0x9; -+ ndpa_rate = 0x9; -+ ndp_rate = 0; -+ } else { -+ rept_poll_rate = 0; -+ ndpa_rate = 0; -+ if (nr == 1) -+ ndp_rate = 8; -+ else if (nr == 2) -+ ndp_rate = 16; -+ else -+ ndp_rate = 24; -+ } - -- if (nr == 1) -- ndp_rate = 8; -- else if (nr == 2) -- ndp_rate = 16; -- else -- ndp_rate = 24; -+ /* BF use CMD_CBW instead of TM_CBW */ -+ bf_bw = mt76_connac_chan_bw(&phy->mt76->chandef); - - skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, - &msta->wcid); -@@ -320,8 +357,11 @@ mt7915_tm_add_txbf(struct mt7915_phy *phy, struct ieee80211_vif *vif, - bf->ncol = nc; - bf->nrow = nr; - bf->ndp_rate = ndp_rate; -+ bf->ndpa_rate = ndpa_rate; -+ bf->rept_poll_rate = rept_poll_rate; -+ bf->bw = bf_bw; - bf->ibf_timeout = 0xff; -- bf->tx_mode = MT_PHY_TYPE_HT; -+ bf->tx_mode = mt7915_tm_rate_to_phy(td->tx_rate_mode); - - if (ebf) { - bf->mem[0].row = 0; -@@ -374,11 +414,8 @@ mt7915_tm_entry_add(struct mt7915_phy *phy, u8 aid) - } - - memcpy(sta->addr, ed->addr[0], ETH_ALEN); -- if (phy->test.bf_en) { -- u8 addr[ETH_ALEN] = {0x00, 0x11, 0x11, 0x11, 0x11, 0x11}; -- -- memcpy(sta->addr, addr, ETH_ALEN); -- } -+ if (td->bf_en) -+ memcpy(sta->addr, td->addr[0], ETH_ALEN); - - if (td->tx_rate_mode >= MT76_TM_TX_MODE_HT) - memcpy(&sta->deflink.ht_cap, &sband->ht_cap, sizeof(sta->deflink.ht_cap)); -@@ -403,6 +440,14 @@ mt7915_tm_entry_add(struct mt7915_phy *phy, u8 aid) - list_add_tail(&msta->wcid.list, &td->tm_entry_list); - td->entry_num++; - -+ mt7915_mcu_add_bss_info(phy, phy->monitor_vif, true); -+ -+ if (td->bf_en) { -+ mt7915_tm_set_ipg_params(phy, td->tx_ipg, td->tx_rate_mode, true); -+ mt7915_tm_set_tam_arb(phy, td->bf_en, 0); -+ mt7915_tm_txbf_set_rate(phy, &msta->wcid); -+ } -+ - return 0; - } - -@@ -472,7 +517,7 @@ mt7915_tm_update_entry(struct mt7915_phy *phy) - struct mt76_testmode_entry_data *ed, tmp; - struct mt76_wcid *wcid, *last; - -- if (!td->aid || phy->test.bf_en) -+ if (!td->aid || td->bf_en) - return; - - memcpy(&tmp, &td->ed, sizeof(tmp)); -@@ -493,20 +538,30 @@ mt7915_tm_update_entry(struct mt7915_phy *phy) - static int - mt7915_tm_txbf_init(struct mt7915_phy *phy, u16 *val) - { -+#define EBF_BBP_RX_OFFSET 0x10280 -+#define EBF_BBP_RX_ENABLE (BIT(0) | BIT(15)) -+#define WF1 1 -+#define WF2 2 - struct mt76_testmode_data *td = &phy->mt76->test; - struct mt7915_dev *dev = phy->dev; -+ struct mt76_phy *mphy = phy->mt76; - bool enable = val[0]; - void *phase_cal, *pfmu_data, *pfmu_tag; -- u8 addr[ETH_ALEN] = {0x00, 0x22, 0x22, 0x22, 0x22, 0x22}; -+ u8 sub_addr = td->is_txbf_dut ? TXBF_DUT_MAC_SUBADDR : TXBF_GOLDEN_MAC_SUBADDR; -+ u8 peer_addr = td->is_txbf_dut ? TXBF_GOLDEN_MAC_SUBADDR : TXBF_DUT_MAC_SUBADDR; -+ u8 bss_addr = TXBF_DUT_MAC_SUBADDR; -+ u8 addr[ETH_ALEN] = {0x00, sub_addr, sub_addr, sub_addr, sub_addr, sub_addr}; -+ u8 bssid[ETH_ALEN] = {0x00, bss_addr, bss_addr, bss_addr, bss_addr, bss_addr}; -+ u8 peer_addrs[ETH_ALEN] = {0x00, peer_addr, peer_addr, peer_addr, peer_addr, peer_addr}; - - if (!enable) { -- phy->test.bf_en = 0; -+ td->bf_en = 0; - return 0; - } - - if (!dev->test.txbf_phase_cal) { - phase_cal = devm_kzalloc(dev->mt76.dev, -- sizeof(struct mt7915_tm_txbf_phase) * -+ sizeof(struct mt7915_txbf_phase) * - MAX_PHASE_GROUP_NUM, - GFP_KERNEL); - if (!phase_cal) -@@ -516,7 +571,10 @@ mt7915_tm_txbf_init(struct mt7915_phy *phy, u16 *val) - } - - if (!dev->test.txbf_pfmu_data) { -- pfmu_data = devm_kzalloc(dev->mt76.dev, 512, GFP_KERNEL); -+ pfmu_data = devm_kzalloc(dev->mt76.dev, -+ sizeof(struct mt7915_pfmu_data) * -+ MT7915_TXBF_SUBCAR_NUM, -+ GFP_KERNEL); - if (!pfmu_data) - return -ENOMEM; - -@@ -525,21 +583,77 @@ mt7915_tm_txbf_init(struct mt7915_phy *phy, u16 *val) - - if (!dev->test.txbf_pfmu_tag) { - pfmu_tag = devm_kzalloc(dev->mt76.dev, -- sizeof(struct mt7915_tm_pfmu_tag), GFP_KERNEL); -+ sizeof(struct mt7915_pfmu_tag), GFP_KERNEL); - if (!pfmu_tag) - return -ENOMEM; - - dev->test.txbf_pfmu_tag = pfmu_tag; - } - -+ td->bf_en = 1; -+ memcpy(td->addr[0], peer_addrs, ETH_ALEN); -+ memcpy(td->addr[1], addr, ETH_ALEN); -+ memcpy(td->addr[2], bssid, ETH_ALEN); - memcpy(phy->monitor_vif->addr, addr, ETH_ALEN); - mt7915_mcu_add_dev_info(phy, phy->monitor_vif, true); - -- td->tx_rate_mode = MT76_TM_TX_MODE_HT; -- td->tx_mpdu_len = 1024; -- td->tx_rate_sgi = 0; -- td->tx_ipg = 100; -- phy->test.bf_en = 1; -+ /* Add second interface in wtbl for using TXCMD to transmit sounding */ -+ td->second_vif = kzalloc(sizeof(*td->second_vif) + sizeof(struct mt7915_vif), GFP_KERNEL); -+ memcpy(td->second_vif, phy->monitor_vif, sizeof(*td->second_vif)); -+ mt7915_init_vif(phy, td->second_vif, td->bf_en); -+ -+ if (td->ebf && !td->is_txbf_dut) { -+ u8 is_160hz = val[1]; -+ -+ /* Turn On BBP CR for RX */ -+ mt76_set(dev, EBF_BBP_RX_OFFSET, EBF_BBP_RX_ENABLE); -+ dev_info(dev->mt76.dev, "Set BBP RX CR = %x\n", mt76_rr(dev, EBF_BBP_RX_OFFSET)); -+ -+ /* Set TX antenna mask of golden: default use WF0 only */ -+ td->tx_antenna_mask = 1; -+ if (is_mt7915(&dev->mt76)) { -+ /* Add WF1/WF2 for dbdc/single band in BW 160 */ -+ td->tx_antenna_mask |= is_160hz << (dev->dbdc_support ? WF1 : WF2); -+ /* Shift to WF2/WF3 for dbdc band 1 */ -+ td->tx_antenna_mask <<= 2 * phy->mt76->band_idx; -+ } -+ } else if (td->ebf && td->is_txbf_dut) { -+ /* Enable ETxBF Capability */ -+ dev->ibf = false; -+ mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE); -+ /* Set TX antenna mask of DUT */ -+ td->tx_antenna_mask = mphy->chainmask >> (dev->chainshift * phy->mt76->band_idx); -+ td->tx_spe_idx = phy->mt76->band_idx ? 25 : 24; -+ /* Shift to WF2/WF3 for dbdc band 1, Nss = 2 */ -+ if ((hweight8(td->tx_antenna_mask) == 2) && phy->mt76->band_idx) -+ td->tx_antenna_mask <<= 2; -+ } else { -+ if (td->is_txbf_dut) { -+ int nss; -+ -+ /* Enable ITxBF Capability */ -+ dev->ibf = true; -+ mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE); -+ td->tx_antenna_mask = mphy->chainmask >> (dev->chainshift * -+ phy->mt76->band_idx); -+ nss = hweight8(td->tx_antenna_mask); -+ if (nss > 1 && nss <= 4) -+ td->tx_rate_idx = 15 + 8 * (nss - 2); -+ else -+ td->tx_rate_idx = 31; -+ } else { -+ td->tx_antenna_mask = 1; -+ mt76_set(dev, EBF_BBP_RX_OFFSET, EBF_BBP_RX_ENABLE); -+ dev_info(dev->mt76.dev, "Set BBP RX CR = %x\n", -+ mt76_rr(dev, EBF_BBP_RX_OFFSET)); -+ } -+ td->tx_rate_mode = MT76_TM_TX_MODE_HT; -+ td->tx_mpdu_len = 1024; -+ td->tx_rate_sgi = 0; -+ td->tx_ipg = 100; -+ } -+ -+ mt7915_mcu_add_bss_info(phy, phy->monitor_vif, true); - - return mt7915_tm_set_trx(phy, TM_MAC_TX, true); - } -@@ -566,8 +680,7 @@ mt7915_tm_txbf_phase_comp(struct mt7915_phy *phy, u16 *val) - .read_from_e2p = val[3], - .disable = val[4], - }; -- struct mt7915_tm_txbf_phase *phase = -- (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -+ struct mt7915_txbf_phase *phase = (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal; - - wait_event_timeout(dev->mt76.tx_wait, phase[val[2]].status != 0, HZ); - memcpy(req.buf, &phase[val[2]].phase, sizeof(req.buf)); -@@ -580,32 +693,9 @@ mt7915_tm_txbf_phase_comp(struct mt7915_phy *phy, u16 *val) - sizeof(req), true); - } - --static int --mt7915_tm_txbf_profile_tag_read(struct mt7915_phy *phy, u8 pfmu_idx) --{ -- struct mt7915_dev *dev = phy->dev; -- struct { -- u8 format_id; -- u8 pfmu_idx; -- bool bfer; -- u8 dbdc_idx; -- } __packed req = { -- .format_id = MT_BF_PFMU_TAG_READ, -- .pfmu_idx = pfmu_idx, -- .bfer = 1, -- .dbdc_idx = phy != &dev->phy, -- }; -- struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag; -- -- tag->t1.pfmu_idx = 0; -- -- return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req, -- sizeof(req), true); --} -- - static int - mt7915_tm_txbf_profile_tag_write(struct mt7915_phy *phy, u8 pfmu_idx, -- struct mt7915_tm_pfmu_tag *tag) -+ struct mt7915_pfmu_tag *tag) - { - struct mt7915_dev *dev = phy->dev; - struct { -@@ -632,8 +722,6 @@ static int - mt7915_tm_txbf_apply_tx(struct mt7915_phy *phy, u16 wlan_idx, bool ebf, - bool ibf, bool phase_cal) - { --#define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) --#define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) - struct mt7915_dev *dev = phy->dev; - struct { - u8 category; -@@ -662,14 +750,15 @@ static int mt7915_tm_txbf_set_rate(struct mt7915_phy *phy, - { - struct mt7915_dev *dev = phy->dev; - struct mt76_testmode_entry_data *ed = mt76_testmode_entry_data(phy->mt76, wcid); -+ struct mt76_testmode_data *td = &phy->mt76->test; - struct ieee80211_sta *sta = wcid_to_sta(wcid); - struct sta_phy rate = {}; - - if (!sta) - return 0; - -- rate.type = MT_PHY_TYPE_HT; -- rate.bw = mt7915_tm_chan_bw(phy->mt76->chandef.width); -+ rate.type = mt7915_tm_rate_to_phy(td->tx_rate_mode); -+ rate.bw = mt76_connac_chan_bw(&phy->mt76->chandef); - rate.nss = ed->tx_rate_nss; - rate.mcs = ed->tx_rate_idx; - rate.ldpc = (rate.bw || ed->tx_rate_ldpc) * GENMASK(2, 0); -@@ -683,13 +772,14 @@ mt7915_tm_txbf_set_tx(struct mt7915_phy *phy, u16 *val) - { - bool bf_on = val[0], update = val[3]; - /* u16 wlan_idx = val[2]; */ -- struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_pfmu_tag *tag = dev->test.txbf_pfmu_tag; - struct mt76_testmode_data *td = &phy->mt76->test; - struct mt76_wcid *wcid; - - if (bf_on) { - mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false); -- mt7915_tm_txbf_profile_tag_read(phy, 2); -+ mt7915_mcu_txbf_profile_tag_read(phy, 2, true); - tag->t1.invalid_prof = false; - mt7915_tm_txbf_profile_tag_write(phy, 2, tag); - -@@ -704,7 +794,7 @@ mt7915_tm_txbf_set_tx(struct mt7915_phy *phy, u16 *val) - } else { - phy->test.bf_ever_en = false; - -- mt7915_tm_txbf_profile_tag_read(phy, 2); -+ mt7915_mcu_txbf_profile_tag_read(phy, 2, true); - tag->t1.invalid_prof = true; - mt7915_tm_txbf_profile_tag_write(phy, 2, tag); - } -@@ -719,6 +809,7 @@ mt7915_tm_txbf_set_tx(struct mt7915_phy *phy, u16 *val) - static int - mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf) - { -+#define MT_ARB_IBF_ENABLE (BIT(0) | GENMASK(9, 8)) - static const u8 mode_to_lm[] = { - [MT76_TM_TX_MODE_CCK] = 0, - [MT76_TM_TX_MODE_OFDM] = 0, -@@ -732,7 +823,8 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf) - struct mt76_testmode_data *td = &phy->mt76->test; - struct mt76_wcid *wcid; - struct ieee80211_vif *vif = phy->monitor_vif; -- struct mt7915_tm_pfmu_tag *tag = phy->dev->test.txbf_pfmu_tag; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_pfmu_tag *tag = dev->test.txbf_pfmu_tag; - u8 pfmu_idx = val[0], nc = val[2], nr; - bool is_atenl = val[6]; - int ret; -@@ -750,18 +842,22 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf) - tag->t1.nr = nr; - tag->t1.nc = nc; - tag->t1.invalid_prof = true; -- -- tag->t1.snr_sts4 = 0xc0; -- tag->t1.snr_sts5 = 0xff; -- tag->t1.snr_sts6 = 0xff; -- tag->t1.snr_sts7 = 0xff; -+ tag->t1.data_bw = mt76_connac_chan_bw(&phy->mt76->chandef); -+ tag->t2.se_idx = td->tx_spe_idx; -+ -+ if (is_atenl) { -+ tag->t1.snr_sts4 = 0xc0; -+ tag->t1.snr_sts5 = 0xff; -+ tag->t1.snr_sts6 = 0xff; -+ tag->t1.snr_sts7 = 0xff; -+ } - - if (ebf) { - tag->t1.row_id1 = 0; - tag->t1.row_id2 = 1; - tag->t1.row_id3 = 2; - tag->t1.row_id4 = 3; -- tag->t1.lm = mode_to_lm[MT76_TM_TX_MODE_HT]; -+ tag->t1.lm = mode_to_lm[td->tx_rate_mode]; - } else { - tag->t1.row_id1 = 4; - tag->t1.row_id2 = 5; -@@ -782,6 +878,20 @@ mt7915_tm_txbf_profile_update(struct mt7915_phy *phy, u16 *val, bool ebf) - if (ret) - return ret; - -+ if (td->ebf) { -+ mt76_set(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx), MT_ARB_TQSAXM_ALTX_START_MASK); -+ dev_info(dev->mt76.dev, "Set TX queue start CR for AX management (0x%x) = 0x%x\n", -+ MT_ARB_TQSAXM0(phy->mt76->band_idx), -+ mt76_rr(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx))); -+ } else if (!td->ebf && ebf) { -+ /* iBF's ebf profile update */ -+ if (!is_mt7915(&dev->mt76) || !dev->dbdc_support) -+ mt76_set(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx), MT_ARB_IBF_ENABLE); -+ dev_info(dev->mt76.dev, "Set TX queue start CR for AX management (0x%x) = 0x%x\n", -+ MT_ARB_TQSAXM0(phy->mt76->band_idx), -+ mt76_rr(dev, MT_ARB_TQSAXM0(phy->mt76->band_idx))); -+ } -+ - if (!ebf && is_atenl) - return mt7915_tm_txbf_apply_tx(phy, 1, false, true, true); - -@@ -799,7 +909,7 @@ mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val) - u8 category; - u8 group_l_m_n; - u8 group; -- bool sx2; -+ bool dbdc_idx; - u8 cal_type; - u8 lna_gain_level; - u8 _rsv[2]; -@@ -807,12 +917,12 @@ mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val) - .category = MT_BF_PHASE_CAL, - .group = val[0], - .group_l_m_n = val[1], -- .sx2 = val[2], -+ .dbdc_idx = phy->mt76->band_idx, - .cal_type = val[3], - .lna_gain_level = val[4], - }; -- struct mt7915_tm_txbf_phase *phase = -- (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -+ struct mt7915_txbf_phase *phase = -+ (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal; - - phase[req.group].status = 0; - -@@ -820,53 +930,10 @@ mt7915_tm_txbf_phase_cal(struct mt7915_phy *phy, u16 *val) - sizeof(req), true); - } - --int mt7915_tm_txbf_status_read(struct mt7915_dev *dev, struct sk_buff *skb) --{ --#define BF_PFMU_TAG 16 --#define BF_CAL_PHASE 21 -- u8 format_id; -- -- skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); -- format_id = *(u8 *)skb->data; -- -- if (format_id == BF_PFMU_TAG) { -- struct mt7915_tm_pfmu_tag *tag = dev->test.txbf_pfmu_tag; -- -- skb_pull(skb, 8); -- memcpy(tag, skb->data, sizeof(struct mt7915_tm_pfmu_tag)); -- } else if (format_id == BF_CAL_PHASE) { -- struct mt7915_tm_ibf_cal_info *cal; -- struct mt7915_tm_txbf_phase *phase = -- (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -- -- cal = (struct mt7915_tm_ibf_cal_info *)skb->data; -- switch (cal->cal_type) { -- case IBF_PHASE_CAL_NORMAL: -- case IBF_PHASE_CAL_NORMAL_INSTRUMENT: -- if (cal->group_l_m_n != GROUP_M) -- break; -- phase = &phase[cal->group]; -- memcpy(&phase->phase, cal->buf + 16, sizeof(phase->phase)); -- phase->status = cal->status; -- /* for passing iTest script */ -- dev_info(dev->mt76.dev, "Calibrated result = %d\n", phase->status); -- break; -- case IBF_PHASE_CAL_VERIFY: -- case IBF_PHASE_CAL_VERIFY_INSTRUMENT: -- break; -- default: -- break; -- } -- } -- -- wake_up(&dev->mt76.tx_wait); -- -- return 0; --} -- - static int - mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val) - { -+#define MT7915_TXBF_PFMU_DATA_LEN (MT7915_TXBF_SUBCAR_NUM * sizeof(struct mt7915_pfmu_data)) - struct mt76_testmode_data *td = &phy->mt76->test; - u8 nss = hweight8(td->tx_antenna_mask); - u16 pfmu_idx = val[0]; -@@ -876,9 +943,9 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val) - u16 angle31 = val[4]; - u16 angle41 = val[5]; - s16 phi11 = 0, phi21 = 0, phi31 = 0; -- struct mt7915_tm_pfmu_data *pfmu_data; -+ struct mt7915_pfmu_data *pfmu_data; - -- if (subc_id > 63) -+ if (subc_id > MT7915_TXBF_SUBCAR_NUM - 1) - return -EINVAL; - - if (nss == 2) { -@@ -892,7 +959,7 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val) - phi31 = (s16)(angle41 - angle31); - } - -- pfmu_data = (struct mt7915_tm_pfmu_data *)phy->dev->test.txbf_pfmu_data; -+ pfmu_data = (struct mt7915_pfmu_data *)phy->dev->test.txbf_pfmu_data; - pfmu_data = &pfmu_data[subc_id]; - - if (subc_id < 32) -@@ -902,21 +969,21 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val) - pfmu_data->phi11 = cpu_to_le16(phi11); - pfmu_data->phi21 = cpu_to_le16(phi21); - pfmu_data->phi31 = cpu_to_le16(phi31); -- if (subc_id == 63) { -+ if (subc_id == MT7915_TXBF_SUBCAR_NUM - 1) { - struct mt7915_dev *dev = phy->dev; - struct { - u8 format_id; - u8 pfmu_idx; - u8 dbdc_idx; - u8 _rsv; -- u8 buf[512]; -+ u8 buf[MT7915_TXBF_PFMU_DATA_LEN]; - } __packed req = { - .format_id = MT_BF_PROFILE_WRITE_ALL, - .pfmu_idx = pfmu_idx, - .dbdc_idx = phy != &dev->phy, - }; - -- memcpy(req.buf, dev->test.txbf_pfmu_data, 512); -+ memcpy(req.buf, dev->test.txbf_pfmu_data, MT7915_TXBF_PFMU_DATA_LEN); - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), - &req, sizeof(req), true); -@@ -928,7 +995,7 @@ mt7915_tm_txbf_profile_update_all(struct mt7915_phy *phy, u16 *val) - static int - mt7915_tm_txbf_e2p_update(struct mt7915_phy *phy) - { -- struct mt7915_tm_txbf_phase *phase, *p; -+ struct mt7915_txbf_phase *phase, *p; - struct mt7915_dev *dev = phy->dev; - u8 *eeprom = dev->mt76.eeprom.data; - u16 offset; -@@ -938,7 +1005,7 @@ mt7915_tm_txbf_e2p_update(struct mt7915_phy *phy) - is_7976 = mt7915_check_adie(dev, false) || is_mt7916(&dev->mt76); - offset = is_7976 ? 0x60a : 0x651; - -- phase = (struct mt7915_tm_txbf_phase *)dev->test.txbf_phase_cal; -+ phase = (struct mt7915_txbf_phase *)dev->test.txbf_phase_cal; - for (i = 0; i < MAX_PHASE_GROUP_NUM; i++) { - p = &phase[i]; - -@@ -953,17 +1020,75 @@ mt7915_tm_txbf_e2p_update(struct mt7915_phy *phy) - return 0; - } - -+static int -+mt7915_tm_trigger_sounding(struct mt7915_phy *phy, u16 *val, bool en) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ u8 sounding_mode = val[0]; -+ u8 MU_num = val[1]; -+ u32 sounding_interval = (u32)val[2] << 2; /* input unit: 4ms */ -+ enum sounding_mode { -+ SU_SOUNDING, -+ MU_SOUNDING, -+ SU_PERIODIC_SOUNDING, -+ MU_PERIODIC_SOUNDING, -+ BF_PROCESSING, -+ TXCMD_NONTB_SU_SOUNDING, -+ TXCMD_VHT_MU_SOUNDING, -+ TXCMD_TB_PER_BRP_SOUNDING, -+ TXCMD_TB_SOUNDING, -+ -+ /* keep last */ -+ NUM_SOUNDING_MODE, -+ SOUNDING_MODE_MAX = NUM_SOUNDING_MODE - 1, -+ }; -+ struct { -+ u8 cmd_category_id; -+ u8 sounding_mode; -+ u8 MU_num; -+ u8 rsv; -+ u8 wlan_idx[4]; -+ u32 sounding_interval; /* unit: ms */ -+ } __packed req = { -+ .cmd_category_id = en ? MT_BF_SOUNDING_ON : MT_BF_SOUNDING_OFF, -+ .sounding_mode = sounding_mode, -+ .MU_num = MU_num, -+ .sounding_interval = cpu_to_le32(sounding_interval), -+ .wlan_idx[0] = val[3], -+ .wlan_idx[1] = val[4], -+ .wlan_idx[2] = val[5], -+ .wlan_idx[3] = val[6], -+ }; -+ -+ if (sounding_mode > SOUNDING_MODE_MAX) -+ return -EINVAL; -+ -+ /* Enable Tx MAC HW before trigger sounding */ -+ if (en) -+ mt7915_tm_set_trx(phy, TM_MAC_TX, true); -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), -+ &req, sizeof(req), true); -+} -+ - static int - mt7915_tm_set_txbf(struct mt7915_phy *phy) - { -+#define TXBF_IS_DUT_MASK BIT(0) -+#define TXBF_EBF_MASK BIT(1) - struct mt76_testmode_data *td = &phy->mt76->test; - u16 *val = td->txbf_param; - -- pr_info("ibf cal process: act = %u, val = %u, %u, %u, %u, %u, %u\n", -- td->txbf_act, val[0], val[1], val[2], val[3], val[4], val[5]); -+ dev_info(phy->dev->mt76.dev, "ibf cal process: act = %u, val = %u, %u, %u, %u, %u, %u, %u\n", -+ td->txbf_act, val[0], val[1], val[2], val[3], val[4], val[5], val[6]); - - switch (td->txbf_act) { -+ case MT76_TM_TXBF_ACT_GOLDEN_INIT: - case MT76_TM_TXBF_ACT_INIT: -+ case MT76_TM_TX_EBF_ACT_GOLDEN_INIT: -+ case MT76_TM_TX_EBF_ACT_INIT: -+ td->ebf = !!u32_get_bits(td->txbf_act, TXBF_EBF_MASK); -+ td->is_txbf_dut = !!u32_get_bits(td->txbf_act, TXBF_IS_DUT_MASK); - return mt7915_tm_txbf_init(phy, val); - case MT76_TM_TXBF_ACT_UPDATE_CH: - mt7915_tm_update_channel(phy); -@@ -989,6 +1114,36 @@ mt7915_tm_set_txbf(struct mt7915_phy *phy) - - return mt7915_tm_txbf_apply_tx(phy, wlan_idx, ebf, ibf, phase_cal); - } -+ case MT76_TM_TXBF_ACT_TRIGGER_SOUNDING: -+ return mt7915_tm_trigger_sounding(phy, val, true); -+ case MT76_TM_TXBF_ACT_STOP_SOUNDING: -+ memset(val, 0, sizeof(td->txbf_param)); -+ return mt7915_tm_trigger_sounding(phy, val, false); -+ case MT76_TM_TXBF_ACT_PROFILE_TAG_READ: -+ case MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE: -+ case MT76_TM_TXBF_ACT_PROFILE_TAG_INVALID: { -+ u8 pfmu_idx = val[0]; -+ bool bfer = !!val[1]; -+ struct mt7915_dev *dev = phy->dev; -+ struct mt7915_pfmu_tag *tag = dev->test.txbf_pfmu_tag; -+ -+ if (!tag) { -+ dev_err(dev->mt76.dev, -+ "pfmu tag is not initialized!\n"); -+ return 0; -+ } -+ -+ if (td->txbf_act == MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE) -+ return mt7915_tm_txbf_profile_tag_write(phy, pfmu_idx, tag); -+ else if (td->txbf_act == MT76_TM_TXBF_ACT_PROFILE_TAG_READ) -+ return mt7915_mcu_txbf_profile_tag_read(phy, pfmu_idx, bfer); -+ -+ tag->t1.invalid_prof = !!val[0]; -+ -+ return 0; -+ } -+ case MT76_TM_TXBF_ACT_STA_REC_READ: -+ return mt7915_mcu_txbf_sta_rec_read(phy->dev, val[0]); - default: - break; - }; -@@ -1264,9 +1419,10 @@ mt7915_tm_set_ipi(struct mt7915_phy *phy) - - static int - mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min, -- u16 cw_max, u16 txop, u8 tx_cmd) -+ u16 cw_max, u16 txop, u8 tx_cmd, bool bf_sounding) - { -- struct mt7915_vif *mvif = (struct mt7915_vif *)phy->monitor_vif->drv_priv; -+ struct mt76_testmode_data *td = &phy->mt76->test; -+ struct mt7915_vif *mvif; - struct mt7915_mcu_tx req = { - .valid = true, - .mode = tx_cmd, -@@ -1274,6 +1430,9 @@ mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min, - }; - struct edca *e = &req.edca[0]; - -+ mvif = bf_sounding ? (struct mt7915_vif *)td->second_vif->drv_priv : -+ (struct mt7915_vif *)phy->monitor_vif->drv_priv; -+ - e->queue = qid + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS; - e->set = WMM_PARAM_SET; - -@@ -1286,17 +1445,19 @@ mt7915_tm_set_wmm_qid(struct mt7915_phy *phy, u8 qid, u8 aifs, u8 cw_min, - } - - static int --mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode) -+mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode, bool bf_sounding) - { - #define TM_DEFAULT_SIFS 10 - #define TM_MAX_SIFS 127 - #define TM_MAX_AIFSN 0xf - #define TM_MIN_AIFSN 0x1 - #define BBP_PROC_TIME 1500 -+#define TM_DEFAULT_CW 1 - struct mt7915_dev *dev = phy->dev; - u8 sig_ext = (mode == MT76_TM_TX_MODE_CCK) ? 0 : 6; - u8 slot_time = 9, sifs = TM_DEFAULT_SIFS; - u8 aifsn = TM_MIN_AIFSN; -+ bool tx_cmd; - u8 band = phy->mt76->band_idx; - u32 i2t_time, tr2t_time, txv_time; - u16 cw = 0; -@@ -1310,6 +1471,7 @@ mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode) - ipg -= sig_ext; - - if (ipg <= (TM_MAX_SIFS + slot_time)) { -+ cw = TM_DEFAULT_CW; - sifs = ipg - slot_time; - } else { - u32 val = (ipg + slot_time) / slot_time; -@@ -1345,10 +1507,12 @@ done: - - mt7915_tm_set_slot_time(phy, slot_time, sifs); - -+ /* HE MU data and iBF/eBF sounding packet use TXCMD */ -+ tx_cmd = (mode == MT76_TM_TX_MODE_HE_MU) || bf_sounding; -+ - return mt7915_tm_set_wmm_qid(phy, - mt76_connac_lmac_mapping(IEEE80211_AC_BE), -- aifsn, cw, cw, 0, -- mode == MT76_TM_TX_MODE_HE_MU); -+ aifsn, cw, cw, 0, tx_cmd, bf_sounding); - } - - static int -@@ -1549,7 +1713,7 @@ mt7915_tm_init(struct mt7915_phy *phy, bool en) - - phy->mt76->test.aid = 0; - phy->mt76->test.tx_mpdu_len = 0; -- phy->test.bf_en = 0; -+ phy->mt76->test.bf_en = 0; - mt7915_tm_set_entry(phy); - } else { - INIT_DELAYED_WORK(&phy->ipi_work, mt7915_tm_ipi_work); -@@ -1734,7 +1898,7 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en) - u32 tx_time = td->tx_time, ipg = td->tx_ipg; - u8 duty_cycle = td->tx_duty_cycle; - -- if (!phy->test.bf_en) -+ if (!td->bf_en) - mt7915_tm_update_channel(phy); - - if (td->tx_spe_idx) -@@ -1749,7 +1913,7 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en) - if (duty_cycle < 100) - tx_time = duty_cycle * ipg / (100 - duty_cycle); - } -- mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode); -+ mt7915_tm_set_ipg_params(phy, ipg, td->tx_rate_mode, false); - mt7915_tm_set_tx_len(phy, tx_time); - - if (ipg) -@@ -1768,6 +1932,9 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en) - mt7915_tm_tx_frames_mu(phy, en); - - mt7915_tm_set_trx(phy, TM_MAC_TX, en); -+ -+ if (td->bf_en) -+ mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en); - } - - static int -@@ -1859,7 +2026,7 @@ mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en) - mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, false); - - if (en) { -- if (!phy->test.bf_en) -+ if (!td->bf_en || !td->is_txbf_dut) - mt7915_tm_update_channel(phy); - if (td->aid) - mt7915_tm_set_rx_user_idx(phy, td->aid); -@@ -1876,6 +2043,9 @@ mt7915_tm_set_rx_frames(struct mt7915_phy *phy, bool en) - mt7915_tm_set_muru_aid(phy, en ? td->aid : 0xf800); - - mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en); -+ -+ if (td->bf_en) -+ mt7915_tm_set_trx(phy, TM_MAC_TX, en); - } - - static int -@@ -1935,34 +2105,7 @@ mt7915_tm_set_tx_cont(struct mt7915_phy *phy, bool en) - rate_idx = sband->bitrates[idx].hw_value & 0xff; - } - -- switch (td->tx_rate_mode) { -- case MT76_TM_TX_MODE_CCK: -- mode = MT_PHY_TYPE_CCK; -- break; -- case MT76_TM_TX_MODE_OFDM: -- mode = MT_PHY_TYPE_OFDM; -- break; -- case MT76_TM_TX_MODE_HT: -- mode = MT_PHY_TYPE_HT; -- break; -- case MT76_TM_TX_MODE_VHT: -- mode = MT_PHY_TYPE_VHT; -- break; -- case MT76_TM_TX_MODE_HE_SU: -- mode = MT_PHY_TYPE_HE_SU; -- break; -- case MT76_TM_TX_MODE_HE_EXT_SU: -- mode = MT_PHY_TYPE_HE_EXT_SU; -- break; -- case MT76_TM_TX_MODE_HE_TB: -- mode = MT_PHY_TYPE_HE_TB; -- break; -- case MT76_TM_TX_MODE_HE_MU: -- mode = MT_PHY_TYPE_HE_MU; -- break; -- default: -- return -EINVAL; -- } -+ mode = mt7915_tm_rate_to_phy(td->tx_rate_mode); - - rateval = mode << 6 | rate_idx; - tx_cont->rateval = cpu_to_le16(rateval); -diff --git a/mt7915/testmode.h b/mt7915/testmode.h -index 7569826..5aba13c 100644 ---- a/mt7915/testmode.h -+++ b/mt7915/testmode.h -@@ -311,137 +311,7 @@ struct mt7915_tm_muru { - - #define MAX_PHASE_GROUP_NUM 9 - --struct mt7915_tm_txbf_phase { -- u8 status; -- struct { -- u8 r0_uh; -- u8 r0_h; -- u8 r0_m; -- u8 r0_l; -- u8 r0_ul; -- u8 r1_uh; -- u8 r1_h; -- u8 r1_m; -- u8 r1_l; -- u8 r1_ul; -- u8 r2_uh; -- u8 r2_h; -- u8 r2_m; -- u8 r2_l; -- u8 r2_ul; -- u8 r3_uh; -- u8 r3_h; -- u8 r3_m; -- u8 r3_l; -- u8 r3_ul; -- u8 r2_uh_sx2; -- u8 r2_h_sx2; -- u8 r2_m_sx2; -- u8 r2_l_sx2; -- u8 r2_ul_sx2; -- u8 r3_uh_sx2; -- u8 r3_h_sx2; -- u8 r3_m_sx2; -- u8 r3_l_sx2; -- u8 r3_ul_sx2; -- u8 m_t0_h; -- u8 m_t1_h; -- u8 m_t2_h; -- u8 m_t2_h_sx2; -- u8 r0_reserved; -- u8 r1_reserved; -- u8 r2_reserved; -- u8 r3_reserved; -- u8 r2_sx2_reserved; -- u8 r3_sx2_reserved; -- } phase; --}; -- --struct mt7915_tm_pfmu_tag1 { -- __le32 pfmu_idx:10; -- __le32 ebf:1; -- __le32 data_bw:2; -- __le32 lm:2; -- __le32 is_mu:1; -- __le32 nr:3, nc:3; -- __le32 codebook:2; -- __le32 ngroup:2; -- __le32 _rsv:2; -- __le32 invalid_prof:1; -- __le32 rmsd:3; -- -- __le32 col_id1:6, row_id1:10; -- __le32 col_id2:6, row_id2:10; -- __le32 col_id3:6, row_id3:10; -- __le32 col_id4:6, row_id4:10; -- -- __le32 ru_start_id:7; -- __le32 _rsv1:1; -- __le32 ru_end_id:7; -- __le32 _rsv2:1; -- __le32 mob_cal_en:1; -- __le32 _rsv3:15; -- -- __le32 snr_sts0:8, snr_sts1:8, snr_sts2:8, snr_sts3:8; -- __le32 snr_sts4:8, snr_sts5:8, snr_sts6:8, snr_sts7:8; -- -- __le32 _rsv4; --} __packed; -- --struct mt7915_tm_pfmu_tag2 { -- __le32 smart_ant:24; -- __le32 se_idx:5; -- __le32 _rsv:3; -- -- __le32 _rsv1:8; -- __le32 rmsd_thres:3; -- __le32 _rsv2:5; -- __le32 ibf_timeout:8; -- __le32 _rsv3:8; -- -- __le32 _rsv4:16; -- __le32 ibf_data_bw:2; -- __le32 ibf_nc:3; -- __le32 ibf_nr:3; -- __le32 ibf_ru:8; -- -- __le32 mob_delta_t:8; -- __le32 mob_lq_result:7; -- __le32 _rsv5:1; -- __le32 _rsv6:16; -- -- __le32 _rsv7; --} __packed; -- --struct mt7915_tm_pfmu_tag { -- struct mt7915_tm_pfmu_tag1 t1; -- struct mt7915_tm_pfmu_tag2 t2; --}; -- --struct mt7915_tm_pfmu_data { -- __le16 subc_idx; -- __le16 phi11; -- __le16 phi21; -- __le16 phi31; --}; -- --struct mt7915_tm_ibf_cal_info { -- u8 format_id; -- u8 group_l_m_n; -- u8 group; -- bool sx2; -- u8 status; -- u8 cal_type; -- u8 _rsv[2]; -- u8 buf[1000]; --} __packed; -- --enum { -- IBF_PHASE_CAL_UNSPEC, -- IBF_PHASE_CAL_NORMAL, -- IBF_PHASE_CAL_VERIFY, -- IBF_PHASE_CAL_NORMAL_INSTRUMENT, -- IBF_PHASE_CAL_VERIFY_INSTRUMENT, --}; -+#define TXBF_DUT_MAC_SUBADDR 0x22 -+#define TXBF_GOLDEN_MAC_SUBADDR 0x11 - - #endif -diff --git a/testmode.c b/testmode.c -index b369826..a3e6d4a 100644 ---- a/testmode.c -+++ b/testmode.c -@@ -196,6 +196,7 @@ mt76_testmode_alloc_skb(struct mt76_phy *phy, u32 len, - - hdr = __skb_put_zero(head, sizeof(*hdr)); - hdr->frame_control = cpu_to_le16(fc); -+ - memcpy(hdr->addr1, addr[0], ETH_ALEN); - memcpy(hdr->addr2, addr[1], ETH_ALEN); - memcpy(hdr->addr3, addr[2], ETH_ALEN); -diff --git a/testmode.h b/testmode.h -index b39cf51..20fab3e 100644 ---- a/testmode.h -+++ b/testmode.h -@@ -303,7 +303,10 @@ enum mt76_testmode_cfg { - }; - - enum mt76_testmode_txbf_act { -+ MT76_TM_TXBF_ACT_GOLDEN_INIT, - MT76_TM_TXBF_ACT_INIT, -+ MT76_TM_TX_EBF_ACT_GOLDEN_INIT, -+ MT76_TM_TX_EBF_ACT_INIT, - MT76_TM_TXBF_ACT_UPDATE_CH, - MT76_TM_TXBF_ACT_PHASE_COMP, - MT76_TM_TXBF_ACT_TX_PREP, -@@ -314,6 +317,12 @@ enum mt76_testmode_txbf_act { - MT76_TM_TXBF_ACT_PROF_UPDATE_ALL, - MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD, - MT76_TM_TXBF_ACT_E2P_UPDATE, -+ MT76_TM_TXBF_ACT_TRIGGER_SOUNDING, -+ MT76_TM_TXBF_ACT_STOP_SOUNDING, -+ MT76_TM_TXBF_ACT_PROFILE_TAG_READ, -+ MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE, -+ MT76_TM_TXBF_ACT_PROFILE_TAG_INVALID, -+ MT76_TM_TXBF_ACT_STA_REC_READ, - - /* keep last */ - NUM_MT76_TM_TXBF_ACT, -diff --git a/tools/fields.c b/tools/fields.c -index e2cf4b9..027b8cd 100644 ---- a/tools/fields.c -+++ b/tools/fields.c -@@ -33,7 +33,10 @@ static const char * const testmode_tx_mode[] = { - }; - - static const char * const testmode_txbf_act[] = { -+ [MT76_TM_TXBF_ACT_GOLDEN_INIT] = "golden_init", - [MT76_TM_TXBF_ACT_INIT] = "init", -+ [MT76_TM_TX_EBF_ACT_GOLDEN_INIT] = "ebf_golden_init", -+ [MT76_TM_TX_EBF_ACT_INIT] = "ebf_init", - [MT76_TM_TXBF_ACT_UPDATE_CH] = "update_ch", - [MT76_TM_TXBF_ACT_PHASE_COMP] = "phase_comp", - [MT76_TM_TXBF_ACT_TX_PREP] = "tx_prep", -@@ -44,6 +47,12 @@ static const char * const testmode_txbf_act[] = { - [MT76_TM_TXBF_ACT_PROF_UPDATE_ALL] = "prof_update", - [MT76_TM_TXBF_ACT_PROF_UPDATE_ALL_CMD] = "prof_update_all", - [MT76_TM_TXBF_ACT_E2P_UPDATE] = "e2p_update", -+ [MT76_TM_TXBF_ACT_TRIGGER_SOUNDING] = "trigger_sounding", -+ [MT76_TM_TXBF_ACT_STOP_SOUNDING] = "stop_sounding", -+ [MT76_TM_TXBF_ACT_PROFILE_TAG_READ] = "pfmu_tag_read", -+ [MT76_TM_TXBF_ACT_PROFILE_TAG_WRITE] = "pfmu_tag_write", -+ [MT76_TM_TXBF_ACT_PROFILE_TAG_INVALID] = "set_invalid_prof", -+ [MT76_TM_TXBF_ACT_STA_REC_READ] = "sta_rec_read", - }; - - static const char * const testmode_offchan_bw[] = { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1013-wifi-mt76-connac-airtime-fairness-feature-off-in-mac.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1013-wifi-mt76-connac-airtime-fairness-feature-off-in-mac.patch deleted file mode 100644 index cea0e5be1..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1013-wifi-mt76-connac-airtime-fairness-feature-off-in-mac.patch +++ /dev/null @@ -1,25 +0,0 @@ -From b19594cf12b01dede83a984ca717e26be37bbfdd Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Fri, 6 May 2022 15:58:42 +0800 -Subject: [PATCH 1013/1053] wifi: mt76: connac: airtime fairness feature off in - mac80211 - ---- - mac80211.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/mac80211.c b/mac80211.c -index 305cae7..f9dfdf8 100644 ---- a/mac80211.c -+++ b/mac80211.c -@@ -451,7 +451,6 @@ mt76_phy_init(struct mt76_phy *phy, struct ieee80211_hw *hw) - WIPHY_FLAG_AP_UAPSD; - - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); -- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_AIRTIME_FAIRNESS); - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_AQL); - - wiphy->available_antennas_tx = phy->antenna_mask; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1014-wifi-mt76-mt7915-add-phy-capability-vendor-command.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1014-wifi-mt76-mt7915-add-phy-capability-vendor-command.patch deleted file mode 100644 index 7f75d0019..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1014-wifi-mt76-mt7915-add-phy-capability-vendor-command.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 34cb90df1cfbbe69bb96a4eabd249e190d821e03 Mon Sep 17 00:00:00 2001 -From: Yi-Chia Hsieh -Date: Tue, 12 Jul 2022 10:04:35 -0700 -Subject: [PATCH 1014/1053] wifi: mt76: mt7915: add phy capability vendor - command - ---- - mt7915/mt7915.h | 1 + - mt7915/vendor.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 25 ++++++++++++++++++++++++ - 3 files changed, 78 insertions(+) - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index b06e5ca..d21b843 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -11,6 +11,7 @@ - - #define MTK_DEBUG 1 - #define MT7915_MAX_INTERFACES 19 -+#define MT7915_MAX_BSS 16 - #define MT7915_WTBL_SIZE 288 - #define MT7916_WTBL_SIZE 544 - #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1) -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index a8b1fa8..757aecb 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -51,6 +51,18 @@ rfeature_ctrl_policy[NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL] = { - [MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TXBF] = { .type = NLA_U8 }, - }; - -+static const struct nla_policy -+phy_capa_ctrl_policy[NUM_MTK_VENDOR_ATTRS_PHY_CAPA_CTRL] = { -+ [MTK_VENDOR_ATTR_PHY_CAPA_CTRL_SET] = { .type = NLA_NESTED }, -+ [MTK_VENDOR_ATTR_PHY_CAPA_CTRL_DUMP] = { .type = NLA_NESTED }, -+}; -+ -+static const struct nla_policy -+phy_capa_dump_policy[NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP] = { -+ [MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_BSS] = { .type = NLA_U16 }, -+ [MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_STA] = { .type = NLA_U16 }, -+}; -+ - struct csi_null_tone { - u8 start; - u8 end; -@@ -995,6 +1007,35 @@ static int mt7915_vendor_mu_ctrl(struct wiphy *wiphy, - return 0; - } - -+static int -+mt7915_vendor_phy_capa_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct mt7915_dev *dev = phy->dev; -+ void *a; -+ int len = 0; -+ -+ if (*storage == 1) -+ return -ENOENT; -+ *storage = 1; -+ -+ a = nla_nest_start(skb, MTK_VENDOR_ATTR_PHY_CAPA_CTRL_DUMP); -+ -+ if (nla_put_u16(skb, -+ MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_BSS, MT7915_MAX_BSS) || -+ nla_put_u16(skb, -+ MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_STA, MT7915_WTBL_STA)) -+ return -ENOMEM; -+ len += 2; -+ -+ nla_nest_end(skb, a); -+ -+ return len; -+} -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -1052,6 +1093,17 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .doit = mt7915_vendor_mu_ctrl, - .policy = mu_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_MU_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .dumpit = mt7915_vendor_phy_capa_ctrl_dump, -+ .policy = phy_capa_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_PHY_CAPA_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index a4a9180..34dd7d0 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -10,6 +10,7 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_RFEATURE_CTRL = 0xc3, - MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4, - MTK_NL80211_VENDOR_SUBCMD_MU_CTRL = 0xc5, -+ MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL = 0xc6, - }; - - enum mtk_capi_control_changed { -@@ -152,4 +153,28 @@ enum mtk_vendor_attr_mnt_dump { - NUM_MTK_VENDOR_ATTRS_AMNT_DUMP - 1 - }; - -+enum mtk_vendor_attr_phy_capa_ctrl { -+ MTK_VENDOR_ATTR_PHY_CAPA_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_PHY_CAPA_CTRL_SET, -+ MTK_VENDOR_ATTR_PHY_CAPA_CTRL_DUMP, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_PHY_CAPA_CTRL, -+ MTK_VENDOR_ATTR_PHY_CAPA_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_PHY_CAPA_CTRL - 1 -+}; -+ -+enum mtk_vendor_attr_phy_capa_dump { -+ MTK_VENDOR_ATTR_PHY_CAPA_DUMP_UNSPEC, -+ -+ MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_BSS, -+ MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_STA, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP, -+ MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX = -+ NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP - 1 -+}; -+ - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1015-wifi-mt76-mt7915-add-vendor-subcmd-EDCCA-ctrl-enable.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1015-wifi-mt76-mt7915-add-vendor-subcmd-EDCCA-ctrl-enable.patch deleted file mode 100644 index 14f77a57f..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1015-wifi-mt76-mt7915-add-vendor-subcmd-EDCCA-ctrl-enable.patch +++ /dev/null @@ -1,382 +0,0 @@ -From 7f9793b9c724014e9993091b47566cd9bf3cec06 Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Fri, 24 Jun 2022 11:15:45 +0800 -Subject: [PATCH] wifi: mt76: mt7915: add vendor subcmd EDCCA ctrl - enable/threshold/compensation - ---- - mt76_connac_mcu.h | 1 + - mt7915/main.c | 3 ++ - mt7915/mcu.c | 72 +++++++++++++++++++++++++ - mt7915/mcu.h | 21 ++++++++ - mt7915/mt7915.h | 3 +- - mt7915/vendor.c | 132 ++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 33 ++++++++++++ - 7 files changed, 264 insertions(+), 1 deletion(-) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 9ac1c46..012f9be 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1252,6 +1252,7 @@ enum { - MCU_EXT_CMD_RX_STAT_USER_CTRL = 0xb3, - MCU_EXT_CMD_SET_QOS_MAP = 0xb4, - MCU_EXT_CMD_CERT_CFG = 0xb7, -+ MCU_EXT_CMD_EDCCA = 0xba, - MCU_EXT_CMD_CSI_CTRL = 0xc2, - MCU_EXT_CMD_IPI_HIST_SCAN = 0xc5, - }; -diff --git a/mt7915/main.c b/mt7915/main.c -index 69477f1..d0ba4b7 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -479,6 +479,9 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed) - mutex_unlock(&dev->mt76.mutex); - } - #endif -+ ret = mt7915_mcu_set_edcca(phy, EDCCA_CTRL_SET_EN, NULL, 0); -+ if (ret) -+ return ret; - ieee80211_stop_queues(hw); - ret = mt7915_set_channel(phy); - if (ret) -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index f5042ae..20395e9 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -5038,6 +5038,78 @@ int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool w - return 0; - } - -+int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation) -+{ -+ static const u8 ch_band[] = { -+ [NL80211_BAND_2GHZ] = 0, -+ [NL80211_BAND_5GHZ] = 1, -+ [NL80211_BAND_6GHZ] = 2, -+ }; -+ struct mt7915_dev *dev = phy->dev; -+ struct cfg80211_chan_def *chandef = &phy->mt76->chandef; -+ struct { -+ u8 band_idx; -+ u8 cmd_idx; -+ u8 setting[3]; -+ bool record_in_fw; -+ u8 region; -+ s8 thres_compensation; -+ } __packed req = { -+ .band_idx = phy->mt76->band_idx, -+ .cmd_idx = mode, -+ .record_in_fw = false, -+ .thres_compensation = compensation, -+ }; -+ -+ if (ch_band[chandef->chan->band] == 2 && dev->mt76.region == NL80211_DFS_FCC) -+ req.region = dev->mt76.region; -+ -+ if (mode == EDCCA_CTRL_SET_EN) { -+ req.setting[0] = (!value)? EDCCA_MODE_AUTO: value[0]; -+ } else if (mode == EDCCA_CTRL_SET_THERS) { -+ req.setting[0] = value[0]; -+ req.setting[1] = value[1]; -+ req.setting[2] = value[2]; -+ } else { -+ return -EINVAL; -+ } -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCCA), &req, sizeof(req), true); -+} -+ -+int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ u8 band_idx; -+ u8 cmd_idx; -+ u8 setting[3]; -+ bool record_in_fw; -+ u8 region; -+ s8 thres_compensation; -+ } __packed req = { -+ .band_idx = phy->mt76->band_idx, -+ .cmd_idx = mode, -+ .record_in_fw = false, -+ }; -+ struct sk_buff *skb; -+ int ret; -+ struct mt7915_mcu_edcca_info *res; -+ -+ ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(EDCCA), &req, sizeof(req), -+ true, &skb); -+ if (ret) -+ return ret; -+ -+ res = (struct mt7915_mcu_edcca_info *)skb->data; -+ *value++ = res->info[0]; -+ *value++ = res->info[1]; -+ *value = res->info[2]; -+ dev_kfree_skb(skb); -+ -+ return 0; -+} -+ - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) - { - #define IP_DSCP_NUM 64 -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index de17c57..1682c11 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -1128,6 +1128,27 @@ enum { - MURU_DL_INIT, - MURU_UL_INIT, - }; -+ -+enum { -+ EDCCA_CTRL_SET_EN = 0, -+ EDCCA_CTRL_SET_THERS, -+ EDCCA_CTRL_GET_EN, -+ EDCCA_CTRL_GET_THERS, -+ EDCCA_CTRL_NUM, -+}; -+ -+enum { -+ EDCCA_MODE_FORCE_DISABLE, -+ EDCCA_MODE_AUTO, -+}; -+ -+struct mt7915_mcu_edcca_info { -+ u8 cmd_idx; -+ u8 band_idx; -+ u8 info[3]; -+ u8 fginit; -+ u8 rsv[2]; -+}; - #endif - - #endif -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index d4a3467..8da1d1b 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -771,7 +771,8 @@ void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb); - int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, - struct ieee80211_sta *sta); - #endif -- -+int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation); -+int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value); - int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp); - int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp); - -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 757aecb..3a58684 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -63,6 +63,24 @@ phy_capa_dump_policy[NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP] = { - [MTK_VENDOR_ATTR_PHY_CAPA_DUMP_MAX_SUPPORTED_STA] = { .type = NLA_U16 }, - }; - -+static const struct nla_policy -+edcca_ctrl_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL] = { -+ [MTK_VENDOR_ATTR_EDCCA_CTRL_MODE] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE] = { .type = NLA_S8 }, -+}; -+ -+static const struct nla_policy -+edcca_dump_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP] = { -+ [MTK_VENDOR_ATTR_EDCCA_DUMP_MODE] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL] = { .type = NLA_U8 }, -+}; -+ - struct csi_null_tone { - u8 start; - u8 end; -@@ -1036,6 +1054,108 @@ mt7915_vendor_phy_capa_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, - return len; - } - -+static int mt7915_vendor_edcca_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL]; -+ int err; -+ u8 edcca_mode; -+ s8 edcca_compensation; -+ u8 edcca_value[EDCCA_THRES_NUM] = {0}; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, data, data_len, -+ edcca_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]) -+ return -EINVAL; -+ -+ edcca_mode = nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]); -+ if (edcca_mode == EDCCA_CTRL_SET_EN) { -+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] || -+ !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE]) { -+ return -EINVAL; -+ } -+ edcca_value[0] = -+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL]); -+ edcca_compensation = -+ nla_get_s8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE]); -+ -+ err = mt7915_mcu_set_edcca(phy, edcca_mode, edcca_value, -+ edcca_compensation); -+ if (err) -+ return err; -+ } else if (edcca_mode == EDCCA_CTRL_SET_THERS) { -+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] || -+ !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL] || -+ !tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL]) { -+ return -EINVAL; -+ } -+ edcca_value[0] = -+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL]); -+ edcca_value[1] = -+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL]); -+ edcca_value[2] = -+ nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL]); -+ err = mt7915_mcu_set_edcca(phy, edcca_mode, edcca_value, -+ edcca_compensation); -+ if (err) -+ return err; -+ } else { -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int -+mt7915_vendor_edcca_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL]; -+ int len = EDCCA_THRES_NUM; -+ int err; -+ u8 edcca_mode; -+ s8 value[EDCCA_THRES_NUM]; -+ -+ if (*storage == 1) -+ return -ENOENT; -+ *storage = 1; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, data, data_len, -+ edcca_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (!tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]) -+ return -EINVAL; -+ -+ edcca_mode = nla_get_u8(tb[MTK_VENDOR_ATTR_EDCCA_CTRL_MODE]); -+ if (edcca_mode == EDCCA_CTRL_GET_EN || edcca_mode == EDCCA_CTRL_GET_THERS) { -+ err = mt7915_mcu_get_edcca(phy, edcca_mode, value); -+ } else { -+ return -EINVAL; -+ } -+ -+ if (err) -+ return err; -+ -+ if (nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL, value[0]) || -+ nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL, value[1]) || -+ nla_put_u8(skb, MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL, value[2])) -+ return -ENOMEM; -+ -+ return len; -+} -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -1104,6 +1224,18 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .dumpit = mt7915_vendor_phy_capa_ctrl_dump, - .policy = phy_capa_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_PHY_CAPA_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_edcca_ctrl, -+ .dumpit = mt7915_vendor_edcca_ctrl_dump, -+ .policy = edcca_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 34dd7d0..284994a 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -3,6 +3,7 @@ - #define __MT7915_VENDOR_H - - #define MTK_NL80211_VENDOR_ID 0x0ce7 -+#define EDCCA_THRES_NUM 3 - - enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL = 0xae, -@@ -11,6 +12,38 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4, - MTK_NL80211_VENDOR_SUBCMD_MU_CTRL = 0xc5, - MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL = 0xc6, -+ MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7, -+}; -+ -+ -+enum mtk_vendor_attr_edcca_ctrl { -+ MTK_VENDOR_ATTR_EDCCA_THRESHOLD_INVALID = 0, -+ -+ MTK_VENDOR_ATTR_EDCCA_CTRL_MODE, -+ MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL, -+ MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL, -+ MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL, -+ MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL, -+ MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL, -+ MTK_VENDOR_ATTR_EDCCA_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL - 1 -+}; -+ -+enum mtk_vendor_attr_edcca_dump { -+ MTK_VENDOR_ATTR_EDCCA_DUMP_UNSPEC = 0, -+ -+ MTK_VENDOR_ATTR_EDCCA_DUMP_MODE, -+ MTK_VENDOR_ATTR_EDCCA_DUMP_PRI20_VAL, -+ MTK_VENDOR_ATTR_EDCCA_DUMP_SEC40_VAL, -+ MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP, -+ MTK_VENDOR_ATTR_EDCCA_DUMP_MAX = -+ NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP - 1 - }; - - enum mtk_capi_control_changed { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1016-wifi-mt76-mt7915-implement-bin-file-mode.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1016-wifi-mt76-mt7915-implement-bin-file-mode.patch deleted file mode 100644 index 792580c08..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1016-wifi-mt76-mt7915-implement-bin-file-mode.patch +++ /dev/null @@ -1,321 +0,0 @@ -From 9291fdb4f324728e5f4e233a08282f828cc04b80 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Thu, 7 Jul 2022 11:09:59 +0800 -Subject: [PATCH 1016/1053] wifi: mt76: mt7915: implement bin file mode - -Signed-off-by: StanleyYP Wang -Signed-off-by: Shayne Chen ---- - eeprom.c | 25 ++++++++++++++++++ - mt76.h | 4 +++ - mt7915/eeprom.c | 63 +++++++++++++++++++++++++++++++++++++++++--- - mt7915/eeprom.h | 7 +++++ - mt7915/mt7915.h | 3 +++ - mt7915/mtk_debugfs.c | 44 +++++++++++++++++++++++++++++++ - testmode.h | 2 +- - 7 files changed, 144 insertions(+), 4 deletions(-) - -diff --git a/eeprom.c b/eeprom.c -index 3625b16..9d029c0 100644 ---- a/eeprom.c -+++ b/eeprom.c -@@ -161,6 +161,31 @@ static int mt76_get_of_eeprom(struct mt76_dev *dev, void *eep, int len) - return mt76_get_of_data_from_nvmem(dev, eep, "eeprom", len); - } - -+bool mt76_check_bin_file_mode(struct mt76_dev *dev) -+{ -+ struct device_node *np = dev->dev->of_node; -+ const char *bin_file_name = NULL; -+ -+ if (!np) -+ return false; -+ -+ of_property_read_string(np, "bin_file_name", &bin_file_name); -+ -+ dev->bin_file_name = bin_file_name; -+ if (dev->bin_file_name) { -+ dev_info(dev->dev, "Using bin file %s\n", dev->bin_file_name); -+#ifdef CONFIG_NL80211_TESTMODE -+ dev->test_mtd.name = devm_kstrdup(dev->dev, bin_file_name, GFP_KERNEL); -+ dev->test_mtd.offset = -1; -+#endif -+ } -+ -+ of_node_put(np); -+ -+ return dev->bin_file_name ? true : false; -+} -+EXPORT_SYMBOL_GPL(mt76_check_bin_file_mode); -+ - void - mt76_eeprom_override(struct mt76_phy *phy) - { -diff --git a/mt76.h b/mt76.h -index 8025e04..48e98a3 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -983,6 +983,9 @@ struct mt76_dev { - struct mt76_usb usb; - struct mt76_sdio sdio; - }; -+ -+ /* for mtk internal */ -+ const char *bin_file_name; - }; - - /* per-phy stats. */ -@@ -1246,6 +1249,7 @@ void mt76_eeprom_override(struct mt76_phy *phy); - int mt76_get_of_data_from_mtd(struct mt76_dev *dev, void *eep, int offset, int len); - int mt76_get_of_data_from_nvmem(struct mt76_dev *dev, void *eep, - const char *cell_name, int len); -+bool mt76_check_bin_file_mode(struct mt76_dev *dev); - - struct mt76_queue * - mt76_init_queue(struct mt76_dev *dev, int qid, int idx, int n_desc, -diff --git a/mt7915/eeprom.c b/mt7915/eeprom.c -index f4876fe..c8b1c18 100644 ---- a/mt7915/eeprom.c -+++ b/mt7915/eeprom.c -@@ -5,6 +5,30 @@ - #include "mt7915.h" - #include "eeprom.h" - -+static int -+mt7915_eeprom_load_precal_binfile(struct mt7915_dev *dev, u32 offs, u32 size) -+{ -+ const struct firmware *fw = NULL; -+ int ret; -+ -+ ret = request_firmware(&fw, dev->mt76.bin_file_name, dev->mt76.dev); -+ if (ret) -+ return ret; -+ -+ if (!fw || !fw->data) { -+ dev_err(dev->mt76.dev, "Invalid bin (bin file mode), load precal fail\n"); -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ memcpy(dev->cal, fw->data + offs, size); -+ -+out: -+ release_firmware(fw); -+ -+ return ret; -+} -+ - static int mt7915_eeprom_load_precal(struct mt7915_dev *dev) - { - struct mt76_dev *mdev = &dev->mt76; -@@ -24,6 +48,9 @@ static int mt7915_eeprom_load_precal(struct mt7915_dev *dev) - - offs = is_mt7915(&dev->mt76) ? MT_EE_PRECAL : MT_EE_PRECAL_V2; - -+ if (dev->bin_file_mode) -+ return mt7915_eeprom_load_precal_binfile(dev, offs, size); -+ - ret = mt76_get_of_data_from_mtd(mdev, dev->cal, offs, size); - if (!ret) - return ret; -@@ -59,8 +86,11 @@ static int mt7915_check_eeprom(struct mt7915_dev *dev) - } - } - --static char *mt7915_eeprom_name(struct mt7915_dev *dev) -+const char *mt7915_eeprom_name(struct mt7915_dev *dev) - { -+ if (dev->bin_file_mode) -+ return dev->mt76.bin_file_name; -+ - switch (mt76_chip(&dev->mt76)) { - case 0x7915: - return dev->dbdc_support ? -@@ -101,7 +131,10 @@ mt7915_eeprom_load_default(struct mt7915_dev *dev) - return ret; - - if (!fw || !fw->data) { -- dev_err(dev->mt76.dev, "Invalid default bin\n"); -+ if (dev->bin_file_mode) -+ dev_err(dev->mt76.dev, "Invalid bin (bin file mode)\n"); -+ else -+ dev_err(dev->mt76.dev, "Invalid default bin\n"); - ret = -EINVAL; - goto out; - } -@@ -126,6 +159,7 @@ static int mt7915_eeprom_load(struct mt7915_dev *dev) - - if (ret) { - dev->flash_mode = true; -+ dev->eeprom_mode = FLASH_MODE; - } else { - u8 free_block_num; - u32 block_num, i; -@@ -146,6 +180,8 @@ static int mt7915_eeprom_load(struct mt7915_dev *dev) - if (ret < 0) - return ret; - } -+ -+ dev->eeprom_mode = EFUSE_MODE; - } - - return mt7915_check_eeprom(dev); -@@ -251,12 +287,33 @@ int mt7915_eeprom_init(struct mt7915_dev *dev) - { - int ret; - -- ret = mt7915_eeprom_load(dev); -+ dev->bin_file_mode = mt76_check_bin_file_mode(&dev->mt76); -+ if (dev->bin_file_mode) { -+ dev->mt76.eeprom.size = mt7915_eeprom_size(dev); -+ dev->mt76.eeprom.data = devm_kzalloc(dev->mt76.dev, dev->mt76.eeprom.size, -+ GFP_KERNEL); -+ if (!dev->mt76.eeprom.data) -+ return -ENOMEM; -+ ret = mt7915_eeprom_load_default(dev); -+ if (ret) -+ return ret; -+ -+ ret = mt7915_check_eeprom(dev); -+ if (ret) -+ return ret; -+ dev->eeprom_mode = BIN_FILE_MODE; -+ } else { -+ ret = mt7915_eeprom_load(dev); -+ } -+ - if (ret < 0) { - if (ret != -EINVAL) - return ret; - - dev_warn(dev->mt76.dev, "eeprom load fail, use default bin\n"); -+ dev->bin_file_mode = false; -+ dev->eeprom_mode = DEFAULT_BIN_MODE; -+ - ret = mt7915_eeprom_load_default(dev); - if (ret) - return ret; -diff --git a/mt7915/eeprom.h b/mt7915/eeprom.h -index 509fb43..99101f9 100644 ---- a/mt7915/eeprom.h -+++ b/mt7915/eeprom.h -@@ -109,6 +109,13 @@ enum mt7915_sku_rate_group { - MAX_SKU_RATE_GROUP_NUM, - }; - -+enum mt7915_eeprom_mode { -+ DEFAULT_BIN_MODE, -+ EFUSE_MODE, -+ FLASH_MODE, -+ BIN_FILE_MODE, -+}; -+ - static inline int - mt7915_get_channel_group_5g(int channel, bool is_7976) - { -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 000751b..a06a46e 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -397,6 +397,8 @@ struct mt7915_dev { - - bool dbdc_support; - bool flash_mode; -+ bool bin_file_mode; -+ u8 eeprom_mode; - bool muru_debug; - bool ibf; - -@@ -783,6 +785,7 @@ void mt7915_dump_tmac_info(u8 *tmac_info); - int mt7915_mcu_set_txpower_level(struct mt7915_phy *phy, u8 drop_level); - void mt7915_packet_log_to_host(struct mt7915_dev *dev, const void *data, int len, int type, int des_len); - int mt7915_mcu_set_amsdu_algo(struct mt7915_dev *dev, u16 wcid, u8 enable); -+const char *mt7915_eeprom_name(struct mt7915_dev *dev); - - #define PKT_BIN_DEBUG_MAGIC 0xc8763123 - enum { -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 30c5f68..02e0db3 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3,6 +3,7 @@ - #include "mt7915_debug.h" - #include "mac.h" - #include "mcu.h" -+#include "eeprom.h" - - #ifdef MTK_DEBUG - #define LWTBL_IDX2BASE_ID GENMASK(14, 8) -@@ -3728,6 +3729,47 @@ static int mt7915_fw_wm_info_read(struct seq_file *s, void *data) - return 0; - } - -+static int mt7915_show_eeprom_mode(struct seq_file *s, void *data) -+{ -+ struct mt7915_dev *dev = dev_get_drvdata(s->private); -+ struct mt76_dev *mdev = &dev->mt76; -+ u8 free_block_num = 0; -+#ifdef CONFIG_NL80211_TESTMODE -+ const char *mtd_name = mdev->test_mtd.name; -+ u32 mtd_offset = mdev->test_mtd.offset; -+#else -+ const char *mtd_name = NULL; -+ u32 mtd_offset; -+#endif -+ -+ seq_printf(s, "Current eeprom mode:\n"); -+ -+ switch (dev->eeprom_mode) { -+ case DEFAULT_BIN_MODE: -+ seq_printf(s, " default bin mode\n filename = %s\n", mt7915_eeprom_name(dev)); -+ break; -+ case EFUSE_MODE: -+ seq_printf(s, " efuse mode\n"); -+ mt7915_mcu_get_eeprom_free_block(dev, &free_block_num); -+ seq_printf(s, " free block number = %d\n", free_block_num); -+ break; -+ case FLASH_MODE: -+ if (mtd_name) -+ seq_printf(s, " flash mode\n mtd name = %s\n flash offset = 0x%x\n", -+ mtd_name, mtd_offset); -+ else -+ seq_printf(s, " flash mode\n"); -+ break; -+ case BIN_FILE_MODE: -+ seq_printf(s, " bin file mode\n filename = %s\n", mt7915_eeprom_name(dev)); -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - { - struct mt7915_dev *dev = phy->dev; -@@ -3814,6 +3856,8 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - - debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable); - -+ debugfs_create_devm_seqfile(dev->mt76.dev, "eeprom_mode", dir, -+ mt7915_show_eeprom_mode); - return 0; - } - #endif -diff --git a/testmode.h b/testmode.h -index 20fab3e..91d1e86 100644 ---- a/testmode.h -+++ b/testmode.h -@@ -17,7 +17,7 @@ - * @MT76_TM_ATTR_RESET: reset parameters to default (flag) - * @MT76_TM_ATTR_STATE: test state (u32), see &enum mt76_testmode_state - * -- * @MT76_TM_ATTR_MTD_PART: mtd partition used for eeprom data (string) -+ * @MT76_TM_ATTR_MTD_PART: mtd partition or binfile used for eeprom data (string) - * @MT76_TM_ATTR_MTD_OFFSET: offset of eeprom data within the partition (u32) - * @MT76_TM_ATTR_BAND_IDX: band idx of the chip (u8) - * --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1017-wifi-mt76-mt7915-Add-mu-dump-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1017-wifi-mt76-mt7915-Add-mu-dump-support.patch deleted file mode 100644 index a8a9084f4..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1017-wifi-mt76-mt7915-Add-mu-dump-support.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 7a381293087e8d94349e5488936e53f884730787 Mon Sep 17 00:00:00 2001 -From: TomLiu -Date: Thu, 11 Aug 2022 18:09:45 -0700 -Subject: [PATCH 1017/1053] wifi: mt76: mt7915: Add mu dump support - ---- - mt7915/vendor.c | 24 ++++++++++++++++++++++++ - mt7915/vendor.h | 1 + - 2 files changed, 25 insertions(+) - -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 3a58684..ac6f637 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -38,6 +38,7 @@ wireless_ctrl_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL] = { - static const struct nla_policy - mu_ctrl_policy[NUM_MTK_VENDOR_ATTRS_MU_CTRL] = { - [MTK_VENDOR_ATTR_MU_CTRL_ONOFF] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_MU_CTRL_DUMP] = {.type = NLA_U8 }, - }; - - static const struct nla_policy -@@ -1025,6 +1026,28 @@ static int mt7915_vendor_mu_ctrl(struct wiphy *wiphy, - return 0; - } - -+ -+static int -+mt7915_vendor_mu_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ int len = 0; -+ -+ if (*storage == 1) -+ return -ENOENT; -+ *storage = 1; -+ -+ if (nla_put_u8(skb, MTK_VENDOR_ATTR_MU_CTRL_DUMP, phy->muru_onoff)) -+ return -ENOMEM; -+ len += 1; -+ -+ return len; -+} -+ -+ - static int - mt7915_vendor_phy_capa_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, - struct sk_buff *skb, const void *data, int data_len, -@@ -1211,6 +1234,7 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | - WIPHY_VENDOR_CMD_NEED_RUNNING, - .doit = mt7915_vendor_mu_ctrl, -+ .dumpit = mt7915_vendor_mu_ctrl_dump, - .policy = mu_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_MU_CTRL_MAX, - }, -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 284994a..8c2a996 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -73,6 +73,7 @@ enum mtk_vendor_attr_mu_ctrl { - MTK_VENDOR_ATTR_MU_CTRL_UNSPEC, - - MTK_VENDOR_ATTR_MU_CTRL_ONOFF, -+ MTK_VENDOR_ATTR_MU_CTRL_DUMP, - - /* keep last */ - NUM_MTK_VENDOR_ATTRS_MU_CTRL, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1018-wifi-mt76-mt7915-add-vendor-subcmd-three-wire-PTA-ct.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1018-wifi-mt76-mt7915-add-vendor-subcmd-three-wire-PTA-ct.patch deleted file mode 100644 index 6718ab8fb..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1018-wifi-mt76-mt7915-add-vendor-subcmd-three-wire-PTA-ct.patch +++ /dev/null @@ -1,270 +0,0 @@ -From 35c3c602288b8c1a11b9c1ca4e1b0182d451d15e Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Fri, 28 Oct 2022 10:15:56 +0800 -Subject: [PATCH] wifi: mt76: mt7915: add vendor subcmd three wire (PTA) ctrl - -Signed-off-by: StanleyYP Wang ---- - mt76_connac_mcu.h | 2 +- - mt7915/mcu.c | 50 ++++++++++++++++++++++------------------------- - mt7915/mcu.h | 29 +++++++++++++++++++++++++++ - mt7915/mt7915.h | 1 + - mt7915/vendor.c | 44 ++++++++++++++++++++++++++++++++++++++++- - mt7915/vendor.h | 14 +++++++++++++ - 6 files changed, 111 insertions(+), 29 deletions(-) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 012f9be..7e12c05 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1251,7 +1251,7 @@ enum { - MCU_EXT_CMD_SMESH_CTRL = 0xae, - MCU_EXT_CMD_RX_STAT_USER_CTRL = 0xb3, - MCU_EXT_CMD_SET_QOS_MAP = 0xb4, -- MCU_EXT_CMD_CERT_CFG = 0xb7, -+ MCU_EXT_CMD_SET_CFG = 0xb7, - MCU_EXT_CMD_EDCCA = 0xba, - MCU_EXT_CMD_CSI_CTRL = 0xc2, - MCU_EXT_CMD_IPI_HIST_SCAN = 0xc5, -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 20395e9..8f5fcbb 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -4736,37 +4736,33 @@ void mt7915_mcu_set_dynalgo(struct mt7915_phy *phy, u8 enable) - &req, sizeof(req), false); - } - --void mt7915_mcu_set_cert(struct mt7915_phy *phy, u8 type) -+int mt7915_mcu_set_cfg(struct mt7915_phy *phy, u8 cfg_info, u8 type) - { --#define CFGINFO_CERT_CFG 4 - struct mt7915_dev *dev = phy->dev; -- struct { -- struct basic_info{ -- u8 dbdc_idx; -- u8 rsv[3]; -- __le32 tlv_num; -- u8 tlv_buf[0]; -- } hdr; -- struct cert_cfg{ -- __le16 tag; -- __le16 length; -- u8 cert_program; -- u8 rsv[3]; -- } tlv; -- } req = { -- .hdr = { -- .dbdc_idx = phy != &dev->phy, -- .tlv_num = cpu_to_le32(1), -- }, -- .tlv = { -- .tag = cpu_to_le16(CFGINFO_CERT_CFG), -- .length = cpu_to_le16(sizeof(struct cert_cfg)), -- .cert_program = type, /* 1: CAPI Enable */ -- } -+ struct cfg_basic_info req = { -+ .dbdc_idx = phy != &dev->phy, -+ .tlv_num = cpu_to_le32(1), - }; -+ int tlv_len; -+ -+ switch (cfg_info) { -+ case CFGINFO_CERT_CFG: -+ tlv_len = sizeof(struct cert_cfg); -+ req.cert.tag = cpu_to_le16(cfg_info); -+ req.cert.length = cpu_to_le16(tlv_len); -+ req.cert.cert_program = type; -+ break; -+ case CFGINFO_3WIRE_EN_CFG: -+ tlv_len = sizeof(struct three_wire_cfg); -+ req.three_wire.tag = cpu_to_le16(cfg_info); -+ req.three_wire.length = cpu_to_le16(tlv_len); -+ req.three_wire.three_wire_en = type; -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } - -- mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(CERT_CFG), -- &req, sizeof(req), false); -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_CFG), &req, sizeof(req), false); - } - - void mt7915_mcu_set_bypass_smthint(struct mt7915_phy *phy, u8 val) -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 1682c11..1b0bd06 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -916,6 +916,35 @@ struct mt7915_mcu_rdd_ipi_scan { - u8 tx_assert_time; /* unit: us */ - } __packed; - -+struct cert_cfg { -+ __le16 tag; -+ __le16 length; -+ u8 cert_program; -+ u8 rsv[3]; -+} __packed; -+ -+struct three_wire_cfg { -+ __le16 tag; -+ __le16 length; -+ u8 three_wire_en; -+ u8 rsv[3]; -+} __packed; -+ -+struct cfg_basic_info { -+ u8 dbdc_idx; -+ u8 rsv[3]; -+ __le32 tlv_num; -+ union { -+ struct cert_cfg cert; -+ struct three_wire_cfg three_wire; -+ }; -+} __packed; -+ -+enum { -+ CFGINFO_CERT_CFG = 4, -+ CFGINFO_3WIRE_EN_CFG = 10, -+}; -+ - /* MURU */ - #define OFDMA_DL BIT(0) - #define OFDMA_UL BIT(1) -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 27b007b..f9ca9d5 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -765,6 +765,7 @@ void mt7915_mcu_set_mimo(struct mt7915_phy *phy, u8 direction); - void mt7915_mcu_set_dynalgo(struct mt7915_phy *phy, u8 enable); - int mt7915_mcu_set_mu_edca(struct mt7915_phy *phy, u8 val); - void mt7915_mcu_set_cert(struct mt7915_phy *phy, u8 type); -+int mt7915_mcu_set_cfg(struct mt7915_phy *phy, u8 cfg_info, u8 type); - void mt7915_mcu_set_bypass_smthint(struct mt7915_phy *phy, u8 val); - void mt7915_vendor_register(struct mt7915_phy *phy); - int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index ac6f637..eeac18d 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -41,6 +41,11 @@ mu_ctrl_policy[NUM_MTK_VENDOR_ATTRS_MU_CTRL] = { - [MTK_VENDOR_ATTR_MU_CTRL_DUMP] = {.type = NLA_U8 }, - }; - -+static const struct nla_policy -+three_wire_ctrl_policy[NUM_MTK_VENDOR_ATTRS_3WIRE_CTRL] = { -+ [MTK_VENDOR_ATTR_3WIRE_CTRL_MODE] = {.type = NLA_U8 }, -+}; -+ - static const struct nla_policy - rfeature_ctrl_policy[NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL] = { - [MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI] = {.type = NLA_U8 }, -@@ -992,7 +997,7 @@ static int mt7915_vendor_wireless_ctrl(struct wiphy *wiphy, - mt7915_set_wireless_vif, &val32); - } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT]) { - val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT]); -- mt7915_mcu_set_cert(phy, val8); /* Cert Enable for OMI */ -+ mt7915_mcu_set_cfg(phy, CFGINFO_CERT_CFG, val8); /* Cert Enable for OMI */ - mt7915_mcu_set_bypass_smthint(phy, val8); /* Cert bypass smooth interpolation */ - } - -@@ -1136,6 +1141,7 @@ static int mt7915_vendor_edcca_ctrl(struct wiphy *wiphy, - return 0; - } - -+ - static int - mt7915_vendor_edcca_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, - struct sk_buff *skb, const void *data, int data_len, -@@ -1179,6 +1185,31 @@ mt7915_vendor_edcca_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, - return len; - } - -+static int mt7915_vendor_3wire_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_3WIRE_CTRL]; -+ int err; -+ u8 three_wire_mode; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_3WIRE_CTRL_MAX, data, data_len, -+ three_wire_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (!tb[MTK_VENDOR_ATTR_3WIRE_CTRL_MODE]) -+ return -EINVAL; -+ -+ three_wire_mode = nla_get_u8(tb[MTK_VENDOR_ATTR_3WIRE_CTRL_MODE]); -+ -+ return mt7915_mcu_set_cfg(phy, CFGINFO_3WIRE_EN_CFG, three_wire_mode); -+} -+ -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -1260,6 +1291,17 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .dumpit = mt7915_vendor_edcca_ctrl_dump, - .policy = edcca_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_EDCCA_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_3wire_ctrl, -+ .policy = three_wire_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_3WIRE_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 8c2a996..e61a6aa 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -13,6 +13,7 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_MU_CTRL = 0xc5, - MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL = 0xc6, - MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7, -+ MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8 - }; - - -@@ -32,6 +33,7 @@ enum mtk_vendor_attr_edcca_ctrl { - NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL - 1 - }; - -+ - enum mtk_vendor_attr_edcca_dump { - MTK_VENDOR_ATTR_EDCCA_DUMP_UNSPEC = 0, - -@@ -46,6 +48,18 @@ enum mtk_vendor_attr_edcca_dump { - NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP - 1 - }; - -+enum mtk_vendor_attr_3wire_ctrl { -+ MTK_VENDOR_ATTR_3WIRE_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_3WIRE_CTRL_MODE, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_3WIRE_CTRL, -+ MTK_VENDOR_ATTR_3WIRE_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_3WIRE_CTRL - 1 -+}; -+ -+ - enum mtk_capi_control_changed { - CAPI_RFEATURE_CHANGED = BIT(16), - CAPI_WIRELESS_CHANGED = BIT(17), --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1019-wifi-mt76-mt7915-add-ibf-control-vendor-cmd.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1019-wifi-mt76-mt7915-add-ibf-control-vendor-cmd.patch deleted file mode 100644 index e0e3ce706..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1019-wifi-mt76-mt7915-add-ibf-control-vendor-cmd.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 090c1e87976b841379871abfa75879dc115e4224 Mon Sep 17 00:00:00 2001 -From: mtk27835 -Date: Wed, 7 Sep 2022 14:01:29 -0700 -Subject: [PATCH 1019/1053] wifi: mt76: mt7915: add ibf control vendor cmd - -Signed-off-by: mtk27835 ---- - mt7915/vendor.c | 65 +++++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 25 ++++++++++++++++++- - 2 files changed, 89 insertions(+), 1 deletion(-) - -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index eeac18d..a21cbce 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -87,6 +87,11 @@ edcca_dump_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_DUMP] = { - [MTK_VENDOR_ATTR_EDCCA_DUMP_SEC80_VAL] = { .type = NLA_U8 }, - }; - -+static const struct nla_policy -+ibf_ctrl_policy[NUM_MTK_VENDOR_ATTRS_IBF_CTRL] = { -+ [MTK_VENDOR_ATTR_IBF_CTRL_ENABLE] = { .type = NLA_U8 }, -+}; -+ - struct csi_null_tone { - u8 start; - u8 end; -@@ -1209,6 +1214,54 @@ static int mt7915_vendor_3wire_ctrl(struct wiphy *wiphy, - return mt7915_mcu_set_cfg(phy, CFGINFO_3WIRE_EN_CFG, three_wire_mode); - } - -+static int mt7915_vendor_ibf_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct mt7915_dev *dev = phy->dev; -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_IBF_CTRL]; -+ int err; -+ u8 val; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_IBF_CTRL_MAX, data, data_len, -+ ibf_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (tb[MTK_VENDOR_ATTR_IBF_CTRL_ENABLE]) { -+ val = nla_get_u8(tb[MTK_VENDOR_ATTR_IBF_CTRL_ENABLE]); -+ -+ dev->ibf = !!val; -+ -+ err = mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE); -+ if (err) -+ return err; -+ } -+ return 0; -+} -+ -+static int -+mt7915_vendor_ibf_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct mt7915_dev *dev = phy->dev; -+ -+ if (*storage == 1) -+ return -ENOENT; -+ *storage = 1; -+ -+ if (nla_put_u8(skb, MTK_VENDOR_ATTR_IBF_DUMP_ENABLE, dev->ibf)) -+ return -ENOMEM; -+ -+ return 1; -+} -+ - - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { -@@ -1302,6 +1355,18 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .doit = mt7915_vendor_3wire_ctrl, - .policy = three_wire_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_3WIRE_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_IBF_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_ibf_ctrl, -+ .dumpit = mt7915_vendor_ibf_ctrl_dump, -+ .policy = ibf_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_IBF_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index e61a6aa..876edf3 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -13,7 +13,8 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_MU_CTRL = 0xc5, - MTK_NL80211_VENDOR_SUBCMD_PHY_CAPA_CTRL = 0xc6, - MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7, -- MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8 -+ MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8, -+ MTK_NL80211_VENDOR_SUBCMD_IBF_CTRL = 0xc9, - }; - - -@@ -225,4 +226,26 @@ enum mtk_vendor_attr_phy_capa_dump { - NUM_MTK_VENDOR_ATTRS_PHY_CAPA_DUMP - 1 - }; - -+enum mtk_vendor_attr_ibf_ctrl { -+ MTK_VENDOR_ATTR_IBF_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_IBF_CTRL_ENABLE, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_IBF_CTRL, -+ MTK_VENDOR_ATTR_IBF_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_IBF_CTRL - 1 -+}; -+ -+enum mtk_vendor_attr_ibf_dump { -+ MTK_VENDOR_ATTR_IBF_DUMP_UNSPEC, -+ -+ MTK_VENDOR_ATTR_IBF_DUMP_ENABLE, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_IBF_DUMP, -+ MTK_VENDOR_ATTR_IBF_DUMP_MAX = -+ NUM_MTK_VENDOR_ATTRS_IBF_DUMP - 1 -+}; -+ - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1020-wifi-mt76-mt7915-add-cal-free-data-merge-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1020-wifi-mt76-mt7915-add-cal-free-data-merge-support.patch deleted file mode 100644 index dd8f1dd9f..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1020-wifi-mt76-mt7915-add-cal-free-data-merge-support.patch +++ /dev/null @@ -1,369 +0,0 @@ -From 0d530532bcd6795ff333eb7dafee44872c35c64b Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Thu, 30 Mar 2023 15:12:37 +0800 -Subject: [PATCH 1020/1053] wifi: mt76: mt7915: add cal free data merge support - -1. add basic cal free data support -2. add E3 low yield rate workaround for panther E3 with 7976 adie -3. add Harrier freq offset workaround -4. add efuse dump command for verification - (/sys/kernel/debug/ieee80211/phyX/mt76/otp) - -Signed-off-by: StanleyYP Wang ---- - mt7915/debugfs.c | 41 ++++++++++ - mt7915/eeprom.c | 199 ++++++++++++++++++++++++++++++++++++++++++++++- - mt7915/eeprom.h | 2 + - mt7915/mcu.c | 13 +++- - mt7915/mt7915.h | 1 + - 5 files changed, 250 insertions(+), 6 deletions(-) - -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 2661386..5c08910 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -1241,6 +1241,46 @@ mt7915_rf_regval_set(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_regval, mt7915_rf_regval_get, - mt7915_rf_regval_set, "0x%08llx\n"); - -+static ssize_t -+mt7915_efuse_get(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ struct mt7915_dev *dev = file->private_data; -+ struct mt76_dev *mdev = &dev->mt76; -+ u8 *buff = mdev->otp.data; -+ int i; -+ ssize_t ret; -+ u32 block_num; -+ -+ mdev->otp.size = mt7915_eeprom_size(dev); -+ if (is_mt7986(&dev->mt76)) -+ mdev->otp.size += MT_EE_ADIE1_BASE_7896; -+ -+ if (!mdev->otp.data) { -+ mdev->otp.data = devm_kzalloc(mdev->dev, mdev->otp.size, GFP_KERNEL); -+ if (!mdev->otp.data) -+ return -ENOMEM; -+ -+ block_num = DIV_ROUND_UP(mdev->otp.size, MT7915_EEPROM_BLOCK_SIZE); -+ for (i = 0; i < block_num; i++) { -+ buff = mdev->otp.data + i * MT7915_EEPROM_BLOCK_SIZE; -+ ret = mt7915_mcu_get_eeprom(dev, i * MT7915_EEPROM_BLOCK_SIZE, buff); -+ if (ret) -+ continue; -+ } -+ } -+ -+ ret = simple_read_from_buffer(user_buf, count, ppos, mdev->otp.data, mdev->otp.size); -+ -+ return ret; -+} -+ -+static const struct file_operations mt7915_efuse_ops = { -+ .read = mt7915_efuse_get, -+ .open = simple_open, -+ .llseek = default_llseek, -+}; -+ - int mt7915_init_debugfs(struct mt7915_phy *phy) - { - struct mt7915_dev *dev = phy->dev; -@@ -1283,6 +1323,7 @@ int mt7915_init_debugfs(struct mt7915_phy *phy) - debugfs_create_devm_seqfile(dev->mt76.dev, "rdd_monitor", dir, - mt7915_rdd_monitor); - } -+ debugfs_create_file("otp", 0400, dir, dev, &mt7915_efuse_ops); - - if (!ext_phy) - dev->debugfs_dir = dir; -diff --git a/mt7915/eeprom.c b/mt7915/eeprom.c -index c8b1c18..6133c20 100644 ---- a/mt7915/eeprom.c -+++ b/mt7915/eeprom.c -@@ -48,8 +48,13 @@ static int mt7915_eeprom_load_precal(struct mt7915_dev *dev) - - offs = is_mt7915(&dev->mt76) ? MT_EE_PRECAL : MT_EE_PRECAL_V2; - -- if (dev->bin_file_mode) -- return mt7915_eeprom_load_precal_binfile(dev, offs, size); -+ if (dev->bin_file_mode) { -+ ret = mt7915_eeprom_load_precal_binfile(dev, offs, size); -+ if (ret) -+ goto out; -+ -+ return 0; -+ } - - ret = mt76_get_of_data_from_mtd(mdev, dev->cal, offs, size); - if (!ret) -@@ -59,6 +64,7 @@ static int mt7915_eeprom_load_precal(struct mt7915_dev *dev) - if (!ret) - return ret; - -+out: - dev_warn(mdev->dev, "missing precal data, size=%d\n", size); - devm_kfree(mdev->dev, dev->cal); - dev->cal = NULL; -@@ -283,6 +289,191 @@ void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, - dev->chainshift = hweight8(dev->mphy.chainmask); - } - -+static int mt7915_apply_cal_free_data(struct mt7915_dev *dev) -+{ -+#define MT_EE_CAL_FREE_MAX_SIZE 70 -+#define MT_EE_FREQ_OFFSET 0x77 -+#define MT_EE_ADIE1_MT7976C_OFFSET 0x270 -+#define MT_EE_ADIE1_E3_OFFSET 0x271 -+#define MT_EE_END_OFFSET 0xffff -+ enum adie_type { -+ ADIE_7975, -+ ADIE_7976, -+ }; -+ enum ddie_type { -+ DDIE_7915, -+ DDIE_7916, -+ }; -+ static const u16 ddie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = { -+ [DDIE_7915] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, -+ 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21, 0x22, 0x23, 0x24, -+ 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, -+ 0x52, 0x70, 0x71, 0x72, 0x76, 0xa8, 0xa9, 0xaa, 0xab, 0xac, -+ 0xad, 0xae, 0xaf, -1}, -+ [DDIE_7916] = {0x30, 0x31, 0x34, 0x35, 0x36, 0x38, 0x3c, 0x3a, 0x3d, 0x44, -+ 0x46, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xe0, -1}, -+ }; -+ static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = { -+ [ADIE_7975] = {0x7cd, 0x7cf, 0x7d1, 0x7d3, 0x802, 0x803, 0x804, 0x805, 0x806, -+ 0x808, 0x80a, 0x80b, 0x80c, 0x80d, 0x80e, 0x810, 0x812, 0x813, -+ 0x814, 0x815, 0x816, 0x818, 0x81a, 0x81b, 0x81c, 0x81d, 0x81e, -+ 0x820, 0x822, 0x823, 0x824, 0x825, 0x826, 0x827, 0x828, 0x829, -+ 0x82f, 0x8c0, 0x8c1, 0x8c2, 0x8c3, 0x9a0, 0x8d0, 0x8d1, 0x8d7, -+ 0x8d8, 0x8fa, 0x9a1, 0x9a5, 0x9a6, 0x9a8, 0x9aa, 0x9b0, 0x9b1, -+ 0x9b2, 0x9b3, 0x9b4, 0x9b5, 0x9b6, 0x9b7, -1}, -+ [ADIE_7976] = {0x24c, 0x24d, 0x24e, 0x24f, 0x250, 0x251, 0x253, 0x255, 0x257, -+ 0x259, 0x990, 0x991, 0x994, 0x995, 0x9a6, 0x9a8, 0x9aa, -1}, -+ }; -+ static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = { -+ [ADIE_7975] = {0xe00, 0xe01, 0xe02, 0xe03, 0xe04, 0xe05, 0xe06, 0xe07, 0xe08, -+ 0xe09, 0xe0a, 0xe0b, 0xe0c, 0xe0d, 0x80e, 0xe0f, 0xe10, 0xe11, -+ 0xe12, 0xe13, 0xe14, 0xe15, 0xe16, 0xe17, 0xe18, 0xe19, 0xe1a, -+ 0xe1b, 0xe1c, 0xe1d, 0xe1e, 0xe1f, 0xe20, 0xe21, 0xe22, 0xe23, -+ 0xe24, 0xe25, 0xe26, 0xe27, 0xe28, 0xe29, 0xe2a, 0xe2b, 0xe2c, -+ 0xe2d, 0xe2e, 0xe2f, 0xe33, 0xe34, 0xe36, 0xe38, 0xe39, 0xe3a, -+ 0xe3b, 0xe3c, 0xe3d, 0xe3e, 0xe3f, 0xe40, -1}, -+ [ADIE_7976] = {0x33c, 0x33d, 0x33e, 0x33f, 0x340, 0x341, 0x343, 0x345, 0x347, -+ 0x349, 0x359, 0x35a, 0x35d, 0x35e, 0x36a, 0x36c, 0x36e, -1}, -+ }; -+ static const u16 *ddie_offs; -+ static const u16 *adie_offs[__MT_MAX_BAND]; -+ static const u16 *eep_offs[__MT_MAX_BAND]; -+ static u16 adie_base[__MT_MAX_BAND] = {0}; -+ u8 *eeprom = dev->mt76.eeprom.data; -+ u8 buf[MT7915_EEPROM_BLOCK_SIZE]; -+ int adie_id, band, i, ret; -+ -+ switch (mt76_chip(&dev->mt76)) { -+ case 0x7915: -+ ddie_offs = ddie_offs_list[DDIE_7915]; -+ ret = mt7915_mcu_get_eeprom(dev, MT_EE_ADIE_FT_VERSION, buf); -+ if (ret == -EINVAL) -+ return 0; -+ else if (ret) -+ return ret; -+ adie_id = buf[MT_EE_ADIE_FT_VERSION % MT7915_EEPROM_BLOCK_SIZE] - 1; -+ adie_offs[0] = adie_offs_list[ADIE_7975]; -+ /* same as adie offset */ -+ eep_offs[0] = NULL; -+ break; -+ case 0x7906: -+ case 0x7981: -+ if (is_mt7916(&dev->mt76)) -+ ddie_offs = ddie_offs_list[DDIE_7916]; -+ adie_offs[0] = adie_offs_list[ADIE_7976]; -+ eep_offs[0] = NULL; -+ break; -+ case 0x7986: -+ adie_id = mt7915_check_adie(dev, true); -+ switch (adie_id) { -+ case MT7975_ONE_ADIE: -+ case MT7975_DUAL_ADIE: -+ adie_offs[0] = adie_offs_list[ADIE_7975]; -+ eep_offs[0] = NULL; -+ if (adie_id == MT7975_DUAL_ADIE) { -+ adie_offs[1] = adie_offs_list[ADIE_7975]; -+ eep_offs[1] = eep_offs_list[ADIE_7975]; -+ } -+ break; -+ case MT7976_ONE_ADIE_DBDC: -+ case MT7976_ONE_ADIE: -+ case MT7976_DUAL_ADIE: { -+ u16 base = 0, offset = MT_EE_ADIE1_MT7976C_OFFSET; -+ -+ adie_offs[0] = adie_offs_list[ADIE_7976]; -+ eep_offs[0] = NULL; -+ if (adie_id == MT7976_DUAL_ADIE) { -+ adie_offs[1] = adie_offs_list[ADIE_7976]; -+ eep_offs[1] = eep_offs_list[ADIE_7976]; -+ base = MT_EE_ADIE1_BASE_7896; -+ } -+ -+ /* E3 re-bonding workaround */ -+ ret = mt7915_mcu_get_eeprom(dev, offset + base, buf); -+ if (ret) -+ break; -+ offset = (offset + base) % MT7915_EEPROM_BLOCK_SIZE; -+ eeprom[MT_EE_ADIE1_MT7976C_OFFSET] = buf[offset]; -+ offset = (MT_EE_ADIE1_E3_OFFSET + base) % MT7915_EEPROM_BLOCK_SIZE; -+ eeprom[MT_EE_ADIE1_E3_OFFSET] = buf[offset]; -+ break; -+ } -+ default: -+ return -EINVAL; -+ } -+ adie_base[1] = MT_EE_ADIE1_BASE_7896; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ /* ddie */ -+ if (ddie_offs) { -+ u16 ddie_offset; -+ u32 block_num, prev_block_num = -1; -+ -+ for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) { -+ ddie_offset = ddie_offs[i]; -+ block_num = ddie_offset / MT7915_EEPROM_BLOCK_SIZE; -+ -+ if (ddie_offset == MT_EE_END_OFFSET) -+ break; -+ -+ if (prev_block_num != block_num) { -+ ret = mt7915_mcu_get_eeprom(dev, ddie_offset, buf); -+ if (ret) { -+ prev_block_num = -1; -+ continue; -+ } -+ } -+ -+ eeprom[ddie_offset] = buf[ddie_offset % MT7915_EEPROM_BLOCK_SIZE]; -+ prev_block_num = block_num; -+ } -+ } -+ -+ /* adie */ -+ for (band = 0; band < __MT_MAX_BAND; band++) { -+ u16 adie_offset, eep_offset; -+ u32 block_num, prev_block_num = -1; -+ -+ if (!adie_offs[band]) -+ continue; -+ -+ for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) { -+ adie_offset = adie_offs[band][i] + adie_base[band]; -+ eep_offset = adie_offset; -+ if (eep_offs[band]) -+ eep_offset = eep_offs[band][i]; -+ block_num = adie_offset / MT7915_EEPROM_BLOCK_SIZE; -+ -+ if (adie_offs[band][i] == MT_EE_END_OFFSET) -+ break; -+ -+ if (is_mt7915(&dev->mt76) && !adie_id && -+ adie_offset >= 0x8c0 && adie_offset <= 0x8c3) -+ continue; -+ -+ if (prev_block_num != block_num) { -+ ret = mt7915_mcu_get_eeprom(dev, adie_offset, buf); -+ if (ret) { -+ prev_block_num = -1; -+ continue; -+ } -+ } -+ -+ eeprom[eep_offset] = buf[adie_offset % MT7915_EEPROM_BLOCK_SIZE]; -+ prev_block_num = block_num; -+ -+ /* workaround for Harrier */ -+ if (is_mt7915(&dev->mt76) && adie_offset == 0x9a1) -+ eeprom[MT_EE_FREQ_OFFSET] = eeprom[adie_offset]; -+ } -+ } -+ -+ return 0; -+} -+ - int mt7915_eeprom_init(struct mt7915_dev *dev) - { - int ret; -@@ -320,6 +511,10 @@ int mt7915_eeprom_init(struct mt7915_dev *dev) - } - - mt7915_eeprom_load_precal(dev); -+ ret = mt7915_apply_cal_free_data(dev); -+ if (ret) -+ return ret; -+ - mt7915_eeprom_parse_hw_cap(dev, &dev->phy); - memcpy(dev->mphy.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, - ETH_ALEN); -diff --git a/mt7915/eeprom.h b/mt7915/eeprom.h -index 99101f9..70fca0b 100644 ---- a/mt7915/eeprom.h -+++ b/mt7915/eeprom.h -@@ -68,6 +68,8 @@ enum mt7915_eeprom_field { - #define MT_EE_RATE_DELTA_SIGN BIT(6) - #define MT_EE_RATE_DELTA_EN BIT(7) - -+#define MT_EE_ADIE1_BASE_7896 0x1000 -+ - enum mt7915_adie_sku { - MT7976_ONE_ADIE_DBDC = 0x7, - MT7975_ONE_ADIE = 0x8, -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 072185f..1262206 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -2968,6 +2968,7 @@ int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf) - }; - struct mt7915_mcu_eeprom_info *res; - struct sk_buff *skb; -+ bool valid; - int ret; - u8 *buf = read_buf; - -@@ -2978,10 +2979,14 @@ int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf) - return ret; - - res = (struct mt7915_mcu_eeprom_info *)skb->data; -- -- if (!buf) -- buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); -- memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE); -+ valid = !!le32_to_cpu(res->valid); -+ if (valid) { -+ if (!buf) -+ buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); -+ memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE); -+ } else { -+ ret = -EINVAL; -+ } - - dev_kfree_skb(skb); - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 00d2b35..1e5cd94 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -562,6 +562,7 @@ u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id); - - int mt7915_register_device(struct mt7915_dev *dev); - void mt7915_unregister_device(struct mt7915_dev *dev); -+void mt7915_eeprom_rebonding(struct mt7915_dev *dev); - int mt7915_eeprom_init(struct mt7915_dev *dev); - void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, - struct mt7915_phy *phy); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1021-wifi-mt76-mt7915-support-on-off-SW-ACI-through-debug.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1021-wifi-mt76-mt7915-support-on-off-SW-ACI-through-debug.patch deleted file mode 100644 index 59e269015..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1021-wifi-mt76-mt7915-support-on-off-SW-ACI-through-debug.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 43d77d4dd7c55898fea4df333be72e77b5571eab Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Fri, 14 Oct 2022 11:15:13 +0800 -Subject: [PATCH 1021/1053] wifi: mt76: mt7915: support on off SW ACI through - debugfs - -Signed-off-by: Evelyn Tsai ---- - mt76_connac_mcu.h | 1 + - mt7915/mtk_debugfs.c | 21 +++++++++++++++++++++ - 2 files changed, 22 insertions(+) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 109462a..c6a43dd 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1252,6 +1252,7 @@ enum { - MCU_EXT_CMD_RX_STAT_USER_CTRL = 0xb3, - MCU_EXT_CMD_SET_CFG = 0xb7, - MCU_EXT_CMD_EDCCA = 0xba, -+ MCU_EXT_CMD_SWLNA_ACI_CTRL = 0xc0, - MCU_EXT_CMD_CSI_CTRL = 0xc2, - MCU_EXT_CMD_IPI_HIST_SCAN = 0xc5, - }; -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 02e0db3..a433e67 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3770,6 +3770,25 @@ static int mt7915_show_eeprom_mode(struct seq_file *s, void *data) - return 0; - } - -+static int -+mt7915_sw_aci_set(void *data, u64 val) -+{ -+#define SWLNA_ENABLE 6 -+ struct mt7915_dev *dev = data; -+ struct { -+ u32 subcmd; -+ u8 enable; -+ } req = { -+ .subcmd = SWLNA_ENABLE, -+ .enable = (u8) val, -+ }; -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SWLNA_ACI_CTRL), &req, sizeof(req), NULL); -+} -+ -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_sw_aci, NULL, -+ mt7915_sw_aci_set, "%llx\n"); -+ - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - { - struct mt7915_dev *dev = phy->dev; -@@ -3858,6 +3877,8 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - - debugfs_create_devm_seqfile(dev->mt76.dev, "eeprom_mode", dir, - mt7915_show_eeprom_mode); -+ debugfs_create_file("sw_aci", 0600, dir, dev, -+ &fops_sw_aci); - return 0; - } - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1022-wifi-mt76-mt7915-add-bf-backoff-limit-table-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1022-wifi-mt76-mt7915-add-bf-backoff-limit-table-support.patch deleted file mode 100644 index 9030b991a..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1022-wifi-mt76-mt7915-add-bf-backoff-limit-table-support.patch +++ /dev/null @@ -1,597 +0,0 @@ -From ff7ce1171852dedcaec49ea0de398dfea04aaced Mon Sep 17 00:00:00 2001 -From: Shayne Chen -Date: Mon, 5 Dec 2022 18:21:51 +0800 -Subject: [PATCH] wifi: mt76: mt7915: add bf backoff limit table support - -Signed-off-by: Shayne Chen ---- - debugfs.c | 4 +- - eeprom.c | 38 ++++++++-- - mt76.h | 8 +++ - mt7915/debugfs.c | 73 +++++++++++++++++-- - mt7915/init.c | 7 ++ - mt7915/main.c | 6 +- - mt7915/mcu.c | 178 +++++++++++++++++++++++++++++++++++++---------- - mt7915/mcu.h | 6 ++ - mt7915/mt7915.h | 9 ++- - 9 files changed, 275 insertions(+), 54 deletions(-) - -diff --git a/debugfs.c b/debugfs.c -index 1c8328d..a626f7c 100644 ---- a/debugfs.c -+++ b/debugfs.c -@@ -95,9 +95,9 @@ void mt76_seq_puts_array(struct seq_file *file, const char *str, - { - int i; - -- seq_printf(file, "%10s:", str); -+ seq_printf(file, "%16s:", str); - for (i = 0; i < len; i++) -- seq_printf(file, " %2d", val[i]); -+ seq_printf(file, " %4d", val[i]); - seq_puts(file, "\n"); - } - EXPORT_SYMBOL_GPL(mt76_seq_puts_array); -diff --git a/eeprom.c b/eeprom.c -index 9d029c0..aa33e7b 100644 ---- a/eeprom.c -+++ b/eeprom.c -@@ -336,9 +336,10 @@ mt76_apply_array_limit(s8 *pwr, size_t pwr_len, const __be32 *data, - static void - mt76_apply_multi_array_limit(s8 *pwr, size_t pwr_len, s8 pwr_num, - const __be32 *data, size_t len, s8 target_power, -- s8 nss_delta, s8 *max_power) -+ s8 nss_delta) - { - int i, cur; -+ s8 max_power = -128; - - if (!data) - return; -@@ -350,7 +351,7 @@ mt76_apply_multi_array_limit(s8 *pwr, size_t pwr_len, s8 pwr_num, - break; - - mt76_apply_array_limit(pwr + pwr_len * i, pwr_len, data + 1, -- target_power, nss_delta, max_power); -+ target_power, nss_delta, &max_power); - if (--cur > 0) - continue; - -@@ -377,12 +378,16 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy, - char band; - size_t len; - s8 max_power = -127; -+ s8 max_power_backoff = -127; - s8 txs_delta; -+ int n_chains = hweight16(phy->chainmask); -+ s8 target_power_combine = target_power + mt76_tx_power_nss_delta(n_chains); - - if (!mcs_rates) - mcs_rates = 10; - -- memset(dest, target_power, sizeof(*dest)); -+ memset(dest, target_power, sizeof(*dest) - sizeof(dest->path)); -+ memset(&dest->path, 0, sizeof(dest->path)); - - if (!IS_ENABLED(CONFIG_OF)) - return target_power; -@@ -428,12 +433,35 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy, - val = mt76_get_of_array(np, "rates-mcs", &len, mcs_rates + 1); - mt76_apply_multi_array_limit(dest->mcs[0], ARRAY_SIZE(dest->mcs[0]), - ARRAY_SIZE(dest->mcs), val, len, -- target_power, txs_delta, &max_power); -+ target_power, txs_delta); - - val = mt76_get_of_array(np, "rates-ru", &len, ru_rates + 1); - mt76_apply_multi_array_limit(dest->ru[0], ARRAY_SIZE(dest->ru[0]), - ARRAY_SIZE(dest->ru), val, len, -- target_power, txs_delta, &max_power); -+ target_power, txs_delta); -+ -+ max_power_backoff = max_power; -+ val = mt76_get_of_array(np, "paths-cck", &len, ARRAY_SIZE(dest->path.cck)); -+ mt76_apply_array_limit(dest->path.cck, ARRAY_SIZE(dest->path.cck), val, -+ target_power_combine, txs_delta, &max_power_backoff); -+ -+ val = mt76_get_of_array(np, "paths-ofdm", &len, ARRAY_SIZE(dest->path.ofdm)); -+ mt76_apply_array_limit(dest->path.ofdm, ARRAY_SIZE(dest->path.ofdm), val, -+ target_power_combine, txs_delta, &max_power_backoff); -+ -+ val = mt76_get_of_array(np, "paths-ofdm-bf", &len, ARRAY_SIZE(dest->path.ofdm_bf)); -+ mt76_apply_array_limit(dest->path.ofdm_bf, ARRAY_SIZE(dest->path.ofdm_bf), val, -+ target_power_combine, txs_delta, &max_power_backoff); -+ -+ val = mt76_get_of_array(np, "paths-ru", &len, ARRAY_SIZE(dest->path.ru[0]) + 1); -+ mt76_apply_multi_array_limit(dest->path.ru[0], ARRAY_SIZE(dest->path.ru[0]), -+ ARRAY_SIZE(dest->path.ru), val, len, -+ target_power_combine, txs_delta); -+ -+ val = mt76_get_of_array(np, "paths-ru-bf", &len, ARRAY_SIZE(dest->path.ru_bf[0]) + 1); -+ mt76_apply_multi_array_limit(dest->path.ru_bf[0], ARRAY_SIZE(dest->path.ru_bf[0]), -+ ARRAY_SIZE(dest->path.ru_bf), val, len, -+ target_power_combine, txs_delta); - - return max_power; - } -diff --git a/mt76.h b/mt76.h -index 48e98a3..5c26715 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -1089,6 +1089,14 @@ struct mt76_power_limits { - s8 mcs[4][10]; - s8 ru[7][12]; - s8 eht[16][16]; -+ -+ struct { -+ s8 cck[4]; -+ s8 ofdm[4]; -+ s8 ofdm_bf[4]; -+ s8 ru[7][10]; -+ s8 ru_bf[7][10]; -+ } path; - }; - - struct mt76_ethtool_worker_info { -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 5c08910..fa1d2ac 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -1020,7 +1020,7 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf, - if (!buf) - return -ENOMEM; - -- ret = mt7915_mcu_get_txpower_sku(phy, txpwr, sizeof(txpwr)); -+ ret = mt7915_mcu_get_txpower_sku(phy, txpwr, sizeof(txpwr), TX_POWER_INFO_RATE); - if (ret) - goto out; - -@@ -1134,7 +1134,7 @@ mt7915_rate_txpower_set(struct file *file, const char __user *user_buf, - - mutex_lock(&dev->mt76.mutex); - ret = mt7915_mcu_get_txpower_sku(phy, req.txpower_sku, -- sizeof(req.txpower_sku)); -+ sizeof(req.txpower_sku), TX_POWER_INFO_RATE); - if (ret) - goto out; - -@@ -1176,7 +1176,7 @@ out: - return ret ? ret : count; - } - --static const struct file_operations mt7915_rate_txpower_fops = { -+static const struct file_operations mt7915_txpower_fops = { - .write = mt7915_rate_txpower_set, - .read = mt7915_rate_txpower_get, - .open = simple_open, -@@ -1184,6 +1184,69 @@ static const struct file_operations mt7915_rate_txpower_fops = { - .llseek = default_llseek, - }; - -+static int -+mt7915_path_txpower_show(struct seq_file *file) -+{ -+ struct mt7915_phy *phy = file->private; -+ s8 txpower[MT7915_SKU_PATH_NUM], *buf = txpower; -+ int ret; -+ -+#define PATH_POWER_SHOW(_name, _len, _skip) do { \ -+ if (_skip) { \ -+ buf -= 1; \ -+ *buf = 0; \ -+ } \ -+ mt76_seq_puts_array(file, _name, buf, _len); \ -+ buf += _len; \ -+ } while(0) -+ -+ seq_printf(file, "\n%*c", 18, ' '); -+ seq_printf(file, "1T1S/2T1S/3T1S/4T1S/2T2S/3T2S/4T2S/3T3S/4T3S/4T4S\n"); -+ ret = mt7915_mcu_get_txpower_sku(phy, txpower, sizeof(txpower), -+ TX_POWER_INFO_PATH); -+ if (ret) -+ return ret; -+ -+ PATH_POWER_SHOW("CCK", 4, 0); -+ PATH_POWER_SHOW("OFDM", 4, 0); -+ PATH_POWER_SHOW("BF-OFDM", 4, 1); -+ -+ PATH_POWER_SHOW("HT/VHT20", 10, 0); -+ PATH_POWER_SHOW("BF-HT/VHT20", 10, 1); -+ PATH_POWER_SHOW("HT/VHT40", 10, 0); -+ PATH_POWER_SHOW("BF-HT/VHT40", 10, 1); -+ -+ PATH_POWER_SHOW("BW20/RU242", 10, 0); -+ PATH_POWER_SHOW("BF-BW20/RU242", 10, 1); -+ PATH_POWER_SHOW("BW40/RU484", 10, 0); -+ PATH_POWER_SHOW("BF-BW40/RU484", 10, 1); -+ PATH_POWER_SHOW("BW80/RU996", 10, 0); -+ PATH_POWER_SHOW("BF-BW80/RU996", 10, 1); -+ PATH_POWER_SHOW("BW160/RU2x996", 10, 0); -+ PATH_POWER_SHOW("BF-BW160/RU2x996", 10, 1); -+ PATH_POWER_SHOW("RU26", 10, 0); -+ PATH_POWER_SHOW("BF-RU26", 10, 0); -+ PATH_POWER_SHOW("RU52", 10, 0); -+ PATH_POWER_SHOW("BF-RU52", 10, 0); -+ PATH_POWER_SHOW("RU106", 10, 0); -+ PATH_POWER_SHOW("BF-RU106", 10, 0); -+#undef PATH_POWER_SHOW -+ -+ return 0; -+} -+ -+static int -+mt7915_txpower_path_show(struct seq_file *file, void *data) -+{ -+ struct mt7915_phy *phy = file->private; -+ -+ seq_printf(file, "\nBand %d\n", phy != &phy->dev->phy); -+ -+ return mt7915_path_txpower_show(file); -+} -+ -+DEFINE_SHOW_ATTRIBUTE(mt7915_txpower_path); -+ - static int - mt7915_twt_stats(struct seq_file *s, void *data) - { -@@ -1310,7 +1373,9 @@ int mt7915_init_debugfs(struct mt7915_phy *phy) - debugfs_create_file("implicit_txbf", 0600, dir, dev, - &fops_implicit_txbf); - debugfs_create_file("txpower_sku", 0400, dir, phy, -- &mt7915_rate_txpower_fops); -+ &mt7915_txpower_fops); -+ debugfs_create_file("txpower_path", 0400, dir, phy, -+ &mt7915_txpower_path_fops); - debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir, - mt7915_twt_stats); - debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval); -diff --git a/mt7915/init.c b/mt7915/init.c -index 439403f..b32e213 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -284,6 +284,8 @@ static void __mt7915_init_txpower(struct mt7915_phy *phy, - int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band); - struct mt76_power_limits limits; - -+ phy->sku_limit_en = true; -+ phy->sku_path_en = true; - for (i = 0; i < sband->n_channels; i++) { - struct ieee80211_channel *chan = &sband->channels[i]; - u32 target_power = 0; -@@ -300,6 +302,11 @@ static void __mt7915_init_txpower(struct mt7915_phy *phy, - target_power = mt76_get_rate_power_limits(phy->mt76, chan, - &limits, - target_power); -+ -+ /* MT7915N can not enable Backoff table without setting value in dts */ -+ if (!limits.path.ofdm[0]) -+ phy->sku_path_en = false; -+ - target_power += nss_delta; - target_power = DIV_ROUND_UP(target_power, 2); - chan->max_power = min_t(int, chan->max_reg_power, -diff --git a/mt7915/main.c b/mt7915/main.c -index 9fafa16..da7a87b 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -73,11 +73,7 @@ int mt7915_run(struct ieee80211_hw *hw) - if (ret) - goto out; - --#ifdef MTK_DEBUG -- ret = mt7915_mcu_set_sku_en(phy, !dev->dbg.sku_disable); --#else -- ret = mt7915_mcu_set_sku_en(phy, true); --#endif -+ ret = mt7915_mcu_set_sku_en(phy); - if (ret) - goto out; - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 1262206..eb7638b 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -3422,7 +3422,8 @@ int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy, - int ret; - s8 txpower_sku[MT7915_SKU_RATE_NUM]; - -- ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku)); -+ ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku), -+ TX_POWER_INFO_RATE); - if (ret) - return ret; - -@@ -3462,53 +3463,139 @@ int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy, - sizeof(req), true); - } - -+static void -+mt7915_update_txpower(struct mt7915_phy *phy, int tx_power) -+{ -+ struct mt76_phy *mphy = phy->mt76; -+ struct ieee80211_channel *chan = mphy->main_chan; -+ int chain_idx, val, e2p_power_limit = 0; -+ -+ if (chan == NULL) { -+ mphy->txpower_cur = tx_power; -+ return; -+ } -+ -+ for (chain_idx = 0; chain_idx < hweight16(mphy->chainmask); chain_idx++) { -+ val = mt7915_eeprom_get_target_power(phy->dev, chan, chain_idx); -+ val += mt7915_eeprom_get_power_delta(phy->dev, chan->band); -+ -+ e2p_power_limit = max_t(int, e2p_power_limit, val); -+ } -+ -+ if (phy->sku_limit_en) -+ mphy->txpower_cur = min_t(int, e2p_power_limit, tx_power); -+ else -+ mphy->txpower_cur = e2p_power_limit; -+} -+ - int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy) - { -+#define TX_POWER_LIMIT_TABLE_RATE 0 -+#define TX_POWER_LIMIT_TABLE_PATH 1 - struct mt7915_dev *dev = phy->dev; - struct mt76_phy *mphy = phy->mt76; - struct ieee80211_hw *hw = mphy->hw; -- struct mt7915_mcu_txpower_sku req = { -+ struct mt7915_sku_val { -+ u8 format_id; -+ u8 limit_type; -+ u8 band_idx; -+ } __packed hdr = { - .format_id = TX_POWER_LIMIT_TABLE, -+ .limit_type = TX_POWER_LIMIT_TABLE_RATE, - .band_idx = phy->mt76->band_idx, - }; -- struct mt76_power_limits limits_array; -- s8 *la = (s8 *)&limits_array; -- int i, idx; -- int tx_power; -+ int i, ret, tx_power; -+ const u8 *len = mt7915_sku_group_len; -+ struct mt76_power_limits la = {}; -+ struct sk_buff *skb; - - tx_power = mt7915_get_power_bound(phy, hw->conf.power_level); -- tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, -- &limits_array, tx_power); -- mphy->txpower_cur = tx_power; - -- for (i = 0, idx = 0; i < ARRAY_SIZE(mt7915_sku_group_len); i++) { -- u8 mcs_num, len = mt7915_sku_group_len[i]; -- int j; -+ if (phy->sku_limit_en) { -+ tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, -+ &la, tx_power); -+ mt7915_update_txpower(phy, tx_power); -+ } else { -+ mt7915_update_txpower(phy, tx_power); -+ return 0; -+ } - -- if (i >= SKU_HT_BW20 && i <= SKU_VHT_BW160) { -- mcs_num = 10; -+ skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, -+ sizeof(hdr) + MT7915_SKU_RATE_NUM); -+ if (!skb) -+ return -ENOMEM; - -- if (i == SKU_HT_BW20 || i == SKU_VHT_BW20) -- la = (s8 *)&limits_array + 12; -- } else { -- mcs_num = len; -- } -+ skb_put_data(skb, &hdr, sizeof(hdr)); -+ skb_put_data(skb, &la.cck, len[SKU_CCK] + len[SKU_OFDM]); -+ skb_put_data(skb, &la.mcs[0], len[SKU_HT_BW20]); -+ skb_put_data(skb, &la.mcs[1], len[SKU_HT_BW40]); -+ -+ /* vht */ -+ for (i = 0; i < 4; i++) { -+ skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i])); -+ skb_put_zero(skb, 2); /* padding */ -+ } - -- for (j = 0; j < min_t(u8, mcs_num, len); j++) -- req.txpower_sku[idx + j] = la[j]; -+ /* he */ -+ skb_put_data(skb, &la.ru[0], sizeof(la.ru)); - -- la += mcs_num; -- idx += len; -+ ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, -+ MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true); -+ if (ret) -+ return ret; -+ -+ /* only set per-path power table when it's configured */ -+ if (!phy->sku_path_en) -+ return 0; -+ -+ skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, -+ sizeof(hdr) + MT7915_SKU_PATH_NUM); -+ if (!skb) -+ return -ENOMEM; -+ -+ hdr.limit_type = TX_POWER_LIMIT_TABLE_PATH; -+ skb_put_data(skb, &hdr, sizeof(hdr)); -+ skb_put_data(skb, &la.path.cck, sizeof(la.path.cck)); -+ skb_put_data(skb, &la.path.ofdm, sizeof(la.path.ofdm)); -+ skb_put_data(skb, &la.path.ofdm_bf[1], sizeof(la.path.ofdm_bf) - 1); -+ -+ /* HT20 and HT40 */ -+ skb_put_data(skb, &la.path.ru[3], sizeof(la.path.ru[3])); -+ skb_put_data(skb, &la.path.ru_bf[3][1], sizeof(la.path.ru_bf[3]) - 1); -+ skb_put_data(skb, &la.path.ru[4], sizeof(la.path.ru[4])); -+ skb_put_data(skb, &la.path.ru_bf[4][1], sizeof(la.path.ru_bf[4]) - 1); -+ -+ /* start from non-bf and bf fields of -+ * BW20/RU242, BW40/RU484, BW80/RU996, BW160/RU2x996, -+ * RU26, RU52, and RU106 -+ */ -+ -+ for (i = 0; i < 8; i++) { -+ bool bf = i % 2; -+ u8 idx = (i + 6) / 2; -+ s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx]; -+ /* The non-bf fields of RU26 to RU106 are special cases */ -+ if (bf) -+ skb_put_data(skb, buf + 1, 9); -+ else -+ skb_put_data(skb, buf, 10); - } - -- return mt76_mcu_send_msg(&dev->mt76, -- MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, -- sizeof(req), true); -+ for (i = 0; i < 6; i++) { -+ bool bf = i % 2; -+ u8 idx = i / 2; -+ s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx]; -+ -+ skb_put_data(skb, buf, 10); -+ } -+ -+ return mt76_mcu_skb_send_msg(&dev->mt76, skb, -+ MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true); - } - --int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len) -+int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len, -+ u8 category) - { --#define RATE_POWER_INFO 2 - struct mt7915_dev *dev = phy->dev; - struct { - u8 format_id; -@@ -3517,10 +3604,9 @@ int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len) - u8 _rsv; - } __packed req = { - .format_id = TX_POWER_LIMIT_INFO, -- .category = RATE_POWER_INFO, -+ .category = category, - .band_idx = phy->mt76->band_idx, - }; -- s8 txpower_sku[MT7915_SKU_RATE_NUM][2]; - struct sk_buff *skb; - int ret, i; - -@@ -3530,9 +3616,15 @@ int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len) - if (ret) - return ret; - -- memcpy(txpower_sku, skb->data + 4, sizeof(txpower_sku)); -- for (i = 0; i < len; i++) -- txpower[i] = txpower_sku[i][req.band_idx]; -+ if (category == TX_POWER_INFO_RATE) { -+ s8 res[MT7915_SKU_RATE_NUM][2]; -+ -+ memcpy(res, skb->data + 4, sizeof(res)); -+ for (i = 0; i < len; i++) -+ txpower[i] = res[i][req.band_idx]; -+ } else if (category == TX_POWER_INFO_PATH) { -+ memcpy(txpower, skb->data + 4, len); -+ } - - dev_kfree_skb(skb); - -@@ -3561,7 +3653,7 @@ int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, - sizeof(req), false); - } - --int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable) -+int mt7915_mcu_set_sku_en(struct mt7915_phy *phy) - { - struct mt7915_dev *dev = phy->dev; - struct mt7915_sku { -@@ -3572,10 +3664,24 @@ int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable) - } __packed req = { - .format_id = TX_POWER_LIMIT_ENABLE, - .band_idx = phy->mt76->band_idx, -- .sku_enable = enable, - }; -+ int ret, sku_disable = 0; -+ -+#ifdef MTK_DEBUG -+ sku_disable = dev->dbg.sku_disable; -+#endif -+ req.sku_enable = sku_disable ? 0 : phy->sku_limit_en; -+ ret = mt76_mcu_send_msg(&dev->mt76, -+ MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, -+ sizeof(req), true); -+ if (ret) -+ return ret; -+ -+ pr_info("%s: sku enable = %d, path enable = %d\n", __func__, -+ sku_disable ? 0 : phy->sku_limit_en, sku_disable ? 0 : phy->sku_path_en); - -- pr_info("%s: enable = %d\n", __func__, enable); -+ req.sku_enable = sku_disable ? 0 : phy->sku_path_en; -+ req.format_id = TX_POWER_LIMIT_PATH_ENABLE; - - return mt76_mcu_send_msg(&dev->mt76, - MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req, -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 1b0bd06..94eff26 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -517,12 +517,18 @@ enum { - - enum { - TX_POWER_LIMIT_ENABLE, -+ TX_POWER_LIMIT_PATH_ENABLE = 0x3, - TX_POWER_LIMIT_TABLE = 0x4, - TX_POWER_LIMIT_INFO = 0x7, - TX_POWER_LIMIT_FRAME = 0x11, - TX_POWER_LIMIT_FRAME_MIN = 0x12, - }; - -+enum { -+ TX_POWER_INFO_PATH = 1, -+ TX_POWER_INFO_RATE, -+}; -+ - enum { - SPR_ENABLE = 0x1, - SPR_ENABLE_SD = 0x3, -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 1e5cd94..826682b 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -72,6 +72,7 @@ - #define MT7915_CDEV_THROTTLE_MAX 99 - - #define MT7915_SKU_RATE_NUM 161 -+#define MT7915_SKU_PATH_NUM 185 - - #define MT7915_MAX_TWT_AGRT 16 - #define MT7915_MAX_STA_TWT_AGRT 8 -@@ -300,6 +301,9 @@ struct mt7915_phy { - struct list_head stats_list; - spinlock_t stats_lock; - -+ bool sku_limit_en; -+ bool sku_path_en; -+ - #ifdef CONFIG_NL80211_TESTMODE - struct { - u32 *reg_backup; -@@ -626,9 +630,10 @@ int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable, - int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, - u8 en); - int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); --int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); -+int mt7915_mcu_set_sku_en(struct mt7915_phy *phy); - int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy); --int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len); -+int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len, -+ u8 category); - int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower); - int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy, - struct ieee80211_vif *vif, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1023-wifi-mt76-mt7915-amsdu-set-and-get-control.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1023-wifi-mt76-mt7915-amsdu-set-and-get-control.patch deleted file mode 100644 index 3bad2596a..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1023-wifi-mt76-mt7915-amsdu-set-and-get-control.patch +++ /dev/null @@ -1,139 +0,0 @@ -From 568ebf749e43bade66a39a223a53918db8d71edf Mon Sep 17 00:00:00 2001 -From: TomLiu -Date: Wed, 14 Dec 2022 00:44:07 -0800 -Subject: [PATCH 1023/1053] wifi: mt76: mt7915: amsdu set and get control - ---- - mt7915/mac.c | 7 +++++++ - mt7915/mt7915.h | 1 + - mt7915/vendor.c | 30 ++++++++++++++++++++++++++++++ - mt7915/vendor.h | 12 ++++++++++++ - 4 files changed, 50 insertions(+) - -diff --git a/mt7915/mac.c b/mt7915/mac.c -index d94a0d5..1e39ad2 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -2035,6 +2035,13 @@ static void mt7915_mac_sta_stats_work(struct mt7915_phy *phy) - spin_unlock_bh(&phy->stats_lock); - } - -+void mt7915_set_wireless_amsdu(struct ieee80211_hw *hw, u8 en) { -+ if (en) -+ ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); -+ else -+ ieee80211_hw_clear(hw, SUPPORTS_AMSDU_IN_AMPDU); -+} -+ - #ifdef CONFIG_MTK_VENDOR - void mt7915_capi_sta_rc_work(void *data, struct ieee80211_sta *sta) - { -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 826682b..fe7c211 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -758,6 +758,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, - bool pci, int *irq); - - #ifdef CONFIG_MTK_VENDOR -+void mt7915_set_wireless_amsdu(struct ieee80211_hw *hw, u8 en); - void mt7915_capi_sta_rc_work(void *data, struct ieee80211_sta *sta); - void mt7915_set_wireless_vif(void *data, u8 *mac, struct ieee80211_vif *vif); - void mt7915_mcu_set_rfeature_starec(void *data, struct mt7915_dev *dev, -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index a21cbce..e25a0ce 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -31,10 +31,16 @@ wireless_ctrl_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL] = { - [MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA] = {.type = NLA_U8 }, - [MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO] = {.type = NLA_U8 }, - [MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE] = {.type = NLA_U16 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU] = {.type = NLA_U8 }, - [MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA] = {.type = NLA_U8 }, - [MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT] = {.type = NLA_U8 }, - }; - -+static const struct nla_policy -+wireless_dump_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_DUMP] = { -+ [MTK_VENDOR_ATTR_WIRELESS_DUMP_AMSDU] = { .type = NLA_U8 }, -+}; -+ - static const struct nla_policy - mu_ctrl_policy[NUM_MTK_VENDOR_ATTRS_MU_CTRL] = { - [MTK_VENDOR_ATTR_MU_CTRL_ONOFF] = {.type = NLA_U8 }, -@@ -1004,11 +1010,34 @@ static int mt7915_vendor_wireless_ctrl(struct wiphy *wiphy, - val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT]); - mt7915_mcu_set_cfg(phy, CFGINFO_CERT_CFG, val8); /* Cert Enable for OMI */ - mt7915_mcu_set_bypass_smthint(phy, val8); /* Cert bypass smooth interpolation */ -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU]); -+ mt7915_set_wireless_amsdu(hw, val8); - } - - return 0; - } - -+static int -+mt7915_vendor_wireless_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ int len = 0; -+ -+ if (*storage == 1) -+ return -ENOENT; -+ *storage = 1; -+ -+ if (nla_put_u8(skb, -+ MTK_VENDOR_ATTR_WIRELESS_DUMP_AMSDU, ieee80211_hw_check(hw, SUPPORTS_AMSDU_IN_AMPDU))) -+ return -ENOMEM; -+ len += 2; -+ -+ return len; -+} -+ - static int mt7915_vendor_mu_ctrl(struct wiphy *wiphy, - struct wireless_dev *wdev, - const void *data, -@@ -1307,6 +1336,7 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | - WIPHY_VENDOR_CMD_NEED_RUNNING, - .doit = mt7915_vendor_wireless_ctrl, -+ .dumpit = mt7915_vendor_wireless_ctrl_dump, - .policy = wireless_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX, - }, -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 876edf3..7c4e914 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -75,6 +75,7 @@ enum mtk_vendor_attr_wireless_ctrl { - MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA, - MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE, - MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU, - MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT = 9, - - MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA, /* reserve */ -@@ -84,6 +85,17 @@ enum mtk_vendor_attr_wireless_ctrl { - NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL - 1 - }; - -+enum mtk_vendor_attr_wireless_dump { -+ MTK_VENDOR_ATTR_WIRELESS_DUMP_UNSPEC, -+ -+ MTK_VENDOR_ATTR_WIRELESS_DUMP_AMSDU, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_WIRELESS_DUMP, -+ MTK_VENDOR_ATTR_WIRELESS_DUMP_MAX = -+ NUM_MTK_VENDOR_ATTRS_WIRELESS_DUMP - 1 -+}; -+ - enum mtk_vendor_attr_mu_ctrl { - MTK_VENDOR_ATTR_MU_CTRL_UNSPEC, - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1024-wifi-mt76-mt7915-Add-vendor-command-attribute-for-RT.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1024-wifi-mt76-mt7915-Add-vendor-command-attribute-for-RT.patch deleted file mode 100644 index 94d7b0e8b..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1024-wifi-mt76-mt7915-Add-vendor-command-attribute-for-RT.patch +++ /dev/null @@ -1,100 +0,0 @@ -From b6063c3c2566911919194c88cb9b68e68596d994 Mon Sep 17 00:00:00 2001 -From: "himanshu.goyal" -Date: Tue, 24 Jan 2023 14:32:08 +0800 -Subject: [PATCH 1024/1053] wifi: mt76: mt7915: Add vendor command attribute - for RTS BW signaling. - -Signed-off-by: himanshu.goyal ---- - mt7915/mcu.c | 6 ++++++ - mt7915/mcu.h | 9 +++++++++ - mt7915/vendor.c | 4 ++++ - mt7915/vendor.h | 1 + - 4 files changed, 20 insertions(+) - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index eb7638b..8e9b801 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -4863,6 +4863,12 @@ int mt7915_mcu_set_cfg(struct mt7915_phy *phy, u8 cfg_info, u8 type) - req.cert.length = cpu_to_le16(tlv_len); - req.cert.cert_program = type; - break; -+ case CFGINFO_RTS_SIGTA_EN_FEATURE: -+ tlv_len = sizeof(struct rts_sigta_cfg); -+ req.rts_sigta.tag = cpu_to_le16(cfg_info); -+ req.rts_sigta.length = cpu_to_le16(tlv_len); -+ req.rts_sigta.enable = type ? 1: 0; -+ break; - case CFGINFO_3WIRE_EN_CFG: - tlv_len = sizeof(struct three_wire_cfg); - req.three_wire.tag = cpu_to_le16(cfg_info); -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 94eff26..6ebcce0 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -936,6 +936,13 @@ struct three_wire_cfg { - u8 rsv[3]; - } __packed; - -+struct rts_sigta_cfg { -+ __le16 tag; -+ __le16 length; -+ bool enable; /* 0: Disable, 1: Enable */ -+ u8 rsv[3]; -+} __packed; -+ - struct cfg_basic_info { - u8 dbdc_idx; - u8 rsv[3]; -@@ -943,11 +950,13 @@ struct cfg_basic_info { - union { - struct cert_cfg cert; - struct three_wire_cfg three_wire; -+ struct rts_sigta_cfg rts_sigta; - }; - } __packed; - - enum { - CFGINFO_CERT_CFG = 4, -+ CFGINFO_RTS_SIGTA_EN_FEATURE = 7, - CFGINFO_3WIRE_EN_CFG = 10, - }; - -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index e25a0ce..8370216 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -34,6 +34,7 @@ wireless_ctrl_policy[NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL] = { - [MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU] = {.type = NLA_U8 }, - [MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA] = {.type = NLA_U8 }, - [MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA] = {.type = NLA_U8 }, - }; - - static const struct nla_policy -@@ -1013,6 +1014,9 @@ static int mt7915_vendor_wireless_ctrl(struct wiphy *wiphy, - } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU]) { - val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU]); - mt7915_set_wireless_amsdu(hw, val8); -+ } else if (tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA]); -+ mt7915_mcu_set_cfg(phy, CFGINFO_RTS_SIGTA_EN_FEATURE, val8); - } - - return 0; -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 7c4e914..3672420 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -77,6 +77,7 @@ enum mtk_vendor_attr_wireless_ctrl { - MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO, - MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU, - MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT = 9, -+ MTK_VENDOR_ATTR_WIRELESS_CTRL_RTS_SIGTA, - - MTK_VENDOR_ATTR_WIRELESS_CTRL_MU_EDCA, /* reserve */ - /* keep last */ --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1025-wifi-mt76-mt7915-add-vendor-cmd-to-get-available-col.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1025-wifi-mt76-mt7915-add-vendor-cmd-to-get-available-col.patch deleted file mode 100644 index df92c1abe..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1025-wifi-mt76-mt7915-add-vendor-cmd-to-get-available-col.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 9981c906450cc4758d975b98f89ff62a64529be6 Mon Sep 17 00:00:00 2001 -From: Yi-Chia Hsieh -Date: Thu, 26 Jan 2023 08:50:47 +0800 -Subject: [PATCH 1025/1053] wifi: mt76: mt7915: add vendor cmd to get available - color bitmap - -Add a vendor cmd to notify user space available color bitmap. -The OBSS BSS color bitmap is maintained in mac80211, so mt76 will make use of that. - -Signed-off-by: Yi-Chia Hsieh ---- - mt7915/vendor.c | 37 +++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 11 +++++++++++ - 2 files changed, 48 insertions(+) - -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 8370216..9a26f7f 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -99,6 +99,11 @@ ibf_ctrl_policy[NUM_MTK_VENDOR_ATTRS_IBF_CTRL] = { - [MTK_VENDOR_ATTR_IBF_CTRL_ENABLE] = { .type = NLA_U8 }, - }; - -+static struct nla_policy -+bss_color_ctrl_policy[NUM_MTK_VENDOR_ATTRS_BSS_COLOR_CTRL] = { -+ [MTK_VENDOR_ATTR_AVAL_BSS_COLOR_BMP] = { .type = NLA_U64 }, -+}; -+ - struct csi_null_tone { - u8 start; - u8 end; -@@ -1295,6 +1300,27 @@ mt7915_vendor_ibf_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, - return 1; - } - -+static int -+mt7915_vendor_bss_color_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, -+ struct sk_buff *skb, const void *data, int data_len, -+ unsigned long *storage) -+{ -+ struct ieee80211_vif *vif = wdev_to_ieee80211_vif(wdev); -+ struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; -+ int len = 0; -+ -+ if (*storage == 1) -+ return -ENOENT; -+ *storage = 1; -+ -+ if (nla_put_u64_64bit(skb, -+ MTK_VENDOR_ATTR_AVAL_BSS_COLOR_BMP, -+ ~bss_conf->used_color_bitmap, NL80211_ATTR_PAD)) -+ return -ENOMEM; -+ len += 1; -+ -+ return len; -+} - - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { -@@ -1401,6 +1427,17 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .dumpit = mt7915_vendor_ibf_ctrl_dump, - .policy = ibf_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_IBF_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_BSS_COLOR_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .dumpit = mt7915_vendor_bss_color_ctrl_dump, -+ .policy = bss_color_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_BSS_COLOR_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 3672420..bd1c617 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -15,6 +15,7 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7, - MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8, - MTK_NL80211_VENDOR_SUBCMD_IBF_CTRL = 0xc9, -+ MTK_NL80211_VENDOR_SUBCMD_BSS_COLOR_CTRL = 0xca, - }; - - -@@ -261,4 +262,14 @@ enum mtk_vendor_attr_ibf_dump { - NUM_MTK_VENDOR_ATTRS_IBF_DUMP - 1 - }; - -+enum mtk_vendor_attr_bss_color_ctrl { -+ MTK_VENDOR_ATTR_BSS_COLOR_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_AVAL_BSS_COLOR_BMP, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_BSS_COLOR_CTRL, -+ MTK_VENDOR_ATTR_BSS_COLOR_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_BSS_COLOR_CTRL - 1 -+}; - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1026-wifi-mt76-mt7915-disable-SW-ACI-by-default.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1026-wifi-mt76-mt7915-disable-SW-ACI-by-default.patch deleted file mode 100644 index a6b71d541..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1026-wifi-mt76-mt7915-disable-SW-ACI-by-default.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 0df14b3d2578681009ca9be604e98bb94ee1186a Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Fri, 24 Feb 2023 16:29:42 +0800 -Subject: [PATCH] wifi: mt76: mt7915: disable SW-ACI by default - -Support to enable/disable SW-ACI by module parameter "sw_aci_enable". -SW-ACI feature is disable by default. ---- - mt7915/main.c | 8 ++++++++ - mt7915/mcu.c | 15 +++++++++++++++ - mt7915/mt7915.h | 1 + - mt7915/mtk_debugfs.c | 14 +++++--------- - 4 files changed, 29 insertions(+), 9 deletions(-) - -diff --git a/mt7915/main.c b/mt7915/main.c -index b80d6fd..2ff7667 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -8,6 +8,10 @@ - #include "mt7915.h" - #include "mcu.h" - -+static bool sw_aci_enable = false; -+module_param(sw_aci_enable, bool, 0644); -+MODULE_PARM_DESC(sw_aci_enable, "Enable the feature of Adjacent Channel Interference Detection"); -+ - static bool mt7915_dev_running(struct mt7915_dev *dev) - { - struct mt7915_phy *phy; -@@ -41,6 +45,10 @@ int mt7915_run(struct ieee80211_hw *hw) - goto out; - - mt7915_mac_enable_nf(dev, dev->phy.mt76->band_idx); -+ -+ ret = mt7915_mcu_sw_aci_set(dev, sw_aci_enable); -+ if (ret) -+ goto out; - } - - if (phy != &dev->phy) { -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 5534603..e95a5d7 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -5223,6 +5223,21 @@ int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value) - return 0; - } - -+int mt7915_mcu_sw_aci_set(struct mt7915_dev *dev, bool val) -+{ -+#define SWLNA_ENABLE 6 -+ struct { -+ u32 subcmd; -+ u8 enable; -+ } req = { -+ .subcmd = SWLNA_ENABLE, -+ .enable = val ? 1 : 0, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SWLNA_ACI_CTRL), &req, -+ sizeof(req), NULL); -+} -+ - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) - { - #define IP_DSCP_NUM 64 -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 9e7183c..c8b697c 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -783,6 +783,7 @@ int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, - #endif - int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation); - int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value); -+int mt7915_mcu_sw_aci_set(struct mt7915_dev *dev, bool val); - int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp); - int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp); - -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 8f2f496..ad7abda 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3773,16 +3773,12 @@ static int mt7915_show_eeprom_mode(struct seq_file *s, void *data) - static int - mt7915_sw_aci_set(void *data, u64 val) - { --#define SWLNA_ENABLE 6 - struct mt7915_dev *dev = data; -- struct { -- u32 subcmd; -- u8 enable; -- } req = { -- .subcmd = SWLNA_ENABLE, -- .enable = (u8) val, -- }; -- return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SWLNA_ACI_CTRL), &req, sizeof(req), NULL); -+ -+ if (val > 1) -+ return -EINVAL; -+ -+ return mt7915_mcu_sw_aci_set(dev, !!val); - } - - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1027-wifi-mt76-mt7915-add-muru-user-number-debug-command.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1027-wifi-mt76-mt7915-add-muru-user-number-debug-command.patch deleted file mode 100644 index 85afdcb9c..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1027-wifi-mt76-mt7915-add-muru-user-number-debug-command.patch +++ /dev/null @@ -1,82 +0,0 @@ -From ed2035d25794352ca10f4cdc04dd931b1ebfac50 Mon Sep 17 00:00:00 2001 -From: MeiChia Chiu -Date: Thu, 27 Apr 2023 15:37:33 +0800 -Subject: [PATCH 1027/1053] wifi: mt76: mt7915: add muru user number debug - command - ---- - mt7915/mt7915.h | 1 + - mt7915/vendor.c | 15 ++++++++++++++- - mt7915/vendor.h | 2 ++ - 3 files changed, 17 insertions(+), 1 deletion(-) - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 44dd0f4..e5a201c 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -645,6 +645,7 @@ int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev, - int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, - const struct mt7915_dfs_pattern *pattern); - int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val); -+int mt7915_set_muru_cfg(struct mt7915_phy *phy, u8 mode, u8 val); - int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev); - int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy); - int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch); -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 9a26f7f..432d750 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -46,6 +46,8 @@ static const struct nla_policy - mu_ctrl_policy[NUM_MTK_VENDOR_ATTRS_MU_CTRL] = { - [MTK_VENDOR_ATTR_MU_CTRL_ONOFF] = {.type = NLA_U8 }, - [MTK_VENDOR_ATTR_MU_CTRL_DUMP] = {.type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_MU_CTRL_OFDMA_MODE] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_MU_CTRL_OFDMA_VAL] { .type = NLA_U8 }, - }; - - static const struct nla_policy -@@ -1053,9 +1055,10 @@ static int mt7915_vendor_mu_ctrl(struct wiphy *wiphy, - int data_len) - { - struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); - struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_MU_CTRL]; - int err; -- u8 val8; -+ u8 val8, mode; - u32 val32 = 0; - - err = nla_parse(tb, MTK_VENDOR_ATTR_MU_CTRL_MAX, data, data_len, -@@ -1069,6 +1072,16 @@ static int mt7915_vendor_mu_ctrl(struct wiphy *wiphy, - FIELD_PREP(RATE_CFG_VAL, val8); - ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL, - mt7915_set_wireless_vif, &val32); -+ } else if (tb[MTK_VENDOR_ATTR_MU_CTRL_OFDMA_MODE]) { -+ mode = nla_get_u8(tb[MTK_VENDOR_ATTR_MU_CTRL_OFDMA_MODE]); -+ -+ if (!tb[MTK_VENDOR_ATTR_MU_CTRL_OFDMA_VAL]) -+ return -EINVAL; -+ -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_MU_CTRL_OFDMA_VAL]); -+ err = mt7915_set_muru_cfg(phy, mode, val8); -+ if (err) -+ return err; - } - - return 0; -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index bd1c617..03d1660 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -103,6 +103,8 @@ enum mtk_vendor_attr_mu_ctrl { - - MTK_VENDOR_ATTR_MU_CTRL_ONOFF, - MTK_VENDOR_ATTR_MU_CTRL_DUMP, -+ MTK_VENDOR_ATTR_MU_CTRL_OFDMA_MODE, -+ MTK_VENDOR_ATTR_MU_CTRL_OFDMA_VAL, - - /* keep last */ - NUM_MTK_VENDOR_ATTRS_MU_CTRL, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1028-wifi-mt76-mt7915-add-debugfs-for-fw-coredump.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1028-wifi-mt76-mt7915-add-debugfs-for-fw-coredump.patch deleted file mode 100644 index 480d7c676..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1028-wifi-mt76-mt7915-add-debugfs-for-fw-coredump.patch +++ /dev/null @@ -1,173 +0,0 @@ -From 1eedf84cfc86e9b6e9de78509e85789025b1b3ac Mon Sep 17 00:00:00 2001 -From: Bo Jiao -Date: Mon, 22 May 2023 15:30:21 +0800 -Subject: [PATCH 1028/1053] wifi: mt76: mt7915: add debugfs for fw coredump. - -Signed-off-by: Bo Jiao ---- - mt7915/debugfs.c | 22 +++++++++++++++++----- - mt7915/mac.c | 30 +++++++++++++++++++++++++++--- - mt7915/mcu.h | 6 +++++- - mt7915/mt7915.h | 9 +++++++++ - 4 files changed, 58 insertions(+), 9 deletions(-) - -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index fa1d2ac..3044557 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -82,8 +82,10 @@ mt7915_sys_recovery_set(struct file *file, const char __user *user_buf, - * 4: trigger & enable system error L3 tx abort - * 5: trigger & enable system error L3 tx disable. - * 6: trigger & enable system error L3 bf recovery. -- * 7: trigger & enable system error full recovery. -- * 8: trigger firmware crash. -+ * 8: trigger & enable system error full recovery. -+ * 9: trigger firmware crash. -+ * 10: trigger grab wa firmware coredump. -+ * 11: trigger grab wm firmware coredump. - */ - case SER_QUERY: - ret = mt7915_mcu_set_ser(dev, 0, 0, band); -@@ -108,7 +110,7 @@ mt7915_sys_recovery_set(struct file *file, const char __user *user_buf, - if (ret) - return ret; - -- dev->recovery.state |= MT_MCU_CMD_WDT_MASK; -+ dev->recovery.state |= MT_MCU_CMD_WM_WDT; - mt7915_reset(dev); - break; - -@@ -117,6 +119,12 @@ mt7915_sys_recovery_set(struct file *file, const char __user *user_buf, - mt76_wr(dev, MT_MCU_WM_CIRQ_EINT_MASK_CLR_ADDR, BIT(18)); - mt76_wr(dev, MT_MCU_WM_CIRQ_EINT_SOFT_ADDR, BIT(18)); - break; -+ -+ case SER_SET_FW_COREDUMP_WA: -+ mt7915_coredump(dev, MT7915_COREDUMP_MANUAL_WA); -+ break; -+ case SER_SET_FW_COREDUMP_WM: -+ mt7915_coredump(dev, MT7915_COREDUMP_MANUAL_WM); - default: - break; - } -@@ -157,9 +165,13 @@ mt7915_sys_recovery_get(struct file *file, char __user *user_buf, - desc += scnprintf(buff + desc, bufsz - desc, - "6: trigger system error L3 bf recovery\n"); - desc += scnprintf(buff + desc, bufsz - desc, -- "7: trigger system error full recovery\n"); -+ "8: trigger system error full recovery\n"); -+ desc += scnprintf(buff + desc, bufsz - desc, -+ "9: trigger firmware crash\n"); -+ desc += scnprintf(buff + desc, bufsz - desc, -+ "10: trigger grab wa firmware coredump\n"); - desc += scnprintf(buff + desc, bufsz - desc, -- "8: trigger firmware crash\n"); -+ "11: trigger grab wm firmware coredump\n"); - - /* SER statistics */ - desc += scnprintf(buff + desc, bufsz - desc, -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 1e39ad2..14367fd 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1728,10 +1728,34 @@ void mt7915_mac_dump_work(struct work_struct *work) - - dev = container_of(work, struct mt7915_dev, dump_work); - -- if (READ_ONCE(dev->recovery.state) & MT_MCU_CMD_WM_WDT) -+ if (dev->dump_state == MT7915_COREDUMP_MANUAL_WA || -+ READ_ONCE(dev->recovery.state) & MT_MCU_CMD_WA_WDT) -+ mt7915_mac_fw_coredump(dev, MT76_RAM_TYPE_WA); -+ -+ if (dev->dump_state == MT7915_COREDUMP_MANUAL_WM || -+ READ_ONCE(dev->recovery.state) & MT_MCU_CMD_WM_WDT) - mt7915_mac_fw_coredump(dev, MT76_RAM_TYPE_WM); - -- queue_work(dev->mt76.wq, &dev->reset_work); -+ if (READ_ONCE(dev->recovery.state) & MT_MCU_CMD_WDT_MASK) -+ queue_work(dev->mt76.wq, &dev->reset_work); -+ -+ dev->dump_state = MT7915_COREDUMP_IDLE; -+} -+ -+void mt7915_coredump(struct mt7915_dev *dev, u8 state) -+{ -+ if (state == MT7915_COREDUMP_IDLE || -+ state > MT7915_COREDUMP_AUTO) -+ return; -+ -+ if (dev->dump_state != MT7915_COREDUMP_IDLE) -+ return; -+ -+ dev->dump_state = state; -+ dev_info(dev->mt76.dev, "%s attempting grab coredump\n", -+ wiphy_name(dev->mt76.hw->wiphy)); -+ -+ queue_work(dev->mt76.wq, &dev->dump_work); - } - - void mt7915_reset(struct mt7915_dev *dev) -@@ -1750,7 +1774,7 @@ void mt7915_reset(struct mt7915_dev *dev) - wiphy_name(dev->mt76.hw->wiphy)); - - mt7915_irq_disable(dev, MT_INT_MCU_CMD); -- queue_work(dev->mt76.wq, &dev->dump_work); -+ mt7915_coredump(dev, MT7915_COREDUMP_AUTO); - return; - } - -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 6ebcce0..035ad97 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -760,8 +760,12 @@ enum { - SER_SET_RECOVER_L3_TX_ABORT, - SER_SET_RECOVER_L3_TX_DISABLE, - SER_SET_RECOVER_L3_BF, -- SER_SET_RECOVER_FULL, -+ SER_SET_RECOVER_FULL = 8, -+ /* fw assert */ - SER_SET_SYSTEM_ASSERT, -+ /* coredump */ -+ SER_SET_FW_COREDUMP_WA, -+ SER_SET_FW_COREDUMP_WM, - /* action */ - SER_ENABLE = 2, - SER_RECOVER -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index e5a201c..ea91611 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -91,6 +91,13 @@ struct mt7915_sta; - struct mt7915_dfs_pulse; - struct mt7915_dfs_pattern; - -+enum mt7915_coredump_state { -+ MT7915_COREDUMP_IDLE = 0, -+ MT7915_COREDUMP_MANUAL_WA, -+ MT7915_COREDUMP_MANUAL_WM, -+ MT7915_COREDUMP_AUTO, -+}; -+ - enum mt7915_txq_id { - MT7915_TXQ_FWDL = 16, - MT7915_TXQ_MCU_WM, -@@ -387,6 +394,7 @@ struct mt7915_dev { - - /* protects coredump data */ - struct mutex dump_mutex; -+ u8 dump_state; - #ifdef CONFIG_DEV_COREDUMP - struct { - struct mt7915_crash_data *crash_data[__MT76_RAM_TYPE_MAX]; -@@ -583,6 +591,7 @@ int mt7915_txbf_init(struct mt7915_dev *dev); - void mt7915_init_txpower(struct mt7915_phy *phy); - int mt7915_init_vif(struct mt7915_phy *phy, struct ieee80211_vif *vif, bool bf_en); - void mt7915_reset(struct mt7915_dev *dev); -+void mt7915_coredump(struct mt7915_dev *dev, u8 state); - int mt7915_run(struct ieee80211_hw *hw); - int mt7915_mcu_init(struct mt7915_dev *dev); - int mt7915_mcu_init_firmware(struct mt7915_dev *dev); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1029-wifi-mt76-mt7915-remove-BW160-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1029-wifi-mt76-mt7915-remove-BW160-support.patch deleted file mode 100644 index 12435fbb5..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1029-wifi-mt76-mt7915-remove-BW160-support.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 42cbeac3362b0d1ca2c513b4bcb850a73afafb94 Mon Sep 17 00:00:00 2001 -From: MeiChia Chiu -Date: Wed, 24 May 2023 22:35:54 +0800 -Subject: [PATCH 1029/1053] wifi: mt76: mt7915: remove BW160 support - -Remove BW160 capability in mt7915. ---- - mt7915/init.c | 26 ++++++-------------------- - 1 file changed, 6 insertions(+), 20 deletions(-) - -diff --git a/mt7915/init.c b/mt7915/init.c -index b32e213..decccc0 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -439,11 +439,6 @@ mt7915_init_wiphy(struct mt7915_phy *phy) - vht_cap->cap |= - IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 | - IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; -- -- if (!dev->dbdc_support) -- vht_cap->cap |= -- IEEE80211_VHT_CAP_SHORT_GI_160 | -- FIELD_PREP(IEEE80211_VHT_CAP_EXT_NSS_BW_MASK, 1); - } else { - phy->mt76->sband_5g.sband.ht_cap.ampdu_density = - IEEE80211_HT_MPDU_DENSITY_2; -@@ -899,13 +894,9 @@ mt7915_set_stream_he_txbf_caps(struct mt7915_phy *phy, - int sts = hweight8(phy->mt76->chainmask); - u8 c, sts_160 = sts; - -- /* Can do 1/2 of STS in 160Mhz mode for mt7915 */ -- if (is_mt7915(&dev->mt76)) { -- if (!dev->dbdc_support) -- sts_160 /= 2; -- else -- sts_160 = 0; -- } -+ /* mt7915 doesn't support bw160 */ -+ if (is_mt7915(&dev->mt76)) -+ sts_160 = 0; - - #ifdef CONFIG_MAC80211_MESH - if (vif == NL80211_IFTYPE_MESH_POINT) -@@ -989,15 +980,10 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, - int i, idx = 0, nss = hweight8(phy->mt76->antenna_mask); - u16 mcs_map = 0; - u16 mcs_map_160 = 0; -- u8 nss_160; -+ u8 nss_160 = nss; - -- if (!is_mt7915(&dev->mt76)) -- nss_160 = nss; -- else if (!dev->dbdc_support) -- /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */ -- nss_160 = nss / 2; -- else -- /* Can't do 160MHz with mt7915 dbdc */ -+ /* Can't do 160MHz with mt7915 */ -+ if (is_mt7915(&dev->mt76)) - nss_160 = 0; - - for (i = 0; i < 8; i++) { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1030-wifi-mt76-mt7915-add-txpower-info-dump-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1030-wifi-mt76-mt7915-add-txpower-info-dump-support.patch deleted file mode 100644 index 20c8bd33f..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1030-wifi-mt76-mt7915-add-txpower-info-dump-support.patch +++ /dev/null @@ -1,147 +0,0 @@ -From cc213fc945f430c8767ee6984741c3cf9a030d9c Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Tue, 11 Jul 2023 17:06:04 +0800 -Subject: [PATCH 1030/1053] wifi: mt76: mt7915: add txpower info dump support - -Signed-off-by: StanleyYP Wang ---- - mt7915/debugfs.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++++ - mt7915/mcu.c | 2 ++ - mt7915/mcu.h | 3 +- - 3 files changed, 91 insertions(+), 1 deletion(-) - -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 3044557..24e88f7 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -1259,6 +1259,91 @@ mt7915_txpower_path_show(struct seq_file *file, void *data) - - DEFINE_SHOW_ATTRIBUTE(mt7915_txpower_path); - -+static int -+mt7915_txpower_info_show(struct seq_file *file, void *data) -+{ -+ struct mt7915_phy *phy = file->private; -+ struct { -+ u8 category; -+ u8 rsv1; -+ -+ /* basic info */ -+ u8 band_idx; -+ u8 band; -+ -+ /* board type info */ -+ bool is_epa; -+ bool is_elna; -+ -+ /* power percentage info */ -+ bool percentage_ctrl_enable; -+ s8 power_drop_level; -+ -+ /* frond-end loss TX info */ -+ s8 front_end_loss_tx[4]; -+ -+ /* frond-end loss RX info */ -+ s8 front_end_loss_rx[4]; -+ -+ /* thermal info */ -+ bool thermal_compensate_enable; -+ s8 thermal_compensate_value; -+ u8 rsv2; -+ -+ /* TX power max/min limit info */ -+ s8 max_power_bound; -+ s8 min_power_bound; -+ -+ /* power limit info */ -+ bool sku_enable; -+ bool bf_backoff_enable; -+ -+ /* MU TX power info */ -+ bool mu_tx_power_manual_enable; -+ s8 mu_tx_power_auto; -+ s8 mu_tx_power_manual; -+ u8 rsv3; -+ } __packed basic_info = {}; -+ int ret; -+ -+ ret = mt7915_mcu_get_txpower_sku(phy, (s8 *)&basic_info, sizeof(basic_info), -+ TX_POWER_INFO_BASIC); -+ if (ret || basic_info.category != TX_POWER_INFO_BASIC) -+ goto out; -+ -+ seq_puts(file, "======================== BASIC INFO ========================\n"); -+ seq_printf(file, " Band Index: %d, Channel Band: %d\n", -+ basic_info.band_idx, basic_info.band); -+ seq_printf(file, " PA Type: %s\n", basic_info.is_epa ? "ePA" : "iPA"); -+ seq_printf(file, " LNA Type: %s\n", basic_info.is_elna ? "eLNA" : "iLNA"); -+ seq_puts(file, "------------------------------------------------------------\n"); -+ seq_printf(file, " SKU: %s\n", basic_info.sku_enable ? "enable" : "disable"); -+ seq_printf(file, " Percentage Control: %s\n", -+ basic_info.percentage_ctrl_enable ? "enable" : "disable"); -+ seq_printf(file, " Power Drop: %d [dBm]\n", basic_info.power_drop_level >> 1); -+ seq_printf(file, " Backoff: %s\n", -+ basic_info.bf_backoff_enable ? "enable" : "disable"); -+ seq_printf(file, " TX Front-end Loss: %d, %d, %d, %d\n", -+ basic_info.front_end_loss_tx[0], basic_info.front_end_loss_tx[1], -+ basic_info.front_end_loss_tx[2], basic_info.front_end_loss_tx[3]); -+ seq_printf(file, " RX Front-end Loss: %d, %d, %d, %d\n", -+ basic_info.front_end_loss_rx[0], basic_info.front_end_loss_rx[1], -+ basic_info.front_end_loss_rx[2], basic_info.front_end_loss_rx[3]); -+ seq_printf(file, " MU TX Power Mode: %s\n", -+ basic_info.mu_tx_power_manual_enable ? "manual" : "auto"); -+ seq_printf(file, " MU TX Power (Auto / Manual): %d / %d [0.5 dBm]\n", -+ basic_info.mu_tx_power_auto, basic_info.mu_tx_power_manual); -+ seq_printf(file, " Thermal Compensation: %s\n", -+ basic_info.thermal_compensate_enable ? "enable" : "disable"); -+ seq_printf(file, " Theraml Compensation Value: %d\n", -+ basic_info.thermal_compensate_value); -+ -+out: -+ return ret; -+} -+ -+DEFINE_SHOW_ATTRIBUTE(mt7915_txpower_info); -+ - static int - mt7915_twt_stats(struct seq_file *s, void *data) - { -@@ -1388,6 +1473,8 @@ int mt7915_init_debugfs(struct mt7915_phy *phy) - &mt7915_txpower_fops); - debugfs_create_file("txpower_path", 0400, dir, phy, - &mt7915_txpower_path_fops); -+ debugfs_create_file("txpower_info", 0400, dir, phy, -+ &mt7915_txpower_info_fops); - debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir, - mt7915_twt_stats); - debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval); -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 45b0907..b9beb4f 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -3624,6 +3624,8 @@ int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len, - txpower[i] = res[i][req.band_idx]; - } else if (category == TX_POWER_INFO_PATH) { - memcpy(txpower, skb->data + 4, len); -+ } else if (category == TX_POWER_INFO_BASIC) { -+ memcpy(txpower, skb->data, len); - } - - dev_kfree_skb(skb); -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 035ad97..3089fb6 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -525,7 +525,8 @@ enum { - }; - - enum { -- TX_POWER_INFO_PATH = 1, -+ TX_POWER_INFO_BASIC, -+ TX_POWER_INFO_PATH, - TX_POWER_INFO_RATE, - }; - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1031-wifi-mt76-mt7915-report-tx-and-rx-byte-to-tpt_led-wh.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1031-wifi-mt76-mt7915-report-tx-and-rx-byte-to-tpt_led-wh.patch deleted file mode 100644 index 4c42bbdb8..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1031-wifi-mt76-mt7915-report-tx-and-rx-byte-to-tpt_led-wh.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 539de29220ad63d73fdb1ff86d63014b4e246e3a Mon Sep 17 00:00:00 2001 -From: Yi-Chia Hsieh -Date: Fri, 23 Jun 2023 06:06:21 +0800 -Subject: [PATCH 1031/1053] wifi: mt76: mt7915: report tx and rx byte to - tpt_led when wed is enabled - -Signed-off-by: Yi-Chia Hsieh ---- - mt76_connac_mac.c | 10 ++++++---- - mt7915/mmio.c | 5 +++++ - 2 files changed, 11 insertions(+), 4 deletions(-) - -diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c -index 630c640..949df63 100644 ---- a/mt76_connac_mac.c -+++ b/mt76_connac_mac.c -@@ -597,9 +597,15 @@ bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, - - txs = le32_to_cpu(txs_data[0]); - -+ mphy = mt76_dev_phy(dev, wcid->phy_idx); -+ - /* PPDU based reporting */ - if (mtk_wed_device_active(&dev->mmio.wed) && - FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) { -+ ieee80211_tpt_led_trig_tx(mphy->hw, -+ le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE) - -+ le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_BYTE)); -+ - stats->tx_bytes += - le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE) - - le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_BYTE); -@@ -640,10 +646,6 @@ bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid, - cck = true; - fallthrough; - case MT_PHY_TYPE_OFDM: -- mphy = &dev->phy; -- if (wcid->phy_idx == MT_BAND1 && dev->phys[MT_BAND1]) -- mphy = dev->phys[MT_BAND1]; -- - if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) - sband = &mphy->sband_5g.sband; - else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) -diff --git a/mt7915/mmio.c b/mt7915/mmio.c -index ddf1b72..437a9b0 100644 ---- a/mt7915/mmio.c -+++ b/mt7915/mmio.c -@@ -588,6 +588,7 @@ static void mt7915_mmio_wed_update_rx_stats(struct mtk_wed_device *wed, - int idx = le16_to_cpu(stats->wlan_idx); - struct mt7915_dev *dev; - struct mt76_wcid *wcid; -+ struct mt76_phy *mphy; - - dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed); - -@@ -598,6 +599,10 @@ static void mt7915_mmio_wed_update_rx_stats(struct mtk_wed_device *wed, - - wcid = rcu_dereference(dev->mt76.wcid[idx]); - if (wcid) { -+ mphy = mt76_dev_phy(&dev->mt76, wcid->phy_idx); -+ ieee80211_tpt_led_trig_rx(mphy->hw, -+ le32_to_cpu(stats->rx_byte_cnt)); -+ - wcid->stats.rx_bytes += le32_to_cpu(stats->rx_byte_cnt); - wcid->stats.rx_packets += le32_to_cpu(stats->rx_pkt_cnt); - wcid->stats.rx_errors += le32_to_cpu(stats->rx_err_cnt); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1032-wifi-mt76-mt7915-Establish-BA-in-VO-queue.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1032-wifi-mt76-mt7915-Establish-BA-in-VO-queue.patch deleted file mode 100644 index 3e8500fa8..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1032-wifi-mt76-mt7915-Establish-BA-in-VO-queue.patch +++ /dev/null @@ -1,25 +0,0 @@ -From d588c607b158e13343964b451d1de5b98bba7feb Mon Sep 17 00:00:00 2001 -From: MeiChia Chiu -Date: Tue, 8 Aug 2023 11:20:58 +0800 -Subject: [PATCH 1032/1053] wifi: mt76: mt7915: Establish BA in VO queue - ---- - mt76_connac_mac.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c -index 949df63..d036047 100644 ---- a/mt76_connac_mac.c -+++ b/mt76_connac_mac.c -@@ -1115,8 +1115,6 @@ void mt76_connac2_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi) - return; - - tid = le32_get_bits(txwi[1], MT_TXD1_TID); -- if (tid >= 6) /* skip VO queue */ -- return; - - val = le32_to_cpu(txwi[2]); - fc = FIELD_GET(MT_TXD2_FRAME_TYPE, val) << 2 | --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1033-wifi-mt76-mt7915-Disable-RegDB-when-enable-single-sk.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1033-wifi-mt76-mt7915-Disable-RegDB-when-enable-single-sk.patch deleted file mode 100644 index 09fda9134..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1033-wifi-mt76-mt7915-Disable-RegDB-when-enable-single-sk.patch +++ /dev/null @@ -1,165 +0,0 @@ -From ee3f33638400dfe0306ed5d12f1e2c1840632cea Mon Sep 17 00:00:00 2001 -From: "Allen.Ye" -Date: Fri, 11 Aug 2023 16:46:53 +0800 -Subject: [PATCH 1033/1053] wifi: mt76: mt7915: Disable RegDB when enable - single sku - ---- - mt7915/debugfs.c | 49 +++++++++++++++++++++++++++++++++++++++++++----- - mt7915/init.c | 11 +++++++++-- - mt7915/regs.h | 8 ++++---- - 3 files changed, 57 insertions(+), 11 deletions(-) - -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 24e88f7..502b493 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -1020,10 +1020,16 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf, - { - struct mt7915_phy *phy = file->private_data; - struct mt7915_dev *dev = phy->dev; -+ struct ieee80211_channel *chan = phy->mt76->chandef.chan; -+ struct ieee80211_supported_band sband; - s8 txpwr[MT7915_SKU_RATE_NUM]; -- static const size_t sz = 2048; -+ static const size_t sz = 4096; - u8 band = phy->mt76->band_idx; - int i, offs = 0, len = 0; -+ u32 target_power = 0; -+ int n_chains = hweight16(phy->mt76->chainmask); -+ int nss_delta = mt76_tx_power_nss_delta(n_chains); -+ int pwr_delta; - ssize_t ret; - char *buf; - u32 reg; -@@ -1082,11 +1088,38 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf, - len += scnprintf(buf + len, sz - len, "BW160/"); - mt7915_txpower_puts(HE_RU2x996, 17); - -- reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_TPC_CTRL_STAT(band) : -- MT_WF_PHY_TPC_CTRL_STAT_MT7916(band); -+ reg = is_mt7915(&dev->mt76) ? MT_WF_IRPI_TPC_CTRL_STAT(band) : -+ MT_WF_IRPI_TPC_CTRL_STAT_MT7916(band); - -- len += scnprintf(buf + len, sz - len, "\nTx power (bbp) : %6ld\n", -- mt76_get_field(dev, reg, MT_WF_PHY_TPC_POWER)); -+ len += scnprintf(buf + len, sz - len, "\nTx power (bbp) : %6ld [0.5 dBm]\n", -+ mt76_get_field(dev, reg, MT_WF_IRPI_TPC_POWER)); -+ -+ len += scnprintf(buf + len, sz - len, "RegDB maximum power:\t%d [dBm]\n", -+ chan->max_reg_power); -+ -+ if (chan->band == NL80211_BAND_2GHZ) -+ sband = phy->mt76->sband_2g.sband; -+ else if (chan->band == NL80211_BAND_5GHZ) -+ sband = phy->mt76->sband_5g.sband; -+ else if (chan->band == NL80211_BAND_6GHZ) -+ sband = phy->mt76->sband_6g.sband; -+ -+ pwr_delta = mt7915_eeprom_get_power_delta(dev, sband.band); -+ -+ for (i = 0; i < n_chains; i++) { -+ u32 val; -+ -+ val = mt7915_eeprom_get_target_power(dev, chan, i); -+ target_power = max(target_power, val); -+ } -+ -+ target_power += pwr_delta + nss_delta; -+ target_power = DIV_ROUND_UP(target_power, 2); -+ len += scnprintf(buf + len, sz - len, "eeprom maximum power:\t%d [dBm]\n", -+ target_power); -+ -+ len += scnprintf(buf + len, sz - len, "nss_delta:\t%d [0.5 dBm]\n", -+ nss_delta); - - ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); - -@@ -1263,6 +1296,8 @@ static int - mt7915_txpower_info_show(struct seq_file *file, void *data) - { - struct mt7915_phy *phy = file->private; -+ struct mt76_phy *mphy = phy->mt76; -+ struct mt76_dev *dev = mphy->dev; - struct { - u8 category; - u8 rsv1; -@@ -1304,6 +1339,7 @@ mt7915_txpower_info_show(struct seq_file *file, void *data) - s8 mu_tx_power_manual; - u8 rsv3; - } __packed basic_info = {}; -+ struct device_node *np; - int ret; - - ret = mt7915_mcu_get_txpower_sku(phy, (s8 *)&basic_info, sizeof(basic_info), -@@ -1338,6 +1374,9 @@ mt7915_txpower_info_show(struct seq_file *file, void *data) - seq_printf(file, " Theraml Compensation Value: %d\n", - basic_info.thermal_compensate_value); - -+ np = mt76_find_power_limits_node(dev); -+ seq_printf(file, " RegDB: %s\n", !np ? "enable" : "disable"); -+ - out: - return ret; - } -diff --git a/mt7915/init.c b/mt7915/init.c -index decccc0..a5b38c8 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -283,9 +283,11 @@ static void __mt7915_init_txpower(struct mt7915_phy *phy, - int nss_delta = mt76_tx_power_nss_delta(n_chains); - int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band); - struct mt76_power_limits limits; -+ struct device_node *np; - - phy->sku_limit_en = true; - phy->sku_path_en = true; -+ np = mt76_find_power_limits_node(&dev->mt76); - for (i = 0; i < sband->n_channels; i++) { - struct ieee80211_channel *chan = &sband->channels[i]; - u32 target_power = 0; -@@ -309,8 +311,13 @@ static void __mt7915_init_txpower(struct mt7915_phy *phy, - - target_power += nss_delta; - target_power = DIV_ROUND_UP(target_power, 2); -- chan->max_power = min_t(int, chan->max_reg_power, -- target_power); -+ -+ /* can NOT find country node in dts */ -+ if (!np) -+ chan->max_power = min_t(int, chan->max_reg_power, -+ target_power); -+ else -+ chan->max_power = target_power; - chan->orig_mpwr = target_power; - } - } -diff --git a/mt7915/regs.h b/mt7915/regs.h -index 4d05e39..ca355d1 100644 ---- a/mt7915/regs.h -+++ b/mt7915/regs.h -@@ -1215,6 +1215,10 @@ enum offs_rev { - #define MT_WF_IRPI_NSS(phy, nss) MT_WF_IRPI(0x6000 + ((phy) << 20) + ((nss) << 16)) - #define MT_WF_IRPI_NSS_MT7916(phy, nss) MT_WF_IRPI(0x1000 + ((phy) << 20) + ((nss) << 16)) - -+#define MT_WF_IRPI_TPC_CTRL_STAT(_phy) MT_WF_IRPI(0xc794 + ((_phy) << 16)) -+#define MT_WF_IRPI_TPC_CTRL_STAT_MT7916(_phy) MT_WF_IRPI(0xc794 + ((_phy) << 20)) -+#define MT_WF_IRPI_TPC_POWER GENMASK(31, 24) -+ - #define MT_WF_IPI_RESET 0x831a3008 - - /* PHY */ -@@ -1231,10 +1235,6 @@ enum offs_rev { - #define MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY BIT(18) - #define MT_WF_PHY_RXTD12_IRPI_SW_CLR BIT(29) - --#define MT_WF_PHY_TPC_CTRL_STAT(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 16)) --#define MT_WF_PHY_TPC_CTRL_STAT_MT7916(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 20)) --#define MT_WF_PHY_TPC_POWER GENMASK(15, 8) -- - #define MT_MCU_WM_CIRQ_BASE 0x89010000 - #define MT_MCU_WM_CIRQ(ofs) (MT_MCU_WM_CIRQ_BASE + (ofs)) - #define MT_MCU_WM_CIRQ_IRQ_MASK_CLR_ADDR MT_MCU_WM_CIRQ(0x80) --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1034-wifi-mt76-mt7915-enable-the-mac80211-hw-bmc-ps-buffe.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1034-wifi-mt76-mt7915-enable-the-mac80211-hw-bmc-ps-buffe.patch deleted file mode 100644 index 8467fb709..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1034-wifi-mt76-mt7915-enable-the-mac80211-hw-bmc-ps-buffe.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 20c497b434dc4555210ea64cde38dd86817d8891 Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Thu, 24 Aug 2023 03:01:27 +0800 -Subject: [PATCH] wifi: mt76: mt7915: enable the mac80211 hw bmc ps buffer - function. - ---- - mt7915/init.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/mt7915/init.c b/mt7915/init.c -index 35aefca..545afe7 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -413,6 +413,7 @@ mt7915_init_wiphy(struct mt7915_phy *phy) - ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); - ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); - ieee80211_hw_set(hw, WANT_MONITOR_VIF); -+ ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING); - ieee80211_hw_set(hw, SUPPORTS_TX_FRAG); - - hw->max_tx_fragments = 4; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1035-wifi-mt76-update-debugfs-knob-for-tx-tokens.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1035-wifi-mt76-update-debugfs-knob-for-tx-tokens.patch deleted file mode 100644 index 5c46d2929..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1035-wifi-mt76-update-debugfs-knob-for-tx-tokens.patch +++ /dev/null @@ -1,84 +0,0 @@ -From e9cf08519595e2d8c5c227486948d8cb00db626a Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Thu, 24 Aug 2023 03:01:27 +0800 -Subject: [PATCH 1035/1053] wifi: mt76: update debugfs knob for tx tokens - -1. dump token pending time -2. dump per-band token counts - -Signed-off-by: Peter Chiu ---- - mt76.h | 1 + - mt7915/mac.c | 2 ++ - mt7915/mtk_debugfs.c | 24 +++++++++++++++++++----- - 3 files changed, 22 insertions(+), 5 deletions(-) - -diff --git a/mt76.h b/mt76.h -index 5c26715..6f78c07 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -403,6 +403,7 @@ struct mt76_txwi_cache { - dma_addr_t dma_addr; - - u8 phy_idx; -+ unsigned long jiffies; - - union { - struct sk_buff *skb; -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 14367fd..71b4e2d 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -811,6 +811,8 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - if (id < 0) - return id; - -+ t->jiffies = jiffies; -+ - pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb); - mt7915_mac_write_txwi(mdev, txwi_ptr, tx_info->skb, wcid, pid, key, - qid, 0); -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index f00ac10..3c248ee 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -2203,17 +2203,31 @@ static int mt7915_mibinfo_band1(struct seq_file *s, void *data) - static int mt7915_token_read(struct seq_file *s, void *data) - { - struct mt7915_dev *dev = dev_get_drvdata(s->private); -- int id, count = 0; -+ struct mt76_dev *mdev = &dev->mt76; -+ int id, i; - struct mt76_txwi_cache *txwi; - - seq_printf(s, "Cut through token:\n"); - spin_lock_bh(&dev->mt76.token_lock); - idr_for_each_entry(&dev->mt76.token, txwi, id) { -- seq_printf(s, "%4d ", id); -- count++; -- if (count % 8 == 0) -- seq_printf(s, "\n"); -+ seq_printf(s, "%4d (token pending %u ms)\n", id, -+ jiffies_to_msecs(jiffies - txwi->jiffies)); -+ } -+ -+ if (!dev->dbdc_support) -+ goto out; -+ -+ for (i = 0; i < MT_BAND2; i++) { -+ struct mt76_phy *mphy = mdev->phys[i]; -+ -+ if (!mphy) -+ continue; -+ -+ seq_printf(s, "Band%d consume: %d, free:%d total: %d\n", -+ i, mphy->tokens, mdev->token_threshold - mphy->tokens, -+ mdev->token_threshold); - } -+out: - spin_unlock_bh(&dev->mt76.token_lock); - seq_printf(s, "\n"); - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1036-wifi-mt76-mt7915-support-enable-disable-spatial-reus.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1036-wifi-mt76-mt7915-support-enable-disable-spatial-reus.patch deleted file mode 100644 index 4306c68de..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1036-wifi-mt76-mt7915-support-enable-disable-spatial-reus.patch +++ /dev/null @@ -1,72 +0,0 @@ -From e81df1a68b96bc91891c9c097db376a1890450ae Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Tue, 5 Sep 2023 20:17:19 +0800 -Subject: [PATCH 1036/1053] wifi: mt76: mt7915: support enable/disable spatial - reuse through debugfs - -Signed-off-by: Howard Hsu ---- - mt7915/mcu.c | 3 +-- - mt7915/mt7915.h | 1 + - mt7915/mtk_debugfs.c | 12 ++++++++++++ - 3 files changed, 14 insertions(+), 2 deletions(-) - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index b9beb4f..4b5fb53 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -3756,8 +3756,7 @@ int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action) - sizeof(req), true); - } - --static int --mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val) -+int mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val) - { - struct mt7915_dev *dev = phy->dev; - struct mt7915_mcu_sr_ctrl req = { -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index ea91611..bfd87bc 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -795,6 +795,7 @@ int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value); - int mt7915_mcu_sw_aci_set(struct mt7915_dev *dev, bool val); - int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp); - int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp); -+int mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val); - - #ifdef MTK_DEBUG - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 3c248ee..9bbe50d 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3799,6 +3799,17 @@ mt7915_sw_aci_set(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(fops_sw_aci, NULL, - mt7915_sw_aci_set, "%llx\n"); - -+static int -+mt7915_sr_enable_set(void *data, u64 val) -+{ -+ struct mt7915_phy *phy = data; -+ -+ return mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, val); -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_sr_enable, NULL, -+ mt7915_sr_enable_set, "%llx\n"); -+ - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - { - struct mt7915_dev *dev = phy->dev; -@@ -3889,6 +3900,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - mt7915_show_eeprom_mode); - debugfs_create_file("sw_aci", 0600, dir, dev, - &fops_sw_aci); -+ debugfs_create_file("sr_enable", 0200, dir, phy, &fops_sr_enable); - return 0; - } - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1037-wifi-mt76-mt7915-add-debug-log-for-SER-flow.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1037-wifi-mt76-mt7915-add-debug-log-for-SER-flow.patch deleted file mode 100644 index d61c1fba0..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1037-wifi-mt76-mt7915-add-debug-log-for-SER-flow.patch +++ /dev/null @@ -1,47 +0,0 @@ -From b8b4b5abf0dce8bedfca44e1a7871c119f2b92e6 Mon Sep 17 00:00:00 2001 -From: Bo Jiao -Date: Mon, 11 Sep 2023 17:11:24 +0800 -Subject: [PATCH 1037/1053] wifi: mt76: mt7915: add debug log for SER flow. - -Signed-off-by: Bo Jiao ---- - mt7915/mac.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 71b4e2d..b0ddb10 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1572,6 +1572,9 @@ void mt7915_mac_reset_work(struct work_struct *work) - if (!(READ_ONCE(dev->recovery.state) & MT_MCU_CMD_STOP_DMA)) - return; - -+ dev_info(dev->mt76.dev,"\n%s L1 SER recovery start.", -+ wiphy_name(dev->mt76.hw->wiphy)); -+ - ieee80211_stop_queues(mt76_hw(dev)); - if (ext_phy) - ieee80211_stop_queues(ext_phy->hw); -@@ -1647,6 +1650,9 @@ void mt7915_mac_reset_work(struct work_struct *work) - ieee80211_queue_delayed_work(ext_phy->hw, - &phy2->mt76->mac_work, - MT7915_WATCHDOG_TIME); -+ -+ dev_info(dev->mt76.dev,"\n%s L1 SER recovery completed.", -+ wiphy_name(dev->mt76.hw->wiphy)); - } - - /* firmware coredump */ -@@ -1762,6 +1768,9 @@ void mt7915_coredump(struct mt7915_dev *dev, u8 state) - - void mt7915_reset(struct mt7915_dev *dev) - { -+ dev_info(dev->mt76.dev, "%s SER recovery state: 0x%08x\n", -+ wiphy_name(dev->mt76.hw->wiphy), READ_ONCE(dev->recovery.state)); -+ - if (!dev->recovery.hw_init_done) - return; - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1038-wifi-mt76-mt7915-add-additional-chain-signal-info-to.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1038-wifi-mt76-mt7915-add-additional-chain-signal-info-to.patch deleted file mode 100644 index 0113d3711..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1038-wifi-mt76-mt7915-add-additional-chain-signal-info-to.patch +++ /dev/null @@ -1,27 +0,0 @@ -From eaa1c8b40685b56c6298c85cb0a44c7b97c62e8c Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Wed, 20 Sep 2023 11:10:57 +0800 -Subject: [PATCH 1038/1053] wifi: mt76: mt7915: add additional chain signal - info to station dump - -Signed-off-by: StanleyYP Wang ---- - mt7915/mac.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/mt7915/mac.c b/mt7915/mac.c -index b0ddb10..9a49375 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -442,7 +442,7 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb, - if (v0 & MT_PRXV_HT_AD_CODE) - status->enc_flags |= RX_ENC_FLAG_LDPC; - -- status->chains = mphy->antenna_mask; -+ status->chains = mphy->chainmask >> (status->phy_idx * dev->chainshift); - status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v1); - status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1); - status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1039-wifi-mt76-mt7915-add-debuffs-knob-for-protect-thresh.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1039-wifi-mt76-mt7915-add-debuffs-knob-for-protect-thresh.patch deleted file mode 100644 index 422582573..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1039-wifi-mt76-mt7915-add-debuffs-knob-for-protect-thresh.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 2674288ca511860d73b068f73c14d864de13653f Mon Sep 17 00:00:00 2001 -From: Peter Chiu -Date: Mon, 2 Oct 2023 14:00:13 +0800 -Subject: [PATCH 1039/1053] wifi: mt76: mt7915: add debuffs knob for protect - threshold - ---- - mt7915/mt7915.h | 1 + - mt7915/mtk_debugfs.c | 11 +++++++++++ - 2 files changed, 12 insertions(+) - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index bfd87bc..1b43c54 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -775,6 +775,7 @@ void mt7915_mcu_set_rfeature_starec(void *data, struct mt7915_dev *dev, - struct ieee80211_vif *vif, struct ieee80211_sta *sta); - int mt7915_mcu_set_rfeature_trig_type(struct mt7915_phy *phy, u8 enable, u8 trig_type); - int mt7915_mcu_set_mu_dl_ack_policy(struct mt7915_phy *phy, u8 policy_num); -+int mt7915_mcu_set_mu_prot_frame_th(struct mt7915_phy *phy, u32 val); - void mt7915_mcu_set_ppdu_tx_type(struct mt7915_phy *phy, u8 ppdu_type); - void mt7915_mcu_set_nusers_ofdma(struct mt7915_phy *phy, u8 type, u8 ofdma_user_cnt); - void mt7915_mcu_set_mimo(struct mt7915_phy *phy, u8 direction); -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 9bbe50d..2b59e35 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -2852,6 +2852,16 @@ static int mt7915_sta_tx_amsdu_set(void *data, u64 tx_amsdu) - DEFINE_DEBUGFS_ATTRIBUTE(fops_tx_amsdu, NULL, - mt7915_sta_tx_amsdu_set, "%llx\n"); - -+static int mt7915_muru_set_prot_thr(void *data, u64 val) -+{ -+ struct mt7915_phy *phy = data; -+ -+ return mt7915_mcu_set_mu_prot_frame_th(phy, (u32)val); -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_set_prot_thr, NULL, -+ mt7915_muru_set_prot_thr, "%lld\n"); -+ - static int mt7915_red_enable_set(void *data, u64 en) - { - struct mt7915_dev *dev = data; -@@ -3879,6 +3889,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - debugfs_create_devm_seqfile(dev->mt76.dev, "fw_wm_info", dir, - mt7915_fw_wm_info_read); - -+ debugfs_create_file("prot_thr", 0200, dir, phy, &fops_muru_set_prot_thr); - debugfs_create_file("red_en", 0600, dir, dev, - &fops_red_en); - debugfs_create_file("red_show_sta", 0600, dir, dev, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1040-wifi-mt76-mt7915-add-mt7981-efuse-variants-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1040-wifi-mt76-mt7915-add-mt7981-efuse-variants-support.patch deleted file mode 100644 index b1594a10d..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1040-wifi-mt76-mt7915-add-mt7981-efuse-variants-support.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 45752d6719ee863fe80d2821f9ff6176e6a2497d Mon Sep 17 00:00:00 2001 -From: "Henry.Yen" -Date: Mon, 11 Dec 2023 16:01:55 +0800 -Subject: [PATCH 1040/1053] wifi: mt76: mt7915 add mt7981 efuse variants - support - ---- - mt7915/eeprom.c | 22 ++++++++++++++++++++++ - mt7915/mt7915.h | 7 ++++++- - 2 files changed, 28 insertions(+), 1 deletion(-) - -diff --git a/mt7915/eeprom.c b/mt7915/eeprom.c -index 6133c20..df5e396 100644 ---- a/mt7915/eeprom.c -+++ b/mt7915/eeprom.c -@@ -193,6 +193,21 @@ static int mt7915_eeprom_load(struct mt7915_dev *dev) - return mt7915_check_eeprom(dev); - } - -+static int mt7915_eeprom_parse_efuse_hw_cap(struct mt7915_dev *dev) -+{ -+#define WTBL_SIZE_GROUP GENMASK(1, 0) -+ u32 buf; -+ int ret; -+ -+ ret = mt76_get_of_data_from_nvmem(&dev->mt76, &buf, "variant", 4); -+ if (ret) -+ return ret; -+ -+ dev->limited_wtbl_size = buf & WTBL_SIZE_GROUP; -+ -+ return 0; -+} -+ - static void mt7915_eeprom_parse_band_config(struct mt7915_phy *phy) - { - struct mt7915_dev *dev = phy->dev; -@@ -243,6 +258,13 @@ void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, - u8 path, nss, nss_max = 4, *eeprom = dev->mt76.eeprom.data; - struct mt76_phy *mphy = phy->mt76; - u8 band = phy->mt76->band_idx; -+ int ret; -+ -+ if (is_mt7981(&dev->mt76)) { -+ ret = mt7915_eeprom_parse_efuse_hw_cap(dev); -+ if (ret) -+ dev->limited_wtbl_size = true; -+ } - - mt7915_eeprom_parse_band_config(phy); - -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 1b43c54..c6150c8 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -407,6 +407,7 @@ struct mt7915_dev { - - u32 hw_pattern; - -+ bool limited_wtbl_size; - bool dbdc_support; - bool flash_mode; - bool bin_file_mode; -@@ -681,7 +682,11 @@ void mt7915_tm_rf_test_event(struct mt7915_dev *dev, struct sk_buff *skb); - - static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) - { -- return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE; -+ if (is_mt7915(&dev->mt76) || -+ (is_mt7981(&dev->mt76) && dev->limited_wtbl_size)) -+ return MT7915_WTBL_SIZE; -+ -+ return MT7916_WTBL_SIZE; - } - - static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev) --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1041-wifi-mt76-mt7915-support-scs-feature.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1041-wifi-mt76-mt7915-support-scs-feature.patch deleted file mode 100644 index aa6ba21f1..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1041-wifi-mt76-mt7915-support-scs-feature.patch +++ /dev/null @@ -1,387 +0,0 @@ -From 9c8dcebc80801b77b23b0a2af28a3d51662c164f Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Wed, 6 Dec 2023 08:53:03 +0800 -Subject: [PATCH] wifi: mt76: mt7915: support scs feature - -Add support scs feature for connac2 codebase. This commit includes three -parts. -1. enable scs feature when interface is up. -2. support configure scs feature on/off by debugfs scs_enable. -3. Firmware needs driver to provide the tx_bytes, rx_bytes, -active_station_number, total throughtput and min rssi of all connected -stations. In mt76 driver, we run a delayed work to send all must-need -statistics through mcu command every second. - -Please noted that the scs feature is only enable for apsoc is 7986 or -7981 (WED Rx 2.0). - -Signed-off-by: Howard Hsu ---- - mt76.h | 2 + - mt76_connac_mcu.h | 1 + - mt7915/init.c | 1 + - mt7915/mac.c | 11 ++++ - mt7915/main.c | 13 +++++ - mt7915/mcu.c | 118 +++++++++++++++++++++++++++++++++++++++++++ - mt7915/mcu.h | 4 ++ - mt7915/mt7915.h | 14 +++++ - mt7915/mtk_debugfs.c | 24 +++++++++ - 9 files changed, 188 insertions(+) - -diff --git a/mt76.h b/mt76.h -index cff22f5..7ffba7d 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -311,6 +311,7 @@ struct mt76_sta_stats { - u64 tx_nss[4]; /* 1, 2, 3, 4 */ - u64 tx_mcs[16]; /* mcs idx */ - u64 tx_bytes; -+ u64 last_tx_bytes; - /* WED TX */ - u32 tx_packets; /* unit: MSDU */ - u32 tx_retries; -@@ -320,6 +321,7 @@ struct mt76_sta_stats { - u32 rx_packets; - u32 rx_errors; - u32 rx_drops; -+ u64 last_rx_bytes; - }; - - enum mt76_wcid_flags { -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 94fcf32..247b520 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1236,6 +1236,7 @@ enum { - MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, - MCU_EXT_CMD_MWDS_SUPPORT = 0x80, - MCU_EXT_CMD_SET_SER_TRIGGER = 0x81, -+ MCU_EXT_CMD_SCS_FEATURE_CTRL = 0x82, - MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, - MCU_EXT_CMD_FW_DBG_CTRL = 0x95, - MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, -diff --git a/mt7915/init.c b/mt7915/init.c -index 545afe7..074f247 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -1248,6 +1248,7 @@ int mt7915_register_device(struct mt7915_dev *dev) - spin_lock_init(&dev->phy.stats_lock); - INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work); - INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work); -+ INIT_DELAYED_WORK(&dev->scs_work, mt7915_mcu_scs_sta_poll); - INIT_LIST_HEAD(&dev->sta_rc_list); - INIT_LIST_HEAD(&dev->twt_list); - -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 9a49375..2e4a8f8 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1504,6 +1504,8 @@ mt7915_mac_full_reset(struct mt7915_dev *dev) - if (ext_phy) - cancel_delayed_work_sync(&ext_phy->mac_work); - -+ cancel_delayed_work_sync(&dev->scs_work); -+ - mutex_lock(&dev->mt76.mutex); - for (i = 0; i < 10; i++) { - if (!mt7915_mac_restart(dev)) -@@ -1529,6 +1531,10 @@ mt7915_mac_full_reset(struct mt7915_dev *dev) - ieee80211_queue_delayed_work(ext_phy->hw, - &ext_phy->mac_work, - MT7915_WATCHDOG_TIME); -+ -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && -+ mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) -+ ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); - } - - /* system error recovery */ -@@ -1587,6 +1593,7 @@ void mt7915_mac_reset_work(struct work_struct *work) - set_bit(MT76_RESET, &phy2->mt76->state); - cancel_delayed_work_sync(&phy2->mt76->mac_work); - } -+ cancel_delayed_work_sync(&dev->scs_work); - mt76_worker_disable(&dev->mt76.tx_worker); - mt76_for_each_q_rx(&dev->mt76, i) - napi_disable(&dev->mt76.napi[i]); -@@ -1651,6 +1658,10 @@ void mt7915_mac_reset_work(struct work_struct *work) - &phy2->mt76->mac_work, - MT7915_WATCHDOG_TIME); - -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && -+ mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) -+ ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); -+ - dev_info(dev->mt76.dev,"\n%s L1 SER recovery completed.", - wiphy_name(dev->mt76.hw->wiphy)); - } -diff --git a/mt7915/main.c b/mt7915/main.c -index 2ff7667..2750e60 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -89,12 +89,24 @@ int mt7915_run(struct ieee80211_hw *hw) - if (ret) - goto out; - -+ /* Enable SCS if and only if WED Rx (2.0 and after) is supported. */ -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && -+ mtk_wed_get_rx_capa(&dev->mt76.mmio.wed) && -+ !mt76_testmode_enabled(phy->mt76)) { -+ ret = mt7915_mcu_set_scs_en(phy, true); -+ if (ret) -+ goto out; -+ } -+ - set_bit(MT76_STATE_RUNNING, &phy->mt76->state); - - if (!mt76_testmode_enabled(phy->mt76)) - ieee80211_queue_delayed_work(hw, &phy->mt76->mac_work, - MT7915_WATCHDOG_TIME); - -+ if (!running && phy->scs_ctrl.scs_enable) -+ ieee80211_queue_delayed_work(hw, &dev->scs_work, HZ); -+ - if (!running) - mt7915_mac_reset_counters(phy); - -@@ -135,6 +147,7 @@ static void mt7915_stop(struct ieee80211_hw *hw) - } - - if (!mt7915_dev_running(dev)) { -+ cancel_delayed_work_sync(&dev->scs_work); - mt76_connac_mcu_set_pm(&dev->mt76, dev->phy.mt76->band_idx, 1); - mt7915_mcu_set_mac(dev, dev->phy.mt76->band_idx, false, false); - } -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index 1af6dac..aa3f9ad 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -5239,6 +5239,124 @@ int mt7915_mcu_sw_aci_set(struct mt7915_dev *dev, bool val) - sizeof(req), NULL); - } - -+int mt7915_mcu_set_scs_en(struct mt7915_phy *phy, u8 enable) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 subcmd; -+ u8 band_idx; -+ u8 enable; -+ } __packed req = { -+ .subcmd = cpu_to_le32(SCS_ENABLE), -+ .band_idx = phy->mt76->band_idx, -+ .enable = enable + 1, -+ }; -+ -+ phy->scs_ctrl.scs_enable = !!enable; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SCS_FEATURE_CTRL), -+ &req, sizeof(req), NULL); -+} -+ -+void mt7915_sta_scs_para(void *data, struct ieee80211_sta *sta) -+{ -+#define SCS_ACTIVE_STA_CRITERIA_2M 250000 -+ struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; -+ struct mt7915_phy *poll_phy = (struct mt7915_phy *)data; -+ u8 band_idx = msta->wcid.phy_idx; -+ s64 tx_bytes_last_sec, rx_bytes_last_sec; -+ u64 total_bytes_last_sec; -+ -+ if (band_idx > MT_BAND1) -+ return; -+ -+ tx_bytes_last_sec = (s64)msta->wcid.stats.tx_bytes - -+ (s64)msta->wcid.stats.last_tx_bytes; -+ rx_bytes_last_sec = (s64)msta->wcid.stats.rx_bytes - -+ (s64)msta->wcid.stats.last_rx_bytes; -+ -+ /** -+ * Since wo reports rx stats every 900ms, it needs to be converted as -+ * statistics every one second. -+ */ -+ rx_bytes_last_sec = rx_bytes_last_sec / 9 * 10; -+ -+ poll_phy->scs_ctrl.tx_bytes_last_sec += tx_bytes_last_sec; -+ poll_phy->scs_ctrl.rx_bytes_last_sec += rx_bytes_last_sec; -+ -+ total_bytes_last_sec = tx_bytes_last_sec + rx_bytes_last_sec; -+ if (total_bytes_last_sec > SCS_ACTIVE_STA_CRITERIA_2M) { -+ poll_phy->scs_ctrl.tput += total_bytes_last_sec >> 17; -+ poll_phy->scs_ctrl.active_sta++; -+ } -+ -+ msta->wcid.stats.last_tx_bytes = msta->wcid.stats.tx_bytes; -+ msta->wcid.stats.last_rx_bytes = msta->wcid.stats.rx_bytes; -+ -+ if (poll_phy->scs_ctrl.sta_min_rssi > msta->ack_signal) -+ poll_phy->scs_ctrl.sta_min_rssi = msta->ack_signal; -+} -+ -+int mt7915_mcu_set_scs_stats(struct mt7915_phy *phy) -+{ -+ struct mt7915_dev *dev = phy->dev; -+ struct { -+ __le32 subcmd; -+ u8 band_idx; -+ u8 active_sta; -+ __le16 tput; -+ bool rx_only_mode; -+ u8 __rsv; -+ s8 min_rssi; -+ } __packed req = { -+ .subcmd = cpu_to_le32(SCS_SEND_DATA), -+ .band_idx = phy->mt76->band_idx, -+ .active_sta = phy->scs_ctrl.active_sta, -+ .tput = cpu_to_le16(phy->scs_ctrl.tput), -+ .rx_only_mode = false, -+ .min_rssi = phy->scs_ctrl.sta_min_rssi, -+ }; -+ -+ /* Rx only mode is that Rx percentage is larger than 90% */ -+ if (phy->scs_ctrl.tx_bytes_last_sec < phy->scs_ctrl.rx_bytes_last_sec / 9) -+ req.rx_only_mode = true; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SCS_FEATURE_CTRL), -+ &req, sizeof(req), NULL); -+} -+ -+void mt7915_mcu_scs_sta_poll(struct work_struct *work) -+{ -+ struct mt7915_dev *dev = container_of(work, struct mt7915_dev, -+ scs_work.work); -+ struct mt7915_phy *phy; -+ bool scs_enable_flag = false; -+ u8 i; -+ -+ for (i = MT_BAND0; i < MT_BAND2; i++) { -+ if (!dev->mt76.phys[i]) -+ continue; -+ -+ phy = dev->mt76.phys[i]->priv; -+ if (!phy->scs_ctrl.scs_enable || -+ !test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) -+ continue; -+ -+ ieee80211_iterate_stations_atomic(dev->mt76.phys[i]->hw, -+ mt7915_sta_scs_para, phy); -+ -+ mt7915_mcu_set_scs_stats(phy); -+ -+ memset(&phy->scs_ctrl, 0, sizeof(phy->scs_ctrl)); -+ phy->scs_ctrl.scs_enable = true; -+ -+ scs_enable_flag = true; -+ } -+ -+ if (scs_enable_flag) -+ ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); -+} -+ - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) - { - #define IP_DSCP_NUM 64 -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 3089fb6..742a785 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -1200,4 +1200,8 @@ struct mt7915_mcu_edcca_info { - }; - #endif - -+enum { -+ SCS_SEND_DATA = 0, -+ SCS_ENABLE = 3, -+}; - #endif -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 03ec7e2..3daec29 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -270,6 +270,15 @@ struct mt7915_air_monitor_ctrl { - }; - #endif - -+struct mt7915_scs_ctrl { -+ u64 tx_bytes_last_sec; -+ u64 rx_bytes_last_sec; -+ bool scs_enable; -+ s8 sta_min_rssi; -+ u16 tput; -+ u8 active_sta; -+}; -+ - struct mt7915_phy { - struct mt76_phy *mt76; - struct mt7915_dev *dev; -@@ -344,6 +353,7 @@ struct mt7915_phy { - - struct mt7915_air_monitor_ctrl amnt_ctrl; - #endif -+ struct mt7915_scs_ctrl scs_ctrl; - }; - - #ifdef MTK_DEBUG -@@ -476,6 +486,8 @@ struct mt7915_dev { - } adie[ADIE_MAX_CNT]; - #endif - -+ struct delayed_work scs_work; -+ - bool wmm_pbc_enable; - struct work_struct wmm_pbc_work; - u32 adie_type; -@@ -803,6 +815,8 @@ int mt7915_mcu_sw_aci_set(struct mt7915_dev *dev, bool val); - int mt7915_mcu_ipi_hist_ctrl(struct mt7915_phy *phy, void *data, u8 cmd, bool wait_resp); - int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool wait_resp); - int mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val); -+int mt7915_mcu_set_scs_en(struct mt7915_phy *phy, u8 enable); -+void mt7915_mcu_scs_sta_poll(struct work_struct *work); - - #ifdef MTK_DEBUG - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index dad5ed7..0953223 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3820,6 +3820,29 @@ mt7915_sr_enable_set(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(fops_sr_enable, NULL, - mt7915_sr_enable_set, "%llx\n"); - -+static int -+mt7915_scs_enable_set(void *data, u64 val) -+{ -+ struct mt7915_phy *phy = data; -+ int ret; -+ -+ /* Enable scs if and only if WED Rx (2.0 and after) is supported */ -+ if (!mtk_wed_device_active(&phy->dev->mt76.mmio.wed) || -+ !mtk_wed_get_rx_capa(&phy->dev->mt76.mmio.wed)) -+ return 0; -+ -+ ret = mt7915_mcu_set_scs_en(phy, (u8) val); -+ if (ret) -+ return ret; -+ -+ if (phy->scs_ctrl.scs_enable) -+ ieee80211_queue_delayed_work(phy->mt76->hw, &phy->dev->scs_work, HZ); -+ -+ return 0; -+} -+DEFINE_DEBUGFS_ATTRIBUTE(fops_scs_enable, NULL, -+ mt7915_scs_enable_set, "%lld\n"); -+ - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - { - struct mt7915_dev *dev = phy->dev; -@@ -3912,6 +3935,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - debugfs_create_file("sw_aci", 0600, dir, dev, - &fops_sw_aci); - debugfs_create_file("sr_enable", 0200, dir, phy, &fops_sr_enable); -+ debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable); - return 0; - } - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1042-wifi-mt76-mt7915-support-thermal-recal-debug-commnad.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1042-wifi-mt76-mt7915-support-thermal-recal-debug-commnad.patch deleted file mode 100644 index 7358d2751..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1042-wifi-mt76-mt7915-support-thermal-recal-debug-commnad.patch +++ /dev/null @@ -1,110 +0,0 @@ -From e9f5c9f345503c5653d1a5fd5bedd69cd1bc48f1 Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Thu, 21 Dec 2023 20:35:36 +0800 -Subject: [PATCH] wifi: mt76: mt7915: support thermal recal debug commnad - -Add thermal recal debug command: -$ echo val > debugfs/thermal_recal - -The val can be the following values: -0 = disable -1 = enable -2 = manual trigger - -Signed-off-by: Howard Hsu ---- - mt76_connac_mcu.h | 1 + - mt7915/mcu.c | 15 +++++++++++++++ - mt7915/mt7915.h | 1 + - mt7915/mtk_debugfs.c | 18 ++++++++++++++++++ - 4 files changed, 35 insertions(+) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index 247b520..e445046 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1232,6 +1232,7 @@ enum { - MCU_EXT_CMD_RED_ENABLE = 0x68, - MCU_EXT_CMD_PKT_BUDGET_CTRL = 0x6c, - MCU_EXT_CMD_CP_SUPPORT = 0x75, -+ MCU_EXT_CMD_THERMAL_DEBUG = 0x79, - MCU_EXT_CMD_SET_RADAR_TH = 0x7c, - MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, - MCU_EXT_CMD_MWDS_SUPPORT = 0x80, -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index aa3f9ad..2417251 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -5357,6 +5357,21 @@ void mt7915_mcu_scs_sta_poll(struct work_struct *work) - ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); - } - -+int mt7915_mcu_thermal_debug(struct mt7915_dev *dev, u8 mode, u8 action) -+{ -+ struct { -+ u8 mode; -+ u8 action; -+ u8 rsv[2]; -+ } req = { -+ .mode = mode, -+ .action = action, -+ }; -+ -+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_DEBUG), &req, -+ sizeof(req), true); -+} -+ - int mt7915_mcu_set_qos_map(struct mt7915_dev *dev, struct ieee80211_vif *vif) - { - #define IP_DSCP_NUM 64 -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 3daec29..9b52ec4 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -817,6 +817,7 @@ int mt7915_mcu_ipi_hist_scan(struct mt7915_phy *phy, void *data, u8 mode, bool w - int mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val); - int mt7915_mcu_set_scs_en(struct mt7915_phy *phy, u8 enable); - void mt7915_mcu_scs_sta_poll(struct work_struct *work); -+int mt7915_mcu_thermal_debug(struct mt7915_dev *dev, u8 mode, u8 action); - - #ifdef MTK_DEBUG - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 0953223..53294c1 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3843,6 +3843,22 @@ mt7915_scs_enable_set(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(fops_scs_enable, NULL, - mt7915_scs_enable_set, "%lld\n"); - -+static int -+mt7915_thermal_recal_set(void *data, u64 val) -+{ -+#define THERMAL_DEBUG_OPERATION_MANUAL_TRIGGER 2 -+#define THERMAL_DEBUG_MODE_RECAL 1 -+ struct mt7915_dev *dev = data; -+ -+ if (val > THERMAL_DEBUG_OPERATION_MANUAL_TRIGGER) -+ return -EINVAL; -+ -+ return mt7915_mcu_thermal_debug(dev, THERMAL_DEBUG_MODE_RECAL, val); -+} -+ -+DEFINE_DEBUGFS_ATTRIBUTE(fops_thermal_recal, NULL, -+ mt7915_thermal_recal_set, "%llu\n"); -+ - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - { - struct mt7915_dev *dev = phy->dev; -@@ -3936,6 +3952,8 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - &fops_sw_aci); - debugfs_create_file("sr_enable", 0200, dir, phy, &fops_sr_enable); - debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable); -+ debugfs_create_file("thermal_recal", 0200, dir, dev, &fops_thermal_recal); -+ - return 0; - } - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1043-wifi-mt76-mt7915-Add-support-for-lpi-and-duplicate-m.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1043-wifi-mt76-mt7915-Add-support-for-lpi-and-duplicate-m.patch deleted file mode 100644 index c91ad4457..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1043-wifi-mt76-mt7915-Add-support-for-lpi-and-duplicate-m.patch +++ /dev/null @@ -1,513 +0,0 @@ -From 771d717a6bce6c6a7f7bb06599b42fa3994b560e Mon Sep 17 00:00:00 2001 -From: Allen Ye -Date: Fri, 15 Dec 2023 14:03:11 +0800 -Subject: [PATCH] wifi: mt76: mt7915: Add support for lpi and duplicate mode - -Add support lpi and duplicate mode. -1. lpi_enable: lpi fw cmd and set psd flag to fw by the country setting. -2. txpower_dup: Add bandwidth duplicate mode for 6g band and change power -value of beacon. -3. mgmt_pwr_enhence: Add mgmt frame power enhencement by fix 6g band -bandwidth -4. support runtime change sku table by specify sku index (default will -find the first match country). -3. Add parsing negative txpower stored unsigned in dts. - -Signed-off-by: Allen Ye ---- - eeprom.c | 15 +++++--- - mt76.h | 5 ++- - mt76_connac2_mac.h | 7 ++++ - mt76_connac_mac.c | 7 +++- - mt76_connac_mcu.h | 1 + - mt7915/debugfs.c | 3 +- - mt7915/init.c | 6 ++- - mt7915/mcu.c | 91 +++++++++++++++++++++++++++++++++++++++++--- - mt7915/mt7915.h | 1 + - mt7915/mtk_debugfs.c | 1 + - mt7915/vendor.c | 75 ++++++++++++++++++++++++++++++++++++ - mt7915/vendor.h | 15 ++++++++ - 12 files changed, 210 insertions(+), 17 deletions(-) - -diff --git a/eeprom.c b/eeprom.c -index 4213e44..2ee262a 100644 ---- a/eeprom.c -+++ b/eeprom.c -@@ -224,8 +224,9 @@ static bool mt76_string_prop_find(struct property *prop, const char *str) - } - - struct device_node * --mt76_find_power_limits_node(struct mt76_dev *dev) -+mt76_find_power_limits_node(struct mt76_phy *phy) - { -+ struct mt76_dev *dev = phy->dev; - struct device_node *np = dev->dev->of_node; - const char *const region_names[] = { - [NL80211_DFS_UNSET] = "ww", -@@ -235,6 +236,7 @@ mt76_find_power_limits_node(struct mt76_dev *dev) - }; - struct device_node *cur, *fallback = NULL; - const char *region_name = NULL; -+ char index[4] = {0}; - - if (dev->region < ARRAY_SIZE(region_names)) - region_name = region_names[dev->region]; -@@ -243,17 +245,20 @@ mt76_find_power_limits_node(struct mt76_dev *dev) - if (!np) - return NULL; - -+ snprintf(index, sizeof(index), "%d", phy->sku_idx); - for_each_child_of_node(np, cur) { - struct property *country = of_find_property(cur, "country", NULL); - struct property *regd = of_find_property(cur, "regdomain", NULL); -+ struct property *sku_index = of_find_property(cur, "sku-index", NULL); - - if (!country && !regd) { - fallback = cur; - continue; - } - -- if (mt76_string_prop_find(country, dev->alpha2) || -- mt76_string_prop_find(regd, region_name)) { -+ if ((mt76_string_prop_find(country, dev->alpha2) || -+ mt76_string_prop_find(regd, region_name)) && -+ (!phy->sku_idx || mt76_string_prop_find(sku_index, index))) { - of_node_put(np); - return cur; - } -@@ -328,7 +333,7 @@ mt76_apply_array_limit(s8 *pwr, size_t pwr_len, const __be32 *data, - - for (i = 0; i < pwr_len; i++) { - pwr[i] = min_t(s8, target_power, -- be32_to_cpu(data[i]) + nss_delta); -+ (s8)be32_to_cpu(data[i]) + nss_delta); - *max_power = max(*max_power, pwr[i]); - } - } -@@ -392,7 +397,7 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy, - if (!IS_ENABLED(CONFIG_OF)) - return target_power; - -- np = mt76_find_power_limits_node(dev); -+ np = mt76_find_power_limits_node(phy); - if (!np) - return target_power; - -diff --git a/mt76.h b/mt76.h -index c011812..b023f38 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -853,6 +853,9 @@ struct mt76_phy { - u8 macaddr[ETH_ALEN]; - - int txpower_cur; -+ u8 beacon_dup; -+ u8 mgmt_pwr_enhance; -+ u8 sku_idx; - u8 antenna_mask; - u16 chainmask; - -@@ -1744,7 +1747,7 @@ mt76_mcu_skb_send_msg(struct mt76_dev *dev, struct sk_buff *skb, int cmd, - void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set); - - struct device_node * --mt76_find_power_limits_node(struct mt76_dev *dev); -+mt76_find_power_limits_node(struct mt76_phy *phy); - struct device_node * - mt76_find_channel_node(struct device_node *np, struct ieee80211_channel *chan); - -diff --git a/mt76_connac2_mac.h b/mt76_connac2_mac.h -index eb47653..49ba39f 100644 ---- a/mt76_connac2_mac.h -+++ b/mt76_connac2_mac.h -@@ -355,6 +355,13 @@ enum tx_port_idx { - MT_TX_PORT_IDX_MCU - }; - -+enum tx_bw_idx { -+ MT_TX_BW_IDX_20, -+ MT_TX_BW_IDX_40, -+ MT_TX_BW_IDX_80, -+ MT_TX_BW_IDX_160, -+}; -+ - enum tx_frag_idx { - MT_TX_FRAG_NONE, - MT_TX_FRAG_FIRST, -diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c -index 5ba0255..5f705bb 100644 ---- a/mt76_connac_mac.c -+++ b/mt76_connac_mac.c -@@ -572,7 +572,8 @@ void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, - u16 rate = mt76_connac2_mac_tx_rate_val(mphy, vif, beacon, - multicast); - u32 val = MT_TXD6_FIXED_BW; -- -+ if (dev->phys[band_idx]->beacon_dup) -+ val |= MT_TX_BW_IDX_80; - /* hardware won't add HTC for mgmt/ctrl frame */ - txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD); - -@@ -585,7 +586,9 @@ void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, - - if (!spe_idx) - spe_idx = 24 + phy_idx; -- txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx)); -+ txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, -+ dev->phys[band_idx]->mgmt_pwr_enhance ? -+ 0 : spe_idx)); - } - - txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index cbe8da5..c96621f 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1257,6 +1257,7 @@ enum { - MCU_EXT_CMD_SWLNA_ACI_CTRL = 0xc0, - MCU_EXT_CMD_CSI_CTRL = 0xc2, - MCU_EXT_CMD_IPI_HIST_SCAN = 0xc5, -+ MCU_EXT_CMD_LPI_CTRL = 0xc8, - }; - - enum { -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 502b493..b2a4ff4 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -1297,7 +1297,6 @@ mt7915_txpower_info_show(struct seq_file *file, void *data) - { - struct mt7915_phy *phy = file->private; - struct mt76_phy *mphy = phy->mt76; -- struct mt76_dev *dev = mphy->dev; - struct { - u8 category; - u8 rsv1; -@@ -1374,7 +1373,7 @@ mt7915_txpower_info_show(struct seq_file *file, void *data) - seq_printf(file, " Theraml Compensation Value: %d\n", - basic_info.thermal_compensate_value); - -- np = mt76_find_power_limits_node(dev); -+ np = mt76_find_power_limits_node(mphy); - seq_printf(file, " RegDB: %s\n", !np ? "enable" : "disable"); - - out: -diff --git a/mt7915/init.c b/mt7915/init.c -index 373f4f5..b53075b 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -287,7 +287,7 @@ static void __mt7915_init_txpower(struct mt7915_phy *phy, - - phy->sku_limit_en = true; - phy->sku_path_en = true; -- np = mt76_find_power_limits_node(&dev->mt76); -+ np = mt76_find_power_limits_node(phy->mt76); - for (i = 0; i < sband->n_channels; i++) { - struct ieee80211_channel *chan = &sband->channels[i]; - u32 target_power = 0; -@@ -331,8 +331,10 @@ void mt7915_init_txpower(struct mt7915_phy *phy) - __mt7915_init_txpower(phy, &phy->mt76->sband_2g.sband); - if (phy->mt76->cap.has_5ghz) - __mt7915_init_txpower(phy, &phy->mt76->sband_5g.sband); -- if (phy->mt76->cap.has_6ghz) -+ if (phy->mt76->cap.has_6ghz) { - __mt7915_init_txpower(phy, &phy->mt76->sband_6g.sband); -+ phy->mt76->beacon_dup = 1; -+ } - } - - static void -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index c5f60c0..e17c61d 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -1522,7 +1522,8 @@ mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif, - { - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct mt76_phy *mphy = mvif->phy->mt76; -- u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask); -+ u8 spe_idx = mphy->mgmt_pwr_enhance ? -+ 0 : mt76_connac_spe_idx(mphy->antenna_mask); - - return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx, - RATE_PARAM_SPE_UPDATE); -@@ -3488,6 +3489,22 @@ mt7915_update_txpower(struct mt7915_phy *phy, int tx_power) - mphy->txpower_cur = e2p_power_limit; - } - -+int mt7915_get_psd_country(char *country) -+{ -+ char country_list[][3] = {"US", "KR", "BR", "CL", "MY", ""}; -+ int i; -+ -+ if (strlen(country) != 2) -+ return 0; -+ -+ for (i = 0; country_list[i][0] != '\0'; i++) { -+ if (!strncmp(country, country_list[i], 2)) -+ return 1; -+ } -+ -+ return 0; -+} -+ - int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy) - { - #define TX_POWER_LIMIT_TABLE_RATE 0 -@@ -3519,14 +3536,37 @@ int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy) - mt7915_update_txpower(phy, tx_power); - return 0; - } -- - skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, - sizeof(hdr) + MT7915_SKU_RATE_NUM); - if (!skb) - return -ENOMEM; - - skb_put_data(skb, &hdr, sizeof(hdr)); -- skb_put_data(skb, &la.cck, len[SKU_CCK] + len[SKU_OFDM]); -+ skb_put_data(skb, &la.cck, len[SKU_CCK]); -+ -+ if (phy->mt76->cap.has_6ghz && mphy->beacon_dup && -+ !mt7915_get_psd_country(dev->mt76.alpha2)) { -+ switch (mphy->chandef.width) { -+ case NL80211_CHAN_WIDTH_20: -+ skb_put_data(skb, &la.mcs[0], len[SKU_OFDM]); -+ break; -+ case NL80211_CHAN_WIDTH_40: -+ skb_put_data(skb, &la.mcs[1], len[SKU_OFDM]); -+ break; -+ case NL80211_CHAN_WIDTH_80: -+ skb_put_data(skb, &la.mcs[2], len[SKU_OFDM]); -+ break; -+ case NL80211_CHAN_WIDTH_160: -+ skb_put_data(skb, &la.mcs[3], len[SKU_OFDM]); -+ break; -+ default: -+ skb_put_data(skb, &la.ofdm, len[SKU_OFDM]); -+ break; -+ } -+ } else { -+ skb_put_data(skb, &la.ofdm, len[SKU_OFDM]); -+ } -+ - skb_put_data(skb, &la.mcs[0], len[SKU_HT_BW20]); - skb_put_data(skb, &la.mcs[1], len[SKU_HT_BW40]); - -@@ -3556,8 +3596,34 @@ int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy) - hdr.limit_type = TX_POWER_LIMIT_TABLE_PATH; - skb_put_data(skb, &hdr, sizeof(hdr)); - skb_put_data(skb, &la.path.cck, sizeof(la.path.cck)); -- skb_put_data(skb, &la.path.ofdm, sizeof(la.path.ofdm)); -- skb_put_data(skb, &la.path.ofdm_bf[1], sizeof(la.path.ofdm_bf) - 1); -+ -+ if (phy->mt76->cap.has_6ghz && mphy->beacon_dup) { -+ switch (mphy->chandef.width) { -+ case NL80211_CHAN_WIDTH_20: -+ skb_put_data(skb, &la.path.ru[3], sizeof(la.path.ofdm)); -+ skb_put_data(skb, &la.path.ru_bf[3][1], sizeof(la.path.ofdm_bf) - 1); -+ break; -+ case NL80211_CHAN_WIDTH_40: -+ skb_put_data(skb, &la.path.ru[4], sizeof(la.path.ofdm)); -+ skb_put_data(skb, &la.path.ru_bf[4][1], sizeof(la.path.ofdm_bf) - 1); -+ break; -+ case NL80211_CHAN_WIDTH_80: -+ skb_put_data(skb, &la.path.ru[5], sizeof(la.path.ofdm)); -+ skb_put_data(skb, &la.path.ru_bf[5][1], sizeof(la.path.ofdm_bf) - 1); -+ break; -+ case NL80211_CHAN_WIDTH_160: -+ skb_put_data(skb, &la.path.ru[6], sizeof(la.path.ofdm)); -+ skb_put_data(skb, &la.path.ru_bf[6][1], sizeof(la.path.ofdm_bf) - 1); -+ break; -+ default: -+ skb_put_data(skb, &la.path.ofdm, sizeof(la.path.ofdm)); -+ skb_put_data(skb, &la.path.ofdm_bf[1], sizeof(la.path.ofdm_bf) - 1); -+ break; -+ } -+ } else { -+ skb_put_data(skb, &la.path.ofdm, sizeof(la.path.ofdm)); -+ skb_put_data(skb, &la.path.ofdm_bf[1], sizeof(la.path.ofdm_bf) - 1); -+ } - - /* HT20 and HT40 */ - skb_put_data(skb, &la.path.ru[3], sizeof(la.path.ru[3])); -@@ -3633,6 +3699,21 @@ int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len, - return 0; - } - -+int mt7915_mcu_set_lpi(struct mt7915_phy *phy, bool en) -+{ -+ struct mt76_dev *mdev = &(phy->dev->mt76); -+ struct { -+ u8 enable; -+ u8 psd_limit; -+ u8 _rsv[2]; -+ } __packed req = { -+ .enable = en, -+ .psd_limit = en ? mt7915_get_psd_country(mdev->alpha2) : 0, -+ }; -+ return mt76_mcu_send_msg(mdev, MCU_EXT_CMD(LPI_CTRL), &req, -+ sizeof(req), false); -+} -+ - int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, - u8 en) - { -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 1b2f584..ff08d25 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -807,6 +807,7 @@ int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, - void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb); - int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, - struct ieee80211_sta *sta); -+int mt7915_mcu_set_lpi(struct mt7915_phy *phy, bool en); - #endif - int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation); - int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value); -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index 53294c1..352b8e9 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3945,6 +3945,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - &fops_txbf_sta_rec); - - debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable); -+ debugfs_create_u8("mgmt_pwr_enhance", 0600, dir, &phy->mt76->mgmt_pwr_enhance); - - debugfs_create_devm_seqfile(dev->mt76.dev, "eeprom_mode", dir, - mt7915_show_eeprom_mode); -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 432d750..566fec0 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -106,6 +106,13 @@ bss_color_ctrl_policy[NUM_MTK_VENDOR_ATTRS_BSS_COLOR_CTRL] = { - [MTK_VENDOR_ATTR_AVAL_BSS_COLOR_BMP] = { .type = NLA_U64 }, - }; - -+static struct nla_policy -+txpower_ctrl_policy[NUM_MTK_VENDOR_ATTRS_TXPOWER_CTRL] = { -+ [MTK_VENDOR_ATTR_TXPOWER_CTRL_LPI_ENABLE] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_TXPOWER_CTRL_SKU_IDX] = { .type = NLA_U8 }, -+ [MTK_VENDOR_ATTR_TXPOWER_CTRL_BCN_DUP] = { .type = NLA_U8 }, -+}; -+ - struct csi_null_tone { - u8 start; - u8 end; -@@ -1335,6 +1342,63 @@ mt7915_vendor_bss_color_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev - return len; - } - -+static int mt7915_vendor_txpower_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ struct mt76_phy *mphy = phy->mt76; -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_TXPOWER_CTRL]; -+ struct mt76_power_limits limits; -+ int err; -+ u8 val; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_TXPOWER_CTRL_MAX, data, data_len, -+ txpower_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (tb[MTK_VENDOR_ATTR_TXPOWER_CTRL_LPI_ENABLE]) { -+ val = nla_get_u8(tb[MTK_VENDOR_ATTR_TXPOWER_CTRL_LPI_ENABLE]); -+ -+ if (mphy->cap.has_6ghz) { -+ err = mt7915_mcu_set_lpi(phy, val); -+ if (err) -+ return err; -+ } -+ } -+ -+ if (tb[MTK_VENDOR_ATTR_TXPOWER_CTRL_SKU_IDX]) { -+ mphy->sku_idx = nla_get_u8(tb[MTK_VENDOR_ATTR_TXPOWER_CTRL_SKU_IDX]); -+ -+ if (mt76_find_power_limits_node(mphy) == NULL) -+ mphy->sku_idx = 0; -+ -+ phy->sku_path_en = true; -+ mt76_get_rate_power_limits(mphy, mphy->chandef.chan, &limits, 127); -+ if (!limits.path.ofdm[0]) -+ phy->sku_path_en = false; -+ -+ err = mt7915_mcu_set_sku_en(phy); -+ if (err) -+ return err; -+ } -+ -+ if (tb[MTK_VENDOR_ATTR_TXPOWER_CTRL_BCN_DUP]) { -+ val = nla_get_u8(tb[MTK_VENDOR_ATTR_TXPOWER_CTRL_BCN_DUP]); -+ if (mphy->cap.has_6ghz) -+ mphy->beacon_dup = val; -+ } -+ -+ err = mt7915_mcu_set_txpower_sku(phy); -+ if (err) -+ return err; -+ -+ return 0; -+} -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -1451,6 +1515,17 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .dumpit = mt7915_vendor_bss_color_ctrl_dump, - .policy = bss_color_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_BSS_COLOR_CTRL_MAX, -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_TXPOWER_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_txpower_ctrl, -+ .policy = txpower_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_TXPOWER_CTRL_MAX, - } - }; - -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 03d1660..5b8a1fb 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -16,6 +16,7 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8, - MTK_NL80211_VENDOR_SUBCMD_IBF_CTRL = 0xc9, - MTK_NL80211_VENDOR_SUBCMD_BSS_COLOR_CTRL = 0xca, -+ MTK_NL80211_VENDOR_SUBCMD_TXPOWER_CTRL = 0xce, - }; - - -@@ -274,4 +275,18 @@ enum mtk_vendor_attr_bss_color_ctrl { - MTK_VENDOR_ATTR_BSS_COLOR_CTRL_MAX = - NUM_MTK_VENDOR_ATTRS_BSS_COLOR_CTRL - 1 - }; -+ -+enum mtk_vendor_attr_txpower_ctrl { -+ MTK_VENDOR_ATTR_TXPOWER_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_TXPOWER_CTRL_LPI_ENABLE, -+ MTK_VENDOR_ATTR_TXPOWER_CTRL_SKU_IDX, -+ MTK_VENDOR_ATTR_TXPOWER_CTRL_BCN_DUP, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_TXPOWER_CTRL, -+ MTK_VENDOR_ATTR_TXPOWER_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_TXPOWER_CTRL - 1 -+}; -+ - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1044-wifi-mt76-testmode-add-cheetah-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1044-wifi-mt76-testmode-add-cheetah-support.patch deleted file mode 100644 index fa23d7d98..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1044-wifi-mt76-testmode-add-cheetah-support.patch +++ /dev/null @@ -1,58 +0,0 @@ -From e9b737f036595d84f680ff9ee15cfffe5cd08efc Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Tue, 31 Oct 2023 16:29:13 +0800 -Subject: [PATCH 1044/1053] wifi: mt76: testmode: add cheetah support - -Signed-off-by: StanleyYP Wang ---- - mt7915/testmode.c | 9 +++++---- - 1 file changed, 5 insertions(+), 4 deletions(-) - -diff --git a/mt7915/testmode.c b/mt7915/testmode.c -index faf6014..ecd6271 100644 ---- a/mt7915/testmode.c -+++ b/mt7915/testmode.c -@@ -2151,7 +2151,7 @@ mt7915_tm_group_prek(struct mt7915_phy *phy, enum mt76_testmode_state state) - eeprom = mdev->eeprom.data; - dev->cur_prek_offset = 0; - group_size = mt7915_get_cal_group_size(dev); -- dpd_size = is_mt7915(&dev->mt76) ? MT_EE_CAL_DPD_SIZE_V1 : MT_EE_CAL_DPD_SIZE_V2; -+ dpd_size = mt7915_get_cal_dpd_size(dev); - size = group_size + dpd_size; - offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; - -@@ -2233,11 +2233,11 @@ mt7915_tm_dpd_prek(struct mt7915_phy *phy, enum mt76_testmode_state state) - eeprom = mdev->eeprom.data; - dev->cur_prek_offset = 0; - group_size = mt7915_get_cal_group_size(dev); -+ dpd_size = mt7915_get_cal_dpd_size(dev); - dev->dpd_chan_num_2g = hweight32(DPD_2G_CH_BW20_BITMAP_0); - if (is_mt7915(&dev->mt76)) { - dev->dpd_chan_num_5g = hweight32(DPD_5G_CH_BW20_BITMAP_7915_0); - dev->dpd_chan_num_6g = 0; -- dpd_size = MT_EE_CAL_DPD_SIZE_V1; - offs = MT_EE_DO_PRE_CAL; - } else { - dev->dpd_chan_num_5g = hweight32(DPD_5G_CH_BW20_BITMAP_0) + -@@ -2246,7 +2246,8 @@ mt7915_tm_dpd_prek(struct mt7915_phy *phy, enum mt76_testmode_state state) - dev->dpd_chan_num_6g = hweight32(DPD_6G_CH_BW20_BITMAP_0) + - hweight32(DPD_6G_CH_BW20_BITMAP_1) + - ARRAY_SIZE(bw160_6g_freq); -- dpd_size = MT_EE_CAL_DPD_SIZE_V2; -+ if (is_mt7981(&dev->mt76)) -+ dev->dpd_chan_num_6g = 0; - offs = MT_EE_DO_PRE_CAL_V2; - } - size = group_size + dpd_size; -@@ -2711,7 +2712,7 @@ mt7915_tm_dump_precal(struct mt76_phy *mphy, struct sk_buff *msg, int flag, int - } - - group_size = mt7915_get_cal_group_size(dev); -- dpd_size = is_mt7915(&dev->mt76) ? MT_EE_CAL_DPD_SIZE_V1 : MT_EE_CAL_DPD_SIZE_V2; -+ dpd_size = mt7915_get_cal_dpd_size(dev); - dpd_per_chan_size = is_mt7915(&dev->mt76) ? 2 : 3; - total_size = group_size + dpd_size; - pre_cal = dev->cal; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1045-wifi-mt76-mt7915-add-no_beacon-vendor-command-for-ce.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1045-wifi-mt76-mt7915-add-no_beacon-vendor-command-for-ce.patch deleted file mode 100644 index d0fd257aa..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1045-wifi-mt76-mt7915-add-no_beacon-vendor-command-for-ce.patch +++ /dev/null @@ -1,154 +0,0 @@ -From 966bba87073d983aa136f1f762d1b787a81ec767 Mon Sep 17 00:00:00 2001 -From: MeiChia Chiu -Date: Wed, 24 Jan 2024 14:39:14 +0800 -Subject: [PATCH 1045/1053] wifi: mt76: mt7915: add no_beacon vendor command - for cert - -Add the vendor command to disable/enable beacon - -[Usage] -hostapd_cli -i no_beacon - -0: enable beacon -1: disable beacon - -Signed-off-by: MeiChia Chiu ---- - mt7915/mcu.c | 11 +++++++++++ - mt7915/mt7915.h | 1 + - mt7915/vendor.c | 42 +++++++++++++++++++++++++++++++++++++++++- - mt7915/vendor.h | 12 ++++++++++++ - 4 files changed, 65 insertions(+), 1 deletion(-) - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index e17c61d..ddb738c 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -5101,6 +5101,17 @@ int mt7915_mcu_set_rfeature_trig_type(struct mt7915_phy *phy, u8 enable, u8 trig - return 0; - } - } -+ -+void mt7915_set_beacon_vif(void *data, u8 *mac, struct ieee80211_vif *vif) -+{ -+ struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; -+ struct ieee80211_hw *hw = mvif->phy->mt76->hw; -+ u8 val = *((u8 *)data); -+ -+ vif->bss_conf.enable_beacon = val; -+ -+ mt7915_mcu_add_beacon(hw, vif, val); -+} - #endif - - #ifdef MTK_DEBUG -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index ff08d25..34f1a35 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -808,6 +808,7 @@ void mt7915_vendor_amnt_fill_rx(struct mt7915_phy *phy, struct sk_buff *skb); - int mt7915_vendor_amnt_sta_remove(struct mt7915_phy *phy, - struct ieee80211_sta *sta); - int mt7915_mcu_set_lpi(struct mt7915_phy *phy, bool en); -+void mt7915_set_beacon_vif(void *data, u8 *mac, struct ieee80211_vif *vif); - #endif - int mt7915_mcu_set_edcca(struct mt7915_phy *phy, int mode, u8 *value, s8 compensation); - int mt7915_mcu_get_edcca(struct mt7915_phy *phy, u8 mode, s8 *value); -diff --git a/mt7915/vendor.c b/mt7915/vendor.c -index 566fec0..6154d1a 100644 ---- a/mt7915/vendor.c -+++ b/mt7915/vendor.c -@@ -113,6 +113,11 @@ txpower_ctrl_policy[NUM_MTK_VENDOR_ATTRS_TXPOWER_CTRL] = { - [MTK_VENDOR_ATTR_TXPOWER_CTRL_BCN_DUP] = { .type = NLA_U8 }, - }; - -+static const struct nla_policy -+beacon_ctrl_policy[NUM_MTK_VENDOR_ATTRS_BEACON_CTRL] = { -+ [MTK_VENDOR_ATTR_BEACON_CTRL_MODE] = { .type = NLA_U8 }, -+}; -+ - struct csi_null_tone { - u8 start; - u8 end; -@@ -1399,6 +1404,30 @@ static int mt7915_vendor_txpower_ctrl(struct wiphy *wiphy, - return 0; - } - -+static int mt7915_vendor_beacon_ctrl(struct wiphy *wiphy, -+ struct wireless_dev *wdev, -+ const void *data, -+ int data_len) -+{ -+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); -+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_BEACON_CTRL]; -+ int err; -+ u8 val8; -+ -+ err = nla_parse(tb, MTK_VENDOR_ATTR_BEACON_CTRL_MAX, data, data_len, -+ beacon_ctrl_policy, NULL); -+ if (err) -+ return err; -+ -+ if (tb[MTK_VENDOR_ATTR_BEACON_CTRL_MODE]) { -+ val8 = nla_get_u8(tb[MTK_VENDOR_ATTR_BEACON_CTRL_MODE]); -+ ieee80211_iterate_active_interfaces_atomic(hw, IEEE80211_IFACE_ITER_RESUME_ALL, -+ mt7915_set_beacon_vif, &val8); -+ } -+ -+ return 0; -+} -+ - static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - { - .info = { -@@ -1526,7 +1555,18 @@ static const struct wiphy_vendor_command mt7915_vendor_commands[] = { - .doit = mt7915_vendor_txpower_ctrl, - .policy = txpower_ctrl_policy, - .maxattr = MTK_VENDOR_ATTR_TXPOWER_CTRL_MAX, -- } -+ }, -+ { -+ .info = { -+ .vendor_id = MTK_NL80211_VENDOR_ID, -+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_BEACON_CTRL, -+ }, -+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | -+ WIPHY_VENDOR_CMD_NEED_RUNNING, -+ .doit = mt7915_vendor_beacon_ctrl, -+ .policy = beacon_ctrl_policy, -+ .maxattr = MTK_VENDOR_ATTR_BEACON_CTRL_MAX, -+ }, - }; - - void mt7915_vendor_register(struct mt7915_phy *phy) -diff --git a/mt7915/vendor.h b/mt7915/vendor.h -index 5b8a1fb..661d636 100644 ---- a/mt7915/vendor.h -+++ b/mt7915/vendor.h -@@ -16,6 +16,7 @@ enum mtk_nl80211_vendor_subcmds { - MTK_NL80211_VENDOR_SUBCMD_3WIRE_CTRL = 0xc8, - MTK_NL80211_VENDOR_SUBCMD_IBF_CTRL = 0xc9, - MTK_NL80211_VENDOR_SUBCMD_BSS_COLOR_CTRL = 0xca, -+ MTK_NL80211_VENDOR_SUBCMD_BEACON_CTRL = 0xcd, - MTK_NL80211_VENDOR_SUBCMD_TXPOWER_CTRL = 0xce, - }; - -@@ -289,4 +290,15 @@ enum mtk_vendor_attr_txpower_ctrl { - NUM_MTK_VENDOR_ATTRS_TXPOWER_CTRL - 1 - }; - -+enum mtk_vendor_attr_beacon_ctrl { -+ MTK_VENDOR_ATTR_BEACON_CTRL_UNSPEC, -+ -+ MTK_VENDOR_ATTR_BEACON_CTRL_MODE, -+ -+ /* keep last */ -+ NUM_MTK_VENDOR_ATTRS_BEACON_CTRL, -+ MTK_VENDOR_ATTR_BEACON_CTRL_MAX = -+ NUM_MTK_VENDOR_ATTRS_BEACON_CTRL - 1 -+}; -+ - #endif --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1046-wifi-mt76-mt7915-support-spatial-reuse-debug-command.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1046-wifi-mt76-mt7915-support-spatial-reuse-debug-command.patch deleted file mode 100644 index 65882778c..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1046-wifi-mt76-mt7915-support-spatial-reuse-debug-command.patch +++ /dev/null @@ -1,333 +0,0 @@ -From 3a8ffe4b10bd9949dcd689406d5378a1b93c201d Mon Sep 17 00:00:00 2001 -From: Howard Hsu -Date: Thu, 15 Feb 2024 11:16:16 +0800 -Subject: [PATCH 1046/1053] wifi: mt76: mt7915: support spatial reuse debug - commands - -Support 3 spatial reuse debug commands: -1. sr_enable: enable/disable spatial reuse -2. sr_scene_cond: check spatial resue scene detection algorithm result -3. sr_stats: check spatial resue tx statistics - -Signed-off-by: Howard Hsu ---- - mt76_connac_mcu.h | 1 + - mt7915/mcu.c | 95 ++++++++++++++++++++++++++++++++++++++++++++ - mt7915/mcu.h | 48 ++++++++++++++++++++++ - mt7915/mt7915.h | 3 ++ - mt7915/mtk_debugfs.c | 48 ++++++++++++++++++++-- - 5 files changed, 191 insertions(+), 4 deletions(-) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index c96621f..dc60e35 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1031,6 +1031,7 @@ enum { - MCU_EXT_EVENT_WA_TX_STAT = 0x74, - MCU_EXT_EVENT_BCC_NOTIFY = 0x75, - MCU_EXT_EVENT_MURU_CTRL = 0x9f, -+ MCU_EXT_EVENT_SR = 0xa8, - MCU_EXT_EVENT_CSI_REPORT = 0xc2, - }; - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index ddb738c..b3faf77 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -452,6 +452,91 @@ mt7915_mcu_rx_bss_acq_pkt_cnt(struct mt7915_dev *dev, struct sk_buff * skb) - } - } - -+#ifdef MTK_DEBUG -+void mt7915_mcu_rx_sr_swsd(struct mt7915_dev *dev, struct sk_buff *skb) -+{ -+#define SR_SCENE_DETECTION_TIMER_PERIOD_MS 500 -+ struct mt7915_mcu_sr_swsd_event *event; -+ static const char * const rules[] = {"NO CONNECTED", "NO CONGESTION", -+ "NO INTERFERENCE", "MESH ILLEGAL APCLI", -+ "SR ON"}; -+ u8 idx; -+ -+ event = (struct mt7915_mcu_sr_swsd_event *)skb->data; -+ idx = event->basic.band_idx; -+ -+ dev_info(dev->mt76.dev, "Band index = %u\n", event->basic.band_idx); -+ dev_info(dev->mt76.dev, "Hit Rule = %s\n", rules[event->rule[idx]]); -+ dev_info(dev->mt76.dev, "Timer Period = %d(us)\n" -+ "Congestion Ratio = %d.%1d%%\n", -+ SR_SCENE_DETECTION_TIMER_PERIOD_MS * 1000, -+ le32_to_cpu(event->total_airtime_ratio[idx]) / 10, -+ le32_to_cpu(event->total_airtime_ratio[idx]) % 10); -+ dev_info(dev->mt76.dev, -+ "Total Airtime = %d(us)\n" -+ "ChBusy = %d\n" -+ "SrTx = %d\n" -+ "OBSS = %d\n" -+ "MyTx = %d\n" -+ "MyRx = %d\n" -+ "Interference Ratio = %d.%1d%%\n", -+ le32_to_cpu(event->total_airtime[idx]), -+ le32_to_cpu(event->channel_busy_time[idx]), -+ le32_to_cpu(event->sr_tx_airtime[idx]), -+ le32_to_cpu(event->obss_airtime[idx]), -+ le32_to_cpu(event->my_tx_airtime[idx]), -+ le32_to_cpu(event->my_rx_airtime[idx]), -+ le32_to_cpu(event->obss_airtime_ratio[idx]) / 10, -+ le32_to_cpu(event->obss_airtime_ratio[idx]) % 10); -+} -+ -+void mt7915_mcu_rx_sr_hw_indicator(struct mt7915_dev *dev, struct sk_buff *skb) -+{ -+ struct mt7915_mcu_sr_hw_ind_event *event; -+ -+ event = (struct mt7915_mcu_sr_hw_ind_event *)skb->data; -+ -+ dev_info(dev->mt76.dev, "Inter PPDU Count = %u\n", -+ le16_to_cpu(event->inter_bss_ppdu_cnt)); -+ dev_info(dev->mt76.dev, "SR Valid Count = %u\n", -+ le16_to_cpu(event->non_srg_valid_cnt)); -+ dev_info(dev->mt76.dev, "SR Tx Count = %u\n", -+ le32_to_cpu(event->sr_ampdu_mpdu_cnt)); -+ dev_info(dev->mt76.dev, "SR Tx Acked Count = %u\n", -+ le32_to_cpu(event->sr_ampdu_mpdu_acked_cnt)); -+} -+ -+static void -+mt7915_mcu_rx_sr_event(struct mt7915_dev *dev, struct sk_buff *skb) -+{ -+ struct mt7915_mcu_sr_basic_event *event; -+ struct mt7915_phy *phy; -+ -+ event = (struct mt7915_mcu_sr_basic_event *)skb->data; -+ -+ if (event->band_idx > MT_BAND1) -+ dev_info(dev->mt76.dev, "Invalid band idx %d\n", event->band_idx); -+ -+ switch (event->sub_event_id) { -+ case SPR_EVENT_CFG_SR_ENABLE: -+ phy = dev->mt76.phys[event->band_idx]->priv; -+ if (phy) -+ phy->sr_enable = le32_to_cpu(event->value); -+ break; -+ case SPR_EVENT_SR_SW_SD: -+ mt7915_mcu_rx_sr_swsd(dev, skb); -+ break; -+ case SPR_EVENT_SR_HW_IND: -+ mt7915_mcu_rx_sr_hw_indicator(dev, skb); -+ break; -+ default: -+ dev_info(dev->mt76.dev, "Unknown SR event tag %d\n", -+ event->sub_event_id); -+ break; -+ } -+} -+#endif -+ - static void - mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - { -@@ -479,6 +564,11 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) - case MCU_EXT_EVENT_BCC_NOTIFY: - mt7915_mcu_rx_bcc_notify(dev, skb); - break; -+#ifdef MTK_DEBUG -+ case MCU_EXT_EVENT_SR: -+ mt7915_mcu_rx_sr_event(dev, skb); -+ break; -+#endif - #if defined CONFIG_NL80211_TESTMODE || defined MTK_DEBUG - case MCU_EXT_EVENT_BF_STATUS_READ: - mt7915_mcu_txbf_status_read(dev, skb); -@@ -524,6 +614,7 @@ void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb) - rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC || - rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY || - rxd->ext_eid == MCU_EXT_EVENT_BF_STATUS_READ || -+ rxd->ext_eid == MCU_EXT_EVENT_SR || - !rxd->seq) && - !(rxd->eid == MCU_CMD_EXT_CID && - rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT)) -@@ -4002,6 +4093,10 @@ int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif, - if (ret) - return ret; - -+#ifdef MTK_DEBUG -+ phy->sr_enable = he_obss_pd->enable; -+#endif -+ - if (sr_scene_detect || !he_obss_pd->enable) - return 0; - -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index 742a785..f476767 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -42,6 +42,45 @@ struct mt7915_mcu_thermal_notify { - u8 rsv[8]; - } __packed; - -+#ifdef MTK_DEBUG -+struct mt7915_mcu_sr_basic_event { -+ struct mt76_connac2_mcu_rxd rxd; -+ -+ u8 sub_event_id; -+ u8 arg_num; -+ u8 band_idx; -+ u8 status; -+ u8 rsv[4]; -+ __le32 value; -+} __packed; -+ -+struct mt7915_mcu_sr_swsd_event { -+ struct mt7915_mcu_sr_basic_event basic; -+ u8 rsv[32]; -+ __le32 sr_tx_airtime[2]; -+ __le32 obss_airtime[2]; -+ __le32 my_tx_airtime[2]; -+ __le32 my_rx_airtime[2]; -+ __le32 channel_busy_time[2]; -+ __le32 total_airtime[2]; -+ __le32 total_airtime_ratio[2]; -+ __le32 obss_airtime_ratio[2]; -+ u8 rule[2]; -+ u8 rsv2[102]; -+} __packed; -+ -+struct mt7915_mcu_sr_hw_ind_event { -+ struct mt7915_mcu_sr_basic_event basic; -+ u8 rsv[2]; -+ __le16 non_srg_valid_cnt; -+ u8 rsv2[4]; -+ __le16 inter_bss_ppdu_cnt; -+ u8 rsv3[6]; -+ __le32 sr_ampdu_mpdu_cnt; -+ __le32 sr_ampdu_mpdu_acked_cnt; -+} __packed; -+#endif -+ - struct mt7915_mcu_csa_notify { - struct mt76_connac2_mcu_rxd rxd; - -@@ -532,15 +571,24 @@ enum { - - enum { - SPR_ENABLE = 0x1, -+ SPR_GET_ENABLE = 0x2, - SPR_ENABLE_SD = 0x3, - SPR_ENABLE_MODE = 0x5, - SPR_ENABLE_DPD = 0x23, - SPR_ENABLE_TX = 0x25, - SPR_SET_SRG_BITMAP = 0x80, -+ SPR_GET_SCENE_COND = 0x84, - SPR_SET_PARAM = 0xc2, -+ SPR_GET_STATS = 0xd4, - SPR_SET_SIGA = 0xdc, - }; - -+enum { -+ SPR_EVENT_CFG_SR_ENABLE = 0x1, -+ SPR_EVENT_SR_SW_SD = 0x82, -+ SPR_EVENT_SR_HW_IND = 0xC9, -+}; -+ - enum { - THERMAL_PROTECT_PARAMETER_CTRL, - THERMAL_PROTECT_BASIC_INFO, -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 34f1a35..47f7d16 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -354,6 +354,9 @@ struct mt7915_phy { - struct mt7915_air_monitor_ctrl amnt_ctrl; - #endif - struct mt7915_scs_ctrl scs_ctrl; -+#ifdef MTK_DEBUG -+ bool sr_enable; -+#endif - }; - - #ifdef MTK_DEBUG -diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c -index d3d3b17..78ac4e5 100644 ---- a/mt7915/mtk_debugfs.c -+++ b/mt7915/mtk_debugfs.c -@@ -3809,16 +3809,34 @@ mt7915_sw_aci_set(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(fops_sw_aci, NULL, - mt7915_sw_aci_set, "%llx\n"); - -+static int -+mt7915_sr_enable_get(void *data, u64 *enable) -+{ -+ struct mt7915_phy *phy = data; -+ -+ *enable = phy->sr_enable; -+ -+ return 0; -+} -+ - static int - mt7915_sr_enable_set(void *data, u64 val) - { - struct mt7915_phy *phy = data; -+ int ret; -+ -+ if (!!val == phy->sr_enable) -+ return 0; -+ -+ ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, !!val); -+ if (ret) -+ return ret; - -- return mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, val); -+ return mt7915_mcu_enable_obss_spr(phy, SPR_GET_ENABLE, 0); - } - --DEFINE_DEBUGFS_ATTRIBUTE(fops_sr_enable, NULL, -- mt7915_sr_enable_set, "%llx\n"); -+DEFINE_DEBUGFS_ATTRIBUTE(fops_sr_enable, mt7915_sr_enable_get, -+ mt7915_sr_enable_set, "%llu\n"); - - static int - mt7915_scs_enable_set(void *data, u64 val) -@@ -3859,6 +3877,26 @@ mt7915_thermal_recal_set(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(fops_thermal_recal, NULL, - mt7915_thermal_recal_set, "%llu\n"); - -+static int -+mt7915_sr_stats_show(struct seq_file *file, void *data) -+{ -+ struct mt7915_phy *phy = file->private; -+ -+ return mt7915_mcu_enable_obss_spr(phy, SPR_GET_STATS, 0); -+} -+ -+DEFINE_SHOW_ATTRIBUTE(mt7915_sr_stats); -+ -+static int -+mt7915_sr_scene_cond_show(struct seq_file *file, void *data) -+{ -+ struct mt7915_phy *phy = file->private; -+ -+ return mt7915_mcu_enable_obss_spr(phy, SPR_GET_SCENE_COND, 0); -+} -+ -+DEFINE_SHOW_ATTRIBUTE(mt7915_sr_scene_cond); -+ - int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - { - struct mt7915_dev *dev = phy->dev; -@@ -3951,9 +3989,11 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) - mt7915_show_eeprom_mode); - debugfs_create_file("sw_aci", 0600, dir, dev, - &fops_sw_aci); -- debugfs_create_file("sr_enable", 0200, dir, phy, &fops_sr_enable); -+ debugfs_create_file("sr_enable", 0600, dir, phy, &fops_sr_enable); - debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable); - debugfs_create_file("thermal_recal", 0200, dir, dev, &fops_thermal_recal); -+ debugfs_create_file("sr_stats", 0400, dir, phy, &mt7915_sr_stats_fops); -+ debugfs_create_file("sr_scene_cond", 0400, dir, phy, &mt7915_sr_scene_cond_fops); - - return 0; - } --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1047-wifi-mt76-try-more-times-when-send-message-timeout.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1047-wifi-mt76-try-more-times-when-send-message-timeout.patch deleted file mode 100644 index ed1ac982f..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1047-wifi-mt76-try-more-times-when-send-message-timeout.patch +++ /dev/null @@ -1,231 +0,0 @@ -From b0e4d25607d3a52f93139919c85482f87087f145 Mon Sep 17 00:00:00 2001 -From: Bo Jiao -Date: Thu, 7 Mar 2024 11:13:45 +0800 -Subject: [PATCH 1047/1053] wifi: mt76: try more times when send message - timeout. - -CR-Id: WCNCR00334773 -Signed-off-by: Bo Jiao ---- - dma.c | 7 ++++-- - mcu.c | 66 ++++++++++++++++++++++++++++++++++++---------------- - mt7915/mac.c | 43 +++++++++++----------------------- - 3 files changed, 64 insertions(+), 52 deletions(-) - -diff --git a/dma.c b/dma.c -index bc8afcf..133a50d 100644 ---- a/dma.c -+++ b/dma.c -@@ -504,9 +504,12 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q, - { - struct mt76_queue_buf buf = {}; - dma_addr_t addr; -+ int ret = -ENOMEM; - -- if (test_bit(MT76_MCU_RESET, &dev->phy.state)) -+ if (test_bit(MT76_MCU_RESET, &dev->phy.state)) { -+ ret = -EAGAIN; - goto error; -+ } - - if (q->queued + 1 >= q->ndesc - 1) - goto error; -@@ -528,7 +531,7 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q, - - error: - dev_kfree_skb(skb); -- return -ENOMEM; -+ return ret; - } - - static int -diff --git a/mcu.c b/mcu.c -index fa4b054..de185cc 100644 ---- a/mcu.c -+++ b/mcu.c -@@ -4,6 +4,7 @@ - */ - - #include "mt76.h" -+#include "mt76_connac.h" - #include - - struct sk_buff * -@@ -74,35 +75,60 @@ int mt76_mcu_skb_send_and_get_msg(struct mt76_dev *dev, struct sk_buff *skb, - int cmd, bool wait_resp, - struct sk_buff **ret_skb) - { -+#define MT76_MSG_MAX_RETRY_CNT 3 - unsigned long expires; -- int ret, seq; -+ int ret, seq, retry_cnt; -+ struct sk_buff *skb_tmp; -+ bool retry = wait_resp && is_connac_v2(dev); - - if (ret_skb) - *ret_skb = NULL; - - mutex_lock(&dev->mcu.mutex); -- -- ret = dev->mcu_ops->mcu_skb_send_msg(dev, skb, cmd, &seq); -- if (ret < 0) -- goto out; -- -- if (!wait_resp) { -- ret = 0; -- goto out; -+ retry_cnt = retry ? MT76_MSG_MAX_RETRY_CNT : 1; -+ while (retry_cnt) { -+ skb_tmp = mt76_mcu_msg_alloc(dev, skb->data, skb->len); -+ if (!skb_tmp) -+ goto out; -+ -+ if (retry && retry_cnt < MT76_MSG_MAX_RETRY_CNT) { -+ if (test_bit(MT76_MCU_RESET, &dev->phy.state)) -+ usleep_range(200000, 500000); -+ dev_err(dev->dev, "send message %08x timeout, try again(%d).\n", -+ cmd, (MT76_MSG_MAX_RETRY_CNT - retry_cnt)); -+ } -+ -+ ret = dev->mcu_ops->mcu_skb_send_msg(dev, skb_tmp, cmd, &seq); -+ if (ret < 0 && ret != -EAGAIN) -+ goto out; -+ -+ if (!wait_resp) { -+ ret = 0; -+ goto out; -+ } -+ -+ expires = jiffies + dev->mcu.timeout; -+ -+ do { -+ skb_tmp = mt76_mcu_get_response(dev, expires); -+ ret = dev->mcu_ops->mcu_parse_response(dev, cmd, skb_tmp, seq); -+ if (ret == -ETIMEDOUT) -+ break; -+ -+ if (!ret && ret_skb) -+ *ret_skb = skb_tmp; -+ else -+ dev_kfree_skb(skb_tmp); -+ -+ if (ret != -EAGAIN) -+ goto out; -+ } while (ret == -EAGAIN); -+ -+ retry_cnt--; - } - -- expires = jiffies + dev->mcu.timeout; -- -- do { -- skb = mt76_mcu_get_response(dev, expires); -- ret = dev->mcu_ops->mcu_parse_response(dev, cmd, skb, seq); -- if (!ret && ret_skb) -- *ret_skb = skb; -- else -- dev_kfree_skb(skb); -- } while (ret == -EAGAIN); -- - out: -+ dev_kfree_skb(skb); - mutex_unlock(&dev->mcu.mutex); - - return ret; -diff --git a/mt7915/mac.c b/mt7915/mac.c -index 2e4a8f8..dbc1095 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1389,12 +1389,6 @@ mt7915_mac_restart(struct mt7915_dev *dev) - } - } - -- set_bit(MT76_RESET, &dev->mphy.state); -- set_bit(MT76_MCU_RESET, &dev->mphy.state); -- wake_up(&dev->mt76.mcu.wait); -- if (ext_phy) -- set_bit(MT76_RESET, &ext_phy->state); -- - /* lock/unlock all queues to ensure that no tx is pending */ - mt76_txq_schedule_all(&dev->mphy); - if (ext_phy) -@@ -1495,11 +1489,18 @@ mt7915_mac_full_reset(struct mt7915_dev *dev) - - dev->recovery.hw_full_reset = true; - -- wake_up(&dev->mt76.mcu.wait); - ieee80211_stop_queues(mt76_hw(dev)); - if (ext_phy) - ieee80211_stop_queues(ext_phy->hw); - -+ set_bit(MT76_RESET, &dev->mphy.state); -+ set_bit(MT76_MCU_RESET, &dev->mphy.state); -+ wake_up(&dev->mt76.mcu.wait); -+ if (ext_phy) { -+ set_bit(MT76_RESET, &ext_phy->state); -+ set_bit(MT76_MCU_RESET, &ext_phy->state); -+ } -+ - cancel_delayed_work_sync(&dev->mphy.mac_work); - if (ext_phy) - cancel_delayed_work_sync(&ext_phy->mac_work); -@@ -1587,20 +1588,15 @@ void mt7915_mac_reset_work(struct work_struct *work) - - set_bit(MT76_RESET, &dev->mphy.state); - set_bit(MT76_MCU_RESET, &dev->mphy.state); -+ if (ext_phy) -+ set_bit(MT76_RESET, &ext_phy->state); - wake_up(&dev->mt76.mcu.wait); -- cancel_delayed_work_sync(&dev->mphy.mac_work); -- if (phy2) { -- set_bit(MT76_RESET, &phy2->mt76->state); -- cancel_delayed_work_sync(&phy2->mt76->mac_work); -- } -- cancel_delayed_work_sync(&dev->scs_work); -+ - mt76_worker_disable(&dev->mt76.tx_worker); - mt76_for_each_q_rx(&dev->mt76, i) - napi_disable(&dev->mt76.napi[i]); - napi_disable(&dev->mt76.tx_napi); - -- mutex_lock(&dev->mt76.mutex); -- - if (mtk_wed_device_active(&dev->mt76.mmio.wed)) - mtk_wed_device_stop(&dev->mt76.mmio.wed); - -@@ -1624,8 +1620,8 @@ void mt7915_mac_reset_work(struct work_struct *work) - - clear_bit(MT76_MCU_RESET, &dev->mphy.state); - clear_bit(MT76_RESET, &dev->mphy.state); -- if (phy2) -- clear_bit(MT76_RESET, &phy2->mt76->state); -+ if (ext_phy) -+ clear_bit(MT76_RESET, &ext_phy->state); - - local_bh_disable(); - mt76_for_each_q_rx(&dev->mt76, i) { -@@ -1647,21 +1643,8 @@ void mt7915_mac_reset_work(struct work_struct *work) - if (ext_phy) - ieee80211_wake_queues(ext_phy->hw); - -- mutex_unlock(&dev->mt76.mutex); -- - mt7915_update_beacons(dev); - -- ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mphy.mac_work, -- MT7915_WATCHDOG_TIME); -- if (phy2) -- ieee80211_queue_delayed_work(ext_phy->hw, -- &phy2->mt76->mac_work, -- MT7915_WATCHDOG_TIME); -- -- if (mtk_wed_device_active(&dev->mt76.mmio.wed) && -- mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) -- ieee80211_queue_delayed_work(mt76_hw(dev), &dev->scs_work, HZ); -- - dev_info(dev->mt76.dev,"\n%s L1 SER recovery completed.", - wiphy_name(dev->mt76.hw->wiphy)); - } --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1048-wifi-mt76-mt7915-add-SER-overlap-handle.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1048-wifi-mt76-mt7915-add-SER-overlap-handle.patch deleted file mode 100644 index 28a07af25..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1048-wifi-mt76-mt7915-add-SER-overlap-handle.patch +++ /dev/null @@ -1,138 +0,0 @@ -From 6b84e5955fac1b324c5ad7bf2ea585e6531697a7 Mon Sep 17 00:00:00 2001 -From: Bo Jiao -Date: Tue, 6 Feb 2024 14:46:59 +0800 -Subject: [PATCH 1048/1053] wifi: mt76: mt7915: add SER overlap handle - -CR-ID: WCNCR00355921 -Signed-off-by: Bo Jiao ---- - dma.c | 3 ++- - mcu.c | 7 +++++-- - mt76.h | 9 +++++++++ - mt7915/mac.c | 11 +++++++++++ - mt7915/mcu.c | 7 +++++++ - 5 files changed, 34 insertions(+), 3 deletions(-) - -diff --git a/dma.c b/dma.c -index 133a50d..100d2af 100644 ---- a/dma.c -+++ b/dma.c -@@ -506,7 +506,8 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q, - dma_addr_t addr; - int ret = -ENOMEM; - -- if (test_bit(MT76_MCU_RESET, &dev->phy.state)) { -+ if (test_bit(MT76_MCU_RESET, &dev->phy.state) || -+ dev->recovery_state == MT76_RECOVERY_TRIGGERED) { - ret = -EAGAIN; - goto error; - } -diff --git a/mcu.c b/mcu.c -index de185cc..1bc94e8 100644 ---- a/mcu.c -+++ b/mcu.c -@@ -42,7 +42,9 @@ struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev, - timeout = expires - jiffies; - wait_event_timeout(dev->mcu.wait, - (!skb_queue_empty(&dev->mcu.res_q) || -- test_bit(MT76_MCU_RESET, &dev->phy.state)), -+ test_bit(MT76_MCU_RESET, &dev->phy.state) || -+ dev->recovery_state == MT76_RECOVERY_TRIGGERED || -+ dev->recovery_state == MT76_RECOVERY_OVERLAP_TRIGGERED), - timeout); - return skb_dequeue(&dev->mcu.res_q); - } -@@ -92,7 +94,8 @@ int mt76_mcu_skb_send_and_get_msg(struct mt76_dev *dev, struct sk_buff *skb, - goto out; - - if (retry && retry_cnt < MT76_MSG_MAX_RETRY_CNT) { -- if (test_bit(MT76_MCU_RESET, &dev->phy.state)) -+ if (test_bit(MT76_MCU_RESET, &dev->phy.state) || -+ dev->recovery_state == MT76_RECOVERY_TRIGGERED) - usleep_range(200000, 500000); - dev_err(dev->dev, "send message %08x timeout, try again(%d).\n", - cmd, (MT76_MSG_MAX_RETRY_CNT - retry_cnt)); -diff --git a/mt76.h b/mt76.h -index b023f38..fb50d88 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -478,6 +478,14 @@ enum { - MT76_STATE_WED_RESET, - }; - -+enum { -+ MT76_RECOVERY_INIT, -+ MT76_RECOVERY_TRIGGERED, -+ MT76_RECOVERY_OVERLAP_TRIGGERED, -+ MT76_RECOVERY_PROCESS, -+ MT76_RECOVERY_DONE = MT76_RECOVERY_INIT, -+}; -+ - struct mt76_hw_cap { - bool has_2ghz; - bool has_5ghz; -@@ -944,6 +952,7 @@ struct mt76_dev { - wait_queue_head_t tx_wait; - /* spinclock used to protect wcid pktid linked list */ - spinlock_t status_lock; -+ u16 recovery_state; - - u32 wcid_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; - u32 wcid_phy_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)]; -diff --git a/mt7915/mac.c b/mt7915/mac.c -index dbc1095..e9f50a3 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1579,6 +1579,7 @@ void mt7915_mac_reset_work(struct work_struct *work) - if (!(READ_ONCE(dev->recovery.state) & MT_MCU_CMD_STOP_DMA)) - return; - -+ dev->mt76.recovery_state = MT76_RECOVERY_PROCESS; - dev_info(dev->mt76.dev,"\n%s L1 SER recovery start.", - wiphy_name(dev->mt76.hw->wiphy)); - -@@ -1645,6 +1646,7 @@ void mt7915_mac_reset_work(struct work_struct *work) - - mt7915_update_beacons(dev); - -+ dev->mt76.recovery_state = MT76_RECOVERY_DONE; - dev_info(dev->mt76.dev,"\n%s L1 SER recovery completed.", - wiphy_name(dev->mt76.hw->wiphy)); - } -@@ -1783,6 +1785,15 @@ void mt7915_reset(struct mt7915_dev *dev) - return; - } - -+ if ((READ_ONCE(dev->recovery.state) & MT_MCU_CMD_STOP_DMA)) { -+ if (dev->mt76.recovery_state != MT76_RECOVERY_DONE) -+ dev->mt76.recovery_state = MT76_RECOVERY_OVERLAP_TRIGGERED; -+ else -+ dev->mt76.recovery_state = MT76_RECOVERY_TRIGGERED; -+ -+ wake_up(&dev->mt76.mcu.wait); -+ } -+ - queue_work(dev->mt76.wq, &dev->reset_work); - wake_up(&dev->reset_wait); - } -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index b3faf77..f71688e 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -198,6 +198,13 @@ mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, - enum mt76_mcuq_id qid; - int ret; - -+ if (mdev->recovery_state == MT76_RECOVERY_OVERLAP_TRIGGERED) { -+ dev_info(dev->mt76.dev,"\n%s L1 SER recovery overlap, drop message %08x.", -+ wiphy_name(dev->mt76.hw->wiphy), cmd); -+ dev_kfree_skb(skb); -+ return -EPERM; -+ } -+ - ret = mt76_connac2_mcu_fill_message(mdev, skb, cmd, wait_seq); - - if (ret) --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1049-wifi-mt76-mt7915-add-background-radar-hw-cap-check.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1049-wifi-mt76-mt7915-add-background-radar-hw-cap-check.patch deleted file mode 100644 index bfd88aa25..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1049-wifi-mt76-mt7915-add-background-radar-hw-cap-check.patch +++ /dev/null @@ -1,98 +0,0 @@ -From 016069539c9436262f37516462e9396e6f63b550 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Mon, 4 Mar 2024 11:29:06 +0800 -Subject: [PATCH 1049/1053] wifi: mt76: mt7915: add background radar hw cap - check - -Signed-off-by: StanleyYP Wang ---- - mt7915/debugfs.c | 5 +++++ - mt7915/eeprom.h | 30 ++++++++++++++++++++++++++++++ - mt7915/init.c | 7 ++++--- - 3 files changed, 39 insertions(+), 3 deletions(-) - -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index b2a4ff4..03daf44 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -459,6 +459,11 @@ mt7915_rdd_monitor(struct seq_file *s, void *data) - - mutex_lock(&dev->mt76.mutex); - -+ if (!mt7915_get_background_radar_cap(dev)) { -+ seq_puts(s, "no background radar capability\n"); -+ goto out; -+ } -+ - if (!cfg80211_chandef_valid(chandef)) { - ret = -EINVAL; - goto out; -diff --git a/mt7915/eeprom.h b/mt7915/eeprom.h -index 70fca0b..adeee10 100644 ---- a/mt7915/eeprom.h -+++ b/mt7915/eeprom.h -@@ -55,6 +55,7 @@ enum mt7915_eeprom_field { - #define MT_EE_CAL_DPD_SIZE_V2_7981 (102 * MT_EE_CAL_UNIT) /* no 6g dpd data */ - - #define MT_EE_WIFI_CONF0_TX_PATH GENMASK(2, 0) -+#define MT_EE_WIFI_CONF0_RX_PATH GENMASK(5, 3) - #define MT_EE_WIFI_CONF0_BAND_SEL GENMASK(7, 6) - #define MT_EE_WIFI_CONF1_BAND_SEL GENMASK(7, 6) - #define MT_EE_WIFI_CONF_STREAM_NUM GENMASK(7, 5) -@@ -206,6 +207,35 @@ mt7915_get_cal_dpd_size(struct mt7915_dev *dev) - return MT_EE_CAL_DPD_SIZE_V2; - } - -+static inline bool -+mt7915_get_background_radar_cap(struct mt7915_dev *dev) -+{ -+ u8 buf[MT7915_EEPROM_BLOCK_SIZE]; -+ int val, band_sel, tx_path, rx_path, offs = MT_EE_WIFI_CONF + 1; -+ -+ switch (mt76_chip(&dev->mt76)) { -+ case 0x7915: -+ return 1; -+ case 0x7906: -+ if (!mt7915_mcu_get_eeprom(dev, offs, buf)) { -+ val = buf[offs % MT7915_EEPROM_BLOCK_SIZE]; -+ band_sel = FIELD_GET(MT_EE_WIFI_CONF0_BAND_SEL, val); -+ rx_path = FIELD_GET(MT_EE_WIFI_CONF0_RX_PATH, val); -+ tx_path = FIELD_GET(MT_EE_WIFI_CONF0_TX_PATH, val); -+ -+ return (band_sel == MT_EE_V2_BAND_SEL_5GHZ && -+ tx_path == rx_path && rx_path == 2); -+ } -+ break; -+ case 0x7981: -+ case 0x7986: -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ - extern const u8 mt7915_sku_group_len[MAX_SKU_RATE_GROUP_NUM]; - - #endif -diff --git a/mt7915/init.c b/mt7915/init.c -index b53075b..26ae63f 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -404,9 +404,10 @@ mt7915_init_wiphy(struct mt7915_phy *phy) - if (!is_mt7915(&dev->mt76)) - wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_STA_TX_PWR); - -- if (!mdev->dev->of_node || -- !of_property_read_bool(mdev->dev->of_node, -- "mediatek,disable-radar-background")) -+ if (mt7915_get_background_radar_cap(phy->dev) && -+ (!mdev->dev->of_node || -+ !of_property_read_bool(mdev->dev->of_node, -+ "mediatek,disable-radar-background"))) - wiphy_ext_feature_set(wiphy, - NL80211_EXT_FEATURE_RADAR_BACKGROUND); - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1050-wifi-mt76-mt7915-remove-unnecessary-register-setting.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1050-wifi-mt76-mt7915-remove-unnecessary-register-setting.patch deleted file mode 100644 index 840d787b7..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1050-wifi-mt76-mt7915-remove-unnecessary-register-setting.patch +++ /dev/null @@ -1,144 +0,0 @@ -From 1e641bcbd21de95f4719063eecde6df206e2cf55 Mon Sep 17 00:00:00 2001 -From: Henry Yen -Date: Wed, 6 Mar 2024 12:42:06 +0800 -Subject: [PATCH 1050/1053] wifi: mt76: mt7915: remove unnecessary register - settings - -Remove unnecessary register settings from the driver layer, -and let firmware take over the configuration control. - -Signed-off-by: Henry.Yen ---- - mt7915/init.c | 35 ----------------------------------- - mt7915/mac.c | 43 +------------------------------------------ - 2 files changed, 1 insertion(+), 77 deletions(-) - -diff --git a/mt7915/init.c b/mt7915/init.c -index 26ae63f..9ffeca5 100644 ---- a/mt7915/init.c -+++ b/mt7915/init.c -@@ -488,30 +488,6 @@ mt7915_mac_init_band(struct mt7915_dev *dev, u8 band) - { - u32 mask, set; - -- mt76_rmw_field(dev, MT_TMAC_CTCR0(band), -- MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); -- mt76_set(dev, MT_TMAC_CTCR0(band), -- MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN | -- MT_TMAC_CTCR0_INS_DDLMT_EN); -- -- mask = MT_MDP_RCFR0_MCU_RX_MGMT | -- MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR | -- MT_MDP_RCFR0_MCU_RX_CTL_BAR; -- set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) | -- FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) | -- FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF); -- mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set); -- -- mask = MT_MDP_RCFR1_MCU_RX_BYPASS | -- MT_MDP_RCFR1_RX_DROPPED_UCAST | -- MT_MDP_RCFR1_RX_DROPPED_MCAST; -- set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) | -- FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) | -- FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF); -- mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set); -- -- mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680); -- - /* mt7915: disable rx rate report by default due to hw issues */ - mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN); - -@@ -614,23 +590,12 @@ mt7915_init_led_mux(struct mt7915_dev *dev) - void mt7915_mac_init(struct mt7915_dev *dev) - { - int i; -- u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680; -- -- /* config pse qid6 wfdma port selection */ -- if (!is_mt7915(&dev->mt76) && dev->hif2) -- mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0, -- MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK); -- -- mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len); - - if (!is_mt7915(&dev->mt76)) - mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT); - else - mt76_clear(dev, MT_PLE_HOST_RPT0, MT_PLE_HOST_RPT0_TX_LATENCY); - -- /* enable hardware de-agg */ -- mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN); -- - for (i = 0; i < mt7915_wtbl_size(dev); i++) - mt7915_mac_wtbl_update(dev, i, - MT_WTBL_UPDATE_ADM_COUNT_CLEAR); -diff --git a/mt7915/mac.c b/mt7915/mac.c -index e9f50a3..c84b957 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -1202,61 +1202,20 @@ void mt7915_mac_reset_counters(struct mt7915_phy *phy) - - void mt7915_mac_set_timing(struct mt7915_phy *phy) - { -- s16 coverage_class = phy->coverage_class; - struct mt7915_dev *dev = phy->dev; -- struct mt7915_phy *ext_phy = mt7915_ext_phy(dev); -- u32 val, reg_offset; -- u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) | -- FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); -- u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) | -- FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28); -+ u32 val; - u8 band = phy->mt76->band_idx; -- int eifs_ofdm = 360, sifs = 10, offset; - bool a_band = !(phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ); - - if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) - return; - -- if (ext_phy) -- coverage_class = max_t(s16, dev->phy.coverage_class, -- ext_phy->coverage_class); -- -- mt76_set(dev, MT_ARB_SCR(band), -- MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); -- udelay(1); -- -- offset = 3 * coverage_class; -- reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) | -- FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset); -- -- if (!is_mt7915(&dev->mt76)) { -- if (!a_band) { -- mt76_wr(dev, MT_TMAC_ICR1(band), -- FIELD_PREP(MT_IFS_EIFS_CCK, 314)); -- eifs_ofdm = 78; -- } else { -- eifs_ofdm = 84; -- } -- } else if (a_band) { -- sifs = 16; -- } -- -- mt76_wr(dev, MT_TMAC_CDTR(band), cck + reg_offset); -- mt76_wr(dev, MT_TMAC_ODTR(band), ofdm + reg_offset); -- mt76_wr(dev, MT_TMAC_ICR0(band), -- FIELD_PREP(MT_IFS_EIFS_OFDM, eifs_ofdm) | -- FIELD_PREP(MT_IFS_RIFS, 2) | -- FIELD_PREP(MT_IFS_SIFS, sifs) | -- FIELD_PREP(MT_IFS_SLOT, phy->slottime)); -- - if (phy->slottime < 20 || a_band) - val = MT7915_CFEND_RATE_DEFAULT; - else - val = MT7915_CFEND_RATE_11B; - - mt76_rmw_field(dev, MT_AGG_ACR0(band), MT_AGG_ACR_CFEND_RATE, val); -- mt76_clear(dev, MT_ARB_SCR(band), -- MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); - } - - void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool band) --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1051-wifi-mt76-mt7915-add-foolproof-mechanism-for-ZWDFS-d.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1051-wifi-mt76-mt7915-add-foolproof-mechanism-for-ZWDFS-d.patch deleted file mode 100644 index 5c966ecdf..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1051-wifi-mt76-mt7915-add-foolproof-mechanism-for-ZWDFS-d.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 25eef0359cbdfb1a1e7730da256ac35a943242ea Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Wed, 6 Mar 2024 11:30:34 +0800 -Subject: [PATCH 1051/1053] wifi: mt76: mt7915: add foolproof mechanism for - ZWDFS during radar detected & triggered - -Signed-off-by: StanleyYP Wang ---- - mt7915/debugfs.c | 5 +++++ - mt7915/mcu.c | 3 +++ - 2 files changed, 8 insertions(+) - -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index 03daf44..d8ca90a 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -231,6 +231,11 @@ mt7915_radar_trigger(void *data, u64 val) - if (val > MT_RX_SEL2) - return -EINVAL; - -+ if (val == MT_RX_SEL2 && !dev->rdd2_phy) { -+ dev_err(dev->mt76.dev, "Background radar is not enabled\n"); -+ return -EINVAL; -+ } -+ - return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_RADAR_EMULATE, - val, 0, 0); - } -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index f71688e..d857658 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -302,6 +302,9 @@ mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb) - if (r->band_idx > MT_RX_SEL2) - return; - -+ if (r->band_idx == MT_RX_SEL2 && !dev->rdd2_phy) -+ return; -+ - if ((r->band_idx && !dev->phy.mt76->band_idx) && - dev->mt76.phys[MT_BAND1]) - mphy = dev->mt76.phys[MT_BAND1]; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1052-mtk-wifi-mt76-mt7915-assign-DEAUTH-to-ALTX-queue-for.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1052-mtk-wifi-mt76-mt7915-assign-DEAUTH-to-ALTX-queue-for.patch deleted file mode 100644 index 8f766d065..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1052-mtk-wifi-mt76-mt7915-assign-DEAUTH-to-ALTX-queue-for.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 93810a9bad2fd59c8e4742195a3b5c53878116ef Mon Sep 17 00:00:00 2001 -From: Michael-CY Lee -Date: Tue, 19 Mar 2024 08:35:26 +0800 -Subject: [PATCH 1052/1053] mtk: wifi: mt76: mt7915: assign DEAUTH to ALTX - queue for CERT - -Signed-off-by: Michael-CY Lee ---- - mt76_connac_mac.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/mt76_connac_mac.c b/mt76_connac_mac.c -index d41f004..0510296 100644 ---- a/mt76_connac_mac.c -+++ b/mt76_connac_mac.c -@@ -385,6 +385,8 @@ mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, - struct sk_buff *skb, - struct ieee80211_key_conf *key) - { -+ struct mt76_phy *mphy = -+ mt76_dev_phy(dev, le32_get_bits(txwi[1], MT_TXD1_TGID)); - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; - struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; - struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -@@ -394,6 +396,14 @@ mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, - u8 fc_type, fc_stype; - u32 val; - -+ if (ieee80211_is_cert_mode(mphy->hw) && ieee80211_is_deauth(fc)) { -+ /* In WPA3 cert TC-4.8.1, the deauth must be transmitted without -+ * considering PSM bit -+ */ -+ txwi[0] &= ~cpu_to_le32(MT_TXD0_Q_IDX); -+ txwi[0] |= cpu_to_le32(FIELD_PREP(MT_TXD0_Q_IDX, MT_LMAC_ALTX0)); -+ } -+ - if (ieee80211_is_action(fc) && - mgmt->u.action.category == WLAN_CATEGORY_BACK && - mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) { --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/1053-wifi-mt76-mt7915-set-channel-after-sta-is-associated.patch b/feeds/mediatek-sdk/mt76/mt76/patches/1053-wifi-mt76-mt7915-set-channel-after-sta-is-associated.patch deleted file mode 100644 index e9c88e1a0..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/1053-wifi-mt76-mt7915-set-channel-after-sta-is-associated.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 124ffa4206375bcbcb8bfaa0032045e3063ad286 Mon Sep 17 00:00:00 2001 -From: StanleyYP Wang -Date: Thu, 21 Mar 2024 16:52:34 +0800 -Subject: [PATCH 1053/1053] wifi: mt76: mt7915: set channel after sta is - associated to adjust switch reason - -when sta is associated to AP operating in DFS channel, a channel -setting operation is required to change the channel switch reason -from CH_SWTICH_DFS to CH_SWITCH_NORMAL. -Note that the switch reason for DFS channel during authentication is -CH_SWITCH_DFS since the DFS state is still USABLE at that point - -Signed-off-by: StanleyYP Wang ---- - mt7915/main.c | 26 ++++++++++++++++++++++++++ - 1 file changed, 26 insertions(+) - -diff --git a/mt7915/main.c b/mt7915/main.c -index 69fcf4c..41fa450 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -792,6 +792,31 @@ out: - return ret; - } - -+static void -+mt7915_event_callback(struct ieee80211_hw *hw, struct ieee80211_vif *vif, -+ const struct ieee80211_event *event) -+{ -+ struct mt7915_phy *phy = mt7915_hw_phy(hw); -+ int ret; -+ -+ switch (event->type) { -+ case MLME_EVENT: -+ if (event->u.mlme.data == ASSOC_EVENT && -+ event->u.mlme.status == MLME_SUCCESS) { -+ ieee80211_stop_queues(hw); -+ ret = mt7915_set_channel(phy); -+ if (ret) -+ return; -+ ieee80211_wake_queues(hw); -+ } -+ break; -+ default: -+ break; -+ } -+ -+ return; -+} -+ - int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) - { -@@ -1771,6 +1796,7 @@ const struct ieee80211_ops mt7915_ops = { - .set_sar_specs = mt7915_set_sar_specs, - .channel_switch_beacon = mt7915_channel_switch_beacon, - .post_channel_switch = mt7915_post_channel_switch, -+ .event_callback = mt7915_event_callback, - .get_stats = mt7915_get_stats, - .get_et_sset_count = mt7915_get_et_sset_count, - .get_et_stats = mt7915_get_et_stats, --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/2000-wifi-mt76-mt7915-wed-add-wed-tx-support.patch b/feeds/mediatek-sdk/mt76/mt76/patches/2000-wifi-mt76-mt7915-wed-add-wed-tx-support.patch deleted file mode 100644 index 8d6705ef5..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/2000-wifi-mt76-mt7915-wed-add-wed-tx-support.patch +++ /dev/null @@ -1,139 +0,0 @@ -From 86f4aafcab8e833c7009e453e97adc254628d4d1 Mon Sep 17 00:00:00 2001 -From: Sujuan Chen -Date: Fri, 25 Nov 2022 10:38:53 +0800 -Subject: [PATCH 2000/2014] wifi: mt76: mt7915: wed: add wed tx support - -Signed-off-by: Sujuan Chen ---- - mt76_connac.h | 1 + - mt7915/mac.c | 10 +++++++--- - mt7915/main.c | 4 ++-- - mt7915/mmio.c | 3 ++- - mt7915/mt7915.h | 2 +- - wed.c | 2 +- - 6 files changed, 14 insertions(+), 8 deletions(-) - -diff --git a/mt76_connac.h b/mt76_connac.h -index 8e7068c..e1d6ca2 100644 ---- a/mt76_connac.h -+++ b/mt76_connac.h -@@ -130,6 +130,7 @@ struct mt76_connac_sta_key_conf { - }; - - #define MT_TXP_MAX_BUF_NUM 6 -+#define MT_TXD_TXP_BUF_SIZE 128 - - struct mt76_connac_fw_txp { - __le16 flags; -diff --git a/mt7915/mac.c b/mt7915/mac.c -index c84b957..1c8b873 100644 ---- a/mt7915/mac.c -+++ b/mt7915/mac.c -@@ -878,9 +878,9 @@ u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id) - - txp->token = cpu_to_le16(token_id); - txp->nbuf = 1; -- txp->buf[0] = cpu_to_le32(phys + MT_TXD_SIZE + sizeof(*txp)); -+ txp->buf[0] = cpu_to_le32(phys + MT_TXD_TXP_BUF_SIZE); - -- return MT_TXD_SIZE + sizeof(*txp); -+ return MT_TXD_TXP_BUF_SIZE; - } - - static void -@@ -929,6 +929,7 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) - LIST_HEAD(free_list); - void *end = data + len; - bool v3, wake = false; -+ bool with_txwi = true; - u16 total, count = 0; - u32 txd = le32_to_cpu(free->txd); - __le32 *cur_info; -@@ -1010,12 +1011,15 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) - txwi = mt76_token_release(mdev, msdu, &wake); - if (!txwi) - continue; -+ else -+ with_txwi = false; - - mt76_connac2_txwi_free(mdev, txwi, sta, &free_list); - } - } - -- mt7915_mac_tx_free_done(dev, &free_list, wake); -+ if (!with_txwi) -+ mt7915_mac_tx_free_done(dev, &free_list, wake); - } - - static void -diff --git a/mt7915/main.c b/mt7915/main.c -index 41fa450..332b087 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -1753,14 +1753,14 @@ mt7915_net_fill_forward_path(struct ieee80211_hw *hw, - if (!mtk_wed_device_active(wed)) - return -ENODEV; - -- if (msta->wcid.idx > 0xff) -+ if (msta->wcid.idx > MT7915_WTBL_STA) - return -EIO; - - path->type = DEV_PATH_MTK_WDMA; - path->dev = ctx->dev; - path->mtk_wdma.wdma_idx = wed->wdma_idx; - path->mtk_wdma.bss = mvif->mt76.idx; -- path->mtk_wdma.wcid = is_mt7915(&dev->mt76) ? msta->wcid.idx : 0x3ff; -+ path->mtk_wdma.wcid = is_mt7915(&dev->mt76) ? 0xff : 0x3ff; - path->mtk_wdma.queue = phy != &dev->phy; - - ctx->dev = NULL; -diff --git a/mt7915/mmio.c b/mt7915/mmio.c -index 437a9b0..91100f1 100644 ---- a/mt7915/mmio.c -+++ b/mt7915/mmio.c -@@ -13,7 +13,7 @@ - #include "../trace.h" - #include "../dma.h" - --static bool wed_enable; -+static bool wed_enable = true; - module_param(wed_enable, bool, 0644); - MODULE_PARM_DESC(wed_enable, "Enable Wireless Ethernet Dispatch support"); - -@@ -732,6 +732,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, - - *irq = wed->irq; - dev->mt76.dma_dev = wed->dev; -+ dev->mt76.token_size = wed->wlan.token_start; - - ret = dma_set_mask(wed->dev, DMA_BIT_MASK(32)); - if (ret) -diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h -index 47f7d16..1d0188d 100644 ---- a/mt7915/mt7915.h -+++ b/mt7915/mt7915.h -@@ -62,7 +62,7 @@ - #define MT7916_EEPROM_SIZE 4096 - - #define MT7915_EEPROM_BLOCK_SIZE 16 --#define MT7915_HW_TOKEN_SIZE 4096 -+#define MT7915_HW_TOKEN_SIZE 7168 - #define MT7915_TOKEN_SIZE 8192 - - #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */ -diff --git a/wed.c b/wed.c -index f7a3f1b..47c81a2 100644 ---- a/wed.c -+++ b/wed.c -@@ -187,7 +187,7 @@ void mt76_wed_offload_disable(struct mtk_wed_device *wed) - struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); - - spin_lock_bh(&dev->token_lock); -- dev->token_size = dev->drv->token_size; -+ dev->token_size = wed->wlan.token_start; - spin_unlock_bh(&dev->token_lock); - } - EXPORT_SYMBOL_GPL(mt76_wed_offload_disable); --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/2001-wifi-mt76-mt7915-wed-add-wds-support-when-wed-is-ena.patch b/feeds/mediatek-sdk/mt76/mt76/patches/2001-wifi-mt76-mt7915-wed-add-wds-support-when-wed-is-ena.patch deleted file mode 100644 index 9ddec3e60..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/2001-wifi-mt76-mt7915-wed-add-wds-support-when-wed-is-ena.patch +++ /dev/null @@ -1,210 +0,0 @@ -From ab7172fb880f05bc6005a78982278c5b365055b4 Mon Sep 17 00:00:00 2001 -From: Sujuan Chen -Date: Tue, 13 Dec 2022 17:51:26 +0800 -Subject: [PATCH 2001/2014] wifi: mt76: mt7915: wed: add wds support when wed - is enabled - -Signed-off-by: Sujuan Chen ---- - mt76.h | 6 ++++++ - mt7915/main.c | 22 ++++++++++++++++++++-- - mt7915/mcu.c | 16 ++++++++++++---- - mt7915/mcu.h | 1 + - util.c | 40 +++++++++++++++++++++++++++++++++++++--- - util.h | 7 ++++++- - 6 files changed, 82 insertions(+), 10 deletions(-) - -diff --git a/mt76.h b/mt76.h -index fb50d88..d3c6ac0 100644 ---- a/mt76.h -+++ b/mt76.h -@@ -78,6 +78,12 @@ enum mt76_wed_type { - MT76_WED_RRO_Q_IND, - }; - -+enum mt76_wed_state { -+ MT76_WED_DEFAULT, -+ MT76_WED_ACTIVE, -+ MT76_WED_WDS_ACTIVE, -+}; -+ - struct mt76_bus_ops { - u32 (*rr)(struct mt76_dev *dev, u32 offset); - void (*wr)(struct mt76_dev *dev, u32 offset, u32 val); -diff --git a/mt7915/main.c b/mt7915/main.c -index 332b087..ab60159 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -829,8 +829,15 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, - #endif - int ret, idx; - u32 addr; -+ u8 flags = MT76_WED_DEFAULT; - -- idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA); -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && -+ !is_mt7915(&dev->mt76)) { -+ flags = test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags) ? -+ MT76_WED_WDS_ACTIVE : MT76_WED_ACTIVE; -+ } -+ -+ idx = __mt76_wcid_alloc(mdev->wcid_mask, MT7915_WTBL_STA, flags); - if (idx < 0) - return -ENOSPC; - -@@ -1321,6 +1328,13 @@ static void mt7915_sta_set_4addr(struct ieee80211_hw *hw, - else - clear_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags); - -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && -+ !is_mt7915(&dev->mt76)) { -+ mt7915_sta_remove(hw, vif, sta); -+ mt76_sta_pre_rcu_remove(hw, vif, sta); -+ mt7915_sta_add(hw, vif, sta); -+ } -+ - mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta); - } - -@@ -1760,8 +1774,12 @@ mt7915_net_fill_forward_path(struct ieee80211_hw *hw, - path->dev = ctx->dev; - path->mtk_wdma.wdma_idx = wed->wdma_idx; - path->mtk_wdma.bss = mvif->mt76.idx; -- path->mtk_wdma.wcid = is_mt7915(&dev->mt76) ? 0xff : 0x3ff; - path->mtk_wdma.queue = phy != &dev->phy; -+ if (test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags) || -+ is_mt7915(&dev->mt76)) -+ path->mtk_wdma.wcid = msta->wcid.idx; -+ else -+ path->mtk_wdma.wcid = 0x3ff; - - ctx->dev = NULL; - -diff --git a/mt7915/mcu.c b/mt7915/mcu.c -index d857658..b42afe8 100644 ---- a/mt7915/mcu.c -+++ b/mt7915/mcu.c -@@ -2588,10 +2588,18 @@ int mt7915_mcu_init_firmware(struct mt7915_dev *dev) - if (ret) - return ret; - -- if ((mtk_wed_device_active(&dev->mt76.mmio.wed) && -- is_mt7915(&dev->mt76)) || -- !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) -- mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0); -+ if (mtk_wed_device_active(&dev->mt76.mmio.wed)) { -+ if (is_mt7915(&dev->mt76) || -+ !mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) -+ ret = mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), -+ 0, 0, 0); -+ else -+ ret = mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), -+ MCU_WA_PARAM_WED_VERSION, -+ dev->mt76.mmio.wed.rev_id, 0); -+ if (ret) -+ return ret; -+ } - - ret = mt7915_mcu_set_mwds(dev, 1); - if (ret) -diff --git a/mt7915/mcu.h b/mt7915/mcu.h -index f476767..52baaa7 100644 ---- a/mt7915/mcu.h -+++ b/mt7915/mcu.h -@@ -392,6 +392,7 @@ enum { - MCU_WA_PARAM_PDMA_RX = 0x04, - MCU_WA_PARAM_CPU_UTIL = 0x0b, - MCU_WA_PARAM_RED = 0x0e, -+ MCU_WA_PARAM_WED_VERSION = 0x32, - #ifdef MTK_DEBUG - MCU_WA_PARAM_RED_SHOW_STA = 0xf, - MCU_WA_PARAM_RED_TARGET_DELAY = 0x10, -diff --git a/util.c b/util.c -index fc76c66..61b2d30 100644 ---- a/util.c -+++ b/util.c -@@ -42,9 +42,14 @@ bool ____mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, - } - EXPORT_SYMBOL_GPL(____mt76_poll_msec); - --int mt76_wcid_alloc(u32 *mask, int size) -+int __mt76_wcid_alloc(u32 *mask, int size, u8 flag) - { -+#define MT76_WED_WDS_MIN 256 -+#define MT76_WED_WDS_CNT 16 -+ - int i, idx = 0, cur; -+ int min = MT76_WED_WDS_MIN; -+ int max = min + MT76_WED_WDS_CNT; - - for (i = 0; i < DIV_ROUND_UP(size, 32); i++) { - idx = ffs(~mask[i]); -@@ -53,16 +58,45 @@ int mt76_wcid_alloc(u32 *mask, int size) - - idx--; - cur = i * 32 + idx; -- if (cur >= size) -+ -+ switch (flag) { -+ case MT76_WED_ACTIVE: -+ if (cur >= min && cur < max) -+ continue; -+ -+ if (cur >= size) { -+ u32 end = MT76_WED_WDS_CNT - 1; -+ -+ i = min / 32; -+ idx = ffs(~mask[i] & GENMASK(end, 0)); -+ if (!idx) -+ goto error; -+ idx--; -+ cur = min + idx; -+ } -+ - break; -+ case MT76_WED_WDS_ACTIVE: -+ if (cur < min) -+ continue; -+ if (cur >= max) -+ goto error; -+ -+ break; -+ default: -+ if (cur >= size) -+ goto error; -+ break; -+ } - - mask[i] |= BIT(idx); - return cur; - } - -+error: - return -1; - } --EXPORT_SYMBOL_GPL(mt76_wcid_alloc); -+EXPORT_SYMBOL_GPL(__mt76_wcid_alloc); - - int mt76_get_min_avg_rssi(struct mt76_dev *dev, bool ext_phy) - { -diff --git a/util.h b/util.h -index 260965d..99b7263 100644 ---- a/util.h -+++ b/util.h -@@ -27,7 +27,12 @@ enum { - #define MT76_INCR(_var, _size) \ - (_var = (((_var) + 1) % (_size))) - --int mt76_wcid_alloc(u32 *mask, int size); -+int __mt76_wcid_alloc(u32 *mask, int size, u8 flags); -+ -+static inline int mt76_wcid_alloc(u32 *mask, int size) -+{ -+ return __mt76_wcid_alloc(mask, size, 0); -+} - - static inline void - mt76_wcid_mask_set(u32 *mask, int idx) --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/2002-wifi-mt76-mt7915-wed-add-fill-receive-path-to-report.patch b/feeds/mediatek-sdk/mt76/mt76/patches/2002-wifi-mt76-mt7915-wed-add-fill-receive-path-to-report.patch deleted file mode 100644 index 98ec448c6..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/2002-wifi-mt76-mt7915-wed-add-fill-receive-path-to-report.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 6fa429e617e59379bd82c8dbef851e99954676ed Mon Sep 17 00:00:00 2001 -From: Evelyn Tsai -Date: Fri, 19 May 2023 07:05:22 +0800 -Subject: [PATCH 2002/2014] wifi: mt76: mt7915: wed: add fill receive path to - report wed idx - -Signed-off-by: Sujuan Chen ---- - mt7915/main.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - -diff --git a/mt7915/main.c b/mt7915/main.c -index ab60159..b3e06aa 100644 ---- a/mt7915/main.c -+++ b/mt7915/main.c -@@ -1785,6 +1785,23 @@ mt7915_net_fill_forward_path(struct ieee80211_hw *hw, - - return 0; - } -+ -+static int -+mt7915_net_fill_receive_path(struct ieee80211_hw *hw, -+ struct net_device_path_ctx *ctx, -+ struct net_device_path *path) -+{ -+ struct mt7915_dev *dev = mt7915_hw_dev(hw); -+ struct mtk_wed_device *wed = &dev->mt76.mmio.wed; -+ -+ if (!mtk_wed_device_active(wed)) -+ return -ENODEV; -+ -+ path->dev = ctx->dev; -+ path->mtk_wdma.wdma_idx = wed->wdma_idx; -+ -+ return 0; -+} - #endif - - const struct ieee80211_ops mt7915_ops = { -@@ -1841,6 +1858,7 @@ const struct ieee80211_ops mt7915_ops = { - .set_radar_background = mt7915_set_radar_background, - #ifdef CONFIG_NET_MEDIATEK_SOC_WED - .net_fill_forward_path = mt7915_net_fill_forward_path, -+ .net_fill_receive_path = mt7915_net_fill_receive_path, - .net_setup_tc = mt76_wed_net_setup_tc, - #endif - }; --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/2003-wifi-mt76-mt7915-wed-find-rx-token-by-physical-addre.patch b/feeds/mediatek-sdk/mt76/mt76/patches/2003-wifi-mt76-mt7915-wed-find-rx-token-by-physical-addre.patch deleted file mode 100644 index 54c520ece..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/2003-wifi-mt76-mt7915-wed-find-rx-token-by-physical-addre.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 79d00e5e7ff7653dc6839551f33a5b36d6291169 Mon Sep 17 00:00:00 2001 -From: Sujuan Chen -Date: Fri, 25 Nov 2022 14:32:35 +0800 -Subject: [PATCH 2003/2014] wifi: mt76: mt7915: wed: find rx token by physical - address - -The token id in RxDMAD may be incorrect when it is not the last frame due to -WED HW bug. Lookup correct token id by physical address in sdp0. - -Signed-off-by: Peter Chiu ---- - dma.c | 25 ++++++++++++++++++++++++- - 1 file changed, 24 insertions(+), 1 deletion(-) - -diff --git a/dma.c b/dma.c -index 100d2af..185c6f1 100644 ---- a/dma.c -+++ b/dma.c -@@ -444,9 +444,32 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, - mt76_dma_should_drop_buf(drop, ctrl, buf1, desc_info); - - if (mt76_queue_is_wed_rx(q)) { -+ u32 id, find = 0; - u32 token = FIELD_GET(MT_DMA_CTL_TOKEN, buf1); -- struct mt76_txwi_cache *t = mt76_rx_token_release(dev, token); -+ struct mt76_txwi_cache *t; -+ -+ if (*more) { -+ spin_lock_bh(&dev->rx_token_lock); -+ -+ idr_for_each_entry(&dev->rx_token, t, id) { -+ if (t->dma_addr == le32_to_cpu(desc->buf0)) { -+ find = 1; -+ token = id; -+ -+ /* Write correct id back to DMA*/ -+ u32p_replace_bits(&buf1, id, -+ MT_DMA_CTL_TOKEN); -+ WRITE_ONCE(desc->buf1, cpu_to_le32(buf1)); -+ break; -+ } -+ } -+ -+ spin_unlock_bh(&dev->rx_token_lock); -+ if (!find) -+ return NULL; -+ } - -+ t = mt76_rx_token_release(dev, token); - if (!t) - return NULL; - --- -2.18.0 - diff --git a/feeds/mediatek-sdk/mt76/mt76/patches/2004-wifi-mt76-mt7915-wed-HW-ATF-support-for-mt7986.patch b/feeds/mediatek-sdk/mt76/mt76/patches/2004-wifi-mt76-mt7915-wed-HW-ATF-support-for-mt7986.patch deleted file mode 100644 index 936d19d43..000000000 --- a/feeds/mediatek-sdk/mt76/mt76/patches/2004-wifi-mt76-mt7915-wed-HW-ATF-support-for-mt7986.patch +++ /dev/null @@ -1,999 +0,0 @@ -From f4c4eda21841dae1229e6f7942d4a74f385d87a5 Mon Sep 17 00:00:00 2001 -From: Lian Chen -Date: Mon, 7 Nov 2022 14:47:44 +0800 -Subject: [PATCH 2004/2014] wifi: mt76: mt7915: wed: HW ATF support for mt7986 - -Signed-off-by: Lian Chen -Signed-off-by: Benjamin Lin ---- - mt76_connac_mcu.h | 2 + - mt7915/debugfs.c | 357 +++++++++++++++++++++++++++++++++++++++++++ - mt7915/init.c | 58 +++++++ - mt7915/main.c | 14 ++ - mt7915/mcu.c | 169 +++++++++++++++++++- - mt7915/mt7915.h | 69 +++++++++ - mt7915/mtk_debugfs.c | 130 ++++++++++++++++ - 7 files changed, 796 insertions(+), 3 deletions(-) - -diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h -index dc60e35..03d6a2b 100644 ---- a/mt76_connac_mcu.h -+++ b/mt76_connac_mcu.h -@@ -1209,6 +1209,7 @@ enum { - MCU_EXT_CMD_THERMAL_CTRL = 0x2c, - MCU_EXT_CMD_WTBL_UPDATE = 0x32, - MCU_EXT_CMD_SET_DRR_CTRL = 0x36, -+ MCU_EXT_CMD_SET_FEATURE_CTRL = 0x38, - MCU_EXT_CMD_SET_RDD_CTRL = 0x3a, - MCU_EXT_CMD_ATE_CTRL = 0x3d, - MCU_EXT_CMD_PROTECT_CTRL = 0x3e, -@@ -1218,6 +1219,7 @@ enum { - MCU_EXT_CMD_MUAR_UPDATE = 0x48, - MCU_EXT_CMD_BCN_OFFLOAD = 0x49, - MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a, -+ MCU_EXT_CMD_AT_PROC_MODULE = 0x4b, - MCU_EXT_CMD_SET_RX_PATH = 0x4e, - MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f, - MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, -diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c -index d8ca90a..3ae4aca 100644 ---- a/mt7915/debugfs.c -+++ b/mt7915/debugfs.c -@@ -12,6 +12,10 @@ - #define FW_BIN_LOG_MAGIC_V2 0x44d9c99a - #endif - -+#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] -+#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x" -+ -+ - /** global debugfs **/ - - struct hw_queue_map { -@@ -223,6 +227,358 @@ static const struct file_operations mt7915_sys_recovery_ops = { - .llseek = default_llseek, - }; - -+static ssize_t mt7915_vow_get(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ char *buff; -+ int desc = 0; -+ ssize_t ret; -+ static const size_t bufsz = 1000; -+ -+ buff = kmalloc(bufsz, GFP_KERNEL); -+ if (!buff) -+ return -ENOMEM; -+ -+ desc += scnprintf(buff + desc, bufsz - desc, -+ "======== Control =============\n" -+ "vow_atf_en=<0/1> 0:disable, 1:enable\n" -+ "vow_watf_en=<0/1> 0:disable, 1:enable\n" -+ "vow_watf_quantum=- unit 256us\n" -+ "======== Station table =============\n" -+ "vow_sta_dwrr_quantum_id=--\n" -+ "vow_dwrr_max_wait_time=