diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/bl2_private_key.pem b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/bl2_private_key.pem new file mode 100644 index 000000000..893cad039 --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/bl2_private_key.pem @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEpQIBAAKCAQEAylkhSz5UGwJnJjIchwS8KeJEmf2apWM40/z3ukTZHvnzR6cH +Wvx0uahlMaHdnXlt1+a1ZjEr9VIehFsnad1MmF0p3evHSdW95q4KXn7QXD0kfTrs +yiBbUbrzG+VSokpTY0xoUaqxSJWZyf0cytnnB+HYHVdjj5zshNHzJRCH494hB50m +wzw3jyB15DAQzCrd3nhRpb/SwdaMV80M9AzhxfvL6vMpWn+GcA9SPMEZupbFYPZv +7H/tDr6f+ZFQH8LCOuzA3wELbm6ML2pzRhR6iL8d8yft6k02uQ3C5mGXgz1LD7io +alEu3LrvkcUdcBmaaBlO3cdvvSygArZZXFsIFwIDAQABAoIBAQCBbgGd34Bsxly0 +Udltg9nX8KNw3IbOw2jWMDlFLES1S6wRaQWLbXA8UTppROA8mi9oqmndtBYqFRzw +DF5pmOQlkXH2QZp34ABYTXrUdslQNsvgTpCnuYqv/KUEcusoY+Jy4azYkBZWF1sH +mJ+SIU9l+1ABdKR6eCXRz3l3e9twJMCoNbC6Sjohw32+YnFhChBKYH4v2tIbKGed +L/xBli4a9JqGHDI3+wY/3bDy2pr88RL631ru3KWN0QfokKv1dMDFFxnes7bhIeTD +oOJeCMPKOx6QU1zsNOb2N2OYfsrOplSRRVCL8TVgtu5dI2TnVyDrcD0NpeB0MSRt +ZLTwbAwBAoGBAP09NKF2RcsbJ6yhnXcGIBqL9SJP4SYPf0AAy0w4PQdtDE5B1QFF +xoIiGKZ+JOGnYiuaRpk4+EJyQvCQyMxS+4H69D6PwaerzJtvAzYDnOOyMAgxAcoU +pQEgjuChwKkWy1qiIBUrl20fNbrNHxVrZhHvNSWtLicC1MK7gPn9iPhvAoGBAMyN +4xeSkBgnYbrJm0xdtzZ+xS88UAGR71Fi+o/3f3CFR355ffWKFtRDMP+sj6CtH2Xq +ukIYawKuhO7DsuSw1DVYDpkKYHqxSMsAd2wqwNxKpR0dTPKXZ5qPUiumIOlCt0sn +ekYk62KoJPessuqjzBsFfR9uh2ouUK3M0eO8a67ZAoGBAJcM0f7ZIEpE2UZkZBth +wPZ0svQTd3WPWtSfZKQDC4wJZIStSdNnfj+S/OcaaP9cKvddH203iQWBSCJcChmu +Caz/Nn62mslbdUDlV6H5R7SdTX8lVC7oX3+rnu2oLdXt7cAS4lYeWUVSj2bsAPVy +yUA7UZU2lkfYrXW2B/mVXATrAoGBAMr/LBSioFk4C+agWHvqrP1pxSnhQsysFMHB +5kKlLVVvDspWq0fXKFyx6ZhxmX+tDvHHhdw9+0SICOgiUhBd49qkbqg2AhUAhure +paU0sHxtn3pLL6e31VsvTC6BCTwzt07f+JpP3UDk+PrJ6iytLMrMIaXlvIEFQY+Z +KdpFjN/RAoGAZc16tSE3zAON5/cYrCMRGrU1uNG2r7sWvUWSRKUB74Cgqhic9PS3 +JQYHmfp7PN3EjLZvzSV08G9+qKatKUmuAErPviU+dEdUt1Yu3gws42I3fNYon02z +m7elGc61q6FXewd7KC4C4o7ZtkiZZK0E6JkLZLvwuSS6kNl2cg0Ak3s= +-----END RSA PRIVATE KEY----- diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fip_private_key.pem b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fip_private_key.pem new file mode 100644 index 000000000..fa9a779b6 --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fip_private_key.pem @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEogIBAAKCAQEAtxDPiHAgUZ/gQ4Go50eDuJ4URkhBZfIwIfwhZgGduW8x8fCY +kQjLthFY4rRX0kDTy+jg6Ov5jfXu3Gw4tjnNNQEzKhLv4eZfAgF9RCkXAyJnfDOJ +qKBLkvquiCiwPQrray5ZmUGecO6/L1LmTd1ktwJfgkbV3Pos6oFDEpJDvf5HKa6C +q2vqAs8GEP9RhqF4MTvqZkcxCwTp+f3neLVu1srK767Li7oEIpp0uhVAXLcBKo4N +j7SkZPLDsLN03IikpsTeqWF8b5RZKYy1vGXH/f72GTpVWg6J5qpluv6wR6nqM2P4 +cWcT9LPRTVKAcBoEwuDJUhAOaTAAObQw7LAzUQIDAQABAoIBAB6mrOjeRTsFdso2 +wm3+9loJ9cESxghotZBrI7htmtf6ezVUIGdgPqN8YhKLOY0Vl6CznDzDjeQsAlNb +t18jbG1shwGLbCi5pryyPSQVcSnwL72G74yRUjYIzQI1NdTyqBopB412hC3Ke65T +xgXRhNRzjERG0fYO2UhmXjGU1czQpuD2B9z9owAo4bN8MJ0rS/4ADFtnpblUF6aP +tknVHAV3UQY6JNkqlUHIYtkWLutUmsOzExN0/pX8wXaVN31qdSvh5REAszPAQuCA +cxCdYF6aFi/xs0ICG8xmfYmcTMMNHPXxhRK849wGWVTGSE/fh5MHFzMt6ZuVCl3M +26nrlmUCgYEA2cen+S2TNs54xsOaC6TxV8Lf4UtAlnD8O6MrkNt458D0Iy3Tpsl0 +4kwX2bKFPBQAkIoDZJtZ3l5y4pSBwq5Ive4je/vJ2M33Mqfqp9VD0Uodkwrj5wGU +T9VBIqF3utZHXLV0NQuYlssN8K83ZmU4IWjrtc/Qncix6L4fTJMExYsCgYEA1zGG +S9R1hkCWgFZ5N8Ix0HjnWpwoPiU/jbtdjUl49K0aLybe98tztlkeqyO4nFw6Rohg +InfRQ/wEMlBeEWYgTHqMOfJCCWLeY8bGh3lU2MVSE2IkPlbb7/XIH5DXLpHi9fBh +3rARGv34J2vWuDFhbDcoI+dJkfQ1cX5aRrb13hMCgYBHGw9XJnBIlsWMcFUdtC8w +rmoWz1E5TY6tkispUt95G+Eak13luSU2tg2bgNRLt2QvzUAqWybOmhv8quxrOih6 +CwT++EkBRs6NdZICVnmcHgzl88pRpIxePIzV186V7FzEgmJ851pc8dONYEhAYJAh +KHa9mCrPObYM/faOM/p83QKBgBE5t6ROR3INrX5sbZuXAeHMK8jHAzmmRaYUv3JV +1UbQrG3l0KdJM+P+0kOkwlxRzaBjvj5EFQ46GCPm5wDBighVLvBcggi6T07xVGb3 +wWDwupcunfQXg9d7dx9/upnRt7c0HMF0monslnahXTi1SzUcXSwykWMLh1OkZ5mN +f7TdAoGABh4DU0SB7bY8LnQ21jNlzi3qdj4EKMkfQyTVDiT84hXi42OhGN23jKuI +2tl6KMqdsN/GLNCPGy5VMfbQCFyyn3g2gHc2Cl90LRf/PsQ4v4HD/c+bjEPJUrYe +W2sPfHJqK3UsUL68JVaVsHZZ49oM1wJr0bn82Pl/+kNe02Njs2U= +-----END RSA PRIVATE KEY----- diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.crt b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.crt new file mode 100644 index 000000000..862ced91c --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.crt @@ -0,0 +1,21 @@ +-----BEGIN CERTIFICATE----- +MIIDazCCAlOgAwIBAgIUDRQDKYZevoXzVn+I8sJA7oo0TWowDQYJKoZIhvcNAQEL +BQAwRTELMAkGA1UEBhMCQVUxEzARBgNVBAgMClNvbWUtU3RhdGUxITAfBgNVBAoM +GEludGVybmV0IFdpZGdpdHMgUHR5IEx0ZDAeFw0yNDA0MDIwNTIwMDhaFw0yNDA1 +MDIwNTIwMDhaMEUxCzAJBgNVBAYTAkFVMRMwEQYDVQQIDApTb21lLVN0YXRlMSEw +HwYDVQQKDBhJbnRlcm5ldCBXaWRnaXRzIFB0eSBMdGQwggEiMA0GCSqGSIb3DQEB +AQUAA4IBDwAwggEKAoIBAQDDjDRntDuzUIXdSe3E21pEcuxOahgVU+BJnNuNR0xi +hAhgaFmRHHQKOgVkzld288+ofsxo2O+N22lDv/Vkk1FnRXrY6j1xeaRcoEEDkCvD +YxZsn7qrVWuzR7zowGjep8jYGvRY6zkWhz1c1FqHdW7TOqijK66+h8tnXM88C8Jb +OFAxRWxDreNNK+lvqRutLk1iEqChk1bRp0Dy8du3cbPTaCnMF8J0FPXuDmwJnPO0 +6Hh6lBuNoN8arCKrZHlX4WUo+u+ghVPw3VygjTAYDHItjF+rCNTAQUnUAG14asIC +s4Px+/spq6XnSj1Cl/+LxF9azXoILLkHze7Hdm0Tw8ObAgMBAAGjUzBRMB0GA1Ud +DgQWBBSklcF1xTKDDwQDJ2y7O776Cqr7czAfBgNVHSMEGDAWgBSklcF1xTKDDwQD +J2y7O776Cqr7czAPBgNVHRMBAf8EBTADAQH/MA0GCSqGSIb3DQEBCwUAA4IBAQAZ +XRrrtzpdZ+Rm9q8jUdUYguI+5t9Rw8RZbo1Uv9C4XAU6UqATGkD/wt073sEZCd/1 +/BX83pyBaFROJzXSILH9lkyNyTy2Q45i8RG8Y8xk4iCUIMkrTZl3q42ZGgVKgHDz +q5m8Gn+VrkeVtPPfM77FFlPVqTbfFpwccanki8Qbd6w95ttx2/OCNkTJJokNA1E8 +5FHF9eFiB/T9LqHKuT1W6/sPfETF+IIhIhTSpBP31tPfMgZYqqDmaY1cJotinI5t +7WopbjdXKZUfF+wUwChR7Hsuo0zQ8W6Jc+X4hzDTE7bmE/5YZ6Do0q0L1I84vEof +MBzUGXqXXFL7fFvjMQ6j +-----END CERTIFICATE----- diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.key b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.key new file mode 100644 index 000000000..2188b5a2f --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/keys/senao_jeap6500/fit_key.key @@ -0,0 +1,27 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIEpAIBAAKCAQEAw4w0Z7Q7s1CF3UntxNtaRHLsTmoYFVPgSZzbjUdMYoQIYGhZ +kRx0CjoFZM5XdvPPqH7MaNjvjdtpQ7/1ZJNRZ0V62Oo9cXmkXKBBA5Arw2MWbJ+6 +q1Vrs0e86MBo3qfI2Br0WOs5Foc9XNRah3Vu0zqooyuuvofLZ1zPPAvCWzhQMUVs +Q63jTSvpb6kbrS5NYhKgoZNW0adA8vHbt3Gz02gpzBfCdBT17g5sCZzztOh4epQb +jaDfGqwiq2R5V+FlKPrvoIVT8N1coI0wGAxyLYxfqwjUwEFJ1ABteGrCArOD8fv7 +Kaul50o9Qpf/i8RfWs16CCy5B83ux3ZtE8PDmwIDAQABAoIBAAwDPuzn+4rmdXLE +qeCgAQmXbcDbb6NPxcV/51TkfmLG7aTOhEIP12kRa2dn7aOXEritIW2Hdh/mzK6m +yjJlgmivsf5FVYT1Dg3KonPPlYCpQ6VkopkH5FfdHlPGDisvb30nGr+jo5worrJX +MUCFDEvZnKZ5doCp4ur0np53snbcAQrTAJX8BqiHKiFhxszjgClelz2cuh1EqBG9 +UylxK8q26uAOG1+fzbLqLEqpHxwjunU98/P8H+kTOCRg3eSlDK5gJP7psG6siPdd +d/vDKfxglUzf7FozBY1MkTnPE6dQqUuofd1kMYaLqC61IZf+c7Rpqu7dTanIt+T7 +xhI68sECgYEA/hOGDIyGrVFOpN4rmplGtWzgBkXOf5Dj7l4CaKSvxEcUTfTLWvY4 +OsIehari2w3eUl+dfmYXBZ+Q0QtEuWjdxv0biE3PFgBmHJbvJEoZNs5b57gnP4hm +C/vwwn3gV+mVnhwpkv0AUXLZLkwpA2RdybRC4xfiylOfqPrPmCw+TbECgYEAxQc8 +KyFN1Kk2gG6mkdKEto0fO9sSToq6lvnShhm7HflFIfqXF2O3gytvwnRBrX4JWQpH +CeRCQfDssiz3zM8pLUcple2xUuZbjJovkulYu3bvP8XItL/YNIo5OF8dlpV46kQY +QWTgTYpeEDYQWUzp+UyrcSJhTH0XJcVL9npXfQsCgYEAvS2SSPO1L4VztiRKeTEZ +SerIH0OIzsj2Pby3tGyzBsUZ5DWZ2J+uHGn/Se2EPjBkUhcpcDzZdXFq5YurXxYq +04gQIPw2bh5b6XukkfOuNHWQTsd6Sb7opJGxoU8SZMLiiThU6EIDI6IM/YDtpL3t +a0sR5n8ZeSasoagmPBrtRPECgYEAiui/7fSMB/vI9iGNBFA0yvOR6sRYEtHSHXFC +kNMBTm+Y4wzmi1H9Ztgv8hu+1k9+zazmSr4ITK9MYY48osQHVunOEutC0pygPO/T +zLMBoSGIKiEKkQyUpO4yy2Cb3rfBSQD7TNePIHwGN022lw8YAnCgiqHfkWq78CA6 +nyrAFeMCgYBDciC+Haz5Z38qzUrHYeTpFnUzKn6JW9RezCD61+LGHnhSaIm+9SsR +gtyzSr8K1btoMxKjZeGc0zbYvgtbZFviUtb1ixevqI2K58IT/vPELxlE4AYq5pZQ +/1/lITNjBLuAfZG7TCQK2JCPVGkTKpk9ewRXnfncfP2sFxVdYOFALQ== +-----END RSA PRIVATE KEY----- diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-senao-jeap6500.dts b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-senao-jeap6500.dts new file mode 100755 index 000000000..89cfd088a --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-senao-jeap6500.dts @@ -0,0 +1,378 @@ +/dts-v1/; +#include "mt7981.dtsi" +/ { + model = "SENAO JEAP6500"; + compatible = "senao,jeap6500"; + chosen { + bootargs = "console=ttyS0,115200n1 loglevel=8 \ + earlycon=uart8250,mmio32,0x11002000"; + }; + + memory { + reg = <0 0x40000000 0 0x10000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + }; + + nmbm_spim_nand { + compatible = "generic,nmbm"; + + #address-cells = <1>; + #size-cells = <1>; + + lower-mtd-device = <&spi_nand>; + forced-create; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x00000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x180000 0x0200000>; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x0200000>; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0x6E00000>; + }; + + partition@7380000 { + label = "ubi_1"; + reg = <0x7380000 0x6E00000>; + }; + + partition@E180000 { + label = "cert"; + reg = <0xE180000 0x0060000>; + }; + + partition@E1E0000 { + label = "userconfig"; + reg = <0xE1E0000 0x00a0000>; + }; + + partition@E280000 { + label = "crashdump"; + reg = <0xE280000 0x0060000>; + }; + }; + }; + + sound_wm8960 { + compatible = "mediatek,mt79xx-wm8960-machine"; + mediatek,platform = <&afe>; + audio-routing = "Headphone", "HP_L", + "Headphone", "HP_R", + "LINPUT1", "AMIC", + "RINPUT1", "AMIC"; + mediatek,audio-codec = <&wm8960>; + status = "disabled"; + }; + + sound_si3218x { + compatible = "mediatek,mt79xx-si3218x-machine"; + mediatek,platform = <&afe>; + mediatek,ext-codec = <&proslic_spi>; + status = "disabled"; + }; + + leds { + compatible = "gpio-leds"; + power { + label = "power"; + gpios = <&pio 12 GPIO_ACTIVE_LOW>; + drive-strength = ; + default-state = "on"; + }; + }; +}; + +&afe { + pinctrl-names = "default"; + pinctrl-0 = <&pcm_pins>; + status = "disabled"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + status = "disabled"; + + wm8960: wm8960@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "sgmii"; + phy-handle = <&phy5>; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&phy0>; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&pio 39 1>; + + phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id03a2.9461"; + reg = <0>; + phy-mode = "gmii"; + nvmem-cells = <&phy_calibration>; + nvmem-cell-names = "phy-cal-data"; + }; + + phy5: phy@5 { + compatible = "ethernet-phy-idc0ff.0421"; + reg = <26>; + phy-mode = "sgmii"; + full-duplex; + pause; + airoha,polarity = <2>; + }; + }; +}; + +&hnat { + mtketh-wan = "eth0"; + mtketh-lan = "eth1"; + mtketh-max-gmac = <2>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + spi_nand: spi_nand@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic_pins>; + status = "disabled"; + + proslic_spi: proslic_spi@0 { + compatible = "silabs,proslic_spi"; + reg = <0>; + spi-max-frequency = <10000000>; + spi-cpha = <1>; + spi-cpol = <1>; + channel_count = <1>; + debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */ + reset_gpio = <&pio 15 0>; + ig,enable-spi = <1>; /* 1: Enable, 0: Disable */ + }; +}; + +&wbsys { + mediatek,mtd-eeprom = <&factory 0x0000>; + status = "okay"; + pinctrl-names = "dbdc"; + pinctrl-0 = <&wf_dbdc_pins>; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins>; + status = "okay"; + + tpm_spi_tis@0 { + compatible = "tcg,tpm_tis-spi"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <1000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + reset-gpios = <&pio 31 1>; + }; +}; + +&pio { + + i2c_pins: i2c-pins-g0 { + mux { + function = "i2c"; + groups = "i2c0_0"; + }; + }; + + pcm_pins: pcm-pins-g0 { + mux { + function = "pcm"; + groups = "pcm"; + }; + }; + + pwm0_pin: pwm0-pin-g0 { + mux { + function = "pwm"; + groups = "pwm0_0"; + }; + }; + + pwm1_pin: pwm1-pin-g0 { + mux { + function = "pwm"; + groups = "pwm1_0"; + }; + }; + + pwm2_pin: pwm2-pin { + mux { + function = "pwm"; + groups = "pwm2"; + }; + }; + + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = ; + bias-pull-up = ; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = ; + bias-pull-down = ; + }; + }; + + spic_pins: spi1-pins { + mux { + function = "spi"; + groups = "spi1_1"; + }; + }; + + spi2_pins: spi2-pins { + mux { + function = "spi"; + groups = "spi2"; + }; + }; + + uart1_pins: uart1-pins-g1 { + mux { + function = "uart"; + groups = "uart1_1"; + }; + }; + + uart2_pins: uart2-pins-g1 { + mux { + function = "uart"; + groups = "uart2_1"; + }; + ble_loader { + pins = "SPI1_MISO"; + function = "gpio"; + drive-strength = ; + bias-pull-up = ; + output-high; + }; + ble_reset { + pins = "SPI1_CS"; + function = "gpio"; + drive-strength = ; + bias-pull-up = ; + output-high; + }; + }; + + wf_dbdc_pins: wf_dbdc-pins { + mux { + function = "eth"; + groups = "wf0_mode1"; + }; + conf { + pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4", + "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6", + "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10", + "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ", + "WF_CBA_RESETB", "WF_DIG_RESETB"; + drive-strength = ; + }; + }; + + pta_pins: pta-pins { + mux { + function = "pta"; + groups = "pta_ext_0"; + }; + }; +}; + +&xhci { + mediatek,u3p-dis-msk = <0x0>; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + status = "okay"; +}; diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.c b/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.c index 2861c2ef9..a366d23bf 100644 --- a/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.c +++ b/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.c @@ -1,12 +1,12 @@ -// SPDX-License-Identifier: GPL-2.0 -/* FILE NAME: an8801.c - * PURPOSE: - * Airoha phy driver for Linux - * NOTES: +/*SPDX-License-Identifier: GPL-2.0*/ +/*FILE NAME: an8801.c + *PURPOSE: + *Airoha phy driver for Linux + *NOTES: * */ -/* INCLUDE FILE DECLARATIONS +/*INCLUDE FILE DECLARATIONS */ #include @@ -24,14 +24,22 @@ MODULE_DESCRIPTION("Airoha AN8801 PHY drivers"); MODULE_AUTHOR("Airoha"); MODULE_LICENSE("GPL"); -#define phydev_mdiobus(phy) ((phy)->mdio.bus) -#define phydev_mdiobus_lock(phy) (phydev_mdiobus(phy)->mdio_lock) +#if (KERNEL_VERSION(4, 5, 0) > LINUX_VERSION_CODE) +#define phydev_mdiobus(_dev) (_dev->bus) +#define phydev_phy_addr(_dev) (_dev->addr) +#define phydev_dev(_dev) (&_dev->dev) +#else +#define phydev_mdiobus(_dev) (_dev->mdio.bus) +#define phydev_phy_addr(_dev) (_dev->mdio.addr) +#define phydev_dev(_dev) (&_dev->mdio.dev) +#endif #define phydev_cfg(phy) ((struct an8801_priv *)(phy)->priv) - +#define phydev_mdiobus_lock(phy) (phydev_mdiobus(phy)->mdio_lock) #define mdiobus_lock(phy) (mutex_lock(&phydev_mdiobus_lock(phy))) #define mdiobus_unlock(phy) (mutex_unlock(&phydev_mdiobus_lock(phy))) #define MAX_SGMII_AN_RETRY (100) +#define MCS_LINK_STATUS_MASK (BIT(2)) #ifdef AN8801SB_DEBUGFS #define AN8801_DEBUGFS_POLARITY_HELP_STRING \ @@ -59,20 +67,24 @@ MODULE_LICENSE("GPL"); "\nUsage: echo w [pbus_addr] [pbus_reg] [value] > /sys/" \ "kernel/debug/mdio-bus\':[phy_addr]/pbus_reg_op" \ "\n echo r [pbus_addr] [pbus_reg] > /sys/" \ - "kernel/debug/mdio-bus\':[phy_addr]/pbus_reg_op" \ + "kernel/debug/mdio-bus\':[phy_addr]/pbus_op" \ "\nRead example: PBUS addr 0x19, Register 0x19a4" \ "\necho r 19 19a4 > /sys/" \ "kernel/debug/mdio-bus\':[phy_addr]/pbus_reg_op" \ "\nWrite example: PBUS addr 0x19, Register 0xcf8 0x1a01503" \ "\necho w 19 cf8 1a01503> /sys/" \ - "kernel/debug/mdio-bus\':[phy_addr]/pbus_reg_op" \ + "kernel/debug/mdio-bus\':[phy_addr]/pbus_op" \ + "\n" +#define AN8801_DEBUGFS_MDIO_HELP_STRING \ + "\nUsage: echo cl22 w [phy_reg] [value]> /sys/" \ + "kernel/debug/mdio-bus\':[phy_addr]/mdio" \ + "\n echo cl22 r [phy_reg] > /sys/" \ + "kernel/debug/mdio-bus\':[phy_addr]/mdio" \ + "\nUsage: echo cl45 w [devad] [phy_reg] [value]> /sys/" \ + "kernel/debug/mdio-bus\':[phy_addr]/mdio" \ + "\n echo cl45 r [devad] [phy_reg] > /sys/" \ + "kernel/debug/mdio-bus\':[phy_addr]/mdio" \ "\n" -#endif - -#if (KERNEL_VERSION(4, 5, 0) > LINUX_VERSION_CODE) -#define phydev_dev(_dev) (&_dev->dev) -#else -#define phydev_dev(_dev) (&_dev->mdio.dev) #endif /* For reference only @@ -81,14 +93,25 @@ MODULE_LICENSE("GPL"); * GPIO3 <-> LED2, */ /* User-defined.B */ +#define R50_SHIFT (-7) +static const u16 r50ohm_table[] = { +127, 127, 127, 127, 127, 127, 127, 127, 127, 127, +127, 127, 127, 127, 127, 127, 127, 127, 127, 124, +120, 116, 112, 108, 104, 100, 96, 93, 90, 86, +84, 80, 77, 74, 72, 68, 65, 64, 61, 59, +56, 54, 52, 48, 48, 45, 43, 40, 39, 36, +35, 32, 32, 30, 28, 26, 24, 23, 21, 20, +18, 16, 16, 14 +}; +static const u16 r50ohm_table_size = sizeof(r50ohm_table)/sizeof(u16); static const struct AIR_LED_CFG_T led_cfg_dlt[MAX_LED_SIZE] = { // LED Enable, GPIO, LED Polarity, LED ON, LED Blink /* LED0 */ - {LED_ENABLE, AIR_LED_GPIO1, AIR_ACTIVE_LOW, AIR_LED0_ON, AIR_LED0_BLK}, + {LED_ENABLE, AIR_LED_GPIO5, AIR_ACTIVE_LOW, AIR_LED0_ON, AIR_LED0_BLK}, /* LED1 */ - {LED_ENABLE, AIR_LED_GPIO2, AIR_ACTIVE_HIGH, AIR_LED1_ON, AIR_LED1_BLK}, + {LED_ENABLE, AIR_LED_GPIO8, AIR_ACTIVE_LOW, AIR_LED1_ON, AIR_LED1_BLK}, /* LED2 */ - {LED_ENABLE, AIR_LED_GPIO3, AIR_ACTIVE_HIGH, AIR_LED2_ON, AIR_LED2_BLK}, + {LED_ENABLE, AIR_LED_GPIO9, AIR_ACTIVE_LOW, AIR_LED2_ON, AIR_LED2_BLK}, }; static const u16 led_blink_cfg_dlt = AIR_LED_BLK_DUR_64M; @@ -107,17 +130,16 @@ static int __air_buckpbus_reg_write(struct phy_device *phydev, u32 addr, u32 data) { int err = 0; + int phy_addr = phydev_phy_addr(phydev); + struct mii_bus *mbus = phydev_mdiobus(phydev); - err = __phy_write(phydev, 0x1F, 4); - if (err) - return err; - - err |= __phy_write(phydev, 0x10, 0); - err |= __phy_write(phydev, 0x11, (u16)(addr >> 16)); - err |= __phy_write(phydev, 0x12, (u16)(addr & 0xffff)); - err |= __phy_write(phydev, 0x13, (u16)(data >> 16)); - err |= __phy_write(phydev, 0x14, (u16)(data & 0xffff)); - err |= __phy_write(phydev, 0x1F, 0); + err = mbus->write(mbus, phy_addr, 0x1F, 4); + err |= mbus->write(mbus, phy_addr, 0x10, 0); + err |= mbus->write(mbus, phy_addr, 0x11, (u16)(addr >> 16)); + err |= mbus->write(mbus, phy_addr, 0x12, (u16)(addr & 0xffff)); + err |= mbus->write(mbus, phy_addr, 0x13, (u16)(data >> 16)); + err |= mbus->write(mbus, phy_addr, 0x14, (u16)(data & 0xffff)); + err |= mbus->write(mbus, phy_addr, 0x1F, 0); return err; } @@ -126,18 +148,19 @@ static u32 __air_buckpbus_reg_read(struct phy_device *phydev, u32 addr) { int err = 0; u32 data_h, data_l, data; + int phy_addr = phydev_phy_addr(phydev); + struct mii_bus *mbus = phydev_mdiobus(phydev); - err = __phy_write(phydev, 0x1F, 4); - if (err) - return err; - - err |= __phy_write(phydev, 0x10, 0); - err |= __phy_write(phydev, 0x15, (u16)(addr >> 16)); - err |= __phy_write(phydev, 0x16, (u16)(addr & 0xffff)); - data_h = __phy_read(phydev, 0x17); - data_l = __phy_read(phydev, 0x18); - err |= __phy_write(phydev, 0x1F, 0); - if (err) + err = mbus->write(mbus, phy_addr, 0x1F, 4); + err |= mbus->write(mbus, phy_addr, 0x10, 0); + err |= mbus->write(mbus, phy_addr, 0x15, (u16)(addr >> 16)); + err |= mbus->write(mbus, phy_addr, 0x16, (u16)(addr & 0xffff)); + if (err < 0) + return INVALID_DATA; + data_h = mbus->read(mbus, phy_addr, 0x17); + data_l = mbus->read(mbus, phy_addr, 0x18); + err |= mbus->write(mbus, phy_addr, 0x1F, 0); + if (err < 0) return INVALID_DATA; data = ((data_h & 0xffff) << 16) | (data_l & 0xffff); @@ -183,6 +206,36 @@ static int __an8801_cl45_read(struct phy_device *phydev, int devad, u16 reg) return __air_buckpbus_reg_read(phydev, addr); } +int __an8801_modify_cl45_changed(struct phy_device *phydev, int devad, u32 regnum, + u16 mask, u16 set) +{ + int new, ret; + + ret = __an8801_cl45_read(phydev, devad, regnum); + if (ret < 0) + return ret; + + new = (ret & ~mask) | set; + if (new == ret) + return 0; + + ret = __an8801_cl45_write(phydev, devad, regnum, new); + + return ret < 0 ? ret : 1; +} + +static int an8801_modify_cl45_changed(struct phy_device *phydev, int devad, + u32 regnum, u16 mask, u16 set) +{ + int err = 0; + + mdiobus_lock(phydev); + err = __an8801_modify_cl45_changed(phydev, devad, regnum, mask, set); + mdiobus_unlock(phydev); + + return err; +} + static int an8801_cl45_write(struct phy_device *phydev, int devad, u16 reg, u16 val) { @@ -217,7 +270,6 @@ static int air_sw_reset(struct phy_device *phydev) u32 reg_value; u8 retry = MAX_RETRY; - /* Software Reset PHY */ reg_value = phy_read(phydev, MII_BMCR); reg_value |= BMCR_RESET; phy_write(phydev, MII_BMCR, reg_value); @@ -226,7 +278,7 @@ static int air_sw_reset(struct phy_device *phydev) reg_value = phy_read(phydev, MII_BMCR); retry--; if (retry == 0) { - phydev_err(phydev, "Reset fail !\n"); + dev_err(phydev_dev(phydev), "Reset fail !\n"); return -1; } } while (reg_value & BMCR_RESET); @@ -302,24 +354,25 @@ static int an8801_led_init(struct phy_device *phydev) ret = an8801_cl45_write(phydev, 0x1f, LED_BLK_DUR, LED_BLINK_DURATION(led_blink_cfg)); - if (ret) + if (ret < 0) return ret; ret = an8801_cl45_write(phydev, 0x1f, LED_ON_DUR, (LED_BLINK_DURATION(led_blink_cfg) >> 1)); - if (ret) + if (ret < 0) return ret; ret = an8801_led_set_mode(phydev, AIR_LED_MODE_USER_DEFINE); if (ret != 0) { - phydev_err(phydev, "LED fail to set mode, ret %d !\n", ret); + dev_err(phydev_dev(phydev), + "LED fail to set mode, ret %d !\n", ret); return ret; } for (led_id = AIR_LED0; led_id < MAX_LED_SIZE; led_id++) { ret = an8801_led_set_state(phydev, led_id, led_cfg[led_id].en); if (ret != 0) { - phydev_err(phydev, + dev_err(phydev_dev(phydev), "LED fail to set LED(%d) state, ret %d !\n", led_id, ret); return ret; @@ -342,34 +395,171 @@ static int an8801_led_init(struct phy_device *phydev) led_cfg[led_id].on_cfg, led_cfg[led_id].blk_cfg); if (ret != 0) { - phydev_err(phydev, + dev_err(phydev_dev(phydev), "Fail to set LED(%d) usr def, ret %d !\n", led_id, ret); return ret; } } } - phydev_info(phydev, "LED initialize OK !\n"); + dev_info(phydev_dev(phydev), "LED initialize OK !\n"); + return 0; +} + +static int findClosestNumber(const u16 *arr, u16 size, u16 target) +{ + int left = 0, right = size - 1; + + while (left <= right) { + int mid = left + ((right - left) >> 2); + + if (arr[mid] == target) + return mid; + + if (arr[mid] < target) + right = mid - 1; + else + left = mid + 1; + } + + if (left > size - 1) + return (size - 1); + else + return ((left - 1) >= 0 ? (left - 1) : 0); +} + +static int an8801sb_i2mpb_config(struct phy_device *phydev) +{ + int ret = 0; + u16 cl45_value = 0, temp_cl45 = 0, set = 0; + u16 mask = 0; + + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x12, &cl45_value); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value); + cl45_value = (cl45_value & GENMASK(15, 10)) + (6 << 10); + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x12, GENMASK(15, 10), cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x16, &temp_cl45); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, temp_cl45); + mask = GENMASK(15, 10) | GENMASK(5, 0); + cl45_value = (temp_cl45 & GENMASK(15, 10)) + (9 << 10); + cl45_value = ((temp_cl45 & GENMASK(5, 0)) + 6) | cl45_value; + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x16, mask, cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x17, &cl45_value); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value); + cl45_value = (cl45_value & GENMASK(13, 8)) + (6 << 8); + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x17, GENMASK(13, 8), cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x18, &temp_cl45); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, temp_cl45); + mask = GENMASK(13, 8) | GENMASK(5, 0); + cl45_value = (temp_cl45 & GENMASK(13, 8)) + (9 << 8); + cl45_value = ((temp_cl45 & GENMASK(5, 0)) + 6) | cl45_value; + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x18, mask, cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x19, &cl45_value); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value); + cl45_value = (cl45_value & GENMASK(13, 8)) + (6 << 8); + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x19, GENMASK(13, 8), cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x20, &cl45_value); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value); + cl45_value = (cl45_value & GENMASK(5, 0)) + 6; + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x20, GENMASK(5, 0), cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x21, &cl45_value); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value); + cl45_value = (cl45_value & GENMASK(13, 8)) + (6 << 8); + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x21, GENMASK(13, 8), cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, MMD_DEV_VSPEC1, 0x22, &cl45_value); + dev_dbg(phydev_dev(phydev), "%s:%d cl45_value 0x%x!\n", __func__, __LINE__, cl45_value); + cl45_value = (cl45_value & GENMASK(5, 0)) + 6; + ret = an8801_modify_cl45_changed(phydev, MMD_DEV_VSPEC1, 0x22, GENMASK(5, 0), cl45_value); + if (ret < 0) + return ret; + ret = an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x23, 0x883); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x24, 0x883); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x25, 0x883); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x26, 0x883); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x0, 0x100); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x1, 0x1bc); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x2, 0x1d0); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x3, 0x186); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x4, 0x202); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x5, 0x20e); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x6, 0x300); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x7, 0x3c0); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x8, 0x3d0); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0x9, 0x317); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0xa, 0x206); + ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC1, 0xb, 0xe); + if (ret < 0) + return ret; + + dev_info(phydev_dev(phydev), "I2MPB Initialize OK\n"); + return ret; +} + +void update_r50_value(struct phy_device *phydev, + u16 *cl45_value, int pos1, int pos2) +{ + *cl45_value &= ~(0x007f << 8); + *cl45_value |= ((r50ohm_table[pos1]) & 0x007f) << 8; + *cl45_value &= ~(0x007f); + *cl45_value |= (r50ohm_table[pos2]) & 0x007f; + dev_dbg(phydev_dev(phydev), "Read: r50ohm_tx_1=%d r50ohm_tx_2=%d\n", + r50ohm_table[pos1], r50ohm_table[pos2]); +} + +int calculate_position(int pos, int shift, int table_size) +{ + if (shift > 0) + return (pos + shift < table_size) ? (pos + shift) : (table_size - 1); + else + return (pos + shift > 0) ? (pos + shift) : 0; +} + +int process_r50(struct phy_device *phydev, int reg, + u16 *cl45_value, u16 *r50ohm_tx_a, u16 *r50ohm_tx_b) +{ + int pos1 = findClosestNumber(r50ohm_table, r50ohm_table_size, *r50ohm_tx_a); + int pos2 = findClosestNumber(r50ohm_table, r50ohm_table_size, *r50ohm_tx_b); + + if (pos1 != -1 && pos2 != -1) { + pos1 = calculate_position(pos1, R50_SHIFT, r50ohm_table_size); + pos2 = calculate_position(pos2, R50_SHIFT, r50ohm_table_size); + + update_r50_value(phydev, cl45_value, pos1, pos2); + return an8801_cl45_write(phydev, 0x1e, reg, *cl45_value); + } return 0; } #ifdef CONFIG_OF static int an8801r_of_init(struct phy_device *phydev) { - struct device *dev = &phydev->mdio.dev; - struct device_node *of_node = dev->of_node; + struct device_node *of_node = phydev_dev(phydev)->of_node; struct an8801_priv *priv = phydev_cfg(phydev); u32 val = 0; if (of_find_property(of_node, "airoha,rxclk-delay", NULL)) { if (of_property_read_u32(of_node, "airoha,rxclk-delay", &val) != 0) { - phydev_err(phydev, "airoha,rxclk-delay value is invalid."); + dev_err(phydev_dev(phydev), "airoha,rxclk-delay value is invalid."); return -1; } if (val < AIR_RGMII_DELAY_NOSTEP || val > AIR_RGMII_DELAY_STEP_7) { - phydev_err(phydev, + dev_err(phydev_dev(phydev), "airoha,rxclk-delay value %u out of range.", val); return -1; @@ -383,13 +573,13 @@ static int an8801r_of_init(struct phy_device *phydev) if (of_find_property(of_node, "airoha,txclk-delay", NULL)) { if (of_property_read_u32(of_node, "airoha,txclk-delay", &val) != 0) { - phydev_err(phydev, + dev_err(phydev_dev(phydev), "airoha,txclk-delay value is invalid."); return -1; } if (val < AIR_RGMII_DELAY_NOSTEP || val > AIR_RGMII_DELAY_STEP_7) { - phydev_err(phydev, + dev_err(phydev_dev(phydev), "airoha,txclk-delay value %u out of range.", val); return -1; @@ -397,6 +587,48 @@ static int an8801r_of_init(struct phy_device *phydev) priv->txdelay_force = TRUE; priv->txdelay_step = val; } + return 0; +} + +static int an8801sb_of_init(struct phy_device *phydev) +{ + struct device_node *of_node = phydev_dev(phydev)->of_node; + struct an8801_priv *priv = phydev_cfg(phydev); + u32 val = 0; + + if (of_find_property(of_node, "airoha,polarity", NULL)) { + if (of_property_read_u32(of_node, "airoha,polarity", + &val) != 0) { + dev_err(phydev_dev(phydev), "airoha,polarity value is invalid."); + return -1; + } + if (val < AIR_POL_TX_NOR_RX_REV || + val > AIR_POL_TX_REV_RX_NOR) { + dev_err(phydev_dev(phydev), + "airoha,polarity value %u out of range.", + val); + return -1; + } + priv->pol = val; + } else + priv->pol = AIR_POL_TX_NOR_RX_NOR; + + if (of_find_property(of_node, "airoha,surge", NULL)) { + if (of_property_read_u32(of_node, "airoha,surge", + &val) != 0) { + dev_err(phydev_dev(phydev), "airoha,surge value is invalid."); + return -1; + } + if (val < AIR_SURGE_0R || + val > AIR_SURGE_5R) { + dev_err(phydev_dev(phydev), + "airoha,surge value %u out of range.", + val); + return -1; + } + priv->surge = val; + } else + priv->surge = AIR_SURGE_0R; return 0; } @@ -405,21 +637,26 @@ static int an8801r_of_init(struct phy_device *phydev) { return 0; } -#endif /* CONFIG_OF */ +static int an8801sb_of_init(struct phy_device *phydev) +{ + return 0; +} +#endif + static int an8801r_rgmii_rxdelay(struct phy_device *phydev, u16 delay, u8 align) { u32 reg_val = delay & RGMII_DELAY_STEP_MASK; - /* align */ if (align) { reg_val |= RGMII_RXDELAY_ALIGN; - phydev_info(phydev, "Rxdelay align\n"); + dev_info(phydev_dev(phydev), "Rxdelay align\n"); } reg_val |= RGMII_RXDELAY_FORCE_MODE; air_buckpbus_reg_write(phydev, 0x1021C02C, reg_val); reg_val = air_buckpbus_reg_read(phydev, 0x1021C02C); - phydev_info(phydev, "Force rxdelay = %d(0x%x)\n", delay, reg_val); + dev_info(phydev_dev(phydev), + "Force rxdelay = %d(0x%x)\n", delay, reg_val); return 0; } @@ -430,7 +667,8 @@ static int an8801r_rgmii_txdelay(struct phy_device *phydev, u16 delay) reg_val |= RGMII_TXDELAY_FORCE_MODE; air_buckpbus_reg_write(phydev, 0x1021C024, reg_val); reg_val = air_buckpbus_reg_read(phydev, 0x1021C024); - phydev_info(phydev, "Force txdelay = %d(0x%x)\n", delay, reg_val); + dev_info(phydev_dev(phydev), + "Force txdelay = %d(0x%x)\n", delay, reg_val); return 0; } @@ -446,30 +684,122 @@ static int an8801r_rgmii_delay_config(struct phy_device *phydev) return 0; } +int an8801sb_surge_protect_cfg(struct phy_device *phydev) +{ + int ret = 0; + struct device *dev = phydev_dev(phydev); + struct an8801_priv *priv = phydev->priv; + u16 r50ohm_tx_a = 0, r50ohm_tx_b = 0, r50ohm_tx_c = 0, r50ohm_tx_d = 0; + u16 cl45_value = 0; + + if (priv->surge) { + ret = an8801_cl45_read(phydev, 0x1e, 0x174, &cl45_value); + if (ret < 0) + return ret; + r50ohm_tx_a = (cl45_value >> 8) & 0x007f; + r50ohm_tx_b = cl45_value & 0x007f; + dev_dbg(phydev_dev(phydev), "Read: (0x174) value=0x%04x r50ohm_tx_a=%d r50ohm_tx_b=%d\n", + cl45_value, r50ohm_tx_a, r50ohm_tx_b); + ret = process_r50(phydev, 0x174, &cl45_value, &r50ohm_tx_a, &r50ohm_tx_b); + if (ret < 0) + return ret; + ret = an8801_cl45_read(phydev, 0x1e, 0x175, &cl45_value); + if (ret < 0) + return ret; + r50ohm_tx_c = (cl45_value >> 8) & 0x007f; + r50ohm_tx_d = cl45_value & 0x007f; + dev_dbg(phydev_dev(phydev), "Read: (0x175) value=0x%04x r50ohm_tx_c=%d r50ohm_tx_d=%d\n", + cl45_value, r50ohm_tx_c, r50ohm_tx_d); + ret = process_r50(phydev, 0x175, &cl45_value, &r50ohm_tx_c, &r50ohm_tx_d); + if (ret < 0) + return ret; + ret = an8801sb_i2mpb_config(phydev); + if (ret < 0) { + dev_err(dev, "an8801sb_i2mpb_config fail\n"); + return ret; + } + dev_info(dev, "surge protection mode - 5R\n"); + } else + dev_info(dev, "surge protection mode - 0R\n"); + return ret; +} + static int an8801sb_config_init(struct phy_device *phydev) { int ret; + struct an8801_priv *priv = phydev_cfg(phydev); + u32 pbus_value = 0; + u32 reg_value = 0; + + reg_value = phy_read(phydev, MII_BMSR); + if ((reg_value & MCS_LINK_STATUS_MASK) != 0) { + ret = air_buckpbus_reg_write(phydev, 0x10220010, 0x1801); + if (ret < 0) + return ret; + reg_value = air_buckpbus_reg_read(phydev, 0x10220010); + dev_dbg(phydev_dev(phydev), + "air_buckpbus_reg_read(0x10220010,0x%x).\n", reg_value); + + ret = air_buckpbus_reg_write(phydev, 0x10220000, 0x9140); + if (ret < 0) + return ret; + reg_value = air_buckpbus_reg_read(phydev, 0x10220000); + dev_dbg(phydev_dev(phydev), + "air_buckpbus_reg_read(0x10220000,0x%x).\n", reg_value); + mdelay(80); + } + + ret = an8801sb_of_init(phydev); + if (ret < 0) + return ret; +#ifdef CONFIG_OF + pbus_value = air_buckpbus_reg_read(phydev, 0x1022a0f8); + pbus_value &= ~0x3; + pbus_value |= priv->pol; + ret = air_buckpbus_reg_write(phydev, 0x1022a0f8, pbus_value); + if (ret < 0) + return ret; +#endif + pbus_value = air_buckpbus_reg_read(phydev, 0x1022a0f8); + dev_info(phydev_dev(phydev), + "Tx, Rx Polarity : %08x\n", pbus_value); - /* disable LPM */ ret = an8801_cl45_write(phydev, MMD_DEV_VSPEC2, 0x600, 0x1e); ret |= an8801_cl45_write(phydev, MMD_DEV_VSPEC2, 0x601, 0x02); - /*default disable EEE*/ - ret |= an8801_cl45_write(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0); + + ret |= an8801_cl45_write(phydev, 7, 60, 0x0); if (ret != 0) { - phydev_err(phydev, "AN8801SB initialize fail, ret %d !\n", ret); + dev_err(phydev_dev(phydev), + "AN8801SB initialize fail, ret %d !\n", ret); return ret; } ret = an8801_led_init(phydev); if (ret != 0) { - phydev_err(phydev, "LED initialize fail, ret %d !\n", ret); + dev_err(phydev_dev(phydev), + "LED initialize fail, ret %d !\n", ret); return ret; } air_buckpbus_reg_write(phydev, 0x10270100, 0x0f); - air_buckpbus_reg_write(phydev, 0x10270104, 0x3f); - air_buckpbus_reg_write(phydev, 0x10270108, 0x10100303); - phydev_info(phydev, "AN8801SB Initialize OK ! (%s)\n", - AN8801_DRIVER_VERSION); + air_buckpbus_reg_write(phydev, 0x10270108, 0x0a0a0404); + ret = an8801sb_surge_protect_cfg(phydev); + if (ret < 0) { + dev_err(phydev_dev(phydev), + "an8801sb_surge_protect_cfg fail. (ret=%d)\n", ret); + return ret; + } + reg_value = phy_read(phydev, MII_CTRL1000); + reg_value |= ADVERTISE_1000FULL; + ret = phy_write(phydev, MII_CTRL1000, reg_value); + if (ret < 0) + return ret; + reg_value = phy_read(phydev, MII_BMCR); + reg_value |= BMCR_ANRESTART; + ret = phy_write(phydev, MII_BMCR, reg_value); + if (ret < 0) + return ret; + dev_info(phydev_dev(phydev), + "AN8801SB Initialize OK ! (%s)\n", AN8801_DRIVER_VERSION); return 0; } @@ -496,10 +826,11 @@ static int an8801r_config_init(struct phy_device *phydev) ret = an8801_led_init(phydev); if (ret != 0) { - phydev_err(phydev, "LED initialize fail, ret %d !\n", ret); + dev_err(phydev_dev(phydev), + "LED initialize fail, ret %d !\n", ret); return ret; } - phydev_info(phydev, "AN8801R Initialize OK ! (%s)\n", + dev_info(phydev_dev(phydev), "AN8801R Initialize OK ! (%s)\n", AN8801_DRIVER_VERSION); return 0; } @@ -511,7 +842,7 @@ static int an8801_config_init(struct phy_device *phydev) } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { an8801r_config_init(phydev); } else { - phydev_info(phydev, "AN8801 Phy-mode not support!!!\n"); + dev_info(phydev_dev(phydev), "AN8801 Phy-mode not support!!!\n"); return -1; } return 0; @@ -528,7 +859,7 @@ static const char * const tx_rx_string[32] = { int an8801_set_polarity(struct phy_device *phydev, int tx_rx) { int ret = 0; - unsigned long pbus_data = 0; + u32 pbus_data = 0; pr_notice("\n[Write] Polarity %s\n", tx_rx_string[tx_rx]); pbus_data = (air_buckpbus_reg_read(phydev, 0x1022a0f8) & @@ -544,7 +875,7 @@ int an8801_set_polarity(struct phy_device *phydev, int tx_rx) return ret; pbus_data = air_buckpbus_reg_read(phydev, 0x1022a0f8); tx_rx = pbus_data & (BIT(0) | BIT(1)); - pr_notice("\n[Read] Polarity %s confirm....(%8lx)\n", + pr_notice("\n[Read] Polarity %s confirm....(%8x)\n", tx_rx_string[tx_rx], pbus_data); return ret; @@ -608,44 +939,177 @@ static ssize_t an8801_polarity_write(struct file *file, const char __user *ptr, return count; } +static ssize_t an8801_mdio_write(struct file *file, const char __user *ptr, + size_t len, loff_t *off) +{ + struct phy_device *phydev = file->private_data; + char buf[64], param1[32], param2[32]; + int count = len, ret = 0; + unsigned int reg, devad, val; + u16 reg_val; + + memset(buf, 0, 64); + memset(param1, 0, 32); + memset(param2, 0, 32); + + if (count > sizeof(buf) - 1) + return -EINVAL; + if (copy_from_user(buf, ptr, len)) + return -EFAULT; + + ret = sscanf(buf, "%s %s", param1, param2); + if (ret < 0) + return ret; + + if (!strncmp("cl22", param1, strlen("cl22"))) { + if (!strncmp("w", param2, strlen("w"))) { + if (sscanf(buf, "cl22 w %x %x", ®, &val) == -1) + return -EFAULT; + pr_notice("\nphy=0x%x, reg=0x%x, val=0x%x\n", + phydev_phy_addr(phydev), reg, val); + + ret = phy_write(phydev, reg, val); + if (ret < 0) + return ret; + pr_notice("\nphy=0x%x, reg=0x%x, val=0x%x confirm..\n", + phydev_phy_addr(phydev), reg, + phy_read(phydev, reg)); + } else if (!strncmp("r", param2, strlen("r"))) { + if (sscanf(buf, "cl22 r %x", ®) == -1) + return -EFAULT; + pr_notice("\nphy=0x%x, reg=0x%x, val=0x%x\n", + phydev_phy_addr(phydev), reg, + phy_read(phydev, reg)); + } else { + pr_notice(AN8801_DEBUGFS_MDIO_HELP_STRING); + return -EINVAL; + } + } else if (!strncmp("cl45", param1, strlen("cl45"))) { + if (!strncmp("w", param2, strlen("w"))) { + if (sscanf(buf, "cl45 w %x %x %x", &devad, ®, &val) == -1) + return -EFAULT; + pr_notice("\nphy=0x%x, devad=0x%x, reg=0x%x, val=0x%x\n", + phydev_phy_addr(phydev), devad, reg, val); + + ret = an8801_cl45_write(phydev, devad, reg, val); + if (ret < 0) + return ret; + an8801_cl45_read(phydev, devad, reg, ®_val); + pr_notice("\nphy=0x%x, devad=0x%x, reg=0x%x, val=0x%x confirm..\n", + phydev_phy_addr(phydev), devad, reg, reg_val); + } else if (!strncmp("r", param2, strlen("r"))) { + if (sscanf(buf, "cl45 r %x %x", &devad, ®) == -1) + return -EFAULT; + an8801_cl45_read(phydev, devad, reg, ®_val); + pr_notice("\nphy=0x%x, devad=0x%x, reg=0x%x, val=0x%x\n", + phydev_phy_addr(phydev), devad, reg, reg_val); + } else { + pr_notice(AN8801_DEBUGFS_MDIO_HELP_STRING); + return -EINVAL; + } + } else { + pr_notice(AN8801_DEBUGFS_MDIO_HELP_STRING); + return -EINVAL; + } + + return count; +} + static int an8801_counter_show(struct seq_file *seq, void *v) { struct phy_device *phydev = seq->private; int ret = 0; u32 pkt_cnt = 0; + struct mii_bus *mbus = phydev_mdiobus(phydev); seq_puts(seq, "==========AIR PHY COUNTER==========\n"); - seq_puts(seq, "|\t<>\n"); - seq_puts(seq, "| Rx from Line side_S :"); + seq_puts(seq, "|\t<>\n"); + air_buckpbus_reg_write(phydev, 0x10226124, 0xaa); + air_buckpbus_reg_write(phydev, 0x10226124, 0x0); + seq_puts(seq, "| PHY Rx DV CNT :"); + pkt_cnt = air_buckpbus_reg_read(phydev, 0x1022614c); + seq_printf(seq, "%010u |\n", pkt_cnt); + seq_puts(seq, "| PHY Tx EN CNT :"); + pkt_cnt = air_buckpbus_reg_read(phydev, 0x10226148); + seq_printf(seq, "%010u |\n", pkt_cnt); + seq_puts(seq, "| Tx ER CNT :"); + pkt_cnt = air_buckpbus_reg_read(phydev, 0x10226150); + seq_printf(seq, "%010u |\n", pkt_cnt); + seq_puts(seq, "| MAC Rx DV CNT :"); + pkt_cnt = air_buckpbus_reg_read(phydev, 0x10226138); + seq_printf(seq, "%010u |\n", pkt_cnt); + seq_puts(seq, "| MAC Tx EN CNT :"); + pkt_cnt = air_buckpbus_reg_read(phydev, 0x1022612C); + seq_printf(seq, "%010u |\n", pkt_cnt); + seq_puts(seq, "| Tx ER CNT :"); + pkt_cnt = air_buckpbus_reg_read(phydev, 0x10226130); + seq_printf(seq, "%010u |\n", pkt_cnt); + ret = air_buckpbus_reg_write(phydev, 0x10226124, 0x55); + ret |= air_buckpbus_reg_write(phydev, 0x10226124, 0x0); + if (ret < 0) + return ret; + + seq_puts(seq, "|\t<>\n"); + seq_puts(seq, "| Rx from Line side_S :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x10270130); seq_printf(seq, "%010u |\n", pkt_cnt); - seq_puts(seq, "| Rx from Line side_E :"); + seq_puts(seq, "| Rx from Line side_E :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x10270134); seq_printf(seq, "%010u |\n", pkt_cnt); - seq_puts(seq, "| Tx to System side_S :"); + seq_puts(seq, "| Tx to System side_S :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x10270138); seq_printf(seq, "%010u |\n", pkt_cnt); - seq_puts(seq, "| Tx to System side_E :"); + seq_puts(seq, "| Tx to System side_E :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x1027013C); seq_printf(seq, "%010u |\n", pkt_cnt); - seq_puts(seq, "| Rx from System side_S :"); + seq_puts(seq, "| Rx from System side_S :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x10270120); seq_printf(seq, "%010u |\n", pkt_cnt); - seq_puts(seq, "| Rx from System side_E :"); + seq_puts(seq, "| Rx from System side_E :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x10270124); seq_printf(seq, "%010u |\n", pkt_cnt); - seq_puts(seq, "| Tx to Line side_S :"); + seq_puts(seq, "| Tx to Line side_S :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x10270128); seq_printf(seq, "%010u |\n", pkt_cnt); - seq_puts(seq, "| Tx to Line side_E :"); + seq_puts(seq, "| Tx to Line side_E :"); pkt_cnt = air_buckpbus_reg_read(phydev, 0x1027012C); seq_printf(seq, "%010u |\n", pkt_cnt); ret = air_buckpbus_reg_write(phydev, 0x1027011C, 0x3); if (ret < 0) - seq_printf(seq, "\nClear Counter fail\n", __func__); - else - seq_puts(seq, "\nClear Counter!!\n"); + return ret; + + seq_puts(seq, "|\t<>\n"); + ret = phy_write(phydev, 0x1f, 1); + if (ret < 0) + return ret; + seq_puts(seq, "| Rx from Line side :"); + pkt_cnt = phy_read(phydev, 0x12) & 0x7fff; + seq_printf(seq, "%010u |\n", pkt_cnt); + seq_puts(seq, "| Rx Error from Line side :"); + pkt_cnt = phy_read(phydev, 0x17) & 0xff; + seq_printf(seq, "%010u |\n", pkt_cnt); + + ret = phy_write(phydev, 0x1f, 0); + if (ret < 0) + return ret; + ret = phy_write(phydev, 0x1f, 0x52B5); + if (ret < 0) + return ret; + ret = phy_write(phydev, 0x10, 0xBF92); + if (ret < 0) + return ret; + + seq_puts(seq, "| Tx to Line side :"); + pkt_cnt = (phy_read(phydev, 0x11) & 0x7ffe) >> 1; + seq_printf(seq, "%010u |\n", pkt_cnt); + seq_puts(seq, "| Tx Error to Line side :"); + pkt_cnt = phy_read(phydev, 0x12); + pkt_cnt &= 0x7f; + seq_printf(seq, "%010u |\n\n", pkt_cnt); + ret = phy_write(phydev, 0x1f, 0); + if (ret < 0) + return ret; return ret; } @@ -669,7 +1133,7 @@ static ssize_t an8801_debugfs_pbus(struct file *file, char buf[64]; int ret = 0; unsigned int reg, addr; - unsigned long val; + u32 val; memset(buf, 0, 64); @@ -677,34 +1141,27 @@ static ssize_t an8801_debugfs_pbus(struct file *file, return -EFAULT; if (buf[0] == 'w') { - if (sscanf(buf, "w %x %x %lx", &addr, ®, &val) == -1) + if (sscanf(buf, "w %x %x", ®, &val) == -1) return -EFAULT; - if (addr > 0 && addr < 32) { - pr_notice("\nphy=0x%x, reg=0x%x, val=0x%lx\n", - addr, reg, val); + pr_notice("\nphy=0x%x, reg=0x%x, val=0x%x\n", + phydev_phy_addr(phydev), reg, val); - ret = air_buckpbus_reg_write(phydev, reg, val); - if (ret < 0) - return ret; - pr_notice("\nphy=%d, reg=0x%x, val=0x%lx confirm..\n", - addr, reg, - air_buckpbus_reg_read(phydev, reg)); - } else { - pr_notice("addr is out of range(1~32)\n"); - } + ret = air_buckpbus_reg_write(phydev, reg, val); + if (ret < 0) + return ret; + + pr_notice("\nphy=%d, reg=0x%x, val=0x%x confirm..\n", + addr, reg, + air_buckpbus_reg_read(phydev, reg)); } else if (buf[0] == 'r') { - if (sscanf(buf, "r %x %x", &addr, ®) == -1) + if (sscanf(buf, "r %x", ®) == -1) return -EFAULT; - if (addr > 0 && addr < 32) { - pr_notice("\nphy=0x%x, reg=0x%x, val=0x%lx\n", - addr, reg, - air_buckpbus_reg_read(phydev, reg)); - } else { - pr_notice("addr is out of range(1~32)\n"); - } - } else if (buf[0] == 'h') { + + pr_notice("\nphy=0x%x, reg=0x%x, val=0x%x\n", + phydev_phy_addr(phydev), reg, + air_buckpbus_reg_read(phydev, reg)); + } else if (buf[0] == 'h') an8801_debugfs_pbus_help(); - } return count; } @@ -714,18 +1171,25 @@ int an8801_info_show(struct seq_file *seq, void *v) struct phy_device *phydev = seq->private; unsigned int tx_rx = (air_buckpbus_reg_read(phydev, 0x1022a0f8) & 0x3); - unsigned long pbus_data = 0; + u32 pbus_data = 0; + int reg = 0; - seq_puts(seq, "<>\n"); - pbus_data = air_buckpbus_reg_read(phydev, 0x1000009c); - seq_printf(seq, "| Product Version : E%ld\n", pbus_data & 0xf); + seq_puts(seq, "\t<>\n"); + pbus_data = air_buckpbus_reg_read(phydev, 0x10005004); + seq_printf(seq, "| Product Version : E%d\n", pbus_data); seq_printf(seq, "| Driver Version : %s\n", AN8801_DRIVER_VERSION); pbus_data = air_buckpbus_reg_read(phydev, 0x10220b04); seq_printf(seq, "| Serdes Status : Rx_Sync(%01ld), AN_Done(%01ld)\n", GET_BIT(pbus_data, 4), GET_BIT(pbus_data, 0)); seq_printf(seq, "| Tx, Rx Polarity : %s(%02d)\n", tx_rx_string[tx_rx], tx_rx); - + pbus_data = air_buckpbus_reg_read(phydev, 0x10000094); + seq_printf(seq, "| RG_HW_STRAP : 0x%08x\n", pbus_data); + for (reg = MII_BMCR; reg <= MII_STAT1000; reg++) { + if ((reg <= MII_LPA) || (reg >= MII_CTRL1000)) + seq_printf(seq, "| RG_MII 0x%02x : 0x%08x\n", + reg, phy_read(phydev, reg)); + } seq_puts(seq, "\n"); return 0; @@ -766,19 +1230,26 @@ static const struct file_operations an8801_polarity_fops = { .llseek = noop_llseek, }; +static const struct file_operations an8801_mdio_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .write = an8801_mdio_write, + .llseek = noop_llseek, +}; + int an8801_debugfs_init(struct phy_device *phydev) { int ret = 0; struct an8801_priv *priv = phydev->priv; - phydev_info(phydev, "Debugfs init start\n"); + dev_info(phydev_dev(phydev), "Debugfs init start\n"); priv->debugfs_root = debugfs_create_dir(dev_name(phydev_dev(phydev)), NULL); if (!priv->debugfs_root) { - phydev_err(phydev, "Debugfs init err\n"); + dev_err(phydev_dev(phydev), "Debugfs init err\n"); ret = -ENOMEM; } - debugfs_create_file(DEBUGFS_DRIVER_INFO, 0444, + debugfs_create_file(DEBUGFS_INFO, 0444, priv->debugfs_root, phydev, &an8801_info_fops); debugfs_create_file(DEBUGFS_COUNTER, 0644, @@ -790,6 +1261,9 @@ int an8801_debugfs_init(struct phy_device *phydev) debugfs_create_file(DEBUGFS_POLARITY, S_IFREG | 0200, priv->debugfs_root, phydev, &an8801_polarity_fops); + debugfs_create_file(DEBUGFS_MDIO, S_IFREG | 0200, + priv->debugfs_root, phydev, + &an8801_mdio_fops); return ret; } @@ -807,21 +1281,23 @@ static void air_debugfs_remove(struct phy_device *phydev) static int an8801_phy_probe(struct phy_device *phydev) { u32 reg_value, phy_id, led_id; - struct device *dev = &phydev->mdio.dev; struct an8801_priv *priv = NULL; reg_value = phy_read(phydev, 2); phy_id = reg_value << 16; reg_value = phy_read(phydev, 3); phy_id |= reg_value; - phydev_info(phydev, "PHY-ID = %x\n", phy_id); + dev_info(phydev_dev(phydev), "PHY-ID = %x\n", phy_id); if (phy_id != AN8801_PHY_ID) { - phydev_err(phydev, "AN8801 can't be detected.\n"); + dev_err(phydev_dev(phydev), + "AN8801 can't be detected.\n"); return -1; } - priv = devm_kzalloc(dev, sizeof(struct an8801_priv), GFP_KERNEL); + priv = devm_kzalloc(phydev_dev(phydev) + , sizeof(struct an8801_priv) + , GFP_KERNEL); if (!priv) return -ENOMEM; @@ -849,7 +1325,7 @@ static int an8801_phy_probe(struct phy_device *phydev) return ret; } } else { - phydev_info(phydev, "AN8801R not supprt debugfs\n"); + dev_info(phydev_dev(phydev), "AN8801R not supprt debugfs\n"); } #endif return 0; @@ -864,7 +1340,7 @@ static void an8801_phy_remove(struct phy_device *phydev) air_debugfs_remove(phydev); #endif kfree(priv); - phydev_info(phydev, "AN8801 remove OK!\n"); + dev_info(phydev_dev(phydev), "AN8801 remove OK!\n"); } } @@ -886,8 +1362,7 @@ static int an8801sb_read_status(struct phy_device *phydev) prespeed = phydev->speed; ret |= an8801_cl45_write( phydev, MMD_DEV_VSPEC2, PHY_PRE_SPEED_REG, prespeed); - phydev_info(phydev, "AN8801SB SPEED %d\n", prespeed); - air_buckpbus_reg_write(phydev, 0x10270108, 0x0a0a0404); + dev_info(phydev_dev(phydev), "AN8801SB SPEED %d\n", prespeed); while (an_retry > 0) { mdelay(1); /* delay 1 ms */ reg_value = air_buckpbus_reg_read( @@ -900,7 +1375,7 @@ static int an8801sb_read_status(struct phy_device *phydev) if (phydev->autoneg == AUTONEG_DISABLE) { - phydev_info(phydev, + dev_info(phydev_dev(phydev), "AN8801SB force speed = %d\n", prespeed); if (prespeed == SPEED_1000) { air_buckpbus_reg_write( @@ -938,7 +1413,7 @@ static int an8801r_read_status(struct phy_device *phydev) } if (prespeed != phydev->speed && phydev->link == LINK_UP) { prespeed = phydev->speed; - phydev_dbg(phydev, "AN8801R SPEED %d\n", prespeed); + dev_dbg(phydev_dev(phydev), "AN8801R SPEED %d\n", prespeed); if (prespeed == SPEED_1000) { data = air_buckpbus_reg_read(phydev, 0x10005054); data |= BIT(0); @@ -959,7 +1434,7 @@ static int an8801_read_status(struct phy_device *phydev) } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { an8801r_read_status(phydev); } else { - phydev_info(phydev, "AN8801 Phy-mode not support!\n"); + dev_info(phydev_dev(phydev), "AN8801 Phy-mode not support!\n"); return -1; } return 0; diff --git a/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.h b/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.h index e94c7c1b9..c98c9e098 100644 --- a/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.h +++ b/feeds/mediatek-sdk/mediatek/files-5.4/drivers/net/phy/an8801.h @@ -1,9 +1,9 @@ -// SPDX-License-Identifier: GPL-2.0 -/* FILE NAME: an8801.h - * PURPOSE: - * Define Airoha phy driver function +/*SPDX-License-Identifier: GPL-2.0*/ +/*FILE NAME: an8801.h + *PURPOSE: + *Define Airoha phy driver function * - * NOTES: + *NOTES: * */ @@ -12,12 +12,13 @@ /* NAMING DECLARATIONS */ -#define AN8801_DRIVER_VERSION "1.1.0" +#define AN8801_DRIVER_VERSION "1.1.4" #define DEBUGFS_COUNTER "counter" -#define DEBUGFS_DRIVER_INFO "driver_info" +#define DEBUGFS_INFO "driver_info" #define DEBUGFS_PBUS_OP "pbus_op" #define DEBUGFS_POLARITY "polarity" +#define DEBUGFS_MDIO "mdio" #define AN8801_MDIO_PHY_ID 0x1 #define AN8801_PHY_ID1 0xc0ff @@ -97,6 +98,7 @@ #define PHY_PRE_SPEED_REG (0x2b) +#define MMD_DEV_VSPEC1 (0x1E) #define MMD_DEV_VSPEC2 (0x1F) #define RGMII_DELAY_STEP_MASK 0x7 @@ -202,6 +204,8 @@ struct an8801_priv { #ifdef AN8801SB_DEBUGFS struct dentry *debugfs_root; #endif + int pol; + int surge; }; enum an8801_polarity { @@ -211,4 +215,10 @@ enum an8801_polarity { AIR_POL_TX_REV_RX_NOR, }; +enum air_surge { + AIR_SURGE_0R, + AIR_SURGE_5R, + AIR_SURGE_LAST = 0xff +}; + #endif /* End of __AN8801_H */ diff --git a/feeds/mediatek-sdk/mediatek/image/mt7981.mk b/feeds/mediatek-sdk/mediatek/image/mt7981.mk index 37370baee..d9a205d50 100755 --- a/feeds/mediatek-sdk/mediatek/image/mt7981.mk +++ b/feeds/mediatek-sdk/mediatek/image/mt7981.mk @@ -1,5 +1,27 @@ KERNEL_LOADADDR := 0x48080000 +define Build/fit-sign + $(TOPDIR)/scripts/mkits-secure_boot.sh \ + -D $(DEVICE_NAME) \ + -o $@.its \ + -k $@ \ + $(if $(word 2,$(1)),-d $(word 2,$(1))) -C $(word 1,$(1)) \ + -a $(KERNEL_LOADADDR) \ + -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \ + -c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \ + -A $(LINUX_KARCH) \ + -v $(LINUX_VERSION) \ + $(if $(FIT_KEY_NAME),-S $(FIT_KEY_NAME)) \ + $(if $(FW_AR_VER),-r $(FW_AR_VER)) \ + $(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),-R $(ROOTFS/squashfs/$(DEVICE_NAME))) + PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage \ + -f $@.its \ + $(if $(FIT_KEY_DIR),-k $(FIT_KEY_DIR)) \ + -r \ + $@.new + @mv $@.new $@ +endef + define Device/mt7981-spim-nor-rfb DEVICE_VENDOR := MediaTek DEVICE_MODEL := mt7981-spim-nor-rfb @@ -235,3 +257,28 @@ define Device/mt7981-fpga-sd IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata endef TARGET_DEVICES += mt7981-fpga-sd + +define Device/senao_jeap6500 + DEVICE_VENDOR := SENAO + DEVICE_MODEL := JEAP6500 + DEVICE_DTS := mt7981-senao-jeap6500 + DEVICE_DTS_DIR := $(DTS_DIR)/mediatek + SUPPORTED_DEVICES := senao,jeap6500 + DEVICE_PACKAGES := kmod-mt7981-firmware kmod-mt7915e uboot-envtools -procd-ujail + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 65536k + KERNEL_IN_UBI := 1 + FIT_KEY_DIR := $(DTS_DIR)/mediatek/keys/senao_jeap6500 + FIT_KEY_NAME := fit_key + IMAGES += factory.bin + IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE) + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + KERNEL = kernel-bin | lzma | \ + fit-sign lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb + KERNEL_INITRAMFS = kernel-bin | lzma | \ + fit-sign lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd +endef +TARGET_DEVICES += senao_jeap6500 +DEFAULT_DEVICE_VARS += FIT_KEY_DIR FIT_KEY_NAME diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network index efe4b7102..746459397 100644 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/board.d/02_network @@ -23,6 +23,9 @@ mediatek_setup_interfaces() *2500wan-p5*) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan ;; + senao,jeap6500) + ucidef_set_interfaces_lan_wan "eth1" "eth0" + ;; sonicfi,rap630w-211g) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1 ;; @@ -47,6 +50,18 @@ mediatek_setup_macs() lan_mac_offset="0x24" wan_mac_offset="0x2a" ;; + senao,jeap6500) + hw_mac_addr=$(mtd_get_mac_ascii u-boot-env ethaddr) + lan_mac="$hw_mac_addr" + wan_mac=$(macaddr_add $hw_mac_addr 1) + if [ -n "$lan_mac" ]; then + ucidef_set_interface_macaddr "lan" "$lan_mac" + fi + if [ -n "$wan_mac" ]; then + ucidef_set_interface_macaddr "wan" "$wan_mac" + ucidef_set_label_macaddr "$wan_mac" + fi + ;; sonicfi,rap630w-211g) sysfs="/sys/class/ieee80211" env_dev=$(get_boot_param "boot_param.env_part") diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac new file mode 100644 index 000000000..97c0913ac --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -0,0 +1,18 @@ +[ "$ACTION" == "add" ] || exit 0 + +PHYNBR=${DEVPATH##*/phy} + +[ -n $PHYNBR ] || exit 0 + +. /lib/functions.sh +. /lib/functions/system.sh + +board=$(board_name) + +case "$board" in + senao,jeap6500) + hw_mac_addr=$(mtd_get_mac_ascii u-boot-env ethaddr) + [ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress + ;; +esac diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools index e36b4a91b..6a3768118 100644 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/etc/uci-defaults/30_uboot-envtools @@ -16,7 +16,8 @@ board=$(board_name) case "$board" in edgecore,eap111|\ -edgecore,eap112) +edgecore,eap112|\ +senao,jeap6500) ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x20000" "0x20000" ;; sonicfi,rap630w-211g) diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/nand.sh b/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/nand.sh new file mode 100644 index 000000000..f16cedc30 --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/nand.sh @@ -0,0 +1,487 @@ +# Copyright (C) 2014 OpenWrt.org +# + +. /lib/functions.sh + +# 'kernel' partition or UBI volume on NAND contains the kernel +CI_KERNPART="${CI_KERNPART:-kernel}" + +# 'ubi' partition on NAND contains UBI +# There are also CI_KERN_UBIPART and CI_ROOT_UBIPART if kernel +# and rootfs are on separated UBIs. +CI_UBIPART="${CI_UBIPART:-ubi}" + +# 'rootfs' UBI volume on NAND contains the rootfs +CI_ROOTPART="${CI_ROOTPART:-rootfs}" + +# update uboot-env if upgrade suceeded +CI_FWSETENV= + +ubi_mknod() { + local dir="$1" + local dev="/dev/$(basename $dir)" + + [ -e "$dev" ] && return 0 + + local devid="$(cat $dir/dev)" + local major="${devid%%:*}" + local minor="${devid##*:}" + mknod "$dev" c $major $minor +} + +nand_find_volume() { + local ubidevdir ubivoldir + ubidevdir="/sys/class/ubi/" + [ ! -d "$ubidevdir" ] && return 1 + for ubivoldir in $ubidevdir/${1}_*; do + [ ! -d "$ubivoldir" ] && continue + if [ "$( cat $ubivoldir/name )" = "$2" ]; then + basename $ubivoldir + ubi_mknod "$ubivoldir" + return 0 + fi + done +} + +nand_find_ubi() { + local ubidevdir ubidev mtdnum cmtdnum + mtdnum="$( find_mtd_index $1 )" + [ ! "$mtdnum" ] && return 1 + for ubidevdir in /sys/class/ubi/ubi*; do + [ ! -e "$ubidevdir/mtd_num" ] && continue + cmtdnum="$( cat $ubidevdir/mtd_num )" + if [ "$mtdnum" = "$cmtdnum" ]; then + ubidev=$( basename $ubidevdir ) + ubi_mknod "$ubidevdir" + echo $ubidev + return 0 + fi + done +} + +nand_get_magic_long() { + (${3}cat "$1" | dd bs=4 "skip=${2:-0}" count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null +} + +get_magic_long_tar() { + (tar xO${3}f "$1" "$2" | dd bs=4 count=1 | hexdump -v -n 4 -e '1/1 "%02x"') 2> /dev/null +} + +identify() { + identify_magic_long $(nand_get_magic_long "$@") +} + +identify_tar() { + identify_magic_long $(get_magic_long_tar "$@") +} + +identify_if_gzip() { + if [ "$(identify "$1")" = gzip ]; then echo -n z; fi +} + +nand_restore_config() { + local ubidev=$( nand_find_ubi "${CI_ROOT_UBIPART:-$CI_UBIPART}" ) + local ubivol="$( nand_find_volume $ubidev rootfs_data )" + if [ ! "$ubivol" ]; then + ubivol="$( nand_find_volume $ubidev "$CI_ROOTPART" )" + if [ ! "$ubivol" ]; then + echo "cannot find ubifs data volume" + return 1 + fi + fi + mkdir /tmp/new_root + if ! mount -t ubifs /dev/$ubivol /tmp/new_root; then + echo "cannot mount ubifs volume $ubivol" + rmdir /tmp/new_root + return 1 + fi + if mv "$1" "/tmp/new_root/$BACKUP_FILE"; then + if umount /tmp/new_root; then + echo "configuration saved" + rmdir /tmp/new_root + return 0 + fi + else + umount /tmp/new_root + fi + echo "could not save configuration to ubifs volume $ubivol" + rmdir /tmp/new_root + return 1 +} + +nand_remove_ubiblock() { + local ubivol="$1" + + local ubiblk="ubiblock${ubivol:3}" + if [ -e "/dev/$ubiblk" ]; then + umount "/dev/$ubiblk" && echo "unmounted /dev/$ubiblk" || : + if ! ubiblock -r "/dev/$ubivol"; then + echo "cannot remove $ubiblk" + return 1 + fi + fi +} + +nand_attach_ubi() { + local ubipart="$1" + local has_env="${2:-0}" + + local mtdnum="$( find_mtd_index "$ubipart" )" + if [ ! "$mtdnum" ]; then + >&2 echo "cannot find ubi mtd partition $ubipart" + return 1 + fi + + local ubidev="$( nand_find_ubi "$ubipart" )" + if [ ! "$ubidev" ]; then + >&2 ubiattach -m "$mtdnum" + ubidev="$( nand_find_ubi "$ubipart" )" + + if [ ! "$ubidev" ]; then + >&2 ubiformat /dev/mtd$mtdnum -y + >&2 ubiattach -m "$mtdnum" + ubidev="$( nand_find_ubi "$ubipart" )" + + if [ ! "$ubidev" ]; then + >&2 echo "cannot attach ubi mtd partition $ubipart" + return 1 + fi + + if [ "$has_env" -gt 0 ]; then + >&2 ubimkvol /dev/$ubidev -n 0 -N ubootenv -s 1MiB + >&2 ubimkvol /dev/$ubidev -n 1 -N ubootenv2 -s 1MiB + fi + fi + fi + + echo "$ubidev" + return 0 +} + +nand_detach_ubi() { + local ubipart="$1" + + local mtdnum="$( find_mtd_index "$ubipart" )" + if [ ! "$mtdnum" ]; then + echo "cannot find ubi mtd partition $ubipart" + return 1 + fi + + local ubidev="$( nand_find_ubi "$ubipart" )" + if [ "$ubidev" ]; then + for ubivol in $(find /dev -name "${ubidev}_*" -maxdepth 1 | sort); do + ubivol="${ubivol:5}" + nand_remove_ubiblock "$ubivol" || : + umount "/dev/$ubivol" && echo "unmounted /dev/$ubivol" || : + done + if ! ubidetach -m "$mtdnum"; then + echo "cannot detach ubi mtd partition $ubipart" + return 1 + fi + fi +} + +nand_upgrade_prepare_ubi() { + local rootfs_length="$1" + local rootfs_type="$2" + local rootfs_data_max="$(fw_printenv -n rootfs_data_max 2> /dev/null)" + [ -n "$rootfs_data_max" ] && rootfs_data_max=$((rootfs_data_max)) + + local kernel_length="$3" + local has_env="${4:-0}" + local kern_ubidev + local root_ubidev + + [ -n "$rootfs_length" -o -n "$kernel_length" ] || return 1 + + if [ -n "$CI_KERN_UBIPART" -a -n "$CI_ROOT_UBIPART" ]; then + kern_ubidev="$( nand_attach_ubi "$CI_KERN_UBIPART" "$has_env" )" + [ -n "$kern_ubidev" ] || return 1 + root_ubidev="$( nand_attach_ubi "$CI_ROOT_UBIPART" )" + [ -n "$root_ubidev" ] || return 1 + else + kern_ubidev="$( nand_attach_ubi "$CI_UBIPART" "$has_env" )" + [ -n "$kern_ubidev" ] || return 1 + root_ubidev="$kern_ubidev" + fi + + local kern_ubivol="$( nand_find_volume $kern_ubidev "$CI_KERNPART" )" + local root_ubivol="$( nand_find_volume $root_ubidev "$CI_ROOTPART" )" + local data_ubivol="$( nand_find_volume $root_ubidev rootfs_data )" + [ "$root_ubivol" = "$kern_ubivol" ] && root_ubivol= + + # remove ubiblocks + [ "$kern_ubivol" ] && { nand_remove_ubiblock $kern_ubivol || return 1; } + [ "$root_ubivol" ] && { nand_remove_ubiblock $root_ubivol || return 1; } + [ "$data_ubivol" ] && { nand_remove_ubiblock $data_ubivol || return 1; } + + # kill volumes + [ "$kern_ubivol" ] && ubirmvol /dev/$kern_ubidev -N "$CI_KERNPART" || : + [ "$root_ubivol" ] && ubirmvol /dev/$root_ubidev -N "$CI_ROOTPART" || : + [ "$data_ubivol" ] && ubirmvol /dev/$root_ubidev -N rootfs_data || : + + # create kernel vol + if [ -n "$kernel_length" ]; then + if ! ubimkvol /dev/$kern_ubidev -N "$CI_KERNPART" -s $kernel_length; then + echo "cannot create kernel volume" + return 1; + fi + fi + + # create rootfs vol + if [ -n "$rootfs_length" ]; then + local rootfs_size_param + if [ "$rootfs_type" = "ubifs" ]; then + rootfs_size_param="-m" + else + rootfs_size_param="-s $rootfs_length" + fi + if ! ubimkvol /dev/$root_ubidev -N "$CI_ROOTPART" $rootfs_size_param; then + echo "cannot create rootfs volume" + return 1; + fi + fi + + # create rootfs_data vol for non-ubifs rootfs + if [ "$rootfs_type" != "ubifs" ]; then + local rootfs_data_size_param="-m" + if [ -n "$rootfs_data_max" ]; then + rootfs_data_size_param="-s $rootfs_data_max" + fi + if ! ubimkvol /dev/$root_ubidev -N rootfs_data $rootfs_data_size_param; then + if ! ubimkvol /dev/$root_ubidev -N rootfs_data -m; then + echo "cannot initialize rootfs_data volume" + return 1 + fi + fi + fi + + return 0 +} + +# Write the UBI image to MTD ubi partition +nand_upgrade_ubinized() { + local ubi_file="$1" + local gz="$2" + + local ubi_length=$( (${gz}cat "$ubi_file" | wc -c) 2> /dev/null) + + nand_detach_ubi "$CI_UBIPART" || return 1 + + local mtdnum="$( find_mtd_index "$CI_UBIPART" )" + ${gz}cat "$ubi_file" | ubiformat "/dev/mtd$mtdnum" -S "$ubi_length" -y -f - && ubiattach -m "$mtdnum" +} + +# Write the UBIFS image to UBI rootfs volume +nand_upgrade_ubifs() { + local ubifs_file="$1" + local gz="$2" + + local ubifs_length=$( (${gz}cat "$ubifs_file" | wc -c) 2> /dev/null) + + nand_upgrade_prepare_ubi "$ubifs_length" "ubifs" "" "" || return 1 + + local ubidev="$( nand_find_ubi "$CI_UBIPART" )" + local root_ubivol="$(nand_find_volume $ubidev "$CI_ROOTPART")" + ${gz}cat "$ubifs_file" | ubiupdatevol /dev/$root_ubivol -s "$ubifs_length" - +} + +# Write the FIT image to UBI kernel volume +nand_upgrade_fit() { + local fit_file="$1" + local gz="$2" + + local fit_length=$( (${gz}cat "$fit_file" | wc -c) 2> /dev/null) + + nand_upgrade_prepare_ubi "" "" "$fit_length" "1" || return 1 + + local fit_ubidev="$(nand_find_ubi "$CI_UBIPART")" + local fit_ubivol="$(nand_find_volume $fit_ubidev "$CI_KERNPART")" + ${gz}cat "$fit_file" | ubiupdatevol /dev/$fit_ubivol -s "$fit_length" - +} + +# Write images in the TAR file to MTD partitions and/or UBI volumes as required +nand_upgrade_tar() { + local tar_file="$1" + local gz="$2" + local jffs2_markers="${CI_JFFS2_CLEAN_MARKERS:-0}" + + # WARNING: This fails if tar contains more than one 'sysupgrade-*' directory. + local board_dir="$(tar t${gz}f "$tar_file" | grep -m 1 '^sysupgrade-.*/$')" + board_dir="${board_dir%/}" + + local kernel_mtd kernel_length + if [ "$CI_KERNPART" != "none" ]; then + kernel_mtd="$(find_mtd_index "$CI_KERNPART")" + kernel_length=$( (tar xO${gz}f "$tar_file" "$board_dir/kernel" | wc -c) 2> /dev/null) + [ "$kernel_length" = 0 ] && kernel_length= + fi + local rootfs_length=$( (tar xO${gz}f "$tar_file" "$board_dir/root" | wc -c) 2> /dev/null) + [ "$rootfs_length" = 0 ] && rootfs_length= + local rootfs_type + [ "$rootfs_length" ] && rootfs_type="$(identify_tar "$tar_file" "$board_dir/root" "$gz")" + + local ubi_kernel_length + if [ "$kernel_length" ]; then + if [ "$kernel_mtd" ]; then + # On some devices, the raw kernel and ubi partitions overlap. + # These devices brick if the kernel partition is erased. + # Hence only invalidate kernel for now. + dd if=/dev/zero bs=4096 count=1 2> /dev/null | \ + mtd write - "$CI_KERNPART" + else + ubi_kernel_length="$kernel_length" + fi + fi + + local has_env=0 + nand_upgrade_prepare_ubi "$rootfs_length" "$rootfs_type" "$ubi_kernel_length" "$has_env" || return 1 + + if [ "$rootfs_length" ]; then + local ubidev="$( nand_find_ubi "${CI_ROOT_UBIPART:-$CI_UBIPART}" )" + local root_ubivol="$( nand_find_volume $ubidev "$CI_ROOTPART" )" + tar xO${gz}f "$tar_file" "$board_dir/root" | \ + ubiupdatevol /dev/$root_ubivol -s "$rootfs_length" - + fi + if [ "$kernel_length" ]; then + if [ "$kernel_mtd" ]; then + if [ "$jffs2_markers" = 1 ]; then + flash_erase -j "/dev/mtd${kernel_mtd}" 0 0 + tar xO${gz}f "$tar_file" "$board_dir/kernel" | \ + nandwrite "/dev/mtd${kernel_mtd}" - + else + tar xO${gz}f "$tar_file" "$board_dir/kernel" | \ + mtd write - "$CI_KERNPART" + fi + else + local ubidev="$( nand_find_ubi "${CI_KERN_UBIPART:-$CI_UBIPART}" )" + local kern_ubivol="$( nand_find_volume $ubidev "$CI_KERNPART" )" + tar xO${gz}f "$tar_file" "$board_dir/kernel" | \ + ubiupdatevol /dev/$kern_ubivol -s "$kernel_length" - + fi + fi + + return 0 +} + +nand_verify_if_gzip_file() { + local file="$1" + local gz="$2" + + if [ "$gz" = z ]; then + echo "verifying compressed sysupgrade file integrity" + if ! gzip -t "$file"; then + echo "corrupted compressed sysupgrade file" + return 1 + fi + fi +} + +nand_verify_tar_file() { + local file="$1" + local gz="$2" + + echo "verifying sysupgrade tar file integrity" + if ! tar xO${gz}f "$file" > /dev/null; then + echo "corrupted sysupgrade tar file" + return 1 + fi +} + +nand_do_flash_file() { + local file="$1" + + local gz="$(identify_if_gzip "$file")" + local file_type="$(identify "$file" "" "$gz")" + + [ ! "$(find_mtd_index "$CI_UBIPART")" ] && CI_UBIPART=rootfs + + case "$file_type" in + "fit") + nand_verify_if_gzip_file "$file" "$gz" || return 1 + nand_upgrade_fit "$file" "$gz" + ;; + "ubi") + nand_verify_if_gzip_file "$file" "$gz" || return 1 + nand_upgrade_ubinized "$file" "$gz" + ;; + "ubifs") + nand_verify_if_gzip_file "$file" "$gz" || return 1 + nand_upgrade_ubifs "$file" "$gz" + ;; + *) + nand_verify_tar_file "$file" "$gz" || return 1 + nand_upgrade_tar "$file" "$gz" + ;; + esac +} + +nand_do_restore_config() { + local conf_tar="/tmp/sysupgrade.tgz" + [ ! -f "$conf_tar" ] || nand_restore_config "$conf_tar" +} + +# Recognize type of passed file and start the upgrade process +nand_do_upgrade() { + local file="$1" + + sync + nand_do_flash_file "$file" && nand_do_upgrade_success + nand_do_upgrade_failed +} + +nand_do_upgrade_success() { + platform_post_upgrade_success + if nand_do_restore_config && sync; then + [ -n "$CI_FWSETENV" ] && fw_setenv $CI_FWSETENV + echo "sysupgrade successful" + umount -a + reboot -f + fi + nand_do_upgrade_failed +} + +nand_do_upgrade_failed() { + sync + echo "sysupgrade failed" + # Should we reboot or bring up some failsafe mode instead? + umount -a + reboot -f +} + +# Check if passed file is a valid one for NAND sysupgrade. +# Currently it accepts 4 types of files: +# 1) UBI: a ubinized image containing required UBI volumes. +# 2) UBIFS: a UBIFS rootfs volume image. +# 3) FIT: a FIT image containing kernel and rootfs. +# 4) TAR: an archive that includes directory "sysupgrade-${BOARD_NAME}" containing +# a non-empty "CONTROL" file and required partition and/or volume images. +# +# You usually want to call this function in platform_check_image. +# +# $(1): board name, used in case of passing TAR file +# $(2): file to be checked +nand_do_platform_check() { + local board_name="$1" + local file="$2" + + local gz="$(identify_if_gzip "$file")" + local file_type="$(identify "$file" "" "$gz")" + local control_length=$( (tar xO${gz}f "$file" "sysupgrade-${board_name//,/_}/CONTROL" | wc -c) 2> /dev/null) + + if [ "$control_length" = 0 ]; then + control_length=$( (tar xO${gz}f "$file" "sysupgrade-${board_name//_/,}/CONTROL" | wc -c) 2> /dev/null) + fi + + if [ "$control_length" != 0 ]; then + nand_verify_tar_file "$file" "$gz" || return 1 + else + nand_verify_if_gzip_file "$file" "$gz" || return 1 + if [ "$file_type" != "fit" -a "$file_type" != "ubi" -a "$file_type" != "ubifs" ]; then + echo "invalid sysupgrade file" + return 1 + fi + fi + + return 0 +} diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh b/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh index 0329890ec..d1d4d463e 100644 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh +++ b/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh @@ -1,4 +1,17 @@ REQUIRE_IMAGE_METADATA=1 + +senao_swap_active_fw() { + echo "Doing swap active_fw" > /dev/console + tmp_active_fw=$(fw_printenv -n active_fw) + if [ $tmp_active_fw == "0" ]; then + fw_setenv active_fw 1 + fw_setenv mtdparts nmbm0:1024k\(bl2\),512k\(u-boot-env\),2048k\(factory\),2048k\(fip\),112640k\(ubi_1\),112640k\(ubi\),384k\(cert\),640k\(userconfig\),384k\(crashdump\) + else + fw_setenv active_fw 0 + fw_setenv mtdparts nmbm0:1024k\(bl2\),512k\(u-boot-env\),2048k\(factory\),2048k\(fip\),112640k\(ubi\),112640k\(ubi_1\),384k\(cert\),640k\(userconfig\),384k\(crashdump\) + fi +} + platform_do_upgrade() { local board=$(board_name) @@ -33,6 +46,10 @@ platform_do_upgrade() { fi nand_do_upgrade "$1" ;; + senao,jeap6500) + CI_UBIPART="ubi_1" + nand_do_upgrade "$1" + ;; sonicfi,rap630w-211g) chmod +x /tmp/root/lib/upgrade/sonicfi/nand_sonicfi_rap630w_211g.sh /tmp/root/lib/upgrade/sonicfi/nand_sonicfi_rap630w_211g.sh "$1" @@ -48,7 +65,8 @@ platform_check_image() { case "$board" in edgecore,eap111|\ - edgecore,eap112) + edgecore,eap112|\ + senao,jeap6500) nand_do_platform_check "$board" "$1" return $? ;; @@ -63,3 +81,13 @@ platform_check_image() { return 0 } + +platform_post_upgrade_success() { + local board=$(board_name) + + case "$board" in + senao,jeap6500) + senao_swap_active_fw + ;; + esac +} diff --git a/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh.orig b/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh.orig deleted file mode 100644 index bd38b22e5..000000000 --- a/feeds/mediatek-sdk/mediatek/mt7981/base-files/lib/upgrade/platform.sh.orig +++ /dev/null @@ -1,51 +0,0 @@ -RAMFS_COPY_BIN='mkfs.f2fs blkid blockdev fw_printenv fw_setenv' -RAMFS_COPY_DATA="/etc/fw_env.config /var/lock/fw_printenv.lock" - -platform_do_upgrade() { - local board=$(board_name) - - case "$board" in - *snand*) - ubi_do_upgrade "$1" - ;; - *emmc*) - mtk_mmc_do_upgrade "$1" - ;; - *) - default_do_upgrade "$1" - ;; - esac -} - -PART_NAME=firmware - -platform_check_image() { - local board=$(board_name) - local magic="$(get_magic_long "$1")" - - [ "$#" -gt 1 ] && return 1 - - case "$board" in - *snand* |\ - *emmc*) - # tar magic `ustar` - magic="$(dd if="$1" bs=1 skip=257 count=5 2>/dev/null)" - - [ "$magic" != "ustar" ] && { - echo "Invalid image type." - return 1 - } - - return 0 - ;; - *) - [ "$magic" != "d00dfeed" ] && { - echo "Invalid image type." - return 1 - } - return 0 - ;; - esac - - return 0 -} diff --git a/feeds/mediatek-sdk/mediatek/mt7981/config-5.4 b/feeds/mediatek-sdk/mediatek/mt7981/config-5.4 index fe86b65ef..aa0f6ee88 100644 --- a/feeds/mediatek-sdk/mediatek/mt7981/config-5.4 +++ b/feeds/mediatek-sdk/mediatek/mt7981/config-5.4 @@ -523,3 +523,8 @@ CONFIG_NF_FLOW_TABLE=m CONFIG_NF_FLOW_TABLE_NETLINK=m CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_STACK_ALL is not set +CONFIG_AIROHA_AN8801_PHY=y +CONFIG_SECURITYFS=y +CONFIG_TCG_TIS_CORE=y +CONFIG_TCG_TIS_SPI=y +CONFIG_TCG_TPM=y diff --git a/feeds/mediatek-sdk/mediatek/patches-5.4/999-4001-add_reset_in_tpm_driver.patch b/feeds/mediatek-sdk/mediatek/patches-5.4/999-4001-add_reset_in_tpm_driver.patch new file mode 100644 index 000000000..a669675f4 --- /dev/null +++ b/feeds/mediatek-sdk/mediatek/patches-5.4/999-4001-add_reset_in_tpm_driver.patch @@ -0,0 +1,63 @@ +Index: linux-5.4.246/drivers/char/tpm/tpm_tis_spi.c +=================================================================== +--- linux-5.4.246.orig/drivers/char/tpm/tpm_tis_spi.c ++++ linux-5.4.246/drivers/char/tpm/tpm_tis_spi.c +@@ -199,11 +199,35 @@ static const struct tpm_tis_phy_ops tpm_ + .do_calibration = tpm_tis_spi_do_calibration, + }; + ++int reset_tpm(struct spi_device *dev) ++{ ++ int error; ++ struct gpio_desc *reset_gpio; ++ reset_gpio = gpiod_get_optional(&dev->dev, "reset", GPIOD_OUT_LOW); ++ error = PTR_ERR_OR_ZERO(reset_gpio); ++ ++ printk("Doing tpm reset!!"); ++ ++ if(error) { ++ printk("get tpm reset gpio fail!!!!!\n"); ++ return error; ++ } ++ ++ if(reset_gpio) ++ gpiod_set_consumer_name(reset_gpio, "TPM reset"); ++ ++ return 0; ++} ++ + static int tpm_tis_spi_probe(struct spi_device *dev) + { + struct tpm_tis_spi_phy *phy; + int irq; + ++ if(reset_tpm(dev)){ ++ printk("!!!tpm reset fail!!\n"); ++ } ++ + phy = devm_kzalloc(&dev->dev, sizeof(struct tpm_tis_spi_phy), + GFP_KERNEL); + if (!phy) +Index: linux-5.4.246/drivers/spi/spi.c +=================================================================== +--- linux-5.4.246.orig/drivers/spi/spi.c ++++ linux-5.4.246/drivers/spi/spi.c +@@ -1124,8 +1124,17 @@ int spi_do_calibration(struct spi_contro + bool hit; + + /* Make sure we can start calibration */ ++#if 1 ++ if(!ctlr->cal_target || !ctlr->cal_rule) { ++ return 0; ++ } else if(!ctlr->append_caldata) { ++ pr_err("%s: calibration is enabled but no controller data.\n", __func__); ++ return -EINVAL; ++ } ++#else + if(!ctlr->cal_target || !ctlr->cal_rule || !ctlr->append_caldata) + return -EINVAL; ++#endif + datalen = ctlr->cal_rule->datalen; + addrlen = ctlr->cal_rule->addrlen; + + diff --git a/patches/0078-secure-boot-sha256.patch b/patches/0078-secure-boot-sha256.patch new file mode 100644 index 000000000..bc5336c0b --- /dev/null +++ b/patches/0078-secure-boot-sha256.patch @@ -0,0 +1,115 @@ +From 95dfd6ea3a2c06a81a4513fe943d640d4d990194 Mon Sep 17 00:00:00 2001 +From: "steven.lin" +Date: Mon, 11 Nov 2024 09:28:18 +0800 +Subject: [PATCH] secure boot support sha256 + +--- + scripts/mkits-secure_boot.sh | 37 ++++++++++++++++++++++++++++++++---- + 1 file changed, 33 insertions(+), 4 deletions(-) + +diff --git a/scripts/mkits-secure_boot.sh b/scripts/mkits-secure_boot.sh +index 1c7f292618..0a09792971 100755 +--- a/scripts/mkits-secure_boot.sh ++++ b/scripts/mkits-secure_boot.sh +@@ -17,7 +17,7 @@ + usage() { + printf "Usage: %s -A arch -C comp -a addr -e entry" "$(basename "$0")" + printf " -v version -k kernel [-D name -n address -d dtb] -o its_file" +- printf " [-s script] [-S key_name_hint] [-r ar_ver] [-R rootfs]" ++ printf " [-s script] [-S key_name_hint] [-b key_alg] [-r ar_ver] [-R rootfs] [-m rfsk]" + + printf "\n\t-A ==> set architecture to 'arch'" + printf "\n\t-C ==> set compression type 'comp'" +@@ -32,18 +32,21 @@ usage() { + printf "\n\t-o ==> create output file 'its_file'" + printf "\n\t-s ==> include u-boot script 'script'" + printf "\n\t-S ==> add signature at configurations and assign its key_name_hint by 'key_name_hint'" ++ printf "\n\t-b ==> set key algorithm" + printf "\n\t-r ==> set anti-rollback version to 'fw_ar_ver' (dec)" +- printf "\n\t-R ==> specify rootfs file for embedding hash\n" ++ printf "\n\t-R ==> specify rootfs file for embedding hash" ++ printf "\n\t-m ==> include encrypted rootfs key'\n" + exit 1 + } + + FDTNUM=1 + +-while getopts ":A:a:c:C:D:d:e:k:n:o:v:s:S:r:R:" OPTION ++while getopts ":A:a:b:c:C:D:d:e:k:n:o:v:s:S:r:R:m:" OPTION + do + case $OPTION in + A ) ARCH=$OPTARG;; + a ) LOAD_ADDR=$OPTARG;; ++ b ) KEY_ALG=$OPTARG;; + c ) CONFIG=$OPTARG;; + C ) COMPRESS=$OPTARG;; + D ) DEVICE=$OPTARG;; +@@ -57,6 +60,7 @@ do + S ) KEY_NAME_HINT=$OPTARG;; + r ) AR_VER=$OPTARG;; + R ) ROOTFS_FILE=$OPTARG;; ++ m ) ROOTFS_KEY=$OPTARG;; + * ) echo "Invalid option passed to '$0' (options:$*)" + usage;; + esac +@@ -91,6 +95,19 @@ if [ -n "${DTB}" ]; then + FDT_PROP="fdt = \"fdt-$FDTNUM\";" + fi + ++# Conditionally create encrypted rootfs-key information ++if [ -n "${ROOTFS_KEY}" ]; then ++ RFSK_NODE=" ++ rfsk = <$(cat ${ROOTFS_KEY} | od -An -t x1 -w256 | sed 's/ //g; s/.\{8\}/0x& /g; s/.$//g')>;"; ++ ++ FIT_SECRET_NODE=" ++ fit-secrets { ++ ${CONFIG} { ++ }; ++ }; ++" ++fi ++ + # Conditionally create rootfs hash information + if [ -f "${ROOTFS_FILE}" ]; then + ROOTFS_SIZE=$(stat -c %s ${ROOTFS_FILE}) +@@ -149,11 +166,20 @@ fi + + # Conditionally create signature information + if [ -n "${KEY_NAME_HINT}" ]; then ++ if [[ "${KEY_NAME_HINT}" == "offline,"* ]]; then ++ KEY_NAME_HINT=$(echo -n "${KEY_NAME_HINT}" | sed "s/^.*[,]//g") ++ SIGN_OFFLINE=" ++ sign-offline = <1>;" ++ fi ++ if [ -z "${KEY_ALG}" ]; then ++ KEY_ALG="sha256,rsa2048" ++ fi + SIGNATURE="\ + signature { +- algo = \"sha1,rsa2048\"; ++ algo = \"${KEY_ALG}\"; + key-name-hint = \"${KEY_NAME_HINT}\"; + ${SIGN_IMAGES} ++${SIGN_OFFLINE} + };\ + " + fi +@@ -200,12 +226,15 @@ ${ROOTFS} + ${CONFIG} { + description = \"OpenWrt\"; + ${FW_AR_VER} ++${RFSK_NODE} + ${LOADABLES} + kernel = \"kernel-1\"; + ${FDT_PROP} + ${SIGNATURE} + }; + }; ++ ++${FIT_SECRET_NODE} + };" + + # Write .its file to disk +-- +2.43.2 + diff --git a/profiles/senao_jeap6500.yml b/profiles/senao_jeap6500.yml new file mode 100644 index 000000000..0b8d75e2a --- /dev/null +++ b/profiles/senao_jeap6500.yml @@ -0,0 +1,13 @@ +--- +profile: senao_jeap6500 +target: mediatek +subtarget: mt7981 +description: Build image for the SENAO JEAP6500 +image: bin/targets/mediatek/mt7981/openwrt-mediatek-mt7981-senao_jeap6500-squashfs-sysupgrade.bin +feeds: + - name: mediatek + path: ../../feeds/mediatek-sdk +packages: + - mediatek +include: + - ucentral-ap