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ipq95xx: Update phy driver for EAP105 LAN port

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Fixes: WIFI-14171
Signed-off-by: Tanya Singh <tanya_singh@accton.com>
This commit is contained in:
Tanya Singh
2024-10-24 14:19:57 +08:00
committed by John Crispin
parent 08861e1db0
commit f15e10bfdb
4 changed files with 94 additions and 4 deletions
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86
feeds/ipq95xx/ipq53xx/base-files/etc/init.d/rtk_eth_fix Executable file
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@@ -0,0 +1,86 @@
#!/bin/sh /etc/rc.common
# Copyright (C) 2007 OpenWrt.org
START=94
USE_PROCD=1
. /lib/functions.sh
eap105_eth_fix() {
#ethernet reset
echo 481 > /sys/class/gpio/export
echo "out" > /sys/class/gpio/gpio481/direction
echo 0 > /sys/class/gpio/gpio481/value
echo 1 > /sys/class/gpio/gpio481/value
#eth1 Fix RE Fail
sleep 1
ssdk_sh debug phy set 0x2 0x1f 0x0A43
ssdk_sh debug phy set 0x2 0x19 0x0862
ssdk_sh debug phy set 0x2 0x1f 0x0000
ssdk_sh debug phy set 0x2 0x0 0x9200
#eth1 10/100M detect led flash setup
ssdk_sh debug phy set 0x2 0x1f 0x0d04
ssdk_sh debug phy set 0x2 0x10 0x6E51
#eth0 5G detect led flash setup
ssdk_sh debug phy set 0x1 0xd 0x1f
ssdk_sh debug phy set 0x1 0xe 0xd032
ssdk_sh debug phy set 0x1 0xd 0x401f
ssdk_sh debug phy set 0x1 0xe 0x1e7
ssdk_sh debug phy set 0x1 0xd 0x1f
ssdk_sh debug phy set 0x1 0xe 0xd040
ssdk_sh debug phy set 0x1 0xd 0x401f
ssdk_sh debug phy set 0x1 0xe 0x393f
#eth0 Fix USXGMII
ssdk_sh debug phy set 0x1 0x601E7588 0x05D8
ssdk_sh debug phy set 0x1 0x601E7589 0x2100
ssdk_sh debug phy set 0x1 0x601E7587 0x0003
count=0
while [ 1 ]
do
date
if [ $(($(echo $(echo $(ssdk_sh debug phy get 0x1 0x601E7587) | cut -d':' -f2) | cut -d' ' -f1) & 1)) -eq 0 ]; then
echo > /tmp/Pre-emphasis-PASS
break
fi
count=$(($count+1))
if [ $count -eq 10 ]; then
echo > /tmp/Pre-emphasis-FAIL
break
fi
sleep 1
done
ssdk_sh debug phy set 0x1 0x601E7588 0x05D7
ssdk_sh debug phy set 0x1 0x601E7589 0x2180
ssdk_sh debug phy set 0x1 0x601E7587 0x0003
count=0
while [ 1 ]
do
date
if [ $(($(echo $(echo $(ssdk_sh debug phy get 0x1 0x601E7587) | cut -d':' -f2) | cut -d' ' -f1) & 1)) -eq 0 ]; then
echo > /tmp/Amp-PASS
break
fi
count=$(($count+1))
if [ $count -eq 10 ]; then
echo > /tmp/Amp-FAIL
break
fi
sleep 1
done
}
start_service() {
case "$(board_name)" in
"edgecore,eap105")
eap105_eth_fix
;;
esac
}

2
feeds/ipq95xx/ipq53xx/files/arch/arm64/boot/dts/qcom/ipq5332-edgecore-eap105.dts
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@@ -434,7 +434,7 @@
memory-region = <&q6_region>;
qcom,wsi = <&wsi>;
#endif
qcom,board_id = <0x16>;
qcom,board_id = <0x12>;
status = "ok";
};

7
feeds/ipq95xx/ipq53xx/files/drivers/net/phy/rtk/phy_rtl8251b_patch.c
View File

@@ -2019,14 +2019,14 @@ int32 rtl8251b_phy_init(struct phy_device *phydev)
{
BOOL status = FAILURE;
UINT16 i = 0; /* SW_SDK: use UINT16 instead of UINT8, for MMD_REG array may over 255 entries */
UINT16 phydata = 0;
UINT16 phydata = 0, rev_num = 0, mod_num = 0;
const UINT16 patchver = 0x0014, patchaddr = 0x8023;
status = Rtl8251b_wait_for_bit(phydev, MMD_VEND2, 0xA420, 0x3, 1, 100);
if (status != SUCCESS) {
goto exit;
}
#if 0
#if 1
status = MmdPhyRead(phydev, MMD_PMAPMD, 0x03, &phydata);
if (status != SUCCESS)
goto exit;
@@ -2038,6 +2038,9 @@ int32 rtl8251b_phy_init(struct phy_device *phydev)
osal_printf("rtl8251b and go init flow...\n");
}
else{
if (phydata == 0xc868)
osal_printf("Realtek chip is RTL8251B-VB-CG\n");
else
osal_printf("Not rtl8251b and skip init flow...id = %x \n",phydata);
goto exit;
}

1
profiles/edgecore_eap105.yml
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@@ -9,6 +9,7 @@ feeds:
path: ../../feeds/ipq95xx
packages:
- ipq53xx
- qca-ssdk-shell
include:
- ucentral-ap
diffconfig: |