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Author SHA1 Message Date
Ian Chen
341b0f57e2 mediatek-sdk: Support HaLow Mesh on EAP112
enable MESH function in feeds/morse/utils/wpa_supplicant_s1g/Config.in

ticket: WIFI-14896

Signed-off-by: Ian Chen <ian77_chen@accton.com>
2025-07-24 15:51:30 +08:00
158 changed files with 641 additions and 13072 deletions

View File

@@ -1,14 +0,0 @@
--- a/hostapd/ctrl_iface.c 2025-09-24 14:15:25.135668867 +0800
+++ b/hostapd/ctrl_iface.c 2025-09-24 15:32:46.082317382 +0800
@@ -2657,6 +2657,11 @@ static int hostapd_ctrl_iface_chan_switc
break;
}
+ /* Initialize HT/VHT/HE parameters */
+ settings.freq_params.ht_enabled = iface->conf->ieee80211n;
+ settings.freq_params.vht_enabled = iface->conf->ieee80211ac;
+ settings.freq_params.he_enabled = iface->conf->ieee80211ax;
+
if (settings.freq_params.center_freq1)
dfs_range += hostapd_is_dfs_overlap(
iface, bandwidth, settings.freq_params.center_freq1);

View File

@@ -24,6 +24,8 @@ endef
# #
ALLWIFIBOARDS:= \ ALLWIFIBOARDS:= \
cig-wf186w \
cig-wf186h \
cig-wf660a \ cig-wf660a \
cig-wf194c \ cig-wf194c \
cig-wf194c4 \ cig-wf194c4 \
@@ -47,10 +49,6 @@ ALLWIFIBOARDS:= \
indio-um-310ax-v1 \ indio-um-310ax-v1 \
indio-um-510axp-v1 \ indio-um-510axp-v1 \
indio-um-510axm-v1 \ indio-um-510axm-v1 \
indio-um-325ax-v2 \
indio-um-335ax \
indio-um-525axp \
indio-um-525axm \
muxi-ap3220l \ muxi-ap3220l \
plasmacloud-pax1800 \ plasmacloud-pax1800 \
wallys-dr5018 \ wallys-dr5018 \
@@ -110,16 +108,6 @@ $(call Package/ath11k-wifi-default)
TITLE:=cig-wf196 bdf TITLE:=cig-wf196 bdf
endef endef
define Package/ath11k-wifi-cig-wf186w
$(call Package/ath11k-wifi-default)
TITLE:=cig-wf186w bdf
endef
define Package/ath11k-wifi-cig-wf186h
$(call Package/ath11k-wifi-default)
TITLE:=cig-wf186h bdf
endef
define Package/ath11k-wifi-gl-ax1800 define Package/ath11k-wifi-gl-ax1800
$(call Package/ath11k-wifi-default) $(call Package/ath11k-wifi-default)
TITLE:=gl-ax1800 bdf TITLE:=gl-ax1800 bdf
@@ -296,24 +284,6 @@ define Package/ath11k-wifi-cig-wf196/install
$(INSTALL_DATA) ./board-cig-wf196-us.bin.IPQ8074 $(1)/lib/firmware/ath11k/IPQ8074/hw2.0/board.bin.US $(INSTALL_DATA) ./board-cig-wf196-us.bin.IPQ8074 $(1)/lib/firmware/ath11k/IPQ8074/hw2.0/board.bin.US
endef endef
define Package/ath11k-wifi-cig-wf186w/install
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/qcn6122/hw1.0/
$(INSTALL_DATA) ./board-cig-wf186w-us.bin.IPQ5018 $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/board.bin.US
$(INSTALL_DATA) ./board-cig-wf186w-ca.bin.IPQ5018 $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/board.bin.CA
$(INSTALL_DATA) ./board-cig-wf186w-us.bin.QCN6122 $(1)/lib/firmware/ath11k/qcn6122/hw1.0/board.bin.US
$(INSTALL_DATA) ./board-cig-wf186w-ca.bin.QCN6122 $(1)/lib/firmware/ath11k/qcn6122/hw1.0/board.bin.CA
endef
define Package/ath11k-wifi-cig-wf186h/install
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/qcn6122/hw1.0/
$(INSTALL_DATA) ./board-cig-wf186h-us.bin.IPQ5018 $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/board.bin.US
$(INSTALL_DATA) ./board-cig-wf186h-ca.bin.IPQ5018 $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/board.bin.CA
$(INSTALL_DATA) ./board-cig-wf186h-us.bin.QCN6122 $(1)/lib/firmware/ath11k/qcn6122/hw1.0/board.bin.US
$(INSTALL_DATA) ./board-cig-wf186h-ca.bin.QCN6122 $(1)/lib/firmware/ath11k/qcn6122/hw1.0/board.bin.CA
endef
define Package/ath11k-wifi-optimcloud-d50/install define Package/ath11k-wifi-optimcloud-d50/install
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath11k/IPQ5018/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCN9074/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCN9074/hw1.0/
@@ -423,6 +393,8 @@ define Package/ath11k-wifi-cig-wf188n/install
$(INSTALL_DATA) ./board-cig-wf188n-us.bin.IPQ6018 $(1)/lib/firmware/ath11k/IPQ6018/hw1.0/board.bin.US $(INSTALL_DATA) ./board-cig-wf188n-us.bin.IPQ6018 $(1)/lib/firmware/ath11k/IPQ6018/hw1.0/board.bin.US
endef endef
$(eval $(call generate-ath11k-wifi-package,cig-wf186w,Cigtech WF186w))
$(eval $(call generate-ath11k-wifi-package,cig-wf186h,Cigtech WF186h))
$(eval $(call generate-ath11k-wifi-package,cig-wf660a,Cigtech WF660a)) $(eval $(call generate-ath11k-wifi-package,cig-wf660a,Cigtech WF660a))
$(eval $(call generate-ath11k-wifi-package,cig-wf194c,Cigtech WF194c)) $(eval $(call generate-ath11k-wifi-package,cig-wf194c,Cigtech WF194c))
$(eval $(call generate-ath11k-wifi-package,cig-wf194c4,Cigtech WF194c4)) $(eval $(call generate-ath11k-wifi-package,cig-wf194c4,Cigtech WF194c4))
@@ -445,10 +417,6 @@ $(eval $(call generate-ath11k-wifi-package,liteon-wpx8324,Liteon WPX8324))
$(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1)) $(eval $(call generate-ath11k-wifi-package,indio-um-310ax-v1,Indio UM-310AX V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1)) $(eval $(call generate-ath11k-wifi-package,indio-um-510axp-v1,Indio UM-510AXP V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1)) $(eval $(call generate-ath11k-wifi-package,indio-um-510axm-v1,Indio UM-510AXM V1))
$(eval $(call generate-ath11k-wifi-package,indio-um-325ax-v2,Indio UM-325AX V2))
$(eval $(call generate-ath11k-wifi-package,indio-um-335ax,Indio UM-335AX))
$(eval $(call generate-ath11k-wifi-package,indio-um-525axp,Indio UM-525AXP))
$(eval $(call generate-ath11k-wifi-package,indio-um-525axm,Indio UM-525AXM))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G)) $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630c-311g,Sonicfi RAP630C 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G)) $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-311g,Sonicfi RAP630W 311G))
$(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-312g,Sonicfi RAP630W 312G)) $(eval $(call generate-ath11k-wifi-package,sonicfi-rap630w-312g,Sonicfi RAP630W 312G))
@@ -472,8 +440,6 @@ $(eval $(call BuildPackage,ath11k-wifi-qcom-ipq8074))
$(eval $(call BuildPackage,ath11k-wifi-qcom-ipq6018)) $(eval $(call BuildPackage,ath11k-wifi-qcom-ipq6018))
$(eval $(call BuildPackage,ath11k-wifi-qcom-qcn9000)) $(eval $(call BuildPackage,ath11k-wifi-qcom-qcn9000))
$(eval $(call BuildPackage,ath11k-wifi-cig-wf196)) $(eval $(call BuildPackage,ath11k-wifi-cig-wf196))
$(eval $(call BuildPackage,ath11k-wifi-cig-wf186w))
$(eval $(call BuildPackage,ath11k-wifi-cig-wf186h))
$(eval $(call BuildPackage,ath11k-wifi-motorola-q14)) $(eval $(call BuildPackage,ath11k-wifi-motorola-q14))
$(eval $(call BuildPackage,ath11k-wifi-optimcloud-d50)) $(eval $(call BuildPackage,ath11k-wifi-optimcloud-d50))
$(eval $(call BuildPackage,ath11k-wifi-optimcloud-d60)) $(eval $(call BuildPackage,ath11k-wifi-optimcloud-d60))

View File

@@ -4,19 +4,19 @@ let fs = require("fs");
let ubus = require('ubus').connect(); let ubus = require('ubus').connect();
let gps_info = ubus.call('gps', 'info'); let gps_info = ubus.call('gps', 'info');
let latitude = gps_info.latitude || 0; let latitude = gps_info.latitude ?? 0;
let longitude = gps_info.longitude || 0; let longitude = gps_info.longitude ?? 0;
// afc-location.json file content // afc-location.json file content
let afc_location = {}; let afc_location = {};
afc_location.location_type = "ellipse"; afc_location.location_type = "ellipse";
afc_location.location = longitude + ":" + latitude ; afc_location.location = longitude + ":" + latitude ;
afc_location.height = gps_info.elevation || 0; afc_location.height = gps_info.elevation ?? 0;
afc_location.height_type = "AMSL"; afc_location.height_type = "AMSL";
afc_location.major_axis = int(gps_info.major_axis) || 1; afc_location.major_axis = gps_info.major_axis ?? 0;
afc_location.minor_axis = int(gps_info.minor_axis) || 1; afc_location.minor_axis = gps_info.minor_axis ?? 0;
afc_location.orientation = gps_info.major_orientation || 0; afc_location.orientation = gps_info.major_orientation ?? 0;
afc_location.vertical_tolerance = int(gps_info.vdop) || 1; afc_location.vertical_tolerance = gps_info.vdop ?? 0;
let afc_location_json = fs.open("/etc/ucentral/afc-location.json", "w"); let afc_location_json = fs.open("/etc/ucentral/afc-location.json", "w");
afc_location_json.write(afc_location); afc_location_json.write(afc_location);

View File

@@ -1,8 +1,7 @@
let libubus = require("ubus"); let libubus = require("ubus");
import { open, readfile, writefile } from "fs"; import { open, readfile } from "fs";
import { wdev_create, wdev_remove, is_equal, vlist_new, phy_is_fullmac, phy_open } from "common"; import { wdev_create, wdev_remove, is_equal, vlist_new, phy_is_fullmac, phy_open } from "common";
let uci = require('uci').cursor();
let ubus = libubus.connect(null, 60); let ubus = libubus.connect(null, 60);
hostapd.data.config = {}; hostapd.data.config = {};
@@ -894,24 +893,10 @@ return {
hostapd.ubus.disconnect(); hostapd.ubus.disconnect();
}, },
afc_request: function(iface, data) { afc_request: function(iface, data) {
let wireless_config = uci.get_all('wireless'); let ret = ubus.call("afc", "request", { data });
for (let l, afc_server in wireless_config) { if (type(ret) != "object")
if (afc_server['.type'] == 'afc-server' && afc_server.url && data) {
hostapd.printf(`Sending AFC request: ${data}`);
writefile("/tmp/afc-request.json", data);
if (afc_server.access_token)
system(`curl -s -X POST ${afc_server.url} -H \'accept: \*\/\*\' -H \'Authorization: Bearer ${afc_server.access_token}\' -H \'Content-Type: application/json\' -d \'${data}\' --output /tmp/afc-response.json`);
else if (afc_server.cert)
system(`curl -s -X POST ${afc_server.url} -H \'accept: \*\/\*\' --cert \'${afc_server.cert}\' -H \'Content-Type: application/json\' -d \'${data}\' --output /tmp/afc-response.json`);
let afc_response = (readfile("/tmp/afc-response.json"));
if (afc_response)
return afc_response;
else
return; return;
} return ret.data;
}
}, },
bss_add: function(name, obj) { bss_add: function(name, obj) {
bss_event("add", name); bss_event("add", name);

View File

@@ -16,14 +16,6 @@ edgecore,eap104)
ucidef_set_led_netdev "wan" "wan" "yellow:uplink" "eth0" ucidef_set_led_netdev "wan" "wan" "yellow:uplink" "eth0"
ucidef_set_led_default "power" "POWER" "green:power" "on" ucidef_set_led_default "power" "POWER" "green:power" "on"
;; ;;
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "led_2g" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "led_5g" "phy1tpt"
ucidef_set_led_default "power" "POWER" "led_sys" "on"
;;
cig,wf186h|\ cig,wf186h|\
cig,wf186w) cig,wf186w)
ucidef_set_led_default "power" "POWER" "green:status" "on" ucidef_set_led_default "power" "POWER" "green:status" "on"

View File

@@ -48,15 +48,6 @@ qcom_setup_interfaces()
ucidef_add_switch "switch1" \ ucidef_add_switch "switch1" \
"6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan" "6u@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;; ;;
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp)
ucidef_set_interface_wan "eth1"
ucidef_set_interface_lan "eth0"
ucidef_add_switch "switch1" \
"6@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
emplus,wap385c|\ emplus,wap385c|\
hfcl,ion4x_w|\ hfcl,ion4x_w|\
hfcl,ion4xi_w) hfcl,ion4xi_w)

View File

@@ -142,10 +142,6 @@ ath11k/IPQ5018/hw1.0/caldata.bin)
emplus,wap385c|\ emplus,wap385c|\
hfcl,ion4x_w|\ hfcl,ion4x_w|\
hfcl,ion4xi_w|\ hfcl,ion4xi_w|\
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axm|\
indio,um-525axp|\
optimcloud,d60|\ optimcloud,d60|\
optimcloud,d60-5g|\ optimcloud,d60-5g|\
optimcloud,d50|\ optimcloud,d50|\
@@ -187,9 +183,6 @@ ath11k/qcn6122/hw1.0/caldata_1.bin)
;; ;;
ath11k/qcn6122/hw1.0/caldata_2.bin) ath11k/qcn6122/hw1.0/caldata_2.bin)
case "$board" in case "$board" in
indio,um-325ax-v2|\
indio,um-525axm|\
indio,um-525axp|\
wallys,dr5018|\ wallys,dr5018|\
edgecore,eap104|\ edgecore,eap104|\
edgecore,oap101-6e|\ edgecore,oap101-6e|\
@@ -208,7 +201,6 @@ ath11k/qcn6122/hw1.0/caldata_2.bin)
;; ;;
ath11k/QCN9074/hw1.0/caldata_1.bin) ath11k/QCN9074/hw1.0/caldata_1.bin)
case "$board" in case "$board" in
indio,um-335ax|\
optimcloud,d60|\ optimcloud,d60|\
optimcloud,d60-5g|\ optimcloud,d60-5g|\
optimcloud,d50|\ optimcloud,d50|\
@@ -242,9 +234,6 @@ ath11k-macs)
edgecore,oap101|\ edgecore,oap101|\
edgecore,oap101-6e|\ edgecore,oap101-6e|\
edgecore,oap101e-6e|\ edgecore,oap101e-6e|\
indio,um-325ax-v2|\
indio,um-525axp|\
indio,um-525axm|\
optimcloud,d60|\ optimcloud,d60|\
optimcloud,d60-5g|\ optimcloud,d60-5g|\
optimcloud,d50|\ optimcloud,d50|\
@@ -262,32 +251,6 @@ ath11k-macs)
;; ;;
esac esac
;; ;;
ath11k/IPQ5018/hw1.0/board.bin)
case "$board" in
cig,wf186w|\
cig,wf186h)
country=`cat /etc/ucentral/country`
if [ "$country" == "CA" ]; then
ln -s /lib/firmware/ath11k/IPQ5018/hw1.0/board.bin.CA /lib/firmware/ath11k/IPQ5018/hw1.0/board.bin
else
ln -s /lib/firmware/ath11k/IPQ5018/hw1.0/board.bin.US /lib/firmware/ath11k/IPQ5018/hw1.0/board.bin
fi
;;
esac
;;
ath11k/qcn6122/hw1.0/board.bin)
case "$board" in
cig,wf186w|\
cig,wf186h)
country=`cat /etc/ucentral/country`
if [ "$country" == "CA" ]; then
ln -s /lib/firmware/ath11k/qcn6122/hw1.0/board.bin.CA /lib/firmware/ath11k/qcn6122/hw1.0/board.bin
else
ln -s /lib/firmware/ath11k/qcn6122/hw1.0/board.bin.US /lib/firmware/ath11k/qcn6122/hw1.0/board.bin
fi
;;
esac
;;
*) *)
exit 1 exit 1
;; ;;

View File

@@ -81,10 +81,6 @@ platform_check_image() {
wallys,dr5018|\ wallys,dr5018|\
hfcl,ion4x_w|\ hfcl,ion4x_w|\
hfcl,ion4xi_w|\ hfcl,ion4xi_w|\
indio,um-325ax-v2|\
indio,um-335ax|\
indio,um-525axp|\
indio,um-525axm|\
optimcloud,d60|\ optimcloud,d60|\
optimcloud,d60-5g|\ optimcloud,d60-5g|\
optimcloud,d50|\ optimcloud,d50|\
@@ -111,29 +107,12 @@ platform_do_upgrade() {
board=$(board_name) board=$(board_name)
case $board in case $board in
indio,um-325ax-v2|\ glinet,b3000|\
indio,um-335ax|\
indio,um-525axp|\
indio,um-525axm|\
edgecore,oap101|\ edgecore,oap101|\
edgecore,oap101-6e|\ edgecore,oap101-6e|\
edgecore,oap101e|\ edgecore,oap101e|\
edgecore,oap101e-6e|\ edgecore,oap101e-6e|\
edgecore,eap104) edgecore,eap104)
if [ "$(find_mtd_chardev rootfs)" ]; then
CI_UBIPART="rootfs"
else
if grep -q rootfs1 /proc/cmdline; then
CI_UBIPART="rootfs2"
CI_FWSETENV="active 2"
else
CI_UBIPART="rootfs1"
CI_FWSETENV="active 1"
fi
fi
nand_upgrade_tar "$1"
;;
glinet,b3000)
CI_UBIPART="rootfs1" CI_UBIPART="rootfs1"
[ "$(find_mtd_chardev rootfs)" ] && CI_UBIPART="rootfs" [ "$(find_mtd_chardev rootfs)" ] && CI_UBIPART="rootfs"
nand_upgrade_tar "$1" nand_upgrade_tar "$1"

View File

@@ -1,941 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-325AX V2";
compatible = "indio,um-325ax-v2", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
//led-failsafe = &led_red;
//led-running = &led_green;
//led-upgrade = &led_green;
//led-gateway = &led_blue;
//led-factory = &led_blue;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E400000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F400000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 14MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D300000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D400000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D600000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E800000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4ED00000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4FD00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4FE00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4FF00000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x5400000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D400000 {
no-map;
reg = <0x0 0x4D400000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
no-map;
reg = <0x0 0x4D600000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
no-map;
reg = <0x0 0x4E600000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
no-map;
reg = <0x0 0x4E700000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
no-map;
reg = <0x0 0x4E800000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4ED00000 0x0 0x1000000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
no-map;
reg = <0x0 0x4FD00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
no-map;
reg = <0x0 0x4FE00000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
no-map;
reg = <0x0 0x4FF00000 0x0 0x500000>;
};
#endif
};
soc {
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_5g {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_blue: led@34 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led_green: led@33 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led_red: led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "off";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x50>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "disabled";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,rproc = <&q6_wcss_pd3>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0xb0>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data2>;
#else
memory-region = <&q6_qcn6122_data2>;
#endif
status = "ok";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
#status = "disabled";
#perst-gpio = <&tlmm 18 1>;
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
#status = "disabled";
#perst-gpio = <&tlmm 15 1>;
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};

View File

@@ -1,731 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2025, Shubham Vishwakarma <shubhamvis98@fossfrog.in>.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-335AX";
compatible = "indio,um-335ax", "qcom,ipq5018-ap-mp03.1", "qcom,ipq5018-mp03.1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
led-boot = &led_red;
led-failsafe = &led_red;
led-running = &led_red;
led-upgrade = &led_red;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M";
stdout-path = "serial0";
};
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
reserved-memory {
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1800000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4C800000 {
no-map;
reg = <0x0 0x4C800000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4C900000 {
no-map;
reg = <0x0 0x4C900000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4CA00000 {
no-map;
reg = <0x0 0x4CA00000 0x0 0x200000>;
};
qcn9000_pcie0: qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x2600000>;
};
#if defined(__CNSS2__)
mhi_region1: dma_pool1@4F200000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4F200000 0x0 0x900000>;
};
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_blue: led_5g {
label = "led_5g";
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green: led_2g {
label = "led_2g";
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red: led_sys {
label = "led_sys";
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led@33 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led@34 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "on";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
// status = "disabled";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&blsp1_uart1 {
status = "ok";
};
&ssuniphy_0 {
status = "ok";
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
status = "ok";
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&wcss {
status = "ok";
};
&pcie_x2phy {
status = "ok";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "ok";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x20>;
qti,disable-rddm-prealloc;
qti,rddm-seg-len = <0x1000>;
#address-cells = <0x2>;
#size-cells = <0x2>;
#if defined(__CNSS2__)
memory-region = <0>,<&mhi_region1>;
#else
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4DF00000>;
etr-addr = <0x4E000000>;
qcom,caldb-addr = <0x4E100000>;
pageable-addr = <0x4E900000>;
qcom,tgt-mem-mode = <0x1>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,tgt-mem-mode = <1>;
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi3 {
/* QCN9000 5G */
board_id = <0xa0>;
hremote_node = <&qcn9000_pcie0>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* QCN9000 tgt-mem-mode=2 layout - 17MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4C900000 | 11MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4D400000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4D500000 | 1MB |
* +---------+--------------+---------+
* | Pageable| 0x4D600000 | 4MB |
* +==================================+
*/
base-addr = <0x4C900000>;
m3-dump-addr = <0x4D400000>;
etr-addr = <0x4D500000>;
caldb-addr = <0>;
pageable-addr = <0x4D600000>;
caldb-size = <0>;
hremote-size = <0xB00000>;
tgt-mem-mode = <0x2>;
pageable-size = <0x400000>;
#elif __IPQ_MEM_PROFILE_512_MB__
/* QCN9000 tgt-mem-mode=1 layout - 26MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4CB00000 | 12MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4D700000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4D800000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x4D900000 | 8MB |
* +---------+--------------+---------+
* | Pageable| 0x4E100000 | 4MB |
* +==================================+
*/
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4D700000>;
etr-addr = <0x4D800000>;
caldb-addr = <0x4D900000>;
pageable-addr = <0x4E100000>;
caldb-size = <0x800000>;
hremote-size = <0xC00000>;
tgt-mem-mode = <0x1>;
pageable-size = <0x400000>;
#else
/* QCN9000 tgt-mem-mode=0 layout - 53MB
* +=========+==============+=========+
* | Region | Start Offset | Size |
* +---------+--------------+---------+
* | HREMOTE | 0x4CB00000 | 35MB |
* +---------+--------------+---------+
* | M3 Dump | 0x4EE00000 | 1MB |
* +---------+--------------+---------+
* | ETR | 0x4EF00000 | 1MB |
* +---------+--------------+---------+
* | Caldb | 0x4F000000 | 8MB |
* +---------+--------------+---------+
* | Pageable| 0x4F800000 | 8MB |
* +==================================+
*/
base-addr = <0x4CB00000>;
m3-dump-addr = <0x4EE00000>;
etr-addr = <0x4EF00000>;
caldb-addr = <0x4F000000>;
pageable-addr = <0x4F800000>;
hremote-size = <0x2300000>;
caldb-size = <0x800000>;
tgt-mem-mode = <0x0>;
pageable-size = <0x800000>;
#endif
status = "ok";
};

View File

@@ -1,941 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-525AXM";
compatible = "indio,um-525axm", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
//led-failsafe = &led_red;
//led-running = &led_green;
//led-upgrade = &led_green;
//led-gateway = &led_blue;
//led-factory = &led_blue;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E400000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F400000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 14MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D300000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D400000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D600000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E800000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4ED00000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4FD00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4FE00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4FF00000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x5400000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D400000 {
no-map;
reg = <0x0 0x4D400000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
no-map;
reg = <0x0 0x4D600000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
no-map;
reg = <0x0 0x4E600000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
no-map;
reg = <0x0 0x4E700000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
no-map;
reg = <0x0 0x4E800000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4ED00000 0x0 0x1000000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
no-map;
reg = <0x0 0x4FD00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
no-map;
reg = <0x0 0x4FE00000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
no-map;
reg = <0x0 0x4FF00000 0x0 0x500000>;
};
#endif
};
soc {
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_5g {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_blue: led@34 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led_green: led@33 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led_red: led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "off";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x50>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "disabled";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,rproc = <&q6_wcss_pd3>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0xb0>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data2>;
#else
memory-region = <&q6_qcn6122_data2>;
#endif
status = "ok";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
#status = "disabled";
#perst-gpio = <&tlmm 18 1>;
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
#status = "disabled";
#perst-gpio = <&tlmm 15 1>;
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};

View File

@@ -1,941 +0,0 @@
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "ipq5018.dtsi"
#include <dt-bindings/input/input.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Indio UM-525AXP";
compatible = "indio,um-525axp", "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
//led-failsafe = &led_red;
//led-running = &led_green;
//led-upgrade = &led_green;
//led-gateway = &led_blue;
//led-factory = &led_blue;
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 8MB |
* +----------+--------------+-------------------------+
* | Linux | 0x40800000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 13MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D100000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D300000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E200000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4E400000 | 15MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4F400000 | 1MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x4500000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x1400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xD00000>;
};
m3_dump: m3_dump@4D100000 {
no-map;
reg = <0x0 0x4D100000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0xF00000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E200000 {
no-map;
reg = <0x0 0x4E200000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E300000 {
no-map;
reg = <0x0 0x4E300000 0x0 0x100000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E400000 {
no-map;
reg = <0x0 0x4E400000 0x0 0xF00000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
#else
/* 512MB/1GB Profiles
* +==========+==============+=========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +----------+--------------+-------------------------+
* | NSS | 0x40000000 | 16MB |
* +----------+--------------+-------------------------+
* | Linux | 0x41000000 | Depends on total memory |
* +----------+--------------+-------------------------+
* | uboot | 0x4A600000 | 4MB |
* +----------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +----------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +----------+--------------+-------------------------+
* | TZ | 0x4AC00000 | 4MB |
* +----------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4B000000 | 20MB |
* | data | | |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | data | 0x4C400000 | 14MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | M3 Dump | 0x4D200000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | QDSS | 0x4D300000 | 1MB |
* +----------+--------------+-------------------------+
* | IPQ5018 | | |
* | Caldb | 0x4D400000 | 2MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | data | 0x4D600000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | M3 Dump | 0x4E600000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | QDSS | 0x4E700000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_1| | |
* | Caldb | 0x4E800000 | 5MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | data | 0x4ED00000 | 16MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | M3 Dump | 0x4FD00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | QDSS | 0x4FE00000 | 1MB |
* +----------+--------------+-------------------------+
* | QCN6122_2| | |
* | Caldb | 0x4FF00000 | 5MB |
* +----------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +===================================================+
*/
q6_mem_regions: q6_mem_regions@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 0x5400000>;
};
q6_code_data: q6_code_data@4B000000 {
no-map;
reg = <0x0 0x4B000000 0x0 01400000>;
};
q6_ipq5018_data: q6_ipq5018_data@4C400000 {
no-map;
reg = <0x0 0x4C400000 0x0 0xE00000>;
};
m3_dump: m3_dump@4D200000 {
no-map;
reg = <0x0 0x4D200000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D300000 {
no-map;
reg = <0x0 0x4D300000 0x0 0x100000>;
};
q6_caldb_region: q6_caldb_region@4D400000 {
no-map;
reg = <0x0 0x4D400000 0x0 0x200000>;
};
q6_qcn6122_data1: q6_qcn6122_data1@4D600000 {
no-map;
reg = <0x0 0x4D600000 0x0 0x1000000>;
};
m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E600000 {
no-map;
reg = <0x0 0x4E600000 0x0 0x100000>;
};
q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E700000 {
no-map;
reg = <0x0 0x4E700000 0x0 0x100000>;
};
q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4E800000 {
no-map;
reg = <0x0 0x4E800000 0x0 0x500000>;
};
q6_qcn6122_data2: q6_qcn6122_data2@4E900000 {
no-map;
reg = <0x0 0x4ED00000 0x0 0x1000000>;
};
m3_dump_qcn6122_2: m3_dump_qcn6122_2@4FD00000 {
no-map;
reg = <0x0 0x4FD00000 0x0 0x100000>;
};
q6_qcn6122_etr_2: q6_qcn6122_etr_2@4FE00000 {
no-map;
reg = <0x0 0x4FE00000 0x0 0x100000>;
};
q6_qcn6122_caldb_2: q6_qcn6122_caldb_2@4FF00000 {
no-map;
reg = <0x0 0x4FF00000 0x0 0x500000>;
};
#endif
};
soc {
gpio-watchdog {
compatible = "linux,wdt-gpio";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <5000>;
always-running;
};
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
mdio1: mdio@90000 {
status = "ok";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 39 0>;
ethernet-phy@0 {
reg = <28>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
mdiobus = <&mdio0>;
};
port@1 {
port_id = <2>;
phy_address = <0x1c>;
mdiobus = <&mdio1>;
port_mac_sel = "QGMAC_PORT";
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca83xx";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio1>;
reset_gpio = <0x28>;
switch_cpu_bmp = <0x40>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PORT6 FORCE MODE*/
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <28>;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
mdio-bus = <&mdio1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
qcom,test@0 {
status = "ok";
};
nss-macsec1 {
compatible = "qcom,nss-macsec";
phy_addr = <0x1c>;
mdiobus = <&mdio1>;
};
lpass: lpass@0xA000000{
status = "disabled";
};
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio22", "gpio24", "gpio23", "gpio25";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
reset_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
};
leds_pins: leds_pins {
led_5g {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_2g {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_sys {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_onekey {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_blue: led@34 {
label = "led_5g";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_5g";
default-state = "off";
};
led_green: led@33 {
label = "led_2g";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_2g";
default-state = "off";
};
led_red: led@26 {
label = "led_sys";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_sys";
default-state = "off";
};
led@28 {
label = "led_onekey";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,default-trigger = "led_onekey";
default-state = "off";
};
};
};
&q6v5_wcss {
compatible = "qcom,ipq5018-q6-mpd";
#address-cells = <1>;
#size-cells = <1>;
ranges;
firmware = "IPQ5018/q6_fw.mdt";
reg = <0x0cd00000 0x4040>,
<0x1938000 0x8>,
<0x193d204 0x4>;
reg-names = "qdsp6",
"tcsr-msip",
"tcsr-q6";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_Q6_BCR>;
reset-names = "wcss_aon_reset",
"wcss_q6_reset";
clocks = <&gcc GCC_Q6_AXIS_CLK>,
<&gcc GCC_WCSS_ECAHB_CLK>,
<&gcc GCC_Q6_AXIM_CLK>,
<&gcc GCC_Q6_AXIM2_CLK>,
<&gcc GCC_Q6_AHB_CLK>,
<&gcc GCC_Q6_AHB_S_CLK>,
<&gcc GCC_WCSS_AXI_S_CLK>;
clock-names = "gcc_q6_axis_clk",
"gcc_wcss_ecahb_clk",
"gcc_q6_axim_clk",
"gcc_q6_axim2_clk",
"gcc_q6_ahb_clk",
"gcc_q6_ahb_s_clk",
"gcc_wcss_axi_s_clk";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_mem_regions>, <&q6_etr_region>;
#else
memory-region = <&q6_mem_regions>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
qcom,rproc = <&q6v5_wcss>;
qcom,bootargs_smem = <507>;
boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>,
<0x2 0x4 0x2 0x12 0x0 0x0>;
status = "ok";
q6_wcss_pd1: remoteproc_pd1@4ab000 {
compatible = "qcom,ipq5018-wcss-ahb-mpd";
reg = <0x4ab000 0x20>;
reg-names = "rmb";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
resets = <&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names = "wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks = <&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names = "gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>;
#else
memory-region = <&q6_ipq5018_data>, <&m3_dump>,
<&q6_etr_region>, <&q6_caldb_region>;
#endif
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
m3_firmware = "qcn6122/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>;
#else
memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
<&q6_qcn6122_etr_1>, <&q6_qcn6122_caldb_1>;
#endif
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5018-wcss-pcie-mpd";
firmware = "IPQ5018/q6_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
#ifdef __IPQ_MEM_PROFILE_256_MB__
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>;
#else
memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>,
<&q6_qcn6122_etr_2>, <&q6_qcn6122_caldb_2>;
#endif
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&wifi0 {
/* IPQ5018 */
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x24>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4C400000 0x4C400000 0x4C400000 0x0 0x0>;
qcom,caldb-addr = <0x4D400000 0x4D400000 0 0 0>;
qcom,caldb-size = <0x200000>;
mem-region = <&q6_ipq5018_data>;
#else
memory-region = <&q6_ipq5018_data>;
#endif
status = "ok";
};
&wifi1 {
/* QCN6122 5G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,rproc = <&q6_wcss_pd2>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0x50>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4D600000 0x4D600000 0x4D300000 0x0 0x0>;
qcom,caldb-addr = <0x4E800000 0x4E800000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data1>;
#else
memory-region = <&q6_qcn6122_data1>;
#endif
status = "disabled";
};
&wifi2 {
/* QCN6122 6G */
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,rproc = <&q6_wcss_pd3>;
#ifdef __IPQ_MEM_PROFILE_256_MB__
qcom,tgt-mem-mode = <2>;
#else
qcom,tgt-mem-mode = <1>;
#endif
qcom,board_id = <0xb0>;
#ifdef __CNSS2__
qcom,bdf-addr = <0x4ED00000 0x4ED00000 0x4E400000 0x0 0x0>;
qcom,caldb-addr = <0x4FF00000 0x4FF00000 0 0 0>;
qcom,caldb-size = <0x500000>;
mem-region = <&q6_qcn6122_data2>;
#else
memory-region = <&q6_qcn6122_data2>;
#endif
status = "ok";
};
&usb3 {
status = "ok";
device-power-gpio = <&tlmm 24 1>;
};
&dwc_0 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
&hs_m31phy_0 {
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
#status = "disabled";
#perst-gpio = <&tlmm 18 1>;
perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>;
};
&pcie_x2 {
#status = "disabled";
#perst-gpio = <&tlmm 15 1>;
perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>;
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "disabled";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
};
};

View File

@@ -151,14 +151,6 @@
no-map; no-map;
reg = <0x0 0x4F000000 0x0 0x100000>; reg = <0x0 0x4F000000 0x0 0x100000>;
}; };
ramoops: ramoops@4f100000 {
compatible = "ramoops";
reg = <0x0 0x4f100000 0x0 0x80000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
#else #else
/* 512MB/1GB Profiles /* 512MB/1GB Profiles
* +==========+==============+=========================+ * +==========+==============+=========================+
@@ -293,13 +285,6 @@
reg = <0x0 0x4F800000 0x0 0x500000>; reg = <0x0 0x4F800000 0x0 0x500000>;
}; };
ramoops: ramoops@4fd00000 {
compatible = "ramoops";
reg = <0x0 0x4fd00000 0x0 0x80000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
#endif #endif
}; };

View File

@@ -151,14 +151,6 @@
no-map; no-map;
reg = <0x0 0x4F000000 0x0 0x100000>; reg = <0x0 0x4F000000 0x0 0x100000>;
}; };
ramoops: ramoops@4f100000 {
compatible = "ramoops";
reg = <0x0 0x4f100000 0x0 0x80000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
#else #else
/* 512MB/1GB Profiles /* 512MB/1GB Profiles
* +==========+==============+=========================+ * +==========+==============+=========================+
@@ -293,13 +285,6 @@
reg = <0x0 0x4F800000 0x0 0x500000>; reg = <0x0 0x4F800000 0x0 0x500000>;
}; };
ramoops: ramoops@4fd00000 {
compatible = "ramoops";
reg = <0x0 0x4fd00000 0x0 0x80000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
#endif #endif
}; };

View File

@@ -154,14 +154,6 @@
no-map; no-map;
reg = <0x0 0x4F000000 0x0 0x100000>; reg = <0x0 0x4F000000 0x0 0x100000>;
}; };
ramoops: ramoops@4f100000 {
compatible = "ramoops";
reg = <0x0 0x4f100000 0x0 0x80000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
#else #else
/* 512MB/1GB Profiles /* 512MB/1GB Profiles
* +==========+==============+=========================+ * +==========+==============+=========================+
@@ -296,13 +288,6 @@
reg = <0x0 0x4F800000 0x0 0x500000>; reg = <0x0 0x4F800000 0x0 0x500000>;
}; };
ramoops: ramoops@4fd00000 {
compatible = "ramoops";
reg = <0x0 0x4fd00000 0x0 0x80000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
#endif #endif
}; };

View File

@@ -93,42 +93,6 @@ define Device/edgecore_eap104
endef endef
TARGET_DEVICES += edgecore_eap104 TARGET_DEVICES += edgecore_eap104
define Device/indio_um-325ax-v2
DEVICE_TITLE := Indio UM-325ax-V2
DEVICE_DTS := qcom-ipq5018-indio-um-325ax-v2
SUPPORTED_DEVICES := indio,um-325ax-v2
DEVICE_PACKAGES := ath11k-wifi-indio-um-325ax-v2 ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
endef
TARGET_DEVICES += indio_um-325ax-v2
define Device/indio_um-335ax
DEVICE_TITLE := Indio UM-335ax
DEVICE_DTS := qcom-ipq5018-indio-um-335ax
SUPPORTED_DEVICES := indio,um-335ax
DEVICE_PACKAGES := ath11k-wifi-indio-um-335ax ath11k-firmware-qcn9000 ath11k-firmware-ipq50xx-spruce
DEVICE_DTS_CONFIG := config@mp03.1
endef
TARGET_DEVICES += indio_um-335ax
define Device/indio_um-525axp
DEVICE_TITLE := Indio UM-525axp
DEVICE_DTS := qcom-ipq5018-indio-um-525axp
SUPPORTED_DEVICES := indio,um-525axp
DEVICE_PACKAGES := ath11k-wifi-indio-um-525axp ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
endef
TARGET_DEVICES += indio_um-525axp
define Device/indio_um-525axm
DEVICE_TITLE := Indio UM-525axm
DEVICE_DTS := qcom-ipq5018-indio-um-525axm
SUPPORTED_DEVICES := indio,um-525axm
DEVICE_PACKAGES := ath11k-wifi-indio-um-525axm ath11k-firmware-ipq50xx-spruce ath11k-firmware-qcn6122
DEVICE_DTS_CONFIG := config@mp03.5-c1
endef
TARGET_DEVICES += indio_um-525axm
define Device/udaya_a6_id2 define Device/udaya_a6_id2
DEVICE_TITLE := Udaya A6 - ID2 DEVICE_TITLE := Udaya A6 - ID2
DEVICE_DTS := qcom-ipq5018-udaya-a6-id2 DEVICE_DTS := qcom-ipq5018-udaya-a6-id2

View File

@@ -1,61 +0,0 @@
--- a/include/init/ssdk_plat.h
+++ b/include/init/ssdk_plat.h
@@ -330,6 +330,7 @@ struct qca_phy_priv {
struct mii_bus *miibus;
/*qca808x_end*/
u64 *mib_counters;
+ a_uint32_t mib_loop_cnt;
/* dump buf */
a_uint8_t buf[2048];
a_uint32_t link_polling_required;
--- a/src/ref/ref_mib.c
+++ b/src/ref/ref_mib.c
@@ -479,39 +479,37 @@ qca_ar8327_sw_get_port_mib(struct switch
#endif
int
-_qca_ar8327_sw_capture_port_tx_counter(struct qca_phy_priv *priv, int port)
+_qca_ar8327_sw_capture_port_tx_counter(a_uint32_t dev_id, int port)
{
fal_mib_info_t mib_Info;
memset(&mib_Info, 0, sizeof(fal_mib_info_t));
- fal_get_tx_mib_info(priv->device_id, port, &mib_Info);
+ fal_get_tx_mib_info(dev_id, port, &mib_Info);
return 0;
}
int
-_qca_ar8327_sw_capture_port_rx_counter(struct qca_phy_priv *priv, int port)
+_qca_ar8327_sw_capture_port_rx_counter(a_uint32_t dev_id, int port)
{
fal_mib_info_t mib_Info;
memset(&mib_Info, 0, sizeof(fal_mib_info_t));
- fal_get_rx_mib_info(priv->device_id, port, &mib_Info);
+ fal_get_rx_mib_info(dev_id, port, &mib_Info);
return 0;
}
void
qca_ar8327_sw_mib_task(struct qca_phy_priv *priv)
{
- static int loop = 0;
-
mutex_lock(&priv->reg_mutex);
- if ((loop % 2) == 0)
- _qca_ar8327_sw_capture_port_rx_counter(priv, loop/2);
+ if ((priv->mib_loop_cnt % 2) == 0)
+ _qca_ar8327_sw_capture_port_rx_counter(priv->device_id, priv->mib_loop_cnt/2);
else
- _qca_ar8327_sw_capture_port_tx_counter(priv, loop/2);
+ _qca_ar8327_sw_capture_port_tx_counter(priv->device_id, priv->mib_loop_cnt/2);
- if(++loop == (2 * (priv->ports))) {
- loop = 0;
+ if(++priv->mib_loop_cnt == (2 * (priv->ports))) {
+ priv->mib_loop_cnt = 0;
}
mutex_unlock(&priv->reg_mutex);

View File

@@ -200,7 +200,7 @@
phy-mode = "sgmii"; phy-mode = "sgmii";
full-duplex; full-duplex;
pause; pause;
airoha,surge = <0>; airoha,surge = <1>;
airoha,polarity = <2>; airoha,polarity = <2>;
}; };

View File

@@ -169,8 +169,7 @@
compatible = "mediatek,eth-mac"; compatible = "mediatek,eth-mac";
reg = <0>; reg = <0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
phy-handle = <&phy30>; phy-handle = <&phy1>; // add phy handler
phy-handle2 = <&phy1>;
mtd-mac-address = <&factory 0x24>; mtd-mac-address = <&factory 0x24>;
}; };
@@ -194,16 +193,6 @@
nvmem-cell-names = "phy-cal-data"; nvmem-cell-names = "phy-cal-data";
}; };
phy30: ethernet-phy@30 { // AN8801SB
compatible = "ethernet-phy-idc0ff.0421";
reg = <30>; //0x1e
phy-mode = "sgmii";
full-duplex;
pause;
airoha,surge = <0>;
airoha,polarity = <2>;
};
phy1: ethernet-phy@1 { phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.9471"; compatible = "ethernet-phy-id03a2.9471";
reg = <24>; // set phy address to 0x18 reg = <24>; // set phy address to 0x18
@@ -212,6 +201,7 @@
reset-deassert-us = <20000>; reset-deassert-us = <20000>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
}; };
}; };

View File

@@ -34,11 +34,13 @@ case "$board" in
if [ -f "$phy0_file" ]; then if [ -f "$phy0_file" ]; then
check_phy0=$(cat $phy0_file) check_phy0=$(cat $phy0_file)
echo "check_phy0 = $check_phy0"
[ "$check_phy0" == 0 ] && echo 1 > $phy0_file [ "$check_phy0" == 0 ] && echo 1 > $phy0_file
fi fi
if [ -f "$phy1_file" ]; then if [ -f "$phy1_file" ]; then
check_phy1=$(cat $phy1_file) check_phy1=$(cat $phy1_file)
echo "check_phy1 = $check_phy1"
[ "$check_phy1" == 0 ] && echo 1 > $phy1_file [ "$check_phy1" == 0 ] && echo 1 > $phy1_file
fi fi

View File

@@ -43,11 +43,6 @@ $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for EAP105 TITLE:=board-2.bin for EAP105
endef endef
define Package/ath12k-wifi-emplus-wap7635
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for WAP7635
endef
define Package/ath12k-wifi-sonicfi-rap7110c-341x define Package/ath12k-wifi-sonicfi-rap7110c-341x
$(call Package/ath12k-wifi-default) $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for RAP7710c_341x TITLE:=board-2.bin for RAP7710c_341x
@@ -93,11 +88,6 @@ $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for NWA130BE TITLE:=board-2.bin for NWA130BE
endef endef
define Package/ath12k-wifi-zyxel-nwa50be
$(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for NWA50BE
endef
define Package/ath12k-wifi-cig-wf672 define Package/ath12k-wifi-cig-wf672
$(call Package/ath12k-wifi-default) $(call Package/ath12k-wifi-default)
TITLE:=board-2.bin for WF672 TITLE:=board-2.bin for WF672
@@ -106,8 +96,8 @@ endef
define Package/ath12k-wifi-cig-wf189/install define Package/ath12k-wifi-cig-wf189/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.wf189-us.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.wf189.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.wf189-us.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.wf189.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef endef
define Package/ath12k-wifi-edgecore-eap105/install define Package/ath12k-wifi-edgecore-eap105/install
@@ -117,13 +107,6 @@ define Package/ath12k-wifi-edgecore-eap105/install
$(INSTALL_DATA) ./board-2.bin.eap105.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin $(INSTALL_DATA) ./board-2.bin.eap105.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef endef
define Package/ath12k-wifi-emplus-wap7635/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DATA) ./board-2.bin.wap7635.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.wap7635.QCN6274 $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
endef
define Package/ath12k-wifi-sonicfi-rap7110c-341x/install define Package/ath12k-wifi-sonicfi-rap7110c-341x/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
@@ -161,8 +144,8 @@ endef
define Package/ath12k-wifi-cig-wf189w/install define Package/ath12k-wifi-cig-wf189w/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/
$(INSTALL_DATA) ./board-2.bin.189w-us.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.189w.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.189w-us.QCN6432 $(1)/lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.189w.QCN6432 $(1)/lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin
$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin $(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
endef endef
@@ -170,8 +153,8 @@ endef
define Package/ath12k-wifi-cig-wf189h/install define Package/ath12k-wifi-cig-wf189h/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/
$(INSTALL_DATA) ./board-2.bin.189h-us.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.189h.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.189h-us.QCN6432 $(1)/lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.189h.QCN6432 $(1)/lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin
$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin $(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
endef endef
@@ -196,24 +179,15 @@ define Package/ath12k-wifi-zyxel-nwa130be/install
$(INSTALL_DATA) ./board-2.bin.nwa130be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin $(INSTALL_DATA) ./board-2.bin.nwa130be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef endef
define Package/ath12k-wifi-zyxel-nwa50be/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN6432/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.nwa50be.QCN6432 $(1)/lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.nwa50be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
endef
define Package/ath12k-wifi-cig-wf672/install define Package/ath12k-wifi-cig-wf672/install
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/ $(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
$(INSTALL_DATA) ./board-2.bin.wf672-us.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.wf672.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
$(INSTALL_DATA) ./board-2.bin.wf672-us.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin.US $(INSTALL_DATA) ./board-2.bin.wf672.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
endef endef
$(eval $(call BuildPackage,ath12k-wifi-cig-wf189)) $(eval $(call BuildPackage,ath12k-wifi-cig-wf189))
$(eval $(call BuildPackage,ath12k-wifi-edgecore-eap105)) $(eval $(call BuildPackage,ath12k-wifi-edgecore-eap105))
$(eval $(call BuildPackage,ath12k-wifi-emplus-wap7635))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap7110c-341x)) $(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap7110c-341x))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750e-h)) $(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750e-h))
$(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750e-s)) $(eval $(call BuildPackage,ath12k-wifi-sonicfi-rap750e-s))
@@ -223,5 +197,4 @@ $(eval $(call BuildPackage,ath12k-wifi-cig-wf189h))
$(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip)) $(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip))
$(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip-v4)) $(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip-v4))
$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa130be)) $(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa130be))
$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa50be))
$(eval $(call BuildPackage,ath12k-wifi-cig-wf672)) $(eval $(call BuildPackage,ath12k-wifi-cig-wf672))

View File

@@ -1,20 +0,0 @@
[
{
"board": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=18"
],
"data": "nwa50be-IPQ5332.bin"
}
],
"regdb": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=18"
],
"data": "ipq5332.regdb"
}
]
}
]

View File

@@ -1,20 +0,0 @@
[
{
"board": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=112"
],
"data": "nwa50be-QCN6432.bin"
}
],
"regdb": [
{
"names": [
"bus=ahb,qmi-chip-id=0,qmi-board-id=112"
],
"data": "ipq5332_qcn6432.regdb"
}
]
}
]

View File

@@ -18,6 +18,3 @@ $encoder -c board-2-ap72tip-v4-QCN92XX.json -o board-2.bin.ap72tip-v4.QCN92XX
$encoder -c board-2-nwa130be-IPQ5332.json -o board-2.bin.nwa130be.IPQ5332 $encoder -c board-2-nwa130be-IPQ5332.json -o board-2.bin.nwa130be.IPQ5332
$encoder -c board-2-nwa130be-QCN92XX.json -o board-2.bin.nwa130be.QCN92XX $encoder -c board-2-nwa130be-QCN92XX.json -o board-2.bin.nwa130be.QCN92XX
$encoder -c board-2-nwa50be-IPQ5332.json -o board-2.bin.nwa50be.IPQ5332
$encoder -c board-2-nwa50be-QCN6432.json -o board-2.bin.nwa50be.QCN6432

View File

@@ -24,9 +24,7 @@ endef
define KernelPackage/cig-wifi-mode-sw/install define KernelPackage/cig-wifi-mode-sw/install
$(INSTALL_DIR) $(1)/usr/sbin/ $(INSTALL_DIR) $(1)/usr/sbin/
$(INSTALL_DIR) $(1)/etc/init.d/
$(INSTALL_BIN) ./files/cig_wifi_mode_sw $(1)/usr/sbin/cig_wms $(INSTALL_BIN) ./files/cig_wifi_mode_sw $(1)/usr/sbin/cig_wms
$(INSTALL_BIN) ./files/cig_wifi_mode_boot $(1)/etc/init.d/cig_wmb
endef endef
$(eval $(call KernelPackage,cig-wifi-mode-sw)) $(eval $(call KernelPackage,cig-wifi-mode-sw))

View File

@@ -1,13 +0,0 @@
#!/bin/sh /etc/rc.common
START=60
boot(){
local bands=$(cat /proc/rf_switch)
if [ "x$bands" = "x3" ]; then
echo "AFC is not ready, switch to 2-band mode" >/dev/console
echo 2 > /proc/rf_switch
firstboot -y -r
fi
}

View File

@@ -4,19 +4,19 @@ let fs = require("fs");
let ubus = require('ubus').connect(); let ubus = require('ubus').connect();
let gps_info = ubus.call('gps', 'info'); let gps_info = ubus.call('gps', 'info');
let latitude = gps_info.latitude || 0; let latitude = gps_info.latitude ?? 0;
let longitude = gps_info.longitude || 0; let longitude = gps_info.longitude ?? 0;
// afc-location.json file content // afc-location.json file content
let afc_location = {}; let afc_location = {};
afc_location.location_type = "ellipse"; afc_location.location_type = "ellipse";
afc_location.location = longitude + ":" + latitude ; afc_location.location = longitude + ":" + latitude ;
afc_location.height = gps_info.elevation || 0; afc_location.height = gps_info.elevation ?? 0;
afc_location.height_type = "AMSL"; afc_location.height_type = "AMSL";
afc_location.major_axis = int(gps_info.major_axis) || 1; afc_location.major_axis = gps_info.major_axis ?? 0;
afc_location.minor_axis = int(gps_info.minor_axis) || 1; afc_location.minor_axis = gps_info.minor_axis ?? 0;
afc_location.orientation = gps_info.major_orientation || 0; afc_location.orientation = gps_info.major_orientation ?? 0;
afc_location.vertical_tolerance = int(gps_info.vdop) || 1; afc_location.vertical_tolerance = gps_info.vdop ?? 0;
let afc_location_json = fs.open("/etc/ucentral/afc-location.json", "w"); let afc_location_json = fs.open("/etc/ucentral/afc-location.json", "w");
afc_location_json.write(afc_location); afc_location_json.write(afc_location);

View File

@@ -259,13 +259,8 @@ const phy_proto = {
addr[0] ^= idx << 2; addr[0] ^= idx << 2;
break; break;
case "b5": case "b5":
if (mbssid) { if (mbssid)
let b5 = addr[5];
addr[5] = addr[3];
addr[3] = b5;
addr[5] &= ~0xf;
addr[0] |= 2; addr[0] |= 2;
}
addr[5] ^= idx; addr[5] ^= idx;
break; break;
default: default:

View File

@@ -1,8 +1,7 @@
let libubus = require("ubus"); let libubus = require("ubus");
import { open, readfile, writefile } from "fs"; import { open, readfile } from "fs";
import { wdev_remove, is_equal, vlist_new, phy_is_fullmac, phy_open, wdev_set_radio_mask } from "common"; import { wdev_remove, is_equal, vlist_new, phy_is_fullmac, phy_open, wdev_set_radio_mask } from "common";
let uci = require('uci').cursor();
let ubus = libubus.connect(null, 60); let ubus = libubus.connect(null, 60);
hostapd.data.config = {}; hostapd.data.config = {};
@@ -1007,6 +1006,7 @@ let main_obj = {
hostapd.data.ubus = ubus; hostapd.data.ubus = ubus;
hostapd.data.obj = ubus.publish("hostapd", main_obj); hostapd.data.obj = ubus.publish("hostapd", main_obj);
let auth_obj = {}; let auth_obj = {};
hostapd.data.auth_obj = ubus.publish("hostapd-auth", auth_obj); hostapd.data.auth_obj = ubus.publish("hostapd-auth", auth_obj);
@@ -1026,24 +1026,10 @@ return {
hostapd.ubus.disconnect(); hostapd.ubus.disconnect();
}, },
afc_request: function(iface, data) { afc_request: function(iface, data) {
let wireless_config = uci.get_all('wireless'); let ret = ubus.call("afc", "request", { data });
for (let l, afc_server in wireless_config) { if (type(ret) != "object")
if (afc_server['.type'] == 'afc-server' && afc_server.url && data) {
hostapd.printf(`Sending AFC request: ${data}`);
writefile("/tmp/afc-request.json", data);
if (afc_server.access_token)
system(`curl -s -X POST ${afc_server.url} -H \'accept: \*\/\*\' -H \'Authorization: Bearer ${afc_server.access_token}\' -H \'Content-Type: application/json\' -d \'${data}\' --output /tmp/afc-response.json`);
else if (afc_server.cert)
system(`curl -s -X POST ${afc_server.url} -H \'accept: \*\/\*\' --cert \'${afc_server.cert}\' -H \'Content-Type: application/json\' -d \'${data}\' --output /tmp/afc-response.json`);
let afc_response = (readfile("/tmp/afc-response.json"));
if (afc_response)
return afc_response;
else
return; return;
} return ret.data;
}
}, },
bss_create: function(phy, name, obj) { bss_create: function(phy, name, obj) {
phy = hostapd.data.config[phy]; phy = hostapd.data.config[phy];

View File

@@ -7,11 +7,6 @@ board_config_update
board=$(board_name) board=$(board_name)
case "$board" in case "$board" in
emplus,wap7635)
ucidef_set_led_default "ledb" "LEDB" "sys:blue" "on"
ucidef_set_led_default "ledg" "LEDG" "sys:green" "off"
ucidef_set_led_default "ledr" "LEDR" "sys:red" "off"
;;
sercomm,ap72tip-v4|\ sercomm,ap72tip-v4|\
sercomm,ap72tip) sercomm,ap72tip)
ucidef_set_led_default "power" "POWER" "blue:status" "on" ucidef_set_led_default "power" "POWER" "blue:status" "on"

View File

@@ -13,18 +13,15 @@ ipq53xx_setup_interfaces()
ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5" "eth0" ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5" "eth0"
;; ;;
cig,wf189|\ cig,wf189|\
cig,wf672|\
edgecore,eap105|\ edgecore,eap105|\
sercomm,ap72tip) sercomm,ap72tip|\
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
sonicfi,rap750w-311a) sonicfi,rap750w-311a)
ucidef_set_interfaces_lan_wan "eth1" "eth0" ucidef_set_interfaces_lan_wan "eth1" "eth0"
ucidef_add_switch "switch1" "0u@eth1" "3:lan" "2:lan" "1:lan"
;; ;;
sonicfi,rap7110c-341x|\ sonicfi,rap7110c-341x|\
sonicfi,rap750e-h|\ sonicfi,rap750e-h|\
sonicfi,rap750e-s|\ sonicfi,rap750e-s)
zyxel,nwa50be)
ucidef_set_interfaces_lan_wan "" "eth0" ucidef_set_interfaces_lan_wan "" "eth0"
;; ;;
cig,wf189w) cig,wf189w)
@@ -35,10 +32,6 @@ ipq53xx_setup_interfaces()
ucidef_set_interfaces_lan_wan "eth1" "eth0" ucidef_set_interfaces_lan_wan "eth1" "eth0"
ucidef_add_switch "switch1" "0u@eth1" "3:lan" "2:lan" ucidef_add_switch "switch1" "0u@eth1" "3:lan" "2:lan"
;; ;;
cig,wf672)
ucidef_set_interface_wan "eth0 eth1"
;;
emplus,wap7635|\
sercomm,ap72tip-v4) sercomm,ap72tip-v4)
ucidef_set_interface_wan "eth0" ucidef_set_interface_wan "eth0"
;; ;;
@@ -111,7 +104,6 @@ qcom_setup_macs()
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2) ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3) ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
;; ;;
emplus,wap7635|\
sercomm,ap72tip-v4) sercomm,ap72tip-v4)
wan_mac=$(cat /sys/class/net/eth0/address) wan_mac=$(cat /sys/class/net/eth0/address)
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 1) ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 1)
@@ -131,16 +123,6 @@ qcom_setup_macs()
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3) ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4) ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
;; ;;
zyxel,nwa50be)
wan_mac=$(cat /proc/cmdline)
wan_mac="${wan_mac##*hwaddr=}"
wan_mac="${wan_mac%% *}"
wan_mac="$(echo ${wan_mac} | sed 's/\(..\)/\1:/g;s/:$//')"
ucidef_set_network_device_mac eth0 $wan_mac
ucidef_set_label_macaddr $wan_mac
ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 1)
ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 2)
;;
*) *)
wan_mac=$(cat /sys/class/net/eth1/address) wan_mac=$(cat /sys/class/net/eth1/address)
lan_mac=$(macaddr_add "$wan_mac" 1) lan_mac=$(macaddr_add "$wan_mac" 1)

View File

@@ -64,11 +64,9 @@ ath12k/IPQ5332/hw1.0/caldata.bin)
cig,wf189h|\ cig,wf189h|\
cig,wf189|\ cig,wf189|\
edgecore,eap105|\ edgecore,eap105|\
emplus,wap7635|\
sercomm,ap72tip-v4|\ sercomm,ap72tip-v4|\
sercomm,ap72tip|\ sercomm,ap72tip|\
zyxel,nwa130be|\ zyxel,nwa130be)
zyxel,nwa50be)
caldata_extract "0:ART" 0x1000 0x20000 caldata_extract "0:ART" 0x1000 0x20000
;; ;;
cig,wf672) cig,wf672)
@@ -88,7 +86,6 @@ ath12k/QCN92XX/hw1.0/cal-pci-0001:01:00.0.bin)
case "$board" in case "$board" in
cig,wf189|\ cig,wf189|\
edgecore,eap105|\ edgecore,eap105|\
emplus,wap7635|\
sercomm,ap72tip-v4|\ sercomm,ap72tip-v4|\
sercomm,ap72tip|\ sercomm,ap72tip|\
zyxel,nwa130be) zyxel,nwa130be)
@@ -125,50 +122,6 @@ ath12k/QCN6432/hw1.0/cal-ahb-soc@0:wifi2@c0000000.bin)
cig,wf189w) cig,wf189w)
caldata_extract "0:ART" 0x58800 0x20000 caldata_extract "0:ART" 0x58800 0x20000
;; ;;
zyxel,nwa50be)
caldata_extract "0:ART" 0x58800 0x2d000
;;
esac
;;
ath12k/IPQ5332/hw1.0/board-2.bin)
case "$board" in
cig,wf189|\
cig,wf189h|\
cig,wf189w|\
cig,wf672)
country=`cat /etc/ucentral/country`
if [ "$country" == "CA" ]; then
ln -s /lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin.CA /lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
else
ln -s /lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin.US /lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
fi
;;
esac
;;
ath12k/QCN6432/hw1.0/board-2.bin)
case "$board" in
cig,wf189h|\
cig,wf189w)
country=`cat /etc/ucentral/country`
if [ "$country" == "CA" ]; then
ln -s /lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin.CA /lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin
else
ln -s /lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin.US /lib/firmware/ath12k/QCN6432/hw1.0/board-2.bin
fi
;;
esac
;;
ath12k/QCN92XX/hw1.0/board-2.bin)
case "$board" in
cig,wf189|\
cig,wf672)
country=`cat /etc/ucentral/country`
if [ "$country" == "CA" ]; then
ln -s /lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin.CA /lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
else
ln -s /lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin.US /lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
fi
;;
esac esac
;; ;;
*) *)

View File

@@ -9,5 +9,14 @@ boot() {
edgecore,eap105) edgecore,eap105)
ssdk_sh debug phy set 0x1 0x601FD032 0xff ssdk_sh debug phy set 0x1 0x601FD032 0xff
;; ;;
zyxel,nwa130be)
#eth0: APPE: phyaddr 4 green:2.5G orange:others
ssdk_sh debug phy set 4 0x40078074 0x670
ssdk_sh debug phy set 4 0x40078078 0x8600
#eth1: MHT: phyaddr 3 green:2.5G orange:others
ssdk_sh debug phy set 3 0x40078074 0x670
ssdk_sh debug phy set 3 0x40078078 0x8600
;;
esac esac
} }

View File

@@ -136,8 +136,7 @@ platform_do_upgrade() {
sercomm,ap72tip|\ sercomm,ap72tip|\
cig,wf189w|\ cig,wf189w|\
cig,wf189h|\ cig,wf189h|\
cig,wf189|\ cig,wf189)
emplus,wap7635)
if [ -f /proc/boot_info/bootconfig0/rootfs/upgradepartition ]; then if [ -f /proc/boot_info/bootconfig0/rootfs/upgradepartition ]; then
CI_UBIPART="$(cat /proc/boot_info/bootconfig0/rootfs/upgradepartition)" CI_UBIPART="$(cat /proc/boot_info/bootconfig0/rootfs/upgradepartition)"
CI_BOOTCFG=1 CI_BOOTCFG=1
@@ -174,8 +173,7 @@ platform_do_upgrade() {
sonicfi_dualimage_check sonicfi_dualimage_check
nand_upgrade_tar "$1" nand_upgrade_tar "$1"
;; ;;
zyxel,nwa130be|\ zyxel,nwa130be)
zyxel,nwa50be)
nand_upgrade_tar "$1" nand_upgrade_tar "$1"
;; ;;
esac esac

View File

@@ -1180,7 +1180,7 @@ CONFIG_QTI_LICENSE_MANAGER=y
# CONFIG_SYMBOLIC_ERRNAME is not set # CONFIG_SYMBOLIC_ERRNAME is not set
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
# CONFIG_LEDS_CLASS_MULTICOLOR is not set # CONFIG_LEDS_CLASS_MULTICOLOR is not set
CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
# CONFIG_PINCTRL_SINGLE is not set # CONFIG_PINCTRL_SINGLE is not set
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set

View File

@@ -1,413 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ5332 RDP468 board device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "ipq5332.dtsi"
#include "ipq5332-default-memory.dtsi"
/ {
model = "Emplus WAP7635";
compatible = "emplus,wap7635", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
aliases {
serial0 = &blsp1_uart0; /*console*/
ethernet0 = "/soc/dp1";
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
chosen {
stdout-path = "serial0";
};
soc@0 {
mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 51 GPIO_ACTIVE_LOW>;
phyaddr_fixup = <0xC90F018>;
uniphyaddr_fixup = <0xC90F014>;
mdio_clk_fixup; /* MDIO clock sequence fix up flag */
status = "okay";
phy0: ethernet-phy@0 {
reg = <24>;
};
};
ess-instance {
/*num_devices = <0x1>;*/
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x2>; /* lan port bitmap */
switch_wan_bmp = <0>; /* wan port bitmap */
switch_mac_mode = <0xf>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xd>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <24>;
mdiobus = <&mdio>;
ethernet-phy-ieee802.3-c45;
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <24>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
/* phy-mode = "usxgmii"; */
};
/* EDMA host driver configuration for the board */
edma@3ab00000 {
qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
qcom,rx-queue-start = <0>; /* Rx queue start */
qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
<0 164 4>, /* Tx complete ring id #5 IRQ info */
<0 165 4>, /* Tx complete ring id #6 IRQ info */
<0 166 4>, /* Tx complete ring id #7 IRQ info */
<0 167 4>, /* Tx complete ring id #8 IRQ info */
<0 168 4>, /* Tx complete ring id #9 IRQ info */
<0 169 4>, /* Tx complete ring id #10 IRQ info */
<0 170 4>, /* Tx complete ring id #11 IRQ info */
<0 171 4>, /* Tx complete ring id #12 IRQ info */
<0 172 4>, /* Tx complete ring id #13 IRQ info */
<0 173 4>, /* Tx complete ring id #14 IRQ info */
<0 174 4>, /* Tx complete ring id #15 IRQ info */
<0 139 4>, /* Rx desc ring id #12 IRQ info */
<0 140 4>, /* Rx desc ring id #13 IRQ info */
<0 141 4>, /* Rx desc ring id #14 IRQ info */
<0 142 4>, /* Rx desc ring id #15 IRQ info */
<0 191 4>, /* Misc error IRQ info */
<0 155 4>, /* RxFill ring id #4 IRQ info */
<0 156 4>, /* RxFill ring id #5 IRQ info */
<0 157 4>, /* RxFill ring id #6 IRQ info */
<0 158 4>, /* RxFill ring id #7 IRQ info */
<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
};
leds {
compatible = "gpio-leds";
led_power_blue: led@34 {
label = "sys:blue";
gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led_power_green: led@35 {
label = "sys:green";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led_power_red: led@37 {
label = "sys:red";
gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
wsi: wsi {
id = <0>;
num_chip = <2>;
status = "okay";
chip_info = <0 1 1>,
<1 1 0>;
};
};
};
&wifi0 {
led-gpio = <&tlmm 36 GPIO_ACTIVE_HIGH>;
qcom,rproc = <&q6_wcss_pd1>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
memory-region = <&q6_region>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <0>;
qcom,board_id = <0x16>;
status = "okay";
};
&mhi_region1 {
status = "okay";
};
&qcn9224_pcie1 {
status = "okay";
};
/* QCN9224 5G+6G */
&wifi4 {
hremote_node = <&qcn9224_pcie1>;
board_id = <0x1019>;
node_id = <0x1>;
status = "okay";
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "disabled";
};
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
status = "disabled";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo {
clock-frequency = <24000000>;
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qspi_default_state>;
pinctrl-names = "default";
status = "okay";
nandcs@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&pcie1_phy_x2 {
status = "okay";
};
&pcie1 {
pinctrl-0 = <&pcie1_default_state>;
pinctrl-names = "default";
perst-gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
status = "okay";
pcie1_rp {
reg = <0 0 0 0 0>;
qcom,mhi@1 {
reg = <0 0 0 0 0>;
boot-args = <0x2 0x4 0x34 0x3 0x0 0x0 /* MX Rail, GPIO52, Drive strength 0x3 */
0x4 0x4 0x18 0x3 0x0 0x0 /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
memory-region = <&qcn9224_pcie1>;
qcom,wsi = <&wsi>;
qcom,wsi_index = <1>;
qcom,board_id = <0x1019>;
};
};
};
/* PINCTRL */
&tlmm {
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio13";
function = "sdc_clk";
drive-strength = <8>;
bias-disable;
};
cmd-pins {
pins = "gpio12";
function = "sdc_cmd";
drive-strength = <8>;
bias-pull-up;
};
data-pins {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "sdc_data";
drive-strength = <8>;
bias-pull-up;
};
};
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-down;
};
spi_0_cs_pins: spi-0-cs-state {
pins = "gpio17";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-up;
};
qspi_default_state: qspi-default-state {
qspi_clock {
pins = "gpio13";
function = "qspi_clk";
drive-strength = <8>;
bias-pull-down;
};
qspi_cs {
pins = "gpio12";
function = "qspi_cs";
drive-strength = <8>;
bias-pull-up;
};
qspi_data {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "qspi_data";
drive-strength = <8>;
bias-pull-down;
};
};
serial_1_pins: serial1-pinmux { /*ble*/
pins = "gpio33", "gpio35";
function = "blsp1_uart2";
drive-strength = <8>;
bias-pull-up;
};
button_pins: button-state {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
pcie1_default_state: pcie1-default-state {
pins = "gpio45";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
output-low;
};
};
&license_manager {
status = "okay";
};
&usb3 {
qcom,multiplexed-phy;
status = "disabled";
};
&hs_m31phy_0 {
status = "okay";
};
&hs_m31phy_0 {
status = "okay";
};
&ssuniphy_0 {
status = "okay";
};

View File

@@ -31,20 +31,6 @@
stdout-path = "serial0"; stdout-path = "serial0";
}; };
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ramoops@49c00000 {
compatible = "ramoops";
reg = <0x0 0x49c00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
};
soc@0 { soc@0 {
mdio:mdio@90000 { mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>; pinctrl-0 = <&mdio1_pins>;

View File

@@ -190,14 +190,6 @@
/delete-node/ wcnss@4a900000; /delete-node/ wcnss@4a900000;
/delete-node/ q6_caldb_region@4ce00000; /delete-node/ q6_caldb_region@4ce00000;
ramoops@49c00000 {
compatible = "ramoops";
reg = <0x0 0x49c00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
q6_mem_regions: q6_mem_regions@4A900000 { q6_mem_regions: q6_mem_regions@4A900000 {
no-map; no-map;
reg = <0x0 0x4A900000 0x0 0x5100000>; reg = <0x0 0x4A900000 0x0 0x5100000>;

View File

@@ -190,14 +190,6 @@
/delete-node/ wcnss@4a900000; /delete-node/ wcnss@4a900000;
/delete-node/ q6_caldb_region@4ce00000; /delete-node/ q6_caldb_region@4ce00000;
ramoops@49c00000 {
compatible = "ramoops";
reg = <0x0 0x49c00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
q6_mem_regions: q6_mem_regions@4A900000 { q6_mem_regions: q6_mem_regions@4A900000 {
no-map; no-map;
reg = <0x0 0x4A900000 0x0 0x5100000>; reg = <0x0 0x4A900000 0x0 0x5100000>;

View File

@@ -190,14 +190,6 @@
/delete-node/ wcnss@4a900000; /delete-node/ wcnss@4a900000;
/delete-node/ q6_caldb_region@4ce00000; /delete-node/ q6_caldb_region@4ce00000;
ramoops@49c00000 {
compatible = "ramoops";
reg = <0x0 0x49c00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
q6_mem_regions: q6_mem_regions@4A900000 { q6_mem_regions: q6_mem_regions@4A900000 {
no-map; no-map;
reg = <0x0 0x4A900000 0x0 0x5100000>; reg = <0x0 0x4A900000 0x0 0x5100000>;

View File

@@ -18,21 +18,6 @@
model = "Zyxel NWA130BE"; model = "Zyxel NWA130BE";
compatible = "zyxel,nwa130be", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332-rdp468", "qcom,ipq5332"; compatible = "zyxel,nwa130be", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332-rdp468", "qcom,ipq5332";
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
ramoops@49c00000 {
compatible = "ramoops";
no-map;
reg = <0x0 0x49c00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
};
aliases { aliases {
serial0 = &blsp1_uart0; serial0 = &blsp1_uart0;
serial1 = &blsp1_uart1; serial1 = &blsp1_uart1;
@@ -143,26 +128,6 @@
blink_en = "enable"; blink_en = "enable";
active = "high"; active = "high";
}; };
qcom,port_ledinfo {
port@1 {
port = <2>;
led_source@0 {
source = <0>;
mode = "normal";
speed = "2500M";
active = "high";
blink_en = "enable";
};
led_source@1 {
source = <1>;
mode = "normal";
speed = "10M", "100M","1000M";
active = "high";
blink_en = "enable";
};
};
};
}; };
ess-switch1@1 { ess-switch1@1 {
@@ -199,26 +164,6 @@
}; };
}; };
qcom,port_ledinfo {
port@3 {
port = <3>;
led_source@0 {
source = <0>;
mode = "normal";
speed = "2500M";
active = "high";
blink_en = "enable";
};
led_source@1 {
source = <1>;
mode = "normal";
speed = "10M", "100M","1000M";
active = "high";
blink_en = "enable";
};
};
};
led_source@2 { led_source@2 {
source = <2>; source = <2>;
mode = "normal"; mode = "normal";

View File

@@ -1,956 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ5332 RDP442 board device tree source
*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include "ipq5332.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "ipq5332-default-memory.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ5332/RDP442/AP-MI01.3";
compatible = "zyxel,nwa50be", "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332-rdp442", "qcom,ipq5332";
#ifdef __IPQ_MEM_PROFILE_512_MB__
/* 512M Layout for IPQ5332 + QCN6432 + QCN6432
* +==========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +---------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4A900000 | 25MB |
* | data | | |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | data | 0x4C200000 | 17MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | M3 Dump | 0x4D300000 | 1MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | QDSS | 0x4D400000 | 1MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | CALDB | 0x4D500000 | 3MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | data | 0x4D800000 | 16MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | M3 Dump | 0x4E800000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | QDSS | 0x4E900000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | CALDB | 0x4EA00000 | 5MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | data | 0x4EF00000 | 16MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | M3 Dump | 0x4FF00000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | QDSS | 0x50000000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | CALDB | 0x50100000 | 5MB |
* +---------+--------------+-------------------------+
* | | | |
* | MLO | 0x50600000 | 12MB |
* +==================================================+
* | |
* | |
* | |
* | Rest of memory for Linux |
* | |
* | |
* | |
* +==================================================+
*/
reserved-memory {
/delete-node/ m3_dump@4cc00000;
/delete-node/ q6_etr_dump@1;
/delete-node/ mlo_global_mem_0@0x4db00000;
/delete-node/ wcnss@4a900000;
/delete-node/ q6_caldb_region@4ce00000;
q6_mem_regions: q6_mem_regions@4A900000 {
reg = <0x0 0x4a900000 0x0 0x5D00000>;
no-map;
};
q6_code_data: q6_code_data@4A900000 {
reg = <0x0 0x4a900000 0x0 0x1900000>;
no-map;
};
q6_ipq5332_data: q6_ipq5332_data@4C200000 {
reg = <0x0 0x4C200000 0x0 0x1100000>;
no-map;
};
m3_dump: m3_dump@4D300000 {
reg = <0x0 0x4D300000 0x0 0x100000>;
no-map;
};
q6_etr_region: q6_etr_dump@4D400000 {
reg = <0x0 0x4D400000 0x0 0x100000>;
no-map;
};
q6_ipq5332_caldb: q6_ipq5332_caldb@4D500000 {
reg = <0x0 0x4D500000 0x0 0x300000>;
no-map;
};
q6_qcn6432_data_1: q6_qcn6432_data_1@4D800000 {
reg = <0x0 0x4D800000 0x0 0x1000000>;
no-map;
};
m3_dump_qcn6432_1: m3_dump_qcn6432_1@4E800000 {
reg = <0x0 0x4E800000 0x0 0x100000>;
no-map;
};
q6_qcn6432_etr_1: q6_qcn6432_etr_1@4E900000 {
reg = <0x0 0x4E900000 0x0 0x100000>;
no-map;
};
q6_qcn6432_caldb_1: q6_qcn6432_caldb_1@4EA00000 {
reg = <0x0 0x4EA00000 0x0 0x500000>;
no-map;
};
q6_qcn6432_data_2: q6_qcn6432_data_2@4EF00000 {
reg = <0x0 0x4EF00000 0x0 0x1000000>;
no-map;
};
m3_dump_qcn6432_2: m3_dump_qcn6432_2@4FF00000 {
reg = <0x0 0x4FF00000 0x0 0x100000>;
no-map;
};
q6_qcn6432_etr_2: q6_qcn6432_etr_2@50000000 {
reg = <0x0 0x50000000 0x0 0x100000>;
no-map;
};
q6_qcn6432_caldb_2: q6_qcn6432_caldb_2@50100000 {
reg = <0x0 0x50100000 0x0 0x500000>;
no-map;
};
mlo_global_mem0: mlo_global_mem_0@50600000 {
reg = <0x0 0x50600000 0x0 0xC00000>;
no-map;
};
};
#else
/* 1G Layout for IPQ5332 + QCN6432 + QCN6432
* +==========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +---------+--------------+-------------------------+
* | Q6 | | |
* | code/ | 0x4A900000 | 25MB |
* | data | | |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | data | 0x4C200000 | 21MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | M3 Dump | 0x4D700000 | 1MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | QDSS | 0x4D800000 | 1MB |
* +---------+--------------+-------------------------+
* | IPQ5332 | | |
* | CALDB | 0x4D900000 | 5MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | data | 0x4DE00000 | 21MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | M3 Dump | 0x4F300000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | QDSS | 0x4F400000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_1| | |
* | CALDB | 0x4F500000 | 5MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | data | 0x4FA00000 | 21MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | M3 Dump | 0x50F00000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | QDSS | 0x51000000 | 1MB |
* +---------+--------------+-------------------------+
* |QCN6432_2| | |
* | CALDB | 0x51100000 | 5MB |
* +---------+--------------+-------------------------+
* | | | |
* | MLO | 0x51600000 | 12MB |
* +==================================================+
* | |
* | |
* | |
* | Rest of memory for Linux |
* | |
* | |
* | |
* +==================================================+
*/
reserved-memory {
/delete-node/ m3_dump@4cc00000;
/delete-node/ q6_etr_dump@1;
/delete-node/ mlo_global_mem_0@0x4db00000;
/delete-node/ wcnss@4a900000;
/delete-node/ q6_caldb_region@4ce00000;
ramoops@49c00000 {
compatible = "ramoops";
reg = <0x0 0x49c00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x20000>;
};
q6_mem_regions: q6_mem_regions@4A900000 {
no-map;
reg = <0x0 0x4a900000 0x0 0x6D00000>;
};
q6_code_data: q6_code_data@4A900000 {
no-map;
reg = <0x0 0x4a900000 0x0 0x1900000>;
};
q6_ipq5332_data: q6_ipq5332_data@4C200000 {
no-map;
reg = <0x0 0x4C200000 0x0 0x1500000>;
};
m3_dump: m3_dump@4D700000 {
no-map;
reg = <0x0 0x4D700000 0x0 0x100000>;
};
q6_etr_region: q6_etr_dump@4D800000 {
no-map;
reg = <0x0 0x4D800000 0x0 0x100000>;
};
q6_ipq5332_caldb: q6_ipq5332_caldb@4D900000 {
no-map;
reg = <0x0 0x4D900000 0x0 0x500000>;
};
q6_qcn6432_data_1: q6_qcn6432_data_1@4DE00000 {
no-map;
reg = <0x0 0x4DE00000 0x0 0x1500000>;
};
m3_dump_qcn6432_1: m3_dump_qcn6432_1@4F300000 {
no-map;
reg = <0x0 0x4F300000 0x0 0x100000>;
};
q6_qcn6432_etr_1: q6_qcn6432_etr_1@4F400000 {
no-map;
reg = <0x0 0x4F400000 0x0 0x100000>;
};
q6_qcn6432_caldb_1: q6_qcn6432_caldb_1@4F500000 {
no-map;
reg = <0x0 0x4F500000 0x0 0x500000>;
};
q6_qcn6432_data_2: q6_qcn6432_data_2@4FA00000 {
no-map;
reg = <0x0 0x4FA00000 0x0 0x1500000>;
};
m3_dump_qcn6432_2: m3_dump_qcn6432_2@50F00000 {
no-map;
reg = <0x0 0x50F00000 0x0 0x100000>;
};
q6_qcn6432_etr_2: q6_qcn6432_etr_2@51000000 {
no-map;
reg = <0x0 0x51000000 0x0 0x100000>;
};
q6_qcn6432_caldb_2: q6_qcn6432_caldb_2@51100000 {
no-map;
reg = <0x0 0x51100000 0x0 0x500000>;
};
mlo_global_mem0: mlo_global_mem_0@51600000 {
no-map;
reg = <0x0 0x51600000 0x0 0xC00000>;
};
};
#endif
aliases {
serial0 = &blsp1_uart0;
serial1 = &blsp1_uart1;
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
};
chosen {
stdout-path = "serial0";
};
soc@0 {
mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
/*gpio22 is for wan napa, gpio51 for lan napa*/
phy-reset-gpio = <&tlmm 51 GPIO_ACTIVE_LOW>;
status = "okay";
phy2: ethernet-phy@2 {
reg = <28>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_blue{
label = "led_blue";
gpio = <&tlmm 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_blue";
default-state = "off";
};
led_green {
label = "led_green";
gpio = <&tlmm 45 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_green";
default-state = "on";
};
led_white {
label = "led_white";
gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_white";
default-state = "off";
};
led_red {
label = "led_red";
gpio = <&tlmm 44 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_red";
default-state = "off";
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
status = "okay";
button@1 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
ess-instance {
ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x4>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */
switch_mac_mode = <0xf>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xc>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <2>;
phy_address = <28>;
};
};
qcom,port_ledinfo {
port@0 {
port = <2>;
led_source@0 {
source = <0>;
mode = "normal";
speed = "2500M";
active = "high";
blink_en = "enable";
};
led_source@1 {
source = <1>;
mode = "normal";
speed = "10M", "100M","1000M";
active = "high";
blink_en = "enable";
};
};
};
};
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a504000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <28>;
qcom,link-poll = <1>;
phy-mode = "sgmii";
};
nss-macsec0 {
compatible = "qcom,nss-macsec";
phy_addr = <28>;
mdiobus = <&mdio>;
};
/* EDMA host driver configuration for the board */
edma@3ab00000 {
qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
qcom,rx-queue-start = <0>; /* Rx queue start */
qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
<0 164 4>, /* Tx complete ring id #5 IRQ info */
<0 165 4>, /* Tx complete ring id #6 IRQ info */
<0 166 4>, /* Tx complete ring id #7 IRQ info */
<0 167 4>, /* Tx complete ring id #8 IRQ info */
<0 168 4>, /* Tx complete ring id #9 IRQ info */
<0 169 4>, /* Tx complete ring id #10 IRQ info */
<0 170 4>, /* Tx complete ring id #11 IRQ info */
<0 171 4>, /* Tx complete ring id #12 IRQ info */
<0 172 4>, /* Tx complete ring id #13 IRQ info */
<0 173 4>, /* Tx complete ring id #14 IRQ info */
<0 174 4>, /* Tx complete ring id #15 IRQ info */
<0 139 4>, /* Rx desc ring id #12 IRQ info */
<0 140 4>, /* Rx desc ring id #13 IRQ info */
<0 141 4>, /* Rx desc ring id #14 IRQ info */
<0 142 4>, /* Rx desc ring id #15 IRQ info */
<0 191 4>, /* Misc error IRQ info */
<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
};
wsi: wsi {
id = <0>;
num_chip = <2>;
chip_info = <0 1 1>,
<1 1 0>;
};
q6v5_wcss: remoteproc@d100000 {
boot-args = <0x1 0x4 0x3 0x0 0x26 0x2>,
<0x1 0x4 0x4 0x1 0x2f 0x2>;
memory-region = <&q6_mem_regions>;
/delete-node/ remoteproc_pd1;
/delete-node/ remoteproc_pd2;
/delete-node/ remoteproc_pd3;
q6_wcss_pd4: remoteproc_pd4 {
compatible = "qcom,ipq5332-mpd-upd-text";
firmware = "IPQ5332/q6_fw4.mdt";
q6_wcss_pd1: remoteproc_pd1 {
compatible = "qcom,ipq5332-wcss-ahb-mpd";
firmware = "IPQ5332/q6_fw1.mdt";
m3_firmware = "IPQ5332/iu_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_ipq5332_data>,
<&m3_dump>,
<&q6_etr_region>,
<&q6_ipq5332_caldb>;
};
q6_wcss_pd2: remoteproc_pd2 {
compatible = "qcom,ipq5332-wcss-pcie-mpd";
firmware = "IPQ5332/q6_fw2.mdt";
m3_firmware = "qcn6432/iu_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_qcn6432_data_1>,
<&m3_dump_qcn6432_1>,
<&q6_qcn6432_etr_1>,
<&q6_qcn6432_caldb_1>;
status = "okay";
};
q6_wcss_pd3: remoteproc_pd3 {
compatible = "qcom,ipq5332-wcss-pcie-mpd";
firmware = "IPQ5332/q6_fw3.mdt";
interrupts-extended = <&wcss_smp2p_in 24 0>,
<&wcss_smp2p_in 25 0>,
<&wcss_smp2p_in 28 0>,
<&wcss_smp2p_in 27 0>;
interrupt-names = "fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
memory-region = <&q6_qcn6432_data_2>,
<&m3_dump_qcn6432_2>,
<&q6_qcn6432_etr_2>,
<&q6_qcn6432_caldb_2>;
status = "okay";
};
};
};
};
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_uart1 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "disabled";
};
&blsp1_i2c1 {
clock-frequency = <400000>;
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "disabled";
};
&blsp1_spi0 {
pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "n25q128a11", "micron,n25q128a11", "jedec,spi-nor";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
};
};
&sdhc {
bus-width = <4>;
max-frequency = <192000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
status = "disabled";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo {
clock-frequency = <24000000>;
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qspi_default_state>;
pinctrl-names = "default";
status = "okay";
nandcs@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
/* PINCTRL */
&tlmm {
led_pins: led_pins {
board_info {
pins = "gpio2", "gpio3";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
input-enable;
};
apd_dc_in {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down; //Adapter un-plug
input-enable;
};
poe_status {
pins = "gpio34";
function = "gpio";
drive-strength = <8>;
bias-pull-up; //AF
input-enable;
};
/* To MR pin */
rst_mb {
pins = "gpio29";
function = "gpio";
drive-strength = <8>;
output-high;
};
led_blue {
pins = "gpio22";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green {
pins = "gpio45";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_white {
pins = "gpio43";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red {
pins = "gpio44";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
qspi_default_state: qspi-default-state {
qspi_clock {
pins = "gpio13";
function = "qspi_clk";
drive-strength = <8>;
bias-pull-down;
};
qspi_cs {
pins = "gpio12";
function = "qspi_cs";
drive-strength = <8>;
bias-pull-up;
};
qspi_data {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "qspi_data";
drive-strength = <8>;
bias-pull-down;
};
};
serial_1_pins: serial1-pinmux {
pins = "gpio33", "gpio34", "gpio35", "gpio36";
function = "blsp1_uart2";
drive-strength = <8>;
bias-pull-up;
};
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";
function = "blsp1_i2c0";
drive-strength = <8>;
bias-pull-up;
};
button_pins: button-state {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
pwm_pins: pwm-state {
pins = "gpio46";
function = "pwm0";
drive-strength = <8>;
};
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio13";
function = "sdc_clk";
drive-strength = <8>;
bias-disable;
};
cmd-pins {
pins = "gpio12";
function = "sdc_cmd";
drive-strength = <8>;
bias-pull-up;
};
data-pins {
pins = "gpio8", "gpio9", "gpio10", "gpio11";
function = "sdc_data";
drive-strength = <8>;
bias-pull-up;
};
};
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-down;
};
spi_0_cs_pins: spi-0-cs-state {
pins = "gpio17";
function = "blsp0_spi";
drive-strength = <2>;
bias-pull-up;
};
mdio1_pins: mdio1-state {
mux_0 {
pins = "gpio27";
function = "mdc1";
drive-strength = <2>;
bias-pull-up;
};
mux_1 {
pins = "gpio28";
function = "mdio1";
drive-strength = <2>;
bias-pull-up;
};
};
};
&license_manager {
status = "okay";
};
&usb3 {
qcom,select-utmi-as-pipe-clk;
status = "okay";
dwc3@8a00000 {
/delete-property/ #phy-cells;
/delete-property/ phys;
/delete-property/ phy-names;
};
};
&pwm {
pinctrl-0 = <&pwm_pins>;
pinctrl-names = "default";
status = "okay";
};
&hs_m31phy_0 {
status = "okay";
};
&wifi0 {
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd1>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,bdf-addr = <0x4C200000 0x4C200000 0x4C200000 0x0 0x0 0x0>;
qcom,caldb-addr = <0x4D900000 0x4D500000 0x0 0x0 0x0 0x0>;
#ifdef __IPQ_MEM_PROFILE_512_MB__
qcom,tgt-mem-mode = <1>;
qcom,caldb-size = <0x300000>;
#else
qcom,tgt-mem-mode = <0>;
qcom,caldb-size = <0x500000>;
#endif
qcom,board_id = <0x12>;
#if defined(__CNSS2__)
mem-region = <&q6_ipq5332_data>;
#else
memory-region = <&q6_ipq5332_data>;
#endif
qcom,wsi = <&wsi>;
qcom,wsi_index = <0>;
status = "okay";
};
&wifi1 {
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd2>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,bdf-addr = <0x4DE00000 0x4D800000 0x0 0x0 0x0 0x0>;
qcom,caldb-addr = <0x4F500000 0x4EA00000 0x0 0x0 0x0 0x0>;
qcom,umac-irq-reset-addr = <0x20000884>;
qcom,caldb-size = <0x500000>;
#ifdef __IPQ_MEM_PROFILE_512_MB__
qcom,tgt-mem-mode = <1>;
#else
qcom,tgt-mem-mode = <0>;
#endif
qcom,board_id = <0x060>;
#if defined(__CNSS2__)
mem-region = <&q6_qcn6432_data_1>;
#else
memory-region = <&q6_qcn6432_data_1>;
#endif
qcom,wsi = <&wsi>;
qcom,wsi_index = <1>;
status = "disabled";
interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "umac_reset";
};
&wifi2 {
qcom,multipd_arch;
qcom,rproc = <&q6_wcss_pd3>;
qcom,rproc_rpd = <&q6v5_wcss>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,bdf-addr = <0x4FA00000 0x4EF00000 0x4FA00000 0x0 0x0 0x0>;
qcom,caldb-addr = <0x51100000 0x50100000 0x51100000 0x0 0x0 0x0>;
qcom,umac-irq-reset-addr = <0x18000884>;
qcom,caldb-size = <0x500000>;
#ifdef __IPQ_MEM_PROFILE_512_MB__
qcom,tgt-mem-mode = <1>;
#else
qcom,tgt-mem-mode = <0>;
#endif
qcom,board_id = <0x070>;
#if defined(__CNSS2__)
mem-region = <&q6_qcn6432_data_2>;
#else
memory-region = <&q6_qcn6432_data_2>;
#endif
qcom,wsi = <&wsi>;
qcom,wsi_index = <1>;
qcom,wide_band = <1>;
status = "okay";
interrupts = <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "umac_reset";
};

View File

@@ -52,19 +52,6 @@ define Device/edgecore_eap105
endef endef
TARGET_DEVICES += edgecore_eap105 TARGET_DEVICES += edgecore_eap105
define Device/emplus_wap7635
DEVICE_TITLE := EMPLUS WAP7635
DEVICE_DTS := ipq5332-emplus-wap7635
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_CONFIG := config@mi01.6
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
IMAGE/nand-factory.ubi := append-ubi
DEVICE_PACKAGES := ath12k-wifi-emplus-wap7635 ath12k-firmware-qcn92xx ath12k-firmware-ipq5332
endef
TARGET_DEVICES += emplus_wap7635
define Device/sonicfi_rap7110c_341x define Device/sonicfi_rap7110c_341x
DEVICE_TITLE := SONICFI RAP7110C-341X DEVICE_TITLE := SONICFI RAP7110C-341X
DEVICE_DTS := ipq5332-sonicfi-rap7110c-341x DEVICE_DTS := ipq5332-sonicfi-rap7110c-341x
@@ -162,22 +149,6 @@ define Device/zyxel_nwa130be
endef endef
TARGET_DEVICES += zyxel_nwa130be TARGET_DEVICES += zyxel_nwa130be
define Device/zyxel_nwa50be
DEVICE_TITLE := Zyxel NWA50BE
DEVICE_DTS := ipq5332-zyxel-nwa50be
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_CONFIG := config@mi01.3
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
IMAGE/nand-factory.ubi := append-ubi
DEVICE_PACKAGES := ath12k-wifi-zyxel-nwa50be ath12k-firmware-ipq5332-peb-peb -ath12k-firmware-qcn92xx
endef
TARGET_DEVICES += zyxel_nwa50be
define Device/cig_wf672 define Device/cig_wf672
DEVICE_TITLE := CIG WF672 DEVICE_TITLE := CIG WF672
DEVICE_DTS := ipq5332-cig-wf672 DEVICE_DTS := ipq5332-cig-wf672

View File

@@ -1,33 +0,0 @@
From f7b27331b915477cd289c37b56efb0d28b2d6f38 Mon Sep 17 00:00:00 2001
From: Antonio Wu <antonio.wu@cybertan.com.tw>
Date: Tue, 5 Aug 2025 10:39:58 +0000
Subject: [PATCH] Add IPQ_MEM_PROFILE in arm64 kconfig
---
arch/arm64/Kconfig | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 702a289..7864e79 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2143,6 +2143,16 @@ config STACKPROTECTOR_PER_TASK
def_bool y
depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_SYSREG
+config IPQ_MEM_PROFILE
+ int "Select Memory Profile"
+ range 0 1024
+ default 0
+ help
+ This option select memory profile to be used, which defines
+ the reserved memory configuration used in device tree.
+
+ If unsure, say 0
+
# The GPIO number here must be sorted by descending number. In case of
# a multiplatform kernel, we just want the highest value required by the
# selected platforms.
--
2.17.1

View File

@@ -1,63 +0,0 @@
Index: backports-6.5-rc3/drivers/net/wireless/ath/ath12k/thermal.h
===================================================================
--- backports-6.5-rc3.orig/drivers/net/wireless/ath/ath12k/thermal.h
+++ backports-6.5-rc3/drivers/net/wireless/ath/ath12k/thermal.h
@@ -13,35 +13,35 @@
/* Below temperatures are in celsius */
#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
-#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 115
+#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 125
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 110
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 30
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 50
+#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 70
-#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE 0
+#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE 20
+#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE 40
+#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE 80
+#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE 100
#define THERMAL_CONFIG_POUT0 0
#define THERMAL_CONFIG_POUT1 12

View File

@@ -1,57 +0,0 @@
--- a/drivers/net/wireless/ath/ath12k/thermal.h
+++ b/drivers/net/wireless/ath/ath12k/thermal.h
@@ -13,34 +13,34 @@
/* Below temperatures are in celsius */
#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 110
#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
-#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 110
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 110
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 30
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 50
+#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 70
#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
#define THERMAL_CONFIG_POUT0 0

View File

@@ -1,74 +0,0 @@
From 357da3320f8bcad056b905fb85cad3a29c343d31 Mon Sep 17 00:00:00 2001
From: YenLin Pan <yenlin.pan@zyxel.com.tw>
Date: Tue, 12 Aug 2025 15:41:39 +0800
Subject: [PATCH] thermal: thermal setting
lo0 -100 -hi0 105 -off0 0
lo1 95 -hi1 110 -off1 20
lo2 100 -hi2 115 -off2 60
lo3 105 -hi3 119 -off3 98
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
---
drivers/net/wireless/ath/ath12k/thermal.h | 34 +++++++++++------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
index 5c91906..e81f9a4 100644
--- a/drivers/net/wireless/ath/ath12k/thermal.h
+++ b/drivers/net/wireless/ath/ath12k/thermal.h
@@ -13,34 +13,34 @@
/* Below temperatures are in celsius */
#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
+#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105
#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110
#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
-#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
+#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 119
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 105
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 119
#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 20
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 60
+#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 98
#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
+#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
#define THERMAL_CONFIG_POUT0 0
--
2.34.1

View File

@@ -100,7 +100,6 @@ endif
ifdef CONFIG_TARGET_PROFILE ifdef CONFIG_TARGET_PROFILE
TARGET_PROFILE=$(subst ",,$(CONFIG_TARGET_PROFILE)) TARGET_PROFILE=$(subst ",,$(CONFIG_TARGET_PROFILE))
PATCH_PROFILE_NAME=patches-$(subst DEVICE_,,$(TARGET_PROFILE)) PATCH_PROFILE_NAME=patches-$(subst DEVICE_,,$(TARGET_PROFILE))
FILES_PROFILE_NAME=files-$(subst DEVICE_,,$(TARGET_PROFILE))
endif endif
QCASSDK_CONFIG_OPTS+= TOOL_PATH=$(TOOLCHAIN_BIN_PATH) \ QCASSDK_CONFIG_OPTS+= TOOL_PATH=$(TOOLCHAIN_BIN_PATH) \
@@ -203,15 +202,6 @@ define patch_profile
$(call PatchDir/Default,$(PKG_BUILD_DIR),./$(PATCH_PROFILE_NAME)) $(call PatchDir/Default,$(PKG_BUILD_DIR),./$(PATCH_PROFILE_NAME))
endef endef
define files_profile
if [ -d "./$(FILES_PROFILE_NAME)" ]; then \
$(CP) ./$(FILES_PROFILE_NAME)/* ./files/ ; \
fi
endef
Hooks/Prepare/Post += patch_profile Hooks/Prepare/Post += patch_profile
Hooks/Prepare/Post += files_profile
$(eval $(call KernelPackage,qca-ssdk-qca-nohnat)) $(eval $(call KernelPackage,qca-ssdk-qca-nohnat))
$(eval $(call KernelPackage,qca-ssdk-qca-hnat)) $(eval $(call KernelPackage,qca-ssdk-qca-hnat))

View File

@@ -1,317 +0,0 @@
#!/bin/sh /etc/rc.common
# Copyright (c) 2018, 2021, The Linux Foundation. All rights reserved.
# Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
START=16
#!/bin/sh
ruletype="ip4 ip6"
side="wan lan"
qwan="1 3 2 0 5 7 6 4"
qlan="0 1 2 3 4 5 6 7"
function create_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
#echo $queue
#echo "creating list $listid"
ssdk_sh acl list create $listid 255
ruleid=0
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule add $listid $ruleid 1 n 0 0"
#echo $cmd
if [ "$rt" == "ip4" ];then
cmd="$cmd ip4 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
else
cmd="$cmd ip6 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
fi
if [ $ruleid -le 3 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
elif [ $ruleid -le 7 ];then
#zero dscp
cmd="$cmd n"
elif [ $ruleid -le 11 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
else
#zero dscp
cmd="$cmd n"
fi
p=$((ruleid/2))
cmd="$cmd y mask $((ruleid%2)) 0x1 y mask $((p%2)) 0x1 n n n n n n n n n n n n n n n y n n n n n n n y $qid n n 0 0 n n n n n n n n n n n n n n n n n n n n 0"
#echo $cmd
$cmd
ruleid=`expr $ruleid + 1`
done
done
ssdk_sh acl list bind $listid 0 1 $portmap
done
}
function create_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 0
ssdk_sh cosmap pri2q set 3 0
ssdk_sh cosmap pri2q set 4 1
ssdk_sh cosmap pri2q set 5 1
ssdk_sh cosmap pri2q set 6 1
ssdk_sh cosmap pri2q set 7 1
ssdk_sh cosmap pri2ehq set 0 0
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 0
ssdk_sh cosmap pri2ehq set 3 0
ssdk_sh cosmap pri2ehq set 4 1
ssdk_sh cosmap pri2ehq set 5 1
ssdk_sh cosmap pri2ehq set 6 1
ssdk_sh cosmap pri2ehq set 7 1
}
function create_acl_byp_egstp_rules(){
chip_ver=$1
cmd="ssdk_sh servcode config set 1 n 0 0xfffefc7f 0xffbdff 0 0 0 0 0 0"
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
cmd="$cmd 0"
fi
#echo $cmd
$cmd
ssdk_sh acl list create 56 48
#action bypass eg stp check
action="y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n n n n n n n"
if [ "$chip_ver" == "0x2000" ]; then
action="$action n n 0"
elif [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
action="$action n n n 0"
else
action="$action 0"
fi
for ruleid in $( seq 0 2 )
do
if [ "$ruleid" == "0" ];then
cmd="ssdk_sh acl rule add 56 0 1 n 0 0 mac n n n n n y 01-80-c2-00-00-00 ff-ff-ff-ff-ff-ff n n n n n n n n n n n n n n n n n n n n n n n"
elif [ "$ruleid" == "1" ];then
cmd="ssdk_sh acl rule add 56 1 1 n 0 0 mac n n n n n n n yes 0x8809 0xffff n n n n n n n n n n n n n n n n n n n n n"
else
cmd="ssdk_sh acl rule add 56 2 1 n 0 0 mac n n n n n n n yes 0x888e 0xffff n n n n n n n n n n n n n n n n n n n n n"
fi
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
cmd="$cmd n $action"
else
cmd="$cmd $action"
fi
#echo $cmd
$cmd
done
ssdk_sh acl list bind 56 0 2 1
}
function delete_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
ssdk_sh acl list unbind $listid 0 1 $portmap
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule del $listid 0 1"
echo $cmd
$cmd
done
done
#echo "deleting list $listid"
ssdk_sh acl list destroy $listid
done
}
function delete_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 1
ssdk_sh cosmap pri2q set 3 1
ssdk_sh cosmap pri2q set 4 2
ssdk_sh cosmap pri2q set 5 2
ssdk_sh cosmap pri2q set 6 3
ssdk_sh cosmap pri2q set 7 3
ssdk_sh cosmap pri2ehq set 0 1
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 2
ssdk_sh cosmap pri2ehq set 3 2
ssdk_sh cosmap pri2ehq set 4 3
ssdk_sh cosmap pri2ehq set 5 3
ssdk_sh cosmap pri2ehq set 6 4
ssdk_sh cosmap pri2ehq set 7 5
}
function delete_acl_byp_egstp_rules(){
chip_ver=$1
cmd="ssdk_sh servcode config set 1 n 0 0xfffefcff 0xffbfff 0 0 0 0 0 0"
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
cmd="$cmd 0"
fi
#echo $cmd
$cmd
ssdk_sh acl list unbind 56 0 2 1
ssdk_sh acl rule del 56 0 1
ssdk_sh acl rule del 56 1 1
ssdk_sh acl rule del 56 2 1
ssdk_sh acl list destroy 56
}
function edma_war_config_add(){
create_war_cosmap
ssdk_sh acl status set enable
create_war_acl_rules
}
function edma_war_config_del(){
delete_war_acl_rules
delete_war_cosmap
}
function ipq50xx_serdes_monitor () {
#if qca808x phy exist, need to monitor the serdes to avoid the effect for WIFI
port_id=2
old_linkstatus="DISABLE"
phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd101" ]; then
ssdk_sh debug phy set 29 0xb 0x300d
ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
while true
do
cur_linkstatus=`ssdk_sh port linkstatus get $port_id | grep Status | awk -F ':' '{print $2}'`
#when qca808x phy link status is from down to up, serdes tx would be enabled
if [ "$cur_linkstatus" = "ENABLE" ] && [ "$old_linkstatus" = "DISABLE" ]; then
ssdk_sh debug phy set 29 0xb 0xb00d
ssdk_sh debug uniphy set 0 0x7ac 0xb00d 4
fi
#when qca808x phy link status is from up to down, serdes tx would be disabled
if [ "$cur_linkstatus" = "DISABLE" ] && [ "$old_linkstatus" = "ENABLE" ]; then
ssdk_sh debug phy set 29 0xb 0x300d
ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
fi
old_linkstatus=$cur_linkstatus
done
fi
}
function ipq53xx_phy_amplitude_set () {
#for qca808x phy sgmii, set half amplitude with src_half_swing register
port_id=2
phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd180" ]; then
ssdk_sh debug phy set 5 0x40010087 0x208a
ssdk_sh debug phy set 6 0x40010087 0x208a
#Set the Reg0x67 bits[7:5]=3b000 and bit4=1b1
ampl_val=$(eval "ssdk_sh debug phy get 5 0x40010067 | grep SSDK | grep -oE '0x[0-9a-fA-F]+' | sed 's/\(0x..\)./\11/'")
ssdk_sh debug phy set 5 0x40010067 $ampl_val
ampl_val=$(eval "ssdk_sh debug phy get 6 0x40010067 | grep SSDK | grep -oE '0x[0-9a-fA-F]+' | sed 's/\(0x..\)./\11/'")
ssdk_sh debug phy set 6 0x40010067 $ampl_val
fi
}
function ipq53xx_uniphy_amplitude_set () {
#for ipq50xx sgmii, set half amplitude with tx_emp_lvl/margin_index and tx_margin
ssdk_sh debug uniphy set 0 0x7ac 0xb10d 4
ssdk_sh debug uniphy set 0 0x24 0 4
ssdk_sh debug uniphy set 1 0x7ac 0xb10d 4
ssdk_sh debug uniphy set 1 0x24 0 4
}
ssdk_dependency() {
counter=0
[ -e /lib/modules/$(uname -r)/qca-ssdk.ko ] && [ ! -d /sys/module/qca_ssdk ] && {
insmod qca-ssdk.ko
}
while [ ! -d /sys/ssdk ] && [ "$counter" -le 5 ]
do
sleep 1
counter=$((counter+1))
done
}
start() {
ssdk_dependency
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to enable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_add
echo ''
fi
#The following commands should be uncommented to add acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
#create_acl_byp_egstp_rules $chip_ver
echo ''
fi
#The following commands should be uncommented to enable WAR for ipq50xx
chip_type_info=`cat tmp/sysinfo/model`
result=$(echo $chip_type_info | grep "IPQ5018")
if [ "$result" != "" ]; then
#ipq50xx_serdes_monitor &
#ipq50xx_uniphy_amplitude_set
#ipq50xx_phy_amplitude_set
echo ''
fi
if [ "$chip_ver" = "0x2001" ]; then
ipq53xx_uniphy_amplitude_set
ipq53xx_phy_amplitude_set
echo ''
fi
echo starting
}
stop() {
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to disable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_del
echo ''
fi
#The following commands should be uncommented to delete acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
#delete_acl_byp_egstp_rules $chip_ver
echo ''
fi
echo stoping
}

View File

@@ -1,315 +0,0 @@
#!/bin/sh /etc/rc.common
# Copyright (c) 2018, 2021, The Linux Foundation. All rights reserved.
# Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
START=16
#!/bin/sh
ruletype="ip4 ip6"
side="wan lan"
qwan="1 3 2 0 5 7 6 4"
qlan="0 1 2 3 4 5 6 7"
function create_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
#echo $queue
#echo "creating list $listid"
ssdk_sh acl list create $listid 255
ruleid=0
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule add $listid $ruleid 1 n 0 0"
#echo $cmd
if [ "$rt" == "ip4" ];then
cmd="$cmd ip4 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
else
cmd="$cmd ip6 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
fi
if [ $ruleid -le 3 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
elif [ $ruleid -le 7 ];then
#zero dscp
cmd="$cmd n"
elif [ $ruleid -le 11 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
else
#zero dscp
cmd="$cmd n"
fi
p=$((ruleid/2))
cmd="$cmd y mask $((ruleid%2)) 0x1 y mask $((p%2)) 0x1 n n n n n n n n n n n n n n n y n n n n n n n y $qid n n 0 0 n n n n n n n n n n n n n n n n n n n n 0"
#echo $cmd
$cmd
ruleid=`expr $ruleid + 1`
done
done
ssdk_sh acl list bind $listid 0 1 $portmap
done
}
function create_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 0
ssdk_sh cosmap pri2q set 3 0
ssdk_sh cosmap pri2q set 4 1
ssdk_sh cosmap pri2q set 5 1
ssdk_sh cosmap pri2q set 6 1
ssdk_sh cosmap pri2q set 7 1
ssdk_sh cosmap pri2ehq set 0 0
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 0
ssdk_sh cosmap pri2ehq set 3 0
ssdk_sh cosmap pri2ehq set 4 1
ssdk_sh cosmap pri2ehq set 5 1
ssdk_sh cosmap pri2ehq set 6 1
ssdk_sh cosmap pri2ehq set 7 1
}
function create_acl_byp_egstp_rules(){
chip_ver=$1
cmd="ssdk_sh servcode config set 1 n 0 0xfffefc7f 0xffbdff 0 0 0 0 0 0"
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
cmd="$cmd 0"
fi
#echo $cmd
$cmd
ssdk_sh acl list create 56 48
#action bypass eg stp check
action="y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n n n n n n n"
if [ "$chip_ver" == "0x2000" ]; then
action="$action n n 0"
elif [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
action="$action n n n 0"
else
action="$action 0"
fi
for ruleid in $( seq 0 2 )
do
if [ "$ruleid" == "0" ];then
cmd="ssdk_sh acl rule add 56 0 1 n 0 0 mac n n n n n y 01-80-c2-00-00-00 ff-ff-ff-ff-ff-ff n n n n n n n n n n n n n n n n n n n n n n n"
elif [ "$ruleid" == "1" ];then
cmd="ssdk_sh acl rule add 56 1 1 n 0 0 mac n n n n n n n yes 0x8809 0xffff n n n n n n n n n n n n n n n n n n n n n"
else
cmd="ssdk_sh acl rule add 56 2 1 n 0 0 mac n n n n n n n yes 0x888e 0xffff n n n n n n n n n n n n n n n n n n n n n"
fi
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
cmd="$cmd n $action"
else
cmd="$cmd $action"
fi
#echo $cmd
$cmd
done
ssdk_sh acl list bind 56 0 2 1
}
function delete_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
ssdk_sh acl list unbind $listid 0 1 $portmap
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule del $listid 0 1"
echo $cmd
$cmd
done
done
#echo "deleting list $listid"
ssdk_sh acl list destroy $listid
done
}
function delete_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 1
ssdk_sh cosmap pri2q set 3 1
ssdk_sh cosmap pri2q set 4 2
ssdk_sh cosmap pri2q set 5 2
ssdk_sh cosmap pri2q set 6 3
ssdk_sh cosmap pri2q set 7 3
ssdk_sh cosmap pri2ehq set 0 1
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 2
ssdk_sh cosmap pri2ehq set 3 2
ssdk_sh cosmap pri2ehq set 4 3
ssdk_sh cosmap pri2ehq set 5 3
ssdk_sh cosmap pri2ehq set 6 4
ssdk_sh cosmap pri2ehq set 7 5
}
function delete_acl_byp_egstp_rules(){
chip_ver=$1
cmd="ssdk_sh servcode config set 1 n 0 0xfffefcff 0xffbfff 0 0 0 0 0 0"
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
cmd="$cmd 0"
fi
#echo $cmd
$cmd
ssdk_sh acl list unbind 56 0 2 1
ssdk_sh acl rule del 56 0 1
ssdk_sh acl rule del 56 1 1
ssdk_sh acl rule del 56 2 1
ssdk_sh acl list destroy 56
}
function edma_war_config_add(){
create_war_cosmap
ssdk_sh acl status set enable
create_war_acl_rules
}
function edma_war_config_del(){
delete_war_acl_rules
delete_war_cosmap
}
function ipq50xx_serdes_monitor () {
#if qca808x phy exist, need to monitor the serdes to avoid the effect for WIFI
port_id=2
old_linkstatus="DISABLE"
phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd101" ]; then
ssdk_sh debug phy set 29 0xb 0x300d
ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
while true
do
cur_linkstatus=`ssdk_sh port linkstatus get $port_id | grep Status | awk -F ':' '{print $2}'`
#when qca808x phy link status is from down to up, serdes tx would be enabled
if [ "$cur_linkstatus" = "ENABLE" ] && [ "$old_linkstatus" = "DISABLE" ]; then
ssdk_sh debug phy set 29 0xb 0xb00d
ssdk_sh debug uniphy set 0 0x7ac 0xb00d 4
fi
#when qca808x phy link status is from up to down, serdes tx would be disabled
if [ "$cur_linkstatus" = "DISABLE" ] && [ "$old_linkstatus" = "ENABLE" ]; then
ssdk_sh debug phy set 29 0xb 0x300d
ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
fi
old_linkstatus=$cur_linkstatus
done
fi
}
function ipq53xx_phy_amplitude_set () {
#PHY (8081->5321): Full amplitude (bit[7:5]=000), half swing (bit[4]=1)
#for qca808x phy sgmii, set half amplitude with src_half_swing register
port_id=2
phy_addr=0x1d
phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd101" ]; then
ssdk_sh debug phy set $phy_addr 0x40010087 0x208a
#Set the Reg0x67 bits[7:5]=3b000 and bit4=1b1
ampl_val=$(ssdk_sh debug phy get $phy_addr 0x40010067 | grep SSDK | grep -oE '0x[0-9a-fA-F]+' | sed 's/\(0x..\)./\11/')
ssdk_sh debug phy set $phy_addr 0x40010067 $ampl_val
fi
}
function ipq53xx_uniphy_amplitude_set () {
#UniPhy (5321->8081): Custom amplitude (bit[8:4]=21) = 0xb15d
#for ipq53xx sgmii, set half amplitude with tx_emp_lvl/margin_index and tx_margin
ssdk_sh debug uniphy set 1 0x7ac 0xb15d 4
ssdk_sh debug uniphy set 1 0x24 0 4
}
ssdk_dependency() {
counter=0
[ -e /lib/modules/$(uname -r)/qca-ssdk.ko ] && [ ! -d /sys/module/qca_ssdk ] && {
insmod qca-ssdk.ko
}
while [ ! -d /sys/ssdk ] && [ "$counter" -le 5 ]
do
sleep 1
counter=$((counter+1))
done
}
start() {
ssdk_dependency
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to enable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_add
echo ''
fi
#The following commands should be uncommented to add acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
#create_acl_byp_egstp_rules $chip_ver
echo ''
fi
#The following commands should be uncommented to enable WAR for ipq50xx
chip_type_info=`cat tmp/sysinfo/model`
result=$(echo $chip_type_info | grep "IPQ5018")
if [ "$result" != "" ]; then
#ipq50xx_serdes_monitor &
#ipq50xx_uniphy_amplitude_set
#ipq50xx_phy_amplitude_set
echo ''
fi
if [ "$chip_ver" = "0x2001" ]; then
ipq53xx_uniphy_amplitude_set
ipq53xx_phy_amplitude_set
echo ''
fi
echo starting
}
stop() {
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to disable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_del
echo ''
fi
#The following commands should be uncommented to delete acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
#delete_acl_byp_egstp_rules $chip_ver
echo ''
fi
echo stoping
}

View File

@@ -20,16 +20,10 @@ copy_certificates() {
[ -z "$country" ] && country=US [ -z "$country" ] && country=US
echo "options cfg80211 ieee80211_regdom="$country > /etc/modules.conf echo "options cfg80211 ieee80211_regdom="$country > /etc/modules.conf
echo -n $country > /etc/ucentral/country echo -n $country > /etc/ucentral/country
sync
exit 0 exit 0
} }
boot() { boot() {
case "$(board_name)" in
sonicfi,rap6*)
touch /tmp/squashfs
;;
esac
[ -f /etc/ucentral/key.pem ] && return [ -f /etc/ucentral/key.pem ] && return
/usr/bin/mount_certs /usr/bin/mount_certs
copy_certificates copy_certificates

View File

@@ -6,16 +6,13 @@ check_certificates() {
check_certificates check_certificates
tar_part_lookup() { bootconfig_lookup() {
part="$(fw_printenv -n cert_part)" case "$(fw_printenv -n cert_part)" in
if [ "$part" -eq 0 ]; then 0) echo "0:BOOTCONFIG"
echo "$2" ;;
part=1 1) echo "0:BOOTCONFIG1"
else ;;
echo "$1" esac
part=0
fi
fw_setenv cert_part $part
} }
. /lib/functions.sh . /lib/functions.sh
@@ -37,29 +34,12 @@ sonicfi,rap7*)
mtd=$(find_mtd_index certificates) mtd=$(find_mtd_index certificates)
[ -n "$mtd" ] && mount -t ext4 /dev/mtdblock$mtd /certificates [ -n "$mtd" ] && mount -t ext4 /dev/mtdblock$mtd /certificates
fi fi
;; if [ ! -f /certificates/cert.pem ] || [ ! -f /certificates/key.pem ]; then
sonicfi,rap6*) bootconfig=$(bootconfig_lookup)
mtd=$(find_mtd_index certificates) if [ -n "$bootconfig" ]; then
if [ "$(head -c 4 /dev/mtd$mtd)" == "hsqs" ]; then mmc_dev=$(echo $(find_mmc_part "$bootconfig") | sed 's/^.\{5\}//')
mount -t squashfs /dev/mtdblock$mtd /mnt [ -n "$mmc_dev" ] && tar xf /dev/$mmc_dev -C /certificates
cp /mnt/* /certificates
umount /mnt
fi fi
mtd=$(find_mtd_index devinfo)
[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
;;
udaya,a5-id2|\
yuncore,ax820)
mtd=$(find_mtd_index certificates)
if [ "$(head -c 4 /dev/mtd$mtd)" == "hsqs" ]; then
mount -t squashfs /dev/mtdblock$mtd /mnt
cp /mnt/* /certificates
umount /mnt
fi
part=$(tar_part_lookup "insta1" "insta2")
if [ -n "insta" ]; then
mtd=$(find_mtd_index $part)
[ -n "$mtd" ] && tar xf /dev/mtdblock$mtd -C /certificates
fi fi
;; ;;
*) *)

View File

@@ -1,36 +1,25 @@
#!/bin/sh #!/bin/sh
tar_part_lookup() { bootconfig_lookup() {
part="$(fw_printenv -n cert_part)" bootconfig="$(fw_printenv -n cert_part)"
if [ "$part" -eq 0 ]; then case "$(fw_printenv -n cert_part)" in
echo "$2" 0) echo "0:BOOTCONFIG1"
part=1 bootconfig=1
else ;;
echo "$1" *) echo "0:BOOTCONFIG"
part=0 bootconfig=0
fi ;;
fw_setenv cert_part $part esac
fw_setenv cert_part $bootconfig
} }
. /lib/functions.sh . /lib/functions.sh
case "$(board_name)" in case "$(board_name)" in
udaya,a5-id2|\ sonicfi,rap7110c-341x)
yuncore,ax820)
cd /certificates cd /certificates
tar cf /tmp/certs.tar . tar cf /tmp/certs.tar
part=$(tar_part_lookup "insta1" "insta2") bootconfig=$(bootconfig_lookup)
mtd=$(find_mtd_index $part) mmc_dev=$(echo $(find_mmc_part $bootconfig) | sed 's/^.\{5\}//')
dd if=/tmp/certs.tar of=/dev/mtdblock$mtd dd if=/tmp/certs.tar of=/dev/$bootconfig
;;
sonicfi,rap6*)
if [ "$(fw_printenv -n store_certs_disabled)" != "1" ]; then
cd /certificates
tar cf /tmp/certs.tar .
mtd=$(find_mtd_index devinfo)
block_size=$(cat /sys/class/mtd/mtd$mtd/size)
dd if=/tmp/certs.tar of=/tmp/certs_pad.tar bs=$block_size conv=sync
mtd write /tmp/certs_pad.tar /dev/mtd$mtd
rm -f /tmp/certs.tar /tmp/certs_pad.tar
fi
;; ;;
esac esac

View File

@@ -22,19 +22,6 @@ start_service() {
[ "$valid" == "true" ] || [ "$valid" == "true" ] ||
/usr/share/ucentral/ucentral.uc /etc/ucentral/ucentral.cfg.0000000001 > /dev/null /usr/share/ucentral/ucentral.uc /etc/ucentral/ucentral.cfg.0000000001 > /dev/null
est_client check
[ $? -eq 1 ] && {
logger ERROR
logger ERROR
logger ERROR
logger The certificate used has a CN that does not match the serial of the device
echo The certificate used has a CN that does not match the serial of the device
logger ERROR
logger ERROR
logger ERROR
return
}
procd_open_instance procd_open_instance
procd_set_param command "$PROG" procd_set_param command "$PROG"
procd_set_param respawn procd_set_param respawn

View File

@@ -15,15 +15,9 @@ const ONLINE = 2;
const OFFLINE = 3; const OFFLINE = 3;
const ORPHAN = 4; const ORPHAN = 4;
const DISCOVER_DHCP = "DHCP";
const DISCOVER_FLASH = "FLASH";
const DISCOVER_LOOKUP = "OpenLAN";
let ubus = libubus.connect(); let ubus = libubus.connect();
let uci = libuci.cursor(); let uci = libuci.cursor();
let state = DISCOVER; let state = DISCOVER;
let discovery_method = "";
let discovery_block_list = [];
let validate_time; let validate_time;
let offline_time; let offline_time;
let orphan_time; let orphan_time;
@@ -33,8 +27,6 @@ let timeouts = {
'validate': 120, 'validate': 120,
'orphan': 2 * 60 * 60, 'orphan': 2 * 60 * 60,
interval: 10000, interval: 10000,
expiry_interval: 60 * 60 * 1000,
expiry_threshold: 1 * 365 * 24 * 60 * 60,
}; };
ulog_open(ULOG_SYSLOG | ULOG_STDIO, LOG_DAEMON, "cloud_discover"); ulog_open(ULOG_SYSLOG | ULOG_STDIO, LOG_DAEMON, "cloud_discover");
@@ -43,24 +35,6 @@ ulog(LOG_INFO, 'Start\n');
uloop.init(); uloop.init();
let cds_server = 'discovery.open-lan.org';
function detect_certificate_type() {
let pipe = fs.popen(`openssl x509 -in /etc/ucentral/cert.pem -noout -issuer`);
let issuer = pipe.read("all");
pipe.close();
if (match(issuer, /OpenLAN Demo Birth CA/)) {
ulog(LOG_INFO, 'Certificate type is "Demo" \n');
cds_server = 'discovery-qa.open-lan.org';
timeouts.expiry_threshold = 3 * 24 * 60 * 60;
} else if (match(issuer, /OpenLAN Birth Issuing CA/)) {
ulog(LOG_INFO, 'Certificate type is "Production"\n');
} else {
ulog(LOG_INFO, 'Certificate type is "TIP"\n');
}
}
function readjsonfile(path) { function readjsonfile(path) {
let file = fs.readfile(path); let file = fs.readfile(path);
if (file) if (file)
@@ -102,17 +76,6 @@ function gateway_load() {
return readjsonfile('/etc/ucentral/gateway.json'); return readjsonfile('/etc/ucentral/gateway.json');
} }
function discovery_state_write() {
if (length(discovery_method) == 0)
return;
let discovery_state = {
"type": discovery_method,
"updated": time()
};
fs.writefile('/etc/ucentral/discovery.state.json', discovery_state);
}
function gateway_write(data) { function gateway_write(data) {
let gateway = gateway_load(); let gateway = gateway_load();
gateway ??= {}; gateway ??= {};
@@ -126,10 +89,8 @@ function gateway_write(data) {
if (new[key] != gateway[key]) if (new[key] != gateway[key])
changed = true; changed = true;
} }
if (changed) { if (changed)
fs.writefile('/etc/ucentral/gateway.json', new); fs.writefile('/etc/ucentral/gateway.json', new);
system('sync');
}
return changed; return changed;
} }
@@ -159,7 +120,6 @@ function set_state(set) {
ulog(LOG_INFO, 'Wait for validation\n'); ulog(LOG_INFO, 'Wait for validation\n');
validate_time = time(); validate_time = time();
state = VALIDATING; state = VALIDATING;
push(discovery_block_list, discovery_method);
break; break;
case ONLINE: case ONLINE:
@@ -167,8 +127,6 @@ function set_state(set) {
if (prev == VALIDATING) { if (prev == VALIDATING) {
ulog(LOG_INFO, 'Setting cloud controller to validated\n'); ulog(LOG_INFO, 'Setting cloud controller to validated\n');
gateway_write({ valid: true }); gateway_write({ valid: true });
discovery_state_write();
discovery_block_list = [];
} }
break; break;
@@ -203,7 +161,7 @@ function redirector_lookup() {
let serial = uci.get('system', '@system[-1]', 'mac'); let serial = uci.get('system', '@system[-1]', 'mac');
fs.unlink(path); fs.unlink(path);
system(`curl -k --cert /etc/ucentral/operational.pem --key /etc/ucentral/key.pem --cacert /etc/ucentral/operational.ca https://${cds_server}/v1/devices/${serial} --output /tmp/ucentral.redirector`); system(`curl -k --cert /etc/ucentral/operational.pem --key /etc/ucentral/key.pem --cacert /etc/ucentral/operational.ca https://openlan.keys.tip.build/v1/devices/${serial} --output /tmp/ucentral.redirector`);
if (!fs.stat(path)) if (!fs.stat(path))
return; return;
let redir = readjsonfile(path); let redir = readjsonfile(path);
@@ -237,13 +195,6 @@ function time_is_valid() {
return valid; return valid;
} }
function is_discover_method_blacked() {
if (discovery_method in discovery_block_list)
return true;
return false;
}
function interval_handler() { function interval_handler() {
printf(`State ${state}\n`); printf(`State ${state}\n`);
switch(state) { switch(state) {
@@ -273,21 +224,16 @@ function interval_handler() {
if (!time_is_valid()) if (!time_is_valid())
return; return;
if (discover_dhcp())
return;
if (system('/usr/bin/est_client enroll')) if (system('/usr/bin/est_client enroll'))
return; return;
discovery_method = DISCOVER_DHCP; if (!discover_flash())
if (!is_discover_method_blacked() && discover_dhcp())
return; return;
discovery_method = DISCOVER_FLASH;
if (!is_discover_method_blacked() && !discover_flash())
return;
discovery_method = DISCOVER_LOOKUP;
redirector_lookup(); redirector_lookup();
discovery_block_list = [];
break; break;
case VALIDATING: case VALIDATING:
@@ -306,36 +252,6 @@ function interval_handler() {
} }
} }
function trigger_reenroll() {
ulog(LOG_INFO, 'triggering reenroll\n');
if (system('/usr/bin/est_client reenroll')) {
ulog(LOG_INFO, 'reenroll failed\n');
return;
}
ulog(LOG_INFO, 'reenroll succeeded\n');
ulog(LOG_INFO, 'stopping client\n');
system('/etc/init.d/ucentral stop');
set_state(DISCOVER);
}
function expiry_handler() {
let stat = fs.stat('/etc/ucentral/operational.ca');
if (!stat)
return;
let ret = system(`openssl x509 -checkend ${timeouts.expiry_threshold} -noout -in /certificates/operational.pem`);
if (!ret) {
ulog(LOG_INFO, 'checked certificate expiry - all ok\n');
return;
}
ulog(LOG_INFO, 'certificate will expire soon\n');
trigger_reenroll();
}
let ubus_methods = { let ubus_methods = {
discover: { discover: {
call: function(req) { call: function(req) {
@@ -410,17 +326,8 @@ let ubus_methods = {
}, },
args: {}, args: {},
}, },
reenroll: {
call: function(req) {
trigger_reenroll();
return 0;
},
args: {},
},
}; };
detect_certificate_type();
if (gateway_available()) { if (gateway_available()) {
let status = ubus.call('ucentral', 'status'); let status = ubus.call('ucentral', 'status');
ulog(LOG_INFO, 'cloud is known\n'); ulog(LOG_INFO, 'cloud is known\n');
@@ -437,7 +344,6 @@ if (gateway_available()) {
timeouts_load(); timeouts_load();
interval = uloop.interval(timeouts.interval, interval_handler); interval = uloop.interval(timeouts.interval, interval_handler);
uloop.interval(timeouts.expiry_interval, expiry_handler);
ubus.publish('cloud', ubus_methods); ubus.publish('cloud', ubus_methods);

View File

@@ -4,28 +4,12 @@
import { ulog_open, ulog, ULOG_SYSLOG, ULOG_STDIO, LOG_DAEMON, LOG_INFO } from 'log'; import { ulog_open, ulog, ULOG_SYSLOG, ULOG_STDIO, LOG_DAEMON, LOG_INFO } from 'log';
import * as fs from 'fs'; import * as fs from 'fs';
import * as libuci from 'uci';
let store_operational_pem = false; let store_operational_pem = false;
let store_operational_ca = false; let store_operational_ca = false;
let est_server = 'est.certificates.open-lan.org'; let est_server = 'qaest.certificates.open-lan.org:8001';
let cert_prefix = 'operational'; let cert_prefix = 'operational';
function set_est_server() {
let pipe = fs.popen(`openssl x509 -in /etc/ucentral/cert.pem -noout -issuer`);
let issuer = pipe.read("all");
pipe.close();
if (match(issuer, /OpenLAN Demo Birth CA/)) {
ulog(LOG_INFO, 'Certificate type is "Demo" \n');
est_server = 'qaest.certificates.open-lan.org:8001';
} else if (match(issuer, /OpenLAN Birth Issuing CA/)) {
ulog(LOG_INFO, 'Certificate type is "Production"\n');
} else {
ulog(LOG_INFO, 'Certificate type is "TIP"\n');
}
}
if (getenv('EST_SERVER')) if (getenv('EST_SERVER'))
est_server = getenv('EST_SERVER'); est_server = getenv('EST_SERVER');
@@ -94,8 +78,6 @@ function call_est_server(path, cert, target) {
if (generate_csr(cert)) if (generate_csr(cert))
return 1; return 1;
set_est_server();
let ret = system('curl -m 10 -X POST https://' + est_server + '/.well-known/est/' + path + ' -d @/tmp/csr.nohdr.p10 -H "Content-Type: application/pkcs10" --cert ' + cert + ' --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/operational.nohdr.p7'); let ret = system('curl -m 10 -X POST https://' + est_server + '/.well-known/est/' + path + ' -d @/tmp/csr.nohdr.p10 -H "Content-Type: application/pkcs10" --cert ' + cert + ' --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/operational.nohdr.p7');
if (ret) { if (ret) {
ulog(LOG_INFO, 'Failed to request operational certificate\n'); ulog(LOG_INFO, 'Failed to request operational certificate\n');
@@ -143,9 +125,6 @@ function load_operational_ca() {
ulog(LOG_INFO, 'Operational CA is present\n'); ulog(LOG_INFO, 'Operational CA is present\n');
return 0; return 0;
} }
set_est_server();
let ret = system('curl -m 10 -X GET https://' + est_server + '/.well-known/est/cacerts --cert /etc/ucentral/' + cert_prefix + '.pem --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/' + cert_prefix + '.ca.nohdr.p7'); let ret = system('curl -m 10 -X GET https://' + est_server + '/.well-known/est/cacerts --cert /etc/ucentral/' + cert_prefix + '.pem --key /etc/ucentral/key.pem --cacert /etc/ucentral/insta.pem -o /tmp/' + cert_prefix + '.ca.nohdr.p7');
if (!ret) if (!ret)
ret = p7_too_pem('/tmp/' + cert_prefix + '.ca.nohdr.p7', '/etc/ucentral/' + cert_prefix + '.ca'); ret = p7_too_pem('/tmp/' + cert_prefix + '.ca.nohdr.p7', '/etc/ucentral/' + cert_prefix + '.ca');
@@ -160,14 +139,11 @@ function load_operational_ca() {
} }
function fwtool() { function fwtool() {
if (!fs.stat('/etc/ucentral/cert.pem'))
return 0;
let pipe = fs.popen(`openssl x509 -in /etc/ucentral/cert.pem -noout -issuer`); let pipe = fs.popen(`openssl x509 -in /etc/ucentral/cert.pem -noout -issuer`);
let issuer = pipe.read("all"); let issuer = pipe.read("all");
pipe.close(); pipe.close();
if (!(match(issuer, /OpenLAN/) && match(issuer, /Birth/))) if (!(match(issuer, /OpenLAN/) && match(issuer, /Birth CA/)))
return 0; return 0;
ulog(LOG_INFO, 'The issuer is insta\n'); ulog(LOG_INFO, 'The issuer is insta\n');
@@ -187,20 +163,6 @@ function fwtool() {
return 0; return 0;
} }
function check_cert() {
if (!fs.stat('/etc/ucentral/cert.pem'))
return 0;
let pipe = fs.popen("openssl x509 -in /etc/ucentral/cert.pem -noout -subject -nameopt multiline | grep commonName | awk '{ print $3 }'");
let cn = pipe.read("all");
pipe.close();
if (!cn)
return 0;
cn = lc(trim(cn));
let uci = libuci.cursor();
let serial = uci.get('ucentral', 'config', 'serial');
return cn != serial;
}
switch(ARGV[0]) { switch(ARGV[0]) {
case 'enroll': case 'enroll':
let ret = simpleenroll(); let ret = simpleenroll();
@@ -222,7 +184,4 @@ case 'reenroll':
case 'fwtool': case 'fwtool':
exit(fwtool()); exit(fwtool());
case 'check':
exit(check_cert());
} }

View File

@@ -5,8 +5,8 @@ import * as fs from 'fs';
let cmd = ARGV[0]; let cmd = ARGV[0];
let ifname = getenv("interface"); let ifname = getenv("interface");
let opt138 = fs.readfile('/tmp/dhcp-option-138'); let opt224 = getenv("opt138");
let opt224 = fs.readfile('/tmp/dhcp-option-224'); let opt224 = getenv("opt224");
if (cmd != 'bound' && cmd != 'renew') if (cmd != 'bound' && cmd != 'renew')
exit(0); exit(0);
@@ -23,14 +23,14 @@ let cloud = {
lease: true, lease: true,
}; };
if (opt138) { if (opt138) {
let dhcp = opt138; let dhcp = hexdec(opt138);
dhcp = split(dhcp, ':'); dhcp = split(dhcp, ':');
cloud.dhcp_server = dhcp[0]; cloud.dhcp_server = dhcp[0];
cloud.dhcp_port = dhcp[1] ?? 15002; cloud.dhcp_port = dhcp[1] ?? 15002;
cloud.no_validation = true; cloud.no_validation = true;
} }
if (opt224) { if (opt224) {
let dhcp = opt224; let dhcp = hexdec(opt224);
dhcp = split(dhcp, ':'); dhcp = split(dhcp, ':');
cloud.dhcp_server = dhcp[0]; cloud.dhcp_server = dhcp[0];
cloud.dhcp_port = dhcp[1] ?? 15002; cloud.dhcp_port = dhcp[1] ?? 15002;

View File

@@ -4,6 +4,3 @@ MIIFajCCA1KgAwIBAgICDnowDQYJKoZIhvcNAQELBQAwHzEdMBsGA1UEAwwUT3BlbkxBTiBEZW1vIFJv
-----BEGIN CERTIFICATE----- -----BEGIN CERTIFICATE-----
MIIFIDCCAwigAwIBAgICDnkwDQYJKoZIhvcNAQELBQAwHzEdMBsGA1UEAwwUT3BlbkxBTiBEZW1vIFJvb3QgQ0EwHhcNMjUwMjIxMTUwMDAwWhcNMjYwMjIxMTUwMDAwWjAfMR0wGwYDVQQDDBRPcGVuTEFOIERlbW8gUm9vdCBDQTCCAiIwDQYJKoZIhvcNAQEBBQADggIPADCCAgoCggIBAMjExylKdJWoJu9mOHPJ6yZFXKe1lE467G65acpS2FKIWnPVFjNCmATMpkMOIFzEFwyFdbQjzOidtiL+73zlE52lOJpXCfOcxDFqDYDJJ8//J1/gQWsBaKpSvgLiHU/0awkQg+yJYZpj8YZa4NkFe+zTjQScSfOsqPPb3rZ7DOQ2BKAhjVShKmVbtNil0iO0zm8vE8DNkktTNMREp2pzb8MbCAgfOkwlrby6T+rV3TvmjThGdFUb5lWDFxWtlF8W0SUII9qj7p5TdGpryeLsO0nZTBtS4HxZNdvmKOHfgcRHmSZIJigB2NzKLNrXF9JBW0WnUSwZJZAG2C1RTx6lADILPueuusyfR/hZ3koKi4PHnSiTwQghzia9K9QjNHq5z9R9ZoCnhBg1VyU4LKmp862L0sIp2vgnOYunEIi9aCYBaDwo+0FuVjZuXyDIatwVuA7TN5IWPHA6XLdOt1mmkeYy1Ldr4XHjdondhtOyeei1UFXmyyLm2+kmRYfTm91TqYmNzRgbRV2NHO50AmsnBknX4Rv3gishGe0+dV5yFcUwZud0z2rSCkuoai5tKrPT+6Y6NqkT9u9HFifIBXnLwEzVUqHRtW6SuWj2DClVQIXIUZtFnhY4GuTuf6DlzgnXO58oDVCZmCW4ULIpbqGeRsvBHR8Sw5JXP/1+TMUYhE8TAgMBAAGjZjBkMB8GA1UdIwQYMBaAFDzIg8eyTI3xc4A2R60f8HanhBZDMB0GA1UdDgQWBBQ8yIPHskyN8XOANketH/B2p4QWQzAOBgNVHQ8BAf8EBAMCAQYwEgYDVR0TAQH/BAgwBgEB/wIBATANBgkqhkiG9w0BAQsFAAOCAgEAkHZ5KR8IOrdfMFy+iOvauvZxfQ84LL6TpB2FQKDjneJUdd7c29UJJFNW/0mp4Gc6jKZab6J8Dx/pNnbH0RqFjGjeRGtJ4Sk0G7gf9zw1S7qut5WJDcisM9l/wXC+zy/KSKKPQmbt0grWOtU7+NNPh1YU76hIrInq/u2sVZyKH8SXQ957fbJk6BX6JTKyNEn05AB6rNSrbOWo8sy2MlcJ7bBsrWYI1t6GcWFh4b36bLu7/dKJWpyFNXXIkKJsgMEDpEQae56+fSSDo0KRNtYB82fNZDIQlGK81rGJWNzAahM+3GD1tgk/3ZVugfaJhcBpoHHKNOGqZAvtirLAIDocno7AzqoeIz974Rh2Olsl2/arApYPyyfi8PMYuFe/d4h+Wie8n+jh5n48lZ2Ve4PK+j+QHD6tTZS4f0bGnPL1puMxzQloltuQWgLDeVfEgrc3snLvjOg8aDzWm/es85lP8XcyW54U4t3JmrNUC2C7v+Uafx7cL7eDeunhs+BRhtGV+IUmjub2IrpqZp3zZqn+LVRdYJIy/qHhjS5+ImckXkFojOmeWhfmEmYSuNP8Oa6cGuXp829qnbxLh9Qzi3TfXV883KLse4kL5Zl7gBA/4hz2hVMyGJ8fY+VvzbaTuOXyvKJ+rGZCTcRSeotBLnIevVMiL7SqOEwN0j4Mfbznfq8= MIIFIDCCAwigAwIBAgICDnkwDQYJKoZIhvcNAQELBQAwHzEdMBsGA1UEAwwUT3BlbkxBTiBEZW1vIFJvb3QgQ0EwHhcNMjUwMjIxMTUwMDAwWhcNMjYwMjIxMTUwMDAwWjAfMR0wGwYDVQQDDBRPcGVuTEFOIERlbW8gUm9vdCBDQTCCAiIwDQYJKoZIhvcNAQEBBQADggIPADCCAgoCggIBAMjExylKdJWoJu9mOHPJ6yZFXKe1lE467G65acpS2FKIWnPVFjNCmATMpkMOIFzEFwyFdbQjzOidtiL+73zlE52lOJpXCfOcxDFqDYDJJ8//J1/gQWsBaKpSvgLiHU/0awkQg+yJYZpj8YZa4NkFe+zTjQScSfOsqPPb3rZ7DOQ2BKAhjVShKmVbtNil0iO0zm8vE8DNkktTNMREp2pzb8MbCAgfOkwlrby6T+rV3TvmjThGdFUb5lWDFxWtlF8W0SUII9qj7p5TdGpryeLsO0nZTBtS4HxZNdvmKOHfgcRHmSZIJigB2NzKLNrXF9JBW0WnUSwZJZAG2C1RTx6lADILPueuusyfR/hZ3koKi4PHnSiTwQghzia9K9QjNHq5z9R9ZoCnhBg1VyU4LKmp862L0sIp2vgnOYunEIi9aCYBaDwo+0FuVjZuXyDIatwVuA7TN5IWPHA6XLdOt1mmkeYy1Ldr4XHjdondhtOyeei1UFXmyyLm2+kmRYfTm91TqYmNzRgbRV2NHO50AmsnBknX4Rv3gishGe0+dV5yFcUwZud0z2rSCkuoai5tKrPT+6Y6NqkT9u9HFifIBXnLwEzVUqHRtW6SuWj2DClVQIXIUZtFnhY4GuTuf6DlzgnXO58oDVCZmCW4ULIpbqGeRsvBHR8Sw5JXP/1+TMUYhE8TAgMBAAGjZjBkMB8GA1UdIwQYMBaAFDzIg8eyTI3xc4A2R60f8HanhBZDMB0GA1UdDgQWBBQ8yIPHskyN8XOANketH/B2p4QWQzAOBgNVHQ8BAf8EBAMCAQYwEgYDVR0TAQH/BAgwBgEB/wIBATANBgkqhkiG9w0BAQsFAAOCAgEAkHZ5KR8IOrdfMFy+iOvauvZxfQ84LL6TpB2FQKDjneJUdd7c29UJJFNW/0mp4Gc6jKZab6J8Dx/pNnbH0RqFjGjeRGtJ4Sk0G7gf9zw1S7qut5WJDcisM9l/wXC+zy/KSKKPQmbt0grWOtU7+NNPh1YU76hIrInq/u2sVZyKH8SXQ957fbJk6BX6JTKyNEn05AB6rNSrbOWo8sy2MlcJ7bBsrWYI1t6GcWFh4b36bLu7/dKJWpyFNXXIkKJsgMEDpEQae56+fSSDo0KRNtYB82fNZDIQlGK81rGJWNzAahM+3GD1tgk/3ZVugfaJhcBpoHHKNOGqZAvtirLAIDocno7AzqoeIz974Rh2Olsl2/arApYPyyfi8PMYuFe/d4h+Wie8n+jh5n48lZ2Ve4PK+j+QHD6tTZS4f0bGnPL1puMxzQloltuQWgLDeVfEgrc3snLvjOg8aDzWm/es85lP8XcyW54U4t3JmrNUC2C7v+Uafx7cL7eDeunhs+BRhtGV+IUmjub2IrpqZp3zZqn+LVRdYJIy/qHhjS5+ImckXkFojOmeWhfmEmYSuNP8Oa6cGuXp829qnbxLh9Qzi3TfXV883KLse4kL5Zl7gBA/4hz2hVMyGJ8fY+VvzbaTuOXyvKJ+rGZCTcRSeotBLnIevVMiL7SqOEwN0j4Mfbznfq8=
-----END CERTIFICATE----- -----END CERTIFICATE-----
-----BEGIN CERTIFICATE-----
MIIFFTCCAv2gAwIBAgICAxIwDQYJKoZIhvcNAQELBQAwGjEYMBYGA1UEAwwPT3BlbkxBTiBSb290IENBMCAXDTI1MDUxNDA4NDcxMFoYDzIwNTUwNTE0MDg0NzEwWjAaMRgwFgYDVQQDDA9PcGVuTEFOIFJvb3QgQ0EwggIiMA0GCSqGSIb3DQEBAQUAA4ICDwAwggIKAoICAQDGibJ04A55kSURTBSKgcBmLnND2I5wws1taKqqU9aaRhB7NtvMHwh2voH9b1brUiulZaZwTN/9kzd4AnXeKQ+0u5tV7Ofk0fzF2MK47n17TS30Yenqc4NuQEKdpKK/pM3VvOEppR/bqtgyLtDmbDnmFOx+zTj/+smTgouwA+Iier0P4s5OohYxn/bjOqwQbHbU79VpGBIWv6/kt55AhH7zvsqqKHkrzTxnsRBv3SBIufrjJr9PIhZBLDrqr56P6KgAi0eoutNt2ToiJbE0WfjU7GI1RSiSN5bGj1zXhjNVzQWs1H9QzRf3c9pl3+haHQZ7FZ1UqiTRewmbNrQ6I9k81au3SttUlb87MyAuDSzatkiq7CjQ8VE1J6te6ZBt2zWpUhHsR/Lg7g3eOw5dL4oZJdK5GgGu/MUajLUXifIqM13Mvg0VTzDhN69VLXLSL0gPcicsQCwJuAza1IC/VqmBGx19fAkyJhOurCXWOgisi0g1+xzPKRphUNwMPUf8vBVOM/Vc6xDIvwVGE3+eWXyhixneFlSpAI03nWWjpwWXihTBoxbfRXO3Y/ilJqrgFN+U4PJcCPA+Wo7ThH0mgX6bOTPcgXMUzT3v3FF6Bx5/PNV3kYrw2yLzribUiS6AGvVGnW4hX2Z6OQvA/aHME8KF+6y6m4pC7FkUjVaRlzWu/wIDAQABo2MwYTAfBgNVHSMEGDAWgBSUaFuoOPk4QLByZP47kj4p1IbCJjAdBgNVHQ4EFgQUlGhbqDj5OECwcmT+O5I+KdSGwiYwDgYDVR0PAQH/BAQDAgGGMA8GA1UdEwEB/wQFMAMBAf8wDQYJKoZIhvcNAQELBQADggIBAB+/RUC2X6eVoPsFNMkaXO5Iib/ub0JoWhODQm8j2Mr5dpGXESSpXjfDcqDOLuJbWWoflXBLdr8BsVCBqOA9YgCX0H8Br7dUWmCScixxLW0he592/424EvdwifxcKHZLjv9CKV5Txhqnm2djc5RY/nTH5MYVrIh/If2TNO5ydDP6+vgy9GQ4en04VK7rz+PW17O8l7k9/lOmYptZmHgSDAPj/cT3PlG+McqaI5rMSHeEHlzH+PvgWjtSeEhF4FwFBXroDl4/yb4l2JB8bqAZ3vsOXSkigFcZh5MXPe+zuSSW+G8iLr4xoi0CFsP2DaHEyxgqP4B1FtE9nFPo6cvWbwqTVT7QSzqfH+jPJuQvpFXeRF5UFegNZTFT5/uFFPamihakFslEYxeJey1y+OJdLcP6ef87ruSt8amsq56OAETYpnW4JFowlEh0C+QwLGHGGY6WrOgHY/90hJmPgXBdBVg/IoOhzbvk5A+LqZDvxV2/rLNfClw8Kr3g5e8obcB6dWgMCy2z+us0H79ucnmhzQKsjpxM9T1ncHovAQfiD3jVqfHULY53avh0wIAjosoTGbe8dyx80quHe+16qWan7C9idXeAYYJXbZt5hs6hLw4I8M1LsjTg6vwsqiaHZpsmDyyQLdFjNJldG7aosfS9F+BIpuwijF+1dashL0CPsbIJ
-----END CERTIFICATE-----

View File

@@ -350,7 +350,7 @@ function run_service() {
printf('-> reload\n'); printf('-> reload\n');
let list = uctx.list(); let list = uctx.list();
for (let obj in list) { for (let obj in list) {
if (!wildcard(obj, 'hostapd.wlan*') && !wildcard(obj, 'hostapd.phy*')) if (!wildcard(obj, 'hostapd.wlan*'))
continue; continue;
let iface = split(obj, '.')[1]; let iface = split(obj, '.')[1];
let device = get_device(devices, req.args.device); let device = get_device(devices, req.args.device);

View File

@@ -6,8 +6,6 @@ STOP=01
USE_PROCD=1 USE_PROCD=1
start_service() { start_service() {
[ -e "/tmp/rrm_timestamp" ] && rm -rf /tmp/rrm_timestamp
[ -e "/tmp/rrm_chan_switch" ] && rm -rf /tmp/rrm_chan_switch
rm -rf /tmp/threshold_breach_count* rm -rf /tmp/threshold_breach_count*
rm -rf /tmp/fixed_channel* rm -rf /tmp/fixed_channel*
rm -rf /tmp/chanutil_phy* rm -rf /tmp/chanutil_phy*

View File

@@ -24,10 +24,6 @@ function stats_info_write(path, value) {
file.close(); file.close();
} }
function record_rrm_timestamp() {
stats_info_write("/tmp/rrm_timestamp", time());
}
// total number of radios: default=2 // total number of radios: default=2
let num_radios = 2; let num_radios = 2;
let phy_count; let phy_count;
@@ -140,122 +136,20 @@ function channel_to_freq(band, channel) {
return freq; return freq;
} }
// using mapping to get correct center channel, especially for 6G radio function center_freq_calc(band, freq, bandwidth) {
function get_center_channel(channel, band, bw) { if (bandwidth == 40)
let center_channel = channel; return +freq + 10;
let center_channel_map = {}; if (bandwidth == 80)
return +freq + 30;
if (bandwidth == 160)
return +freq + 70;
if (bandwidth == 320)
if (freq == 6115)
return +freq - 10;
else
return +freq + 150;
switch (band) { return +freq;
case '5g':
if (bw == 40) {
center_channel_map = {
"36": 38, "40": 38,
"44": 46, "48": 46,
"52": 54, "56": 54,
"60": 62, "64": 62,
"100": 102, "104": 102,
"108": 110, "112": 110,
"116": 118, "120": 118,
"124": 126, "128": 126,
"132": 134, "136": 134,
"140": 142, "144": 142,
"149": 151, "153": 151,
"157": 159, "161": 159,
"165": 167
};
} else if (bw == 80) {
center_channel_map = {
"36": 42, "40": 42, "44": 42, "48": 42,
"52": 58, "56": 58, "60": 58, "64": 58,
"100": 106, "104": 106, "108": 106, "112": 106,
"116": 122, "120": 122, "124": 122, "128": 122,
"132": 138, "136": 138, "140": 138, "144": 138,
"149": 155, "153": 155, "157": 155, "161": 155,
"165": 171
};
} else if (bw == 160) {
center_channel_map = {
"36": 50, "40": 50, "44": 50, "48": 50,
"52": 50, "56": 50, "60": 50, "64": 50,
"100": 114, "104": 114, "108": 114, "112": 114,
"116": 114, "120": 114, "124": 114, "128": 114
};
}
break;
case '6g':
if (bw == 40) {
center_channel_map = {
"1": 3, "5": 3, "9": 11, "13": 11,
"17": 19, "21": 19, "25": 27, "29": 27,
"33": 35, "37": 35, "41": 43, "45": 43,
"49": 51, "53": 51, "57": 59, "61": 59,
"65": 67, "69": 67, "73": 75, "77": 75,
"81": 83, "85": 83, "89": 91, "93": 91,
"97": 99, "101": 99, "105": 107, "109": 107,
"113": 115, "117": 115, "121": 123, "125": 123,
"129": 131, "133": 131, "137": 139, "141": 139,
"145": 147, "149": 147, "153": 155, "157": 155,
"161": 163, "165": 163, "169": 171, "173": 171,
"177": 179, "181": 179, "185": 187, "189": 187,
"193": 195, "197": 195, "201": 203, "205": 203,
"209": 211, "213": 211, "217": 219, "221": 219,
"225": 227
};
} else if (bw == 80) {
center_channel_map = {
"1": 7, "5": 7, "9": 7, "13": 7,
"17": 23, "21": 23, "25": 23, "29": 23,
"33": 39, "37": 39, "41": 39, "45": 39,
"49": 55, "53": 55, "57": 55, "61": 55,
"65": 71, "69": 71, "73": 71, "77": 71,
"81": 87, "85": 87, "89": 87, "93": 87,
"97": 103, "101": 103, "105": 103, "109": 103,
"113": 119, "117": 119, "121": 119, "125": 119,
"129": 135, "133": 135, "137": 135, "141": 135,
"145": 151, "149": 151, "153": 151, "157": 151,
"161": 167, "165": 167, "169": 167, "173": 167,
"177": 183, "181": 183, "185": 183, "189": 183,
"193": 199, "197": 199, "201": 199, "205": 199,
"209": 215
};
} else if (bw == 160) {
center_channel_map = {
"1": 15, "5": 15, "9": 15, "13": 15,
"17": 15, "21": 15, "25": 15, "29": 15,
"33": 47, "37": 47, "41": 47, "45": 47,
"49": 47, "53": 47, "57": 47, "61": 47,
"65": 79, "69": 79, "73": 79, "77": 79,
"81": 79, "85": 79, "89": 79, "93": 79,
"97": 111, "101": 111, "105": 111, "109": 111,
"113": 111, "117": 111, "121": 111, "125": 111,
"129": 143, "133": 143, "137": 143, "141": 143,
"145": 143, "149": 143, "153": 143, "157": 143,
"161": 175, "165": 175, "169": 175, "173": 175,
"177": 175, "181": 175, "185": 175, "189": 175,
"193": 207
};
} else if (bw == 320) {
center_channel_map = {
"1": 31, "5": 31, "9": 31, "13": 31,
"17": 31, "21": 31, "25": 31, "29": 31,
"33": 63, "37": 63, "41": 63, "45": 63,
"49": 63, "53": 63, "57": 63, "61": 63,
"65": 63, "69": 63, "73": 63, "77": 63,
"81": 63, "85": 63, "89": 63, "93": 63,
"97": 127, "101": 127, "105": 127, "109": 127,
"113": 127, "117": 127, "121": 127, "125": 127,
"129": 127, "133": 127, "137": 127, "141": 127,
"145": 127, "149": 127, "153": 127, "157": 127,
"161": 191
};
}
break;
}
if (center_channel_map[channel])
center_channel = center_channel_map[channel];
return center_channel;
} }
function interface_status_check(iface) { function interface_status_check(iface) {
@@ -307,9 +201,6 @@ function check_current_channel(iface) {
function hostapd_switch_channel(msg) { function hostapd_switch_channel(msg) {
ulog_info(`[%s] Start switch channel to %d \n`, msg.iface, msg.channel); ulog_info(`[%s] Start switch channel to %d \n`, msg.iface, msg.channel);
// Channel switch in progress, set flag = 1
stats_info_write("/tmp/rrm_chan_switch", 1);
let chan_switch_status = 0; let chan_switch_status = 0;
let sec_channel_offset = null; let sec_channel_offset = null;
@@ -317,8 +208,7 @@ function hostapd_switch_channel(msg) {
let bandwidth = replace(msg.htmode, /[^0-9]/g, ''); let bandwidth = replace(msg.htmode, /[^0-9]/g, '');
let target_freq = channel_to_freq(msg.band, msg.channel); let target_freq = channel_to_freq(msg.band, msg.channel);
let center_channel = get_center_channel(msg.channel, msg.band, bandwidth); let center_freq = center_freq_calc(msg.band, target_freq, bandwidth);
let center_freq = channel_to_freq(msg.band, center_channel);
if (bandwidth > 20) if (bandwidth > 20)
sec_channel_offset = 1; sec_channel_offset = 1;
@@ -355,20 +245,9 @@ function switch_status_check(iface, dfs_enabled_5g_flag) {
ulog_info(`[%s] 5G radio might need some time to be UP (DFS enabled) \n`, iface); ulog_info(`[%s] 5G radio might need some time to be UP (DFS enabled) \n`, iface);
let p = 0; let p = 0;
// Default max 70 seconds wait for the DFS enabled interface to be UP // Max 65 seconds wait for the DFS enabled interface to be UP
let timer = 70; let timer = 70;
// get real timer from hostapd_cli command
let check_cac_time = sprintf('hostapd_cli -i %s status | grep \"cac_time_left_seconds\" | awk -F "=" \'{print $2}\'', iface);
let _cac_time = fs.popen(check_cac_time);
let cac_time = trim(_cac_time.read('all'));
_cac_time.close();
// if cac_time is a valid number, set timer to cac_time + 5 seconds
if (cac_time > 0 && match(cac_time, /^[0-9]+$/)) {
timer = int(cac_time) + 5;
}
while (p < timer) { while (p < timer) {
ulog_info(`[%s] Check#%d \n `, iface, p); ulog_info(`[%s] Check#%d \n `, iface, p);
@@ -388,9 +267,6 @@ function switch_status_check(iface, dfs_enabled_5g_flag) {
} }
} }
// Channel switch done, set flag = 0
stats_info_write("/tmp/rrm_chan_switch", 0);
let current_chan = check_current_channel(iface); let current_chan = check_current_channel(iface);
return current_chan; return current_chan;
} }
@@ -560,7 +436,7 @@ function random_channel_selection(iface, band, htmode, chan_list_valid) {
ulog_info(`[%s] Selected channel list from config (default channel list shall be used in case channels haven't been selected) = %s \n`, iface, (chan_list_valid || '[]')); ulog_info(`[%s] Selected channel list from config (default channel list shall be used in case channels haven't been selected) = %s \n`, iface, (chan_list_valid || '[]'));
if (band == '2g' && bw >= 40) { if (band == '2g' && bw >= 40) {
ulog_info(`[%s] It is highly recommended to NOT use %dMHz bandwidth for 2.4G radio (RRM will not work properly) \n`, iface, bw); ulog_info(`[%s] It is highly recommended to NOT use %dMHz bandwidth for 2.4G radio \n`, iface, bw);
} else if (band == '5g' && bw > 160) { } else if (band == '5g' && bw > 160) {
ulog_info(`[%s] %dMHz bandwidth not supported for 5G radio. Please use a bandwidth of 160MHz or lower\n`, iface, bw); ulog_info(`[%s] %dMHz bandwidth not supported for 5G radio. Please use a bandwidth of 160MHz or lower\n`, iface, bw);
} }
@@ -692,28 +568,9 @@ function random_channel_selection(iface, band, htmode, chan_list_valid) {
return random_channel; return random_channel;
} }
function check_center_channel(chosen_random_channel, current_channel, band, htmode) {
let ret = false;
let bw = replace(htmode, /[^0-9]/g, '');
if (band != '2g' || bw != 20) {
// for 2G band or 20MHz bandwidth, center channel is the same as the channel
let chosen_random_channel_center = get_center_channel(chosen_random_channel, band, bw);
let current_channel_center = get_center_channel(current_channel, band, bw);
ulog_info(`Center channel of the chosen random channel (%d) = %d; Center channel of the current channel (%d) = %d \n`, chosen_random_channel, chosen_random_channel_center, current_channel, current_channel_center);
if (chosen_random_channel_center == current_channel_center)
ret = true;
}
return ret;
}
function algo_rcs(iface, current_channel, band, htmode, selected_channels) { function algo_rcs(iface, current_channel, band, htmode, selected_channels) {
let chosen_random_channel = 0; let chosen_random_channel = 0;
let res = 0; let res = 0;
let same_center_channel = false;
// random_channel_selection script will help to select random channel // random_channel_selection script will help to select random channel
chosen_random_channel = random_channel_selection(iface, band, htmode, selected_channels); chosen_random_channel = random_channel_selection(iface, band, htmode, selected_channels);
@@ -723,15 +580,8 @@ function algo_rcs(iface, current_channel, band, htmode, selected_channels) {
ulog_info(`[%s] RCS assigned the same channel = %d; Skip channel switch \n`, iface, chosen_random_channel); ulog_info(`[%s] RCS assigned the same channel = %d; Skip channel switch \n`, iface, chosen_random_channel);
res = 0; res = 0;
} else if (chosen_random_channel > 0) { } else if (chosen_random_channel > 0) {
// check if the random channel has the same center channel as the current channel
same_center_channel = check_center_channel(chosen_random_channel, current_channel, band, htmode);
if (same_center_channel) {
ulog_info(`[%s] RCS found channel %d with the same center channel as current channel %d; Skip channel switch \n`, iface, chosen_random_channel, current_channel);
res = 0;
} else {
ulog_info(`[%s] RCS done ... random channel found = %d\n`, iface, chosen_random_channel); ulog_info(`[%s] RCS done ... random channel found = %d\n`, iface, chosen_random_channel);
res = 1; res = 1;
}
} else { } else {
ulog_info(`[%s] RCS scan FAIL. Retry Channel optimization at next cycle \n`, iface); ulog_info(`[%s] RCS scan FAIL. Retry Channel optimization at next cycle \n`, iface);
res = 0; res = 0;
@@ -761,8 +611,6 @@ function channel_optimize() {
return config.interval; return config.interval;
} }
record_rrm_timestamp();
let current_rf_down = {}; let current_rf_down = {};
let cool_down_f = {}; let cool_down_f = {};
let check_all_cool_down = 0; let check_all_cool_down = 0;
@@ -1076,7 +924,7 @@ function channel_optimize() {
} }
} else { } else {
// revert back to the original channel // revert back to the original channel
ulog_info(`[%s] Channel %d may have a cac_time longer than 60 seconds, RRM failed for this interval (you might want to avoid selecting this channel) \n`, radio_iface[l], init_payload.channel); ulog_info(`[%s] Channel %d has a cac_time longer than 60 seconds, RRM failed for this interval (you might want to avoid selecting this channel) \n`, radio_iface[l], init_payload.channel);
} }
} else if (selected_algo == "ACS") { } else if (selected_algo == "ACS") {
let random_wait_time = random_time_calc(); let random_wait_time = random_time_calc();
@@ -1092,9 +940,6 @@ function channel_optimize() {
check_all_threshold_breach >= 1: threshold breach count exceeded for one or more interfaces check_all_threshold_breach >= 1: threshold breach count exceeded for one or more interfaces
*/ */
// Channel switch in progress, set flag = 1
stats_info_write("/tmp/rrm_chan_switch", 1);
// flag to check if 5G radio was restarted // flag to check if 5G radio was restarted
let radio_5g_restarted = 0; let radio_5g_restarted = 0;
@@ -1158,10 +1003,6 @@ function channel_optimize() {
sleep(30000); sleep(30000);
} }
} }
sleep(5000);
// Channel switch done, set flag = 0
stats_info_write("/tmp/rrm_chan_switch", 0);
} else { } else {
if (threshold_breach_f[l] != 1) { if (threshold_breach_f[l] != 1) {
ulog_info(`[%s] Threshold breach count (=%d) < Allowed consecutive Channel Utilization threshold breach count (=%d), will be checked again in the next interval \n`, radio_iface[l], threshold_breach_count[l], config.consecutive_threshold_breach); ulog_info(`[%s] Threshold breach count (=%d) < Allowed consecutive Channel Utilization threshold breach count (=%d), will be checked again in the next interval \n`, radio_iface[l], threshold_breach_count[l], config.consecutive_threshold_breach);
@@ -1175,7 +1016,6 @@ function channel_optimize() {
} }
} }
ulog_info(`RRM with channel optimization finished; next RRM round starts in %d seconds \n`, config.interval/1000); ulog_info(`RRM with channel optimization finished; next RRM round starts in %d seconds \n`, config.interval/1000);
record_rrm_timestamp();
return config.interval; return config.interval;
} }

View File

@@ -51,7 +51,7 @@ start_rtty() {
procd_set_param command $BIN -h $host -I "$id" -a procd_set_param command $BIN -h $host -I "$id" -a
[ -n "$port" ] && procd_append_param command -p "$port" [ -n "$port" ] && procd_append_param command -p "$port"
[ -n "$description" ] && procd_append_param command -d "$description" [ -n "$description" ] && procd_append_param command -d "$description"
[ "$ssl" = "1" ] && procd_append_param command -s -c /etc/ucentral/operational.pem -k /etc/ucentral/key.pem [ "$ssl" = "1" ] && procd_append_param command -s -c /etc/ucentral/cert.pem -k /etc/ucentral/key.pem
[ -n "$token" ] && procd_append_param command -t "$token" [ -n "$token" ] && procd_append_param command -t "$token"
[ "$verbose" = "1" ] && procd_append_param command -v [ "$verbose" = "1" ] && procd_append_param command -v
[ "$timeout" -eq "0" ] || procd_append_param command -e $timeout [ "$timeout" -eq "0" ] || procd_append_param command -e $timeout

View File

@@ -4,10 +4,10 @@ PKG_NAME:=ucentral-client
PKG_RELEASE:=1 PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-client.git PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-client.git
PKG_MIRROR_HASH:=2935998d6074f0c290d9b96c2988c89aae6f405608f12a0063fa7215498bae9a PKG_MIRROR_HASH:=2e28e0aa61b74851c7daf3634ec34d303a603e881e6c5d1fd76c837dea527582
PKG_SOURCE_PROTO:=git PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-08-11 PKG_SOURCE_DATE:=2025-07-08
PKG_SOURCE_VERSION:=549e84e5fea7230c5471d6a3dbddcc7d3152f665 PKG_SOURCE_VERSION:=69829f63ea172ce9bd19b7b02073746fe9cf6a52
PKG_LICENSE:=BSD-3-Clause PKG_LICENSE:=BSD-3-Clause
PKG_MAINTAINER:=John Crispin <john@phrozen.org> PKG_MAINTAINER:=John Crispin <john@phrozen.org>

View File

@@ -6,9 +6,9 @@ config ucentral config
option reporting 10 option reporting 10
config timeouts timeouts config timeouts timeouts
option offline 14400 option offline 120
option validate 120 option validate 120
option orphan 7200 option orphan 120
#config event #config event
# option type dhcp # option type dhcp

View File

@@ -2,8 +2,6 @@
'use strict'; 'use strict';
push(REQUIRE_SEARCH_PATH, '/usr/share/ucentral/*.uc');
import * as libubus from 'ubus'; import * as libubus from 'ubus';
import * as libuci from 'uci'; import * as libuci from 'uci';
import * as uloop from 'uloop'; import * as uloop from 'uloop';
@@ -38,7 +36,6 @@ let ucentral_running = false;
let pending_events = []; let pending_events = [];
let relay = {}; let relay = {};
let net_config = {}; let net_config = {};
let vlan_refcount = {};
function config_load() { function config_load() {
@@ -55,20 +52,6 @@ function config_load() {
net_config = {}; net_config = {};
} }
function vlan_refcount_init() {
let stations = require('wifi.station');
vlan_refcount = {};
for (let k, v in stations) {
let vlan = split(k, '-v')[1];
let count = length(v);
if (vlan && count > 0) {
vlan_refcount[vlan] = count;
}
}
}
function match(object, type, list) { function match(object, type, list) {
if (object in list || type in list) if (object in list || type in list)
return true; return true;
@@ -275,13 +258,6 @@ handlers = {
}, },
vlan_add: function(notify) { vlan_add: function(notify) {
let vlan_id = `${notify.data.vlan_id}`;
vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 0) + 1;
if (vlan_refcount[vlan_id] > 1) {
return;
}
if (config.config.swconfig) if (config.config.swconfig)
return handlers.vlan_add_swconfig(notify); return handlers.vlan_add_swconfig(notify);
@@ -304,14 +280,6 @@ handlers = {
}, },
vlan_remove: function(notify) { vlan_remove: function(notify) {
let vlan_id = `${notify.data.vlan_id}`;
vlan_refcount[vlan_id] = (vlan_refcount[vlan_id] || 1) - 1;
if (vlan_refcount[vlan_id] > 0) {
return;
}
delete vlan_refcount[vlan_id];
if (config.config.swconfig) if (config.config.swconfig)
return; return;
for (let wan in wan_ports) { for (let wan in wan_ports) {
@@ -656,7 +624,6 @@ let ubus_methods = {
}; };
config_load(); config_load();
vlan_refcount_init();
hapd_subscriber = ubus.subscriber(hapd_subscriber_notify_cb, hapd_subscriber_remove_cb); hapd_subscriber = ubus.subscriber(hapd_subscriber_notify_cb, hapd_subscriber_remove_cb);
dhcp_subscriber = ubus.subscriber(dhcp_subscriber_notify_cb, dhcp_subscriber_remove_cb); dhcp_subscriber = ubus.subscriber(dhcp_subscriber_notify_cb, dhcp_subscriber_remove_cb);

View File

@@ -4,10 +4,10 @@ PKG_NAME:=ucentral-schema
PKG_RELEASE:=1 PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-schema.git PKG_SOURCE_URL=https://github.com/Telecominfraproject/wlan-ucentral-schema.git
PKG_MIRROR_HASH:=f72d2e5b01ecb7a488d50d860da63664d992e50c7e046fed866be6733bab3c1c PKG_MIRROR_HASH:=1ad9f7b5d5d1145e3aed14937eef60d6794d821e0244cc8fa824400d3da47f5a
PKG_SOURCE_PROTO:=git PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2025-09-29 PKG_SOURCE_DATE:=2025-07-11
PKG_SOURCE_VERSION:=676e1550c53b7d48a54aa759f65d341168627c5e PKG_SOURCE_VERSION:=5276d0b8b6e83ab57354b0bcbb820de83a91ab88
PKG_MAINTAINER:=John Crispin <john@phrozen.org> PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_LICENSE:=BSD-3-Clause PKG_LICENSE:=BSD-3-Clause

View File

@@ -1,10 +1,7 @@
#!/usr/bin/ucode #!/usr/bin/ucode
import { readfile } from "fs";
let nl = require("nl80211"); let nl = require("nl80211");
let def = nl.const; let def = nl.const;
let board_name = rtrim(readfile('/tmp/sysinfo/board_name'), '\n');
let phy_index = 0;
function phy_get() { function phy_get() {
let res = nl.request(def.NL80211_CMD_GET_WIPHY, def.NLM_F_DUMP, { split_wiphy_dump: true }); let res = nl.request(def.NL80211_CMD_GET_WIPHY, def.NLM_F_DUMP, { split_wiphy_dump: true });
@@ -15,11 +12,5 @@ function phy_get() {
return res; return res;
} }
switch(board_name) {
case 'edgecore,eap112':
phy_index = 1;
break;
}
let phys = phy_get(); let phys = phy_get();
printf("%d\n", phys[phy_index].max_ap_assoc || 32); printf("%d\n", phys[0].max_ap_assoc || 32);

View File

@@ -20,68 +20,9 @@ let config;
let offline_timer; let offline_timer;
let current_state; let current_state;
let online = false; let online = false;
let leds_off = false;
function self_healing() { function self_healing() {
let heal_wifi = false;
let health_stat = json(fs.readfile('/tmp/ucentral.health'));
let last_nw_restart_ts = int(fs.readfile('/tmp/ucentral.nw_restart_ts')) || 0;
let time_passed_since_nw_restart = time() - last_nw_restart_ts;
if (health_stat) {
if (health_stat.data.rrm_chanutil == false) {
// RRM with Channel utilization abnormal, restart rrmd
ulog(LOG_INFO, 'RRM with Channel utilization abnormal, restarting rrmd\n');
system('/etc/init.d/rrmd restart');
}
if (health_stat.sanity != 100) {
for (let iface in health_stat.data.interfaces) {
let iface_data = health_stat.data.interfaces[iface];
if (iface_data.ssids) {
// one of the VAPs have an issue: flag up!
heal_wifi = true;
ulog(LOG_INFO, 'Time passed since last network restart = %d seconds\n', time_passed_since_nw_restart);
break;
}
}
} else {
// all VAPs are healthy, no need to heal anything
return;
}
}
if (fs.stat('/tmp/rrm_timestamp')) {
let rrm_chan_switch_flag = int(fs.readfile('/tmp/rrm_chan_switch')) || 0;
let last_rrm_timestamp = int(fs.readfile('/tmp/rrm_timestamp'));
let time_passed_since_rrm = time() - last_rrm_timestamp;
if (rrm_chan_switch_flag == 1) {
// RRM chan switch in progress, do not restart network!
ulog(LOG_INFO, 'RRM channel switch in progress, cannot restart network \n');
heal_wifi = false;
}
if (time_passed_since_rrm < 180) {
// RRM in progress, do not restart network!
ulog(LOG_INFO, 'RRM with Channel utilization may still be in progress, cannot restart network \n');
heal_wifi = false;
}
}
// keep a gap of at least 5 minutes between network restarts
if (heal_wifi && time_passed_since_nw_restart > 300) {
ulog(LOG_INFO, 'Restarting network \n');
// update network restart timestamp
let f = fs.open("/tmp/ucentral.nw_restart_ts", "w");
if (f) {
f.write(time());
f.close();
}
// restart network
system('/etc/init.d/network restart');
}
} }
let healthcheck; let healthcheck;
@@ -101,7 +42,7 @@ healthcheck = {
}, },
spawn: function() { spawn: function() {
ulog(LOG_INFO, 'healthcheck execute\n'); ulog(LOG_INFO, 'healtcheck execute\n');
healthcheck.pid = uloop.process('/usr/share/ucentral/health.uc', [], {}, healthcheck.complete); healthcheck.pid = uloop.process('/usr/share/ucentral/health.uc', [], {}, healthcheck.complete);
}, },
}; };
@@ -149,13 +90,6 @@ function online_handler() {
function config_load() { function config_load() {
ulog(LOG_INFO, 'loading config\n'); ulog(LOG_INFO, 'loading config\n');
uci.load('system');
let led_off_cfg = uci.get("system", "@system[0]", "leds_off");
if (led_off_cfg == 1) {
leds_off = true;
}
uci.load('state'); uci.load('state');
config = uci.get_all('state'); config = uci.get_all('state');
@@ -199,7 +133,7 @@ function led_find(alias) {
function factory_reset_timeout() { function factory_reset_timeout() {
let led = led_find('led-running'); let led = led_find('led-running');
if (led) if (led)
led_write(led, 'trigger', leds-off ? 'none' : 'default-on'); led_write(led, 'trigger', 'default-on');
} }
let blink_timer; let blink_timer;
@@ -218,7 +152,7 @@ let state_handler = {
offline: function() { offline: function() {
online = false; online = false;
let led = led_find('led-running'); let led = led_find('led-running');
if (!leds_off && led) if (led)
led_write(led, 'trigger', 'heartbeat'); led_write(led, 'trigger', 'heartbeat');
if (config.ui.offline_trigger) { if (config.ui.offline_trigger) {
if (offline_timer) if (offline_timer)
@@ -231,7 +165,7 @@ let state_handler = {
online: function() { online: function() {
online = true; online = true;
let led = led_find('led-running'); let led = led_find('led-running');
if (!leds_off && led) if (led)
led_write(led, 'trigger', 'default-on'); led_write(led, 'trigger', 'default-on');
online_handler(); online_handler();
return 0; return 0;

View File

@@ -3,6 +3,12 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=ucentral-tools PKG_NAME:=ucentral-tools
PKG_RELEASE:=1 PKG_RELEASE:=1
PKG_SOURCE_URL=https://github.com/blogic/ucentral-tools.git
PKG_MIRROR_HASH:=9ae6a0cd431595871c233550427c4043c2ba7ddb3c5d87e46ab74a03b2b5a947
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-01-28
PKG_SOURCE_VERSION:=b013fc636e48d407870a46aaa68a09ed74de8d6f
PKG_MAINTAINER:=John Crispin <john@phrozen.org> PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_LICENSE:=BSD-3-Clause PKG_LICENSE:=BSD-3-Clause

View File

@@ -1,36 +0,0 @@
cmake_minimum_required(VERSION 2.6)
PROJECT(openwifi-tools C)
INCLUDE(GNUInstallDirs)
ADD_DEFINITIONS(-Os -ggdb -Wall -Werror --std=gnu99 -Wmissing-declarations)
SET(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "")
ADD_EXECUTABLE(firstcontact firstcontact.c)
TARGET_LINK_LIBRARIES(firstcontact curl crypto ssl ubox)
INSTALL(TARGETS firstcontact
RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
)
ADD_EXECUTABLE(dhcpdiscover dhcpdiscover.c)
INSTALL(TARGETS dhcpdiscover
RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
)
ADD_EXECUTABLE(dnsprobe dnsprobe.c)
TARGET_LINK_LIBRARIES(dnsprobe ubox resolv)
INSTALL(TARGETS dnsprobe
RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
)
ADD_EXECUTABLE(radiusprobe radiusprobe.c)
TARGET_LINK_LIBRARIES(radiusprobe radcli)
INSTALL(TARGETS radiusprobe
RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
)
ADD_EXECUTABLE(ip-collide ip-collide.c)
TARGET_LINK_LIBRARIES(ip-collide ubox)
INSTALL(TARGETS ip-collide
RUNTIME DESTINATION ${CMAKE_INSTALL_SBINDIR}
)

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