/dts-v1/;
#include "mt7981.dtsi"
/ {
	model = "EdgeCore EAP111";
	compatible = "edgecore,eap111";
	chosen {
		bootargs = "console=ttyS0,115200n1 loglevel=8  \
				earlycon=uart8250,mmio32,0x11002000";
	};

	aliases {
		led-boot = &led_green;
		led-failsafe = &led_green;
		led-running = &led_green;
		led-upgrade = &led_green;
		serial0 = &uart0;
	};

	memory {
		// fpga ddr2: 128MB*2
		reg = <0 0x40000000 0 0x20000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_green: led@0 {
			label = "green:power";
			gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
		};

		led_orange: led@1 {
			label = "orange:wan";
			gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
		};

		led_blue: led@2 {
			label = "blue:wlan5g";
			gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
		};
	};

	nmbm_spim_nand {
		compatible = "generic,nmbm";

		#address-cells = <1>;
		#size-cells = <1>;

		lower-mtd-device = <&spi_nand>;
		forced-create;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "BL2";
				reg = <0x00000 0x0100000>;
				read-only;
			};

			partition@100000 {
				label = "u-boot-env";
				reg = <0x0100000 0x0080000>;
			};

			factory: partition@180000 {
				label = "Factory";
				reg = <0x180000 0x0200000>;
			};

			partition@380000 {
				label = "FIP";
				reg = <0x380000 0x0200000>;
			};

			partition@580000 {
				label = "rootfs1";
				reg = <0x580000 0x4000000>;
				compatible = "linux,ubi";
			};
			
			partition@4580000 {
				label = "rootfs2";
				reg = <0x4580000 0x4000000>;
				compatible = "linux,ubi";
			};
		};
	};

	sound_wm8960 {
		compatible = "mediatek,mt7986-wm8960-sound";
		audio-routing = "Headphone", "HP_L",
				"Headphone", "HP_R",
				"LINPUT1", "AMIC",
				"RINPUT1", "AMIC";

		status = "disabled";

		platform {
			sound-dai = <&afe>;
		};

		codec {
			sound-dai = <&wm8960>;
		};
	};

	sound_si3218x {
		compatible = "mediatek,mt7986-si3218x-sound";
		status = "disabled";

		platform {
			sound-dai = <&afe>;
		};

		codec {
			sound-dai = <&proslic_spi>;
		};
	};
};

&afe {
	pinctrl-names = "default";
	pinctrl-0 = <&pcm_pins>;
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c_pins>;
	status = "disabled";

	wm8960: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
	};
};

&uart0 {
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	status = "okay";
};

&watchdog {
	status = "okay";
};

&eth {
        status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "sgmii";
		phy-handle = <&phy1>;      // add phy handler
		mtd-mac-address = <&factory 0x24>;
	};

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-mode = "gmii";
		phy-handle = <&phy0>;
		mtd-mac-address = <&factory 0x2a>;
	};

        mdio: mdio-bus {
                #address-cells = <1>;
                #size-cells = <0>;

		phy0: ethernet-phy@0 {
			compatible = "ethernet-phy-id03a2.9461";
			reg = <0>;
			phy-mode = "gmii";
			nvmem-cells = <&phy_calibration>;
			nvmem-cell-names = "phy-cal-data";
		};

		phy1: ethernet-phy@1 {
			compatible = "ethernet-phy-id03a2.9471";
			reg = <24>;            // set phy address to 0x18
			reset-gpios = <&pio 39 1>;
			reset-assert-us = <600>;
			reset-deassert-us = <20000>;
			phy-mode = "sgmii";
    };

        };
};

&hnat {
	mtketh-wan = "eth1";
	mtketh-lan = "lan";
	mtketh-max-gmac = <2>;
	status = "okay";
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_flash_pins>;
	status = "okay";
	spi_nand: spi_nand@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		reg = <0>;
		spi-max-frequency = <52000000>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
	};
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spic_pins>;
	status = "okay";

	proslic_spi: proslic_spi@0 {
		compatible = "silabs,proslic_spi";
		reg = <0>;
		spi-max-frequency = <10000000>;
		spi-cpha = <1>;
		spi-cpol = <1>;
		channel_count = <1>;
		debug_level = <4>;       /* 1 = TRC, 2 = DBG, 4 = ERR */
		reset_gpio = <&pio 15 0>;
		ig,enable-spi = <1>;     /* 1: Enable, 0: Disable */
	};
};

&wbsys {
	mediatek,mtd-eeprom = <&factory 0x0000>;
	status = "okay";
	pinctrl-names = "dbdc";
	pinctrl-0 = <&wf_dbdc_pins>;
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_pins>;
	status = "okay";

	slb9670: slb9670@0 {
		compatible = "infineon,slb9670";
		reg = <0>; /* CE0 */
		#address-cells = <1>;
		#size-cells = <0>;
		spi-cal-enable;
		spi-cal-mode = "read-data";
		spi-cal-datalen = <2>;
		spi-cal-data = /bits/ 8 <0x00 0x1b>;
		spi-max-frequency = <40000000>;
	};
};

&pio {

	i2c_pins: i2c-pins-g0 {
                mux {
                        function = "i2c";
                        groups = "i2c0_0";
                };
        };

        pcm_pins: pcm-pins-g0 {
                mux {
                        function = "pcm";
                        groups = "pcm";
                };
        };

        pwm0_pin: pwm0-pin-g0 {
                mux {
                        function = "pwm";
                        groups = "pwm0_0";
                };
        };

        pwm1_pin: pwm1-pin-g0 {
                mux {
                        function = "pwm";
                        groups = "pwm1_0";
                };
        };

        pwm2_pin: pwm2-pin {
                mux {
                        function = "pwm";
                        groups = "pwm2";
                };
        };

	spi0_flash_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};

		conf-pu {
			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};

	spic_pins: spi1-pins {
		mux {
			function = "spi";
			groups = "spi1_1";
		};
	};

	spi2_pins: spi2-pins {
		mux {
			function = "spi";
			groups = "spi2";
		};
	};

	uart1_pins: uart1-pins-g1 {
                mux {
                        function = "uart";
                        groups = "uart1_1";
                };
        };

	uart2_pins: uart2-pins-g1 {
		mux {
                        function = "uart";
                        groups = "uart2_1";
                };
        };

	wf_dbdc_pins: wf_dbdc-pins {
		mux {
			function = "eth";
			groups = "wf0_mode1";
		};
		conf {
			pins = "WF_HB1", "WF_HB2", "WF_HB3", "WF_HB4",
			       "WF_HB0", "WF_HB0_B", "WF_HB5", "WF_HB6",
			       "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10",
			       "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ",
			       "WF_CBA_RESETB", "WF_DIG_RESETB";
			drive-strength = <MTK_DRIVE_4mA>;
		};
	};
};

&xhci {
	mediatek,u3p-dis-msk = <0x0>;
	phys = <&u2port0 PHY_TYPE_USB2>,
	       <&u3port0 PHY_TYPE_USB3>;
	status = "okay";
};