mirror of
https://github.com/Telecominfraproject/wlan-ap.git
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75 lines
3.1 KiB
Diff
75 lines
3.1 KiB
Diff
From 357da3320f8bcad056b905fb85cad3a29c343d31 Mon Sep 17 00:00:00 2001
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From: YenLin Pan <yenlin.pan@zyxel.com.tw>
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Date: Tue, 12 Aug 2025 15:41:39 +0800
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Subject: [PATCH] thermal: thermal setting
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lo0 -100 -hi0 105 -off0 0
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lo1 95 -hi1 110 -off1 20
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lo2 100 -hi2 115 -off2 60
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lo3 105 -hi3 119 -off3 98
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Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
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---
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drivers/net/wireless/ath/ath12k/thermal.h | 34 +++++++++++------------
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1 file changed, 17 insertions(+), 17 deletions(-)
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diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
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index 5c91906..e81f9a4 100644
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--- a/drivers/net/wireless/ath/ath12k/thermal.h
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+++ b/drivers/net/wireless/ath/ath12k/thermal.h
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@@ -13,34 +13,34 @@
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/* Below temperatures are in celsius */
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#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
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-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
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+#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105
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#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
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-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
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+#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110
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#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
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-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
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+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
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#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
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-#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
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+#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 119
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#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
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-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
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-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
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-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
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-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
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-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
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-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
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-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
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+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
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+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
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+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
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+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
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+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
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+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 105
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+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 119
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#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
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#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
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#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
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-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
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-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
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-#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
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+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 20
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+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 60
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+#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 98
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#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
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-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
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-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
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-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
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+#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
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+#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
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+#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
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#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
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#define THERMAL_CONFIG_POUT0 0
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--
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2.34.1
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