mirror of
https://github.com/Telecominfraproject/wlan-ap.git
synced 2025-10-29 01:22:25 +00:00
688 lines
20 KiB
Plaintext
Executable File
688 lines
20 KiB
Plaintext
Executable File
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* IPQ5332 RDP477 board device tree source
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*
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* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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#include "ipq5332.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "ipq5332-default-memory.dtsi"
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/ {
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model = "SONICFI RAP750E-S";
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compatible = "sonicfi,rap750e-s","qcom,ipq5332-ap-mi01.3-c2", "qcom,ipq5332";
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#ifdef __IPQ_MEM_PROFILE_512_MB__
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/* 512M Memory Layout for IPQ5332 + QCN6432
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* +==========+==============+========================+
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* | | | |
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* | Region | Start Offset | Size |
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* | | | |
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* +---------+--------------+-------------------------+
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* | Q6 | | |
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* | code/ | 0x4A900000 | 20MB |
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* | data | | |
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* +---------+--------------+-------------------------+
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* | IPQ5332 | | |
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* | data | 0x4BD00000 | 17MB |
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* +---------+--------------+-------------------------+
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* | IPQ5332 | | |
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* | M3 Dump | 0x4CE00000 | 1MB |
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* +---------+--------------+-------------------------+
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* | IPQ5332 | | |
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* | QDSS | 0x4CF00000 | 1MB |
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* +---------+--------------+-------------------------+
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* |IPQ5332 | | |
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* | CALDB | 0x4D000000 | 3MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | data | 0x4D300000 | 16MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | M3 Dump | 0x4E300000 | 1MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | QDSS | 0x4E400000 | 1MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | CALDB | 0x4E500000 | 5MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* |MEM_HOLE | 0x4EA00000 | 5MB |
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* +---------+--------------+-------------------------+
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* | | | |
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* | MLO | 0x4EF00000 | 17MB |
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* +==================================================+
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* | |
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* | |
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* | |
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* | Rest of memory for Linux |
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* | |
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* | |
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* | |
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* +==================================================+
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*/
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reserved-memory {
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/delete-node/ m3_dump@4cc00000;
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/delete-node/ q6_etr_dump@1;
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/delete-node/ mlo_global_mem_0@0x4db00000;
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/delete-node/ wcnss@4a900000;
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/delete-node/ q6_caldb_region@4ce00000;
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q6_mem_regions: q6_mem_regions@4A900000 {
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no-map;
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reg = <0x0 0x4A900000 0x0 0x4600000>;
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};
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q6_code_data: q6_code_data@4A900000 {
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no-map;
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reg = <0x0 0x4A900000 0x0 0x1400000>;
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};
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q6_ipq5332_data: q6_ipq5332_data@4BD00000 {
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no-map;
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reg = <0x0 0x4BD00000 0x0 0x1100000>;
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};
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m3_dump: m3_dump@4CE00000 {
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no-map;
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reg = <0x0 0x4CE00000 0x0 0x100000>;
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};
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q6_etr_region: q6_etr_dump@4CF00000 {
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no-map;
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reg = <0x0 0x4CF00000 0x0 0x100000>;
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};
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q6_ipq5332_caldb: q6_ipq5332_caldb@4D000000 {
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no-map;
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reg = <0x0 0x4D000000 0x0 0x300000>;
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};
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q6_qcn6432_data_1: q6_qcn6432_data_1@4D300000 {
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no-map;
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reg = <0x0 0x4D300000 0x0 0x1000000>;
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};
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m3_dump_qcn6432_1: m3_dump_qcn6432_1@4E300000 {
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no-map;
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reg = <0x0 0x4E300000 0x0 0x100000>;
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};
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q6_qcn6432_etr_1: q6_qcn6432_etr_1@4E400000 {
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no-map;
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reg = <0x0 0x4E400000 0x0 0x100000>;
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};
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q6_qcn6432_caldb_1: q6_qcn6432_caldb_1@4E500000 {
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no-map;
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reg = <0x0 0x4E500000 0x0 0x500000>;
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};
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mlo_global_mem0: mlo_global_mem_0@4EF00000 {
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no-map;
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reg = <0x0 0x4EF00000 0x0 0x1100000>;
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};
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};
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#else
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/* 1G Memory Layout for IPQ5332 + QCN6432
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* +==========+==============+========================+
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* | | | |
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* | Region | Start Offset | Size |
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* | | | |
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* +---------+--------------+-------------------------+
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* | Q6 | | |
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* | code/ | 0x4A900000 | 20MB |
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* | data | | |
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* +---------+--------------+-------------------------+
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* | IPQ5332 | | |
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* | data | 0x4BD00000 | 21MB |
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* +---------+--------------+-------------------------+
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* | IPQ5332 | | |
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* | M3 Dump | 0x4D200000 | 1MB |
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* +---------+--------------+-------------------------+
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* | IPQ5332 | | |
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* | QDSS | 0x4D300000 | 1MB |
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* +---------+--------------+-------------------------+
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* |IPQ5332 | | |
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* | CALDB | 0x4D400000 | 5MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | data | 0x4D900000 | 21MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | M3 Dump | 0x4EE00000 | 1MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | QDSS | 0x4EF00000 | 1MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* | CALDB | 0x4F000000 | 5MB |
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* +---------+--------------+-------------------------+
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* |QCN6432_1| | |
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* |MEM_HOLE | 0x4F500000 | 5MB |
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* +---------+--------------+-------------------------+
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* | | | |
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* | MLO | 0x4FA00000 | 17MB |
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* +==================================================+
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* | |
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* | |
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* | |
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* | Rest of memory for Linux |
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* | |
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* | |
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* | |
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* +==================================================+
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*/
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reserved-memory {
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/delete-node/ m3_dump@4cc00000;
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/delete-node/ q6_etr_dump@1;
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/delete-node/ mlo_global_mem_0@0x4db00000;
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/delete-node/ wcnss@4a900000;
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/delete-node/ q6_caldb_region@4ce00000;
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q6_mem_regions: q6_mem_regions@4A900000 {
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no-map;
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reg = <0x0 0x4A900000 0x0 0x5100000>;
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};
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q6_code_data: q6_code_data@4A900000 {
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no-map;
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reg = <0x0 0x4A900000 0x0 0x1400000>;
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};
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q6_ipq5332_data: q6_ipq5332_data@4BD00000 {
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no-map;
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reg = <0x0 0x4BD00000 0x0 0x1500000>;
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};
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m3_dump: m3_dump@4D200000 {
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no-map;
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reg = <0x0 0x4D200000 0x0 0x100000>;
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};
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q6_etr_region: q6_etr_dump@4D300000 {
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no-map;
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reg = <0x0 0x4D300000 0x0 0x100000>;
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};
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q6_ipq5332_caldb: q6_ipq5332_caldb@4D400000 {
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no-map;
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reg = <0x0 0x4D400000 0x0 0x500000>;
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};
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q6_qcn6432_data_1: q6_qcn6432_data_1@4D900000 {
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no-map;
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reg = <0x0 0x4D900000 0x0 0x1500000>;
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};
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m3_dump_qcn6432_1: m3_dump_qcn6432_1@4EE00000 {
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no-map;
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reg = <0x0 0x4EE00000 0x0 0x100000>;
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};
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q6_qcn6432_etr_1: q6_qcn6432_etr_1@4EF00000 {
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no-map;
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reg = <0x0 0x4EF00000 0x0 0x100000>;
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};
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q6_qcn6432_caldb_1: q6_qcn6432_caldb_1@4F000000 {
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no-map;
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reg = <0x0 0x4F000000 0x0 0x500000>;
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};
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mlo_global_mem0: mlo_global_mem_0@4FA00000 {
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no-map;
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reg = <0x0 0x4FA00000 0x0 0x1100000>;
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};
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};
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#endif
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aliases {
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serial0 = &blsp1_uart0;
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serial1 = &blsp1_uart1;
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ethernet0 = "/soc/dp1";
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//ethernet1 = "/soc/dp2";
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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stdout-path = "serial0";
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};
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soc@0 {
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mdio:mdio@90000 {
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pinctrl-0 = <&mdio1_pins>;
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pinctrl-names = "default";
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/*gpio26 for manhattan reset*/
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phy-reset-gpio = <&tlmm 26 GPIO_ACTIVE_LOW>;
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <16>;
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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status = "okay";
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button@1 {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
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linux,input-type = <1>;
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debounce-interval = <60>;
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};
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};
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pwmleds {
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compatible = "pwm-leds";
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red {
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label = "pwm:red";
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pwms = <&pwm 2 1250000>;
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max-brightness = <255>;
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linux,default-trigger = "none";
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};
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green {
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label = "pwm:green";
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pwms = <&pwm 3 1250000>;
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max-brightness = <255>;
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linux,default-trigger = "none";
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};
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led_power: blue {
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label = "pwm:blue";
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pwms = <&pwm 1 1250000>;
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max-brightness = <255>;
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linux,default-trigger = "none";
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};
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white {
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label = "pwm:white";
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pwms = <&pwm 0 1250000>;
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max-brightness = <255>;
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linux,default-trigger = "none";
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};
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};
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ess-instance {
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num_devices = <0x1>;
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ess-switch@3a000000 {
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switch_cpu_bmp = <0x1>; /* cpu port bitmap */
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switch_lan_bmp = <0x4>; /* lan port bitmap */
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switch_wan_bmp = <0x0>; /* wan port bitmap */
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switch_mac_mode = <0xff>; /* mac mode for uniphy instance0*/
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switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
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switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
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qcom,port_phyinfo {
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port@1 {
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port_id = <2>;
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phy_address = <16>;
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};
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};
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};
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};
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dp1 {
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device_type = "network";
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compatible = "qcom,nss-dp";
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qcom,id = <2>;
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reg = <0x3a504000 0x4000>;
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qcom,mactype = <1>;
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local-mac-address = [000000000000];
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mdio-bus = <&mdio>;
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qcom,phy-mdio-addr = <16>;
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qcom,link-poll = <1>;
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phy-mode = "sgmii";
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};
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/* EDMA host driver configuration for the board */
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edma@3ab00000 {
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qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
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qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
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qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
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qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
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qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
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qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
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qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
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qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
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qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
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qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
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qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
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qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
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qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
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qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
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/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
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qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
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<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
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qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
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<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
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<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
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<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
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<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
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qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
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qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
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qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
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qcom,rx-queue-start = <0>; /* Rx queue start */
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qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
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<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
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<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
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<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
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<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
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<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
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<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
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<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
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interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
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<0 164 4>, /* Tx complete ring id #5 IRQ info */
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<0 165 4>, /* Tx complete ring id #6 IRQ info */
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<0 166 4>, /* Tx complete ring id #7 IRQ info */
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<0 167 4>, /* Tx complete ring id #8 IRQ info */
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<0 168 4>, /* Tx complete ring id #9 IRQ info */
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<0 169 4>, /* Tx complete ring id #10 IRQ info */
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<0 170 4>, /* Tx complete ring id #11 IRQ info */
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<0 171 4>, /* Tx complete ring id #12 IRQ info */
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<0 172 4>, /* Tx complete ring id #13 IRQ info */
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<0 173 4>, /* Tx complete ring id #14 IRQ info */
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<0 174 4>, /* Tx complete ring id #15 IRQ info */
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<0 139 4>, /* Rx desc ring id #12 IRQ info */
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<0 140 4>, /* Rx desc ring id #13 IRQ info */
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<0 141 4>, /* Rx desc ring id #14 IRQ info */
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<0 142 4>, /* Rx desc ring id #15 IRQ info */
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<0 191 4>, /* Misc error IRQ info */
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<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
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<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
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<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
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<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
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<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
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<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
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<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
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<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
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<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
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<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
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<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
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<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
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<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
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<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
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};
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wsi: wsi {
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id = <0>;
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num_chip = <2>;
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status = "okay";
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chip_info = <0 1 1>,
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<1 1 0>;
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};
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q6v5_wcss: remoteproc@d100000 {
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boot-args = <0x1 0x4 0x3 0x0 0x26 0x2>;
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memory-region = <&q6_mem_regions>;
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q6_wcss_pd1: remoteproc_pd1 {
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status = "okay";
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};
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q6_wcss_pd2: remoteproc_pd2 {
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compatible = "qcom,ipq5332-wcss-pcie-mpd";
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firmware = "IPQ5332/q6_fw2.mdt";
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m3_firmware = "qcn6432/iu_fw.mdt";
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interrupts-extended = <&wcss_smp2p_in 16 0>,
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<&wcss_smp2p_in 17 0>,
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<&wcss_smp2p_in 20 0>,
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<&wcss_smp2p_in 19 0>;
|
|
interrupt-names = "fatal",
|
|
"ready",
|
|
"spawn-ack",
|
|
"stop-ack";
|
|
qcom,smem-states = <&wcss_smp2p_out 16>,
|
|
<&wcss_smp2p_out 17>,
|
|
<&wcss_smp2p_out 18>;
|
|
qcom,smem-state-names = "shutdown",
|
|
"stop",
|
|
"spawn";
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&blsp1_uart0 {
|
|
pinctrl-0 = <&serial_0_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
/*
|
|
&blsp1_uart1 {
|
|
pinctrl-0 = <&serial_1_pins>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
*/
|
|
&blsp1_i2c1 {
|
|
clock-frequency = <400000>;
|
|
pinctrl-0 = <&i2c_1_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&blsp1_spi0 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&sdhc {
|
|
bus-width = <4>;
|
|
max-frequency = <192000000>;
|
|
mmc-ddr-1_8v;
|
|
mmc-hs200-1_8v;
|
|
non-removable;
|
|
pinctrl-0 = <&sdc_default_state>;
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
&sleep_clk {
|
|
clock-frequency = <32000>;
|
|
};
|
|
|
|
&xo {
|
|
clock-frequency = <24000000>;
|
|
};
|
|
|
|
&qpic_bam {
|
|
status = "okay";
|
|
};
|
|
|
|
&qpic_nand {
|
|
pinctrl-0 = <&qspi_default_state>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
nandcs@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
nand-ecc-strength = <8>;
|
|
nand-ecc-step-size = <512>;
|
|
nand-bus-width = <8>;
|
|
};
|
|
};
|
|
|
|
/* PINCTRL */
|
|
|
|
&tlmm {
|
|
qspi_default_state: qspi-default-state {
|
|
qspi_clock {
|
|
pins = "gpio13";
|
|
function = "qspi_clk";
|
|
drive-strength = <8>;
|
|
bias-pull-down;
|
|
};
|
|
|
|
qspi_cs {
|
|
pins = "gpio12";
|
|
function = "qspi_cs";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
qspi_data {
|
|
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
|
function = "qspi_data";
|
|
drive-strength = <8>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
pwm_pins: pwm_pinmux {
|
|
/* PWM LED GREEN */
|
|
mux_1 {
|
|
pins = "gpio43";
|
|
function = "pwm0";
|
|
drive-strength = <8>;
|
|
};
|
|
/* PWM LED BLUE */
|
|
mux_2 {
|
|
pins = "gpio45";
|
|
function = "pwm0";
|
|
drive-strength = <8>;
|
|
};
|
|
/* PWM LED RED */
|
|
mux_3 {
|
|
pins = "gpio44";
|
|
function = "pwm0";
|
|
drive-strength = <8>;
|
|
};
|
|
/* PWM LED WHITE */
|
|
mux_4 {
|
|
pins = "gpio46";
|
|
function = "pwm0";
|
|
drive-strength = <8>;
|
|
};
|
|
};
|
|
/*
|
|
serial_1_pins: serial1-pinmux {
|
|
pins = "gpio33", "gpio34", "gpio35", "gpio36";
|
|
function = "blsp1_uart2";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
*/
|
|
i2c_1_pins: i2c-1-state {
|
|
pins = "gpio29", "gpio30";
|
|
function = "blsp1_i2c0";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
/*
|
|
gpio_leds_default: gpio-leds-default-state {
|
|
pins = "gpio36";
|
|
function = "gpio";
|
|
drive-strength = <8>;
|
|
bias-pull-down;
|
|
};
|
|
*/
|
|
button_pins: button-state {
|
|
pins = "gpio24";
|
|
function = "gpio";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
sdc_default_state: sdc-default-state {
|
|
clk-pins {
|
|
pins = "gpio13";
|
|
function = "sdc_clk";
|
|
drive-strength = <8>;
|
|
bias-disable;
|
|
};
|
|
|
|
cmd-pins {
|
|
pins = "gpio12";
|
|
function = "sdc_cmd";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
data-pins {
|
|
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
|
function = "sdc_data";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
&license_manager {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3 {
|
|
qcom,select-utmi-as-pipe-clk;
|
|
status = "disabled";
|
|
};
|
|
|
|
&pwm {
|
|
pinctrl-0 = <&pwm_pins>;
|
|
used-pwm-indices = <1>, <1>, <1>, <1>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
};
|
|
|
|
&hs_m31phy_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&wifi0 {
|
|
qcom,multipd_arch;
|
|
qcom,rproc = <&q6_wcss_pd1>;
|
|
qcom,rproc_rpd = <&q6v5_wcss>;
|
|
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
|
|
qcom,bdf-addr = <0x4BD00000 0x4BD00000 0x0 0x0 0x0 0x0>;
|
|
qcom,caldb-addr = <0x4D400000 0x4D000000 0x0 0x0 0x0 0x0>;
|
|
#ifdef __IPQ_MEM_PROFILE_512_MB__
|
|
qcom,tgt-mem-mode = <1>;
|
|
qcom,caldb-size = <0x300000>;
|
|
#else
|
|
qcom,tgt-mem-mode = <0>;
|
|
qcom,caldb-size = <0x500000>;
|
|
#endif
|
|
qcom,board_id = <0x1b>;
|
|
memory-region = <&q6_ipq5332_data>;
|
|
qcom,wsi = <&wsi>;
|
|
qcom,wsi_index = <0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&wifi1 {
|
|
qcom,multipd_arch;
|
|
qcom,rproc = <&q6_wcss_pd2>;
|
|
qcom,rproc_rpd = <&q6v5_wcss>;
|
|
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
|
|
qcom,bdf-addr = <0x4D900000 0x4D300000 0x0 0x0 0x0 0x0>;
|
|
qcom,caldb-addr = <0x4F000000 0x4E500000 0x0 0x0 0x0 0x0>;
|
|
qcom,umac-irq-reset-addr = <0x20000884>;
|
|
qcom,caldb-size = <0x500000>;
|
|
#ifdef __IPQ_MEM_PROFILE_512_MB__
|
|
qcom,tgt-mem-mode = <1>;
|
|
#else
|
|
qcom,tgt-mem-mode = <0>;
|
|
#endif
|
|
qcom,board_id = <0x060>;
|
|
memory-region = <&q6_qcn6432_data_1>;
|
|
qcom,wsi = <&wsi>;
|
|
qcom,wsi_index = <1>;
|
|
status = "okay";
|
|
interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
|
|
interrupt-names = "umac_reset";
|
|
};
|