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gma hsw+: Add boilerplate for DDI buffer translations
Change-Id: I8fcba64a3c663b9eea7fb11088c62ea584d63e04 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20129 Tested-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
@@ -1,3 +1,4 @@
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gfxinit-y += hw-gfx-gma-connectors-ddi-buffers.ads
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gfxinit-y += hw-gfx-gma-ddi_phy.adb
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gfxinit-y += hw-gfx-gma-ddi_phy.ads
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gfxinit-y += hw-gfx-gma-plls.adb
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21
common/broxton/hw-gfx-gma-connectors-ddi-buffers.ads
Normal file
21
common/broxton/hw-gfx-gma-connectors-ddi-buffers.ads
Normal file
@@ -0,0 +1,21 @@
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--
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-- Copyright (C) 2017 secunet Security Networks AG
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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private package HW.GFX.GMA.Connectors.DDI.Buffers
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is
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procedure Translations (Trans : out Buf_Trans_Array; Port : Digital_Port)
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is null;
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end HW.GFX.GMA.Connectors.DDI.Buffers;
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@@ -1,3 +1,4 @@
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gfxinit-y += hw-gfx-gma-connectors-ddi-buffers.ads
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gfxinit-y += hw-gfx-gma-ddi_phy.ads
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gfxinit-y += hw-gfx-gma-plls-lcpll.ads
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gfxinit-y += hw-gfx-gma-plls-wrpll.adb
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21
common/haswell/hw-gfx-gma-connectors-ddi-buffers.ads
Normal file
21
common/haswell/hw-gfx-gma-connectors-ddi-buffers.ads
Normal file
@@ -0,0 +1,21 @@
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--
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-- Copyright (C) 2017 secunet Security Networks AG
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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private package HW.GFX.GMA.Connectors.DDI.Buffers
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is
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procedure Translations (Trans : out Buf_Trans_Array; Port : Digital_Port)
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is null;
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end HW.GFX.GMA.Connectors.DDI.Buffers;
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@@ -1,5 +1,5 @@
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--
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-- Copyright (C) 2015-2016 secunet Security Networks AG
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-- Copyright (C) 2015-2017 secunet Security Networks AG
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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@@ -22,6 +22,7 @@ with HW.GFX.GMA.DP_Info;
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with HW.GFX.GMA.DP_Aux_Ch;
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with HW.GFX.GMA.SPLL;
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with HW.GFX.GMA.DDI_Phy;
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with HW.GFX.GMA.Connectors.DDI.Buffers;
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with HW.Debug;
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with GNAT.Source_Info;
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@@ -94,8 +95,12 @@ package body HW.GFX.GMA.Connectors.DDI is
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HW.GFX.DP_Bandwidth_2_7 => PORT_CLK_SEL_LCPLL1350,
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HW.GFX.DP_Bandwidth_5_4 => PORT_CLK_SEL_LCPLL2700);
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type DDI_Buf_Trans_Regs_Array
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is array (Buf_Trans_Range) of Registers.Registers_Index;
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type DDI_Registers is record
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BUF_CTL : Registers.Registers_Index;
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BUF_TRANS : DDI_Buf_Trans_Regs_Array;
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DP_TP_CTL : Registers.Registers_Index;
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DP_TP_STATUS : Registers.Registers_Invalid_Index;
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PORT_CLK_SEL : Registers.Registers_Index;
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@@ -106,26 +111,131 @@ package body HW.GFX.GMA.Connectors.DDI is
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DDI_Regs : constant DDI_Registers_Array := DDI_Registers_Array'
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(DIGI_A => DDI_Registers'
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(BUF_CTL => Registers.DDI_BUF_CTL_A,
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BUF_TRANS => DDI_Buf_Trans_Regs_Array'
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(Registers.DDI_BUF_TRANS_A_S0T1,
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Registers.DDI_BUF_TRANS_A_S0T2,
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Registers.DDI_BUF_TRANS_A_S1T1,
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Registers.DDI_BUF_TRANS_A_S1T2,
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Registers.DDI_BUF_TRANS_A_S2T1,
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Registers.DDI_BUF_TRANS_A_S2T2,
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Registers.DDI_BUF_TRANS_A_S3T1,
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Registers.DDI_BUF_TRANS_A_S3T2,
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Registers.DDI_BUF_TRANS_A_S4T1,
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Registers.DDI_BUF_TRANS_A_S4T2,
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Registers.DDI_BUF_TRANS_A_S5T1,
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Registers.DDI_BUF_TRANS_A_S5T2,
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Registers.DDI_BUF_TRANS_A_S6T1,
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Registers.DDI_BUF_TRANS_A_S6T2,
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Registers.DDI_BUF_TRANS_A_S7T1,
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Registers.DDI_BUF_TRANS_A_S7T2,
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Registers.DDI_BUF_TRANS_A_S8T1,
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Registers.DDI_BUF_TRANS_A_S8T2,
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Registers.DDI_BUF_TRANS_A_S9T1,
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Registers.DDI_BUF_TRANS_A_S9T2),
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DP_TP_CTL => Registers.DP_TP_CTL_A,
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DP_TP_STATUS => Registers.Invalid_Register,
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PORT_CLK_SEL => Registers.PORT_CLK_SEL_DDIA),
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DIGI_B => DDI_Registers'
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(BUF_CTL => Registers.DDI_BUF_CTL_B,
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BUF_TRANS => DDI_Buf_Trans_Regs_Array'
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(Registers.DDI_BUF_TRANS_B_S0T1,
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Registers.DDI_BUF_TRANS_B_S0T2,
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Registers.DDI_BUF_TRANS_B_S1T1,
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Registers.DDI_BUF_TRANS_B_S1T2,
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Registers.DDI_BUF_TRANS_B_S2T1,
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Registers.DDI_BUF_TRANS_B_S2T2,
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Registers.DDI_BUF_TRANS_B_S3T1,
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Registers.DDI_BUF_TRANS_B_S3T2,
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Registers.DDI_BUF_TRANS_B_S4T1,
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Registers.DDI_BUF_TRANS_B_S4T2,
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Registers.DDI_BUF_TRANS_B_S5T1,
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Registers.DDI_BUF_TRANS_B_S5T2,
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Registers.DDI_BUF_TRANS_B_S6T1,
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Registers.DDI_BUF_TRANS_B_S6T2,
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Registers.DDI_BUF_TRANS_B_S7T1,
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Registers.DDI_BUF_TRANS_B_S7T2,
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Registers.DDI_BUF_TRANS_B_S8T1,
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Registers.DDI_BUF_TRANS_B_S8T2,
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Registers.DDI_BUF_TRANS_B_S9T1,
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Registers.DDI_BUF_TRANS_B_S9T2),
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DP_TP_CTL => Registers.DP_TP_CTL_B,
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DP_TP_STATUS => Registers.DP_TP_STATUS_B,
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PORT_CLK_SEL => Registers.PORT_CLK_SEL_DDIB),
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DIGI_C => DDI_Registers'
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(BUF_CTL => Registers.DDI_BUF_CTL_C,
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BUF_TRANS => DDI_Buf_Trans_Regs_Array'
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(Registers.DDI_BUF_TRANS_C_S0T1,
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Registers.DDI_BUF_TRANS_C_S0T2,
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Registers.DDI_BUF_TRANS_C_S1T1,
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Registers.DDI_BUF_TRANS_C_S1T2,
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Registers.DDI_BUF_TRANS_C_S2T1,
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Registers.DDI_BUF_TRANS_C_S2T2,
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Registers.DDI_BUF_TRANS_C_S3T1,
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Registers.DDI_BUF_TRANS_C_S3T2,
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Registers.DDI_BUF_TRANS_C_S4T1,
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Registers.DDI_BUF_TRANS_C_S4T2,
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Registers.DDI_BUF_TRANS_C_S5T1,
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Registers.DDI_BUF_TRANS_C_S5T2,
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Registers.DDI_BUF_TRANS_C_S6T1,
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Registers.DDI_BUF_TRANS_C_S6T2,
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Registers.DDI_BUF_TRANS_C_S7T1,
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Registers.DDI_BUF_TRANS_C_S7T2,
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Registers.DDI_BUF_TRANS_C_S8T1,
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Registers.DDI_BUF_TRANS_C_S8T2,
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Registers.DDI_BUF_TRANS_C_S9T1,
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Registers.DDI_BUF_TRANS_C_S9T2),
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DP_TP_CTL => Registers.DP_TP_CTL_C,
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DP_TP_STATUS => Registers.DP_TP_STATUS_C,
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PORT_CLK_SEL => Registers.PORT_CLK_SEL_DDIC),
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DIGI_D => DDI_Registers'
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(BUF_CTL => Registers.DDI_BUF_CTL_D,
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BUF_TRANS => DDI_Buf_Trans_Regs_Array'
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(Registers.DDI_BUF_TRANS_D_S0T1,
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Registers.DDI_BUF_TRANS_D_S0T2,
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Registers.DDI_BUF_TRANS_D_S1T1,
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Registers.DDI_BUF_TRANS_D_S1T2,
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Registers.DDI_BUF_TRANS_D_S2T1,
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Registers.DDI_BUF_TRANS_D_S2T2,
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Registers.DDI_BUF_TRANS_D_S3T1,
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Registers.DDI_BUF_TRANS_D_S3T2,
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Registers.DDI_BUF_TRANS_D_S4T1,
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Registers.DDI_BUF_TRANS_D_S4T2,
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Registers.DDI_BUF_TRANS_D_S5T1,
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Registers.DDI_BUF_TRANS_D_S5T2,
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Registers.DDI_BUF_TRANS_D_S6T1,
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Registers.DDI_BUF_TRANS_D_S6T2,
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Registers.DDI_BUF_TRANS_D_S7T1,
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Registers.DDI_BUF_TRANS_D_S7T2,
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Registers.DDI_BUF_TRANS_D_S8T1,
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Registers.DDI_BUF_TRANS_D_S8T2,
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Registers.DDI_BUF_TRANS_D_S9T1,
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Registers.DDI_BUF_TRANS_D_S9T2),
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DP_TP_CTL => Registers.DP_TP_CTL_D,
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DP_TP_STATUS => Registers.DP_TP_STATUS_D,
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PORT_CLK_SEL => Registers.PORT_CLK_SEL_DDID),
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DIGI_E => DDI_Registers'
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(BUF_CTL => Registers.DDI_BUF_CTL_E,
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BUF_TRANS => DDI_Buf_Trans_Regs_Array'
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(Registers.DDI_BUF_TRANS_E_S0T1,
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Registers.DDI_BUF_TRANS_E_S0T2,
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Registers.DDI_BUF_TRANS_E_S1T1,
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Registers.DDI_BUF_TRANS_E_S1T2,
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Registers.DDI_BUF_TRANS_E_S2T1,
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Registers.DDI_BUF_TRANS_E_S2T2,
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Registers.DDI_BUF_TRANS_E_S3T1,
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Registers.DDI_BUF_TRANS_E_S3T2,
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Registers.DDI_BUF_TRANS_E_S4T1,
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Registers.DDI_BUF_TRANS_E_S4T2,
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Registers.DDI_BUF_TRANS_E_S5T1,
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Registers.DDI_BUF_TRANS_E_S5T2,
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Registers.DDI_BUF_TRANS_E_S6T1,
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Registers.DDI_BUF_TRANS_E_S6T2,
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Registers.DDI_BUF_TRANS_E_S7T1,
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Registers.DDI_BUF_TRANS_E_S7T2,
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Registers.DDI_BUF_TRANS_E_S8T1,
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Registers.DDI_BUF_TRANS_E_S8T2,
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Registers.DDI_BUF_TRANS_E_S9T1,
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Registers.DDI_BUF_TRANS_E_S9T2),
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DP_TP_CTL => Registers.DP_TP_CTL_E,
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DP_TP_STATUS => Registers.DP_TP_STATUS_E,
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PORT_CLK_SEL => Registers.PORT_CLK_SEL_DDIE));
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@@ -174,6 +284,33 @@ package body HW.GFX.GMA.Connectors.DDI is
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----------------------------------------------------------------------------
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procedure Program_Buffer_Translations (Port : Digital_Port)
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is
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Buffer_Translations : Buf_Trans_Array;
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begin
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Buffers.Translations (Buffer_Translations, Port);
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for I in Buf_Trans_Range loop
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Registers.Write
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(Register => DDI_Regs (Port).BUF_TRANS (I),
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Value => Buffer_Translations (I));
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end loop;
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end Program_Buffer_Translations;
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procedure Initialize
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is
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begin
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if Config.Has_DDI_Buffer_Trans then
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for Port in Digital_Port range DIGI_A .. Config.Last_Digital_Port loop
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Program_Buffer_Translations (Port);
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end loop;
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if Config.Is_FDI_Port (Analog) then
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Program_Buffer_Translations (DIGI_E);
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end if;
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end if;
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end Initialize;
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----------------------------------------------------------------------------
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function Max_V_Swing
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(Port : Digital_Port)
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return DP_Info.DP_Voltage_Swing
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@@ -1,5 +1,5 @@
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--
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-- Copyright (C) 2015 secunet Security Networks AG
|
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-- Copyright (C) 2015-2017 secunet Security Networks AG
|
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--
|
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
|
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@@ -17,6 +17,8 @@ with HW.GFX.GMA.Registers;
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private package HW.GFX.GMA.Connectors.DDI
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is
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procedure Initialize;
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procedure Pre_On
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(Port_Cfg : in Port_Config;
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PLL_Hint : in Word32;
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@@ -26,4 +28,8 @@ is
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procedure Off (Port : Digital_Port);
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private
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type Buf_Trans_Range is range 0 .. 19;
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type Buf_Trans_Array is array (Buf_Trans_Range) of Word32;
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end HW.GFX.GMA.Connectors.DDI;
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@@ -1,5 +1,5 @@
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--
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-- Copyright (C) 2015-2016 secunet Security Networks AG
|
||||
-- Copyright (C) 2015-2017 secunet Security Networks AG
|
||||
--
|
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-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License as published by
|
||||
@@ -24,7 +24,7 @@ package body HW.GFX.GMA.Connectors is
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procedure Initialize
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is
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begin
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null;
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DDI.Initialize;
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end Initialize;
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procedure Pre_On
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@@ -1,5 +1,5 @@
|
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--
|
||||
-- Copyright (C) 2015-2016 secunet Security Networks AG
|
||||
-- Copyright (C) 2015-2017 secunet Security Networks AG
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License as published by
|
||||
@@ -92,6 +92,7 @@ is
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and CPU_Var = Normal)
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or CPU >= Skylake;
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Has_DDI_Buffer_Trans : constant Boolean := False;
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Has_Low_Voltage_Swing : constant Boolean := CPU >= Broxton;
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Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC)
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|
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@@ -1,5 +1,5 @@
|
||||
--
|
||||
-- Copyright (C) 2015-2016 secunet Security Networks AG
|
||||
-- Copyright (C) 2015-2017 secunet Security Networks AG
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License as published by
|
||||
@@ -220,6 +220,106 @@ is
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||||
BXT_PHY_CTL_C,
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||||
BXT_PHY_CTL_FAM_EDP,
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BXT_PHY_CTL_FAM_DDI,
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||||
DDI_BUF_TRANS_A_S0T1,
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DDI_BUF_TRANS_A_S0T2,
|
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DDI_BUF_TRANS_A_S1T1,
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DDI_BUF_TRANS_A_S1T2,
|
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DDI_BUF_TRANS_A_S2T1,
|
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DDI_BUF_TRANS_A_S2T2,
|
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DDI_BUF_TRANS_A_S3T1,
|
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DDI_BUF_TRANS_A_S3T2,
|
||||
DDI_BUF_TRANS_A_S4T1,
|
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DDI_BUF_TRANS_A_S4T2,
|
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DDI_BUF_TRANS_A_S5T1,
|
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DDI_BUF_TRANS_A_S5T2,
|
||||
DDI_BUF_TRANS_A_S6T1,
|
||||
DDI_BUF_TRANS_A_S6T2,
|
||||
DDI_BUF_TRANS_A_S7T1,
|
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DDI_BUF_TRANS_A_S7T2,
|
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DDI_BUF_TRANS_A_S8T1,
|
||||
DDI_BUF_TRANS_A_S8T2,
|
||||
DDI_BUF_TRANS_A_S9T1,
|
||||
DDI_BUF_TRANS_A_S9T2,
|
||||
DDI_BUF_TRANS_B_S0T1,
|
||||
DDI_BUF_TRANS_B_S0T2,
|
||||
DDI_BUF_TRANS_B_S1T1,
|
||||
DDI_BUF_TRANS_B_S1T2,
|
||||
DDI_BUF_TRANS_B_S2T1,
|
||||
DDI_BUF_TRANS_B_S2T2,
|
||||
DDI_BUF_TRANS_B_S3T1,
|
||||
DDI_BUF_TRANS_B_S3T2,
|
||||
DDI_BUF_TRANS_B_S4T1,
|
||||
DDI_BUF_TRANS_B_S4T2,
|
||||
DDI_BUF_TRANS_B_S5T1,
|
||||
DDI_BUF_TRANS_B_S5T2,
|
||||
DDI_BUF_TRANS_B_S6T1,
|
||||
DDI_BUF_TRANS_B_S6T2,
|
||||
DDI_BUF_TRANS_B_S7T1,
|
||||
DDI_BUF_TRANS_B_S7T2,
|
||||
DDI_BUF_TRANS_B_S8T1,
|
||||
DDI_BUF_TRANS_B_S8T2,
|
||||
DDI_BUF_TRANS_B_S9T1,
|
||||
DDI_BUF_TRANS_B_S9T2,
|
||||
DDI_BUF_TRANS_C_S0T1,
|
||||
DDI_BUF_TRANS_C_S0T2,
|
||||
DDI_BUF_TRANS_C_S1T1,
|
||||
DDI_BUF_TRANS_C_S1T2,
|
||||
DDI_BUF_TRANS_C_S2T1,
|
||||
DDI_BUF_TRANS_C_S2T2,
|
||||
DDI_BUF_TRANS_C_S3T1,
|
||||
DDI_BUF_TRANS_C_S3T2,
|
||||
DDI_BUF_TRANS_C_S4T1,
|
||||
DDI_BUF_TRANS_C_S4T2,
|
||||
DDI_BUF_TRANS_C_S5T1,
|
||||
DDI_BUF_TRANS_C_S5T2,
|
||||
DDI_BUF_TRANS_C_S6T1,
|
||||
DDI_BUF_TRANS_C_S6T2,
|
||||
DDI_BUF_TRANS_C_S7T1,
|
||||
DDI_BUF_TRANS_C_S7T2,
|
||||
DDI_BUF_TRANS_C_S8T1,
|
||||
DDI_BUF_TRANS_C_S8T2,
|
||||
DDI_BUF_TRANS_C_S9T1,
|
||||
DDI_BUF_TRANS_C_S9T2,
|
||||
DDI_BUF_TRANS_D_S0T1,
|
||||
DDI_BUF_TRANS_D_S0T2,
|
||||
DDI_BUF_TRANS_D_S1T1,
|
||||
DDI_BUF_TRANS_D_S1T2,
|
||||
DDI_BUF_TRANS_D_S2T1,
|
||||
DDI_BUF_TRANS_D_S2T2,
|
||||
DDI_BUF_TRANS_D_S3T1,
|
||||
DDI_BUF_TRANS_D_S3T2,
|
||||
DDI_BUF_TRANS_D_S4T1,
|
||||
DDI_BUF_TRANS_D_S4T2,
|
||||
DDI_BUF_TRANS_D_S5T1,
|
||||
DDI_BUF_TRANS_D_S5T2,
|
||||
DDI_BUF_TRANS_D_S6T1,
|
||||
DDI_BUF_TRANS_D_S6T2,
|
||||
DDI_BUF_TRANS_D_S7T1,
|
||||
DDI_BUF_TRANS_D_S7T2,
|
||||
DDI_BUF_TRANS_D_S8T1,
|
||||
DDI_BUF_TRANS_D_S8T2,
|
||||
DDI_BUF_TRANS_D_S9T1,
|
||||
DDI_BUF_TRANS_D_S9T2,
|
||||
DDI_BUF_TRANS_E_S0T1,
|
||||
DDI_BUF_TRANS_E_S0T2,
|
||||
DDI_BUF_TRANS_E_S1T1,
|
||||
DDI_BUF_TRANS_E_S1T2,
|
||||
DDI_BUF_TRANS_E_S2T1,
|
||||
DDI_BUF_TRANS_E_S2T2,
|
||||
DDI_BUF_TRANS_E_S3T1,
|
||||
DDI_BUF_TRANS_E_S3T2,
|
||||
DDI_BUF_TRANS_E_S4T1,
|
||||
DDI_BUF_TRANS_E_S4T2,
|
||||
DDI_BUF_TRANS_E_S5T1,
|
||||
DDI_BUF_TRANS_E_S5T2,
|
||||
DDI_BUF_TRANS_E_S6T1,
|
||||
DDI_BUF_TRANS_E_S6T2,
|
||||
DDI_BUF_TRANS_E_S7T1,
|
||||
DDI_BUF_TRANS_E_S7T2,
|
||||
DDI_BUF_TRANS_E_S8T1,
|
||||
DDI_BUF_TRANS_E_S8T2,
|
||||
DDI_BUF_TRANS_E_S9T1,
|
||||
DDI_BUF_TRANS_E_S9T2,
|
||||
AUD_VID_DID,
|
||||
PFA_WIN_POS,
|
||||
PFA_WIN_SZ,
|
||||
@@ -858,6 +958,26 @@ is
|
||||
|
||||
-- DDI registers
|
||||
DDI_BUF_CTL_A => 16#06_4000# / Register_Width, -- aliased by DP_CTL_A
|
||||
DDI_BUF_TRANS_A_S0T1 => 16#06_4e00# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S0T2 => 16#06_4e04# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S1T1 => 16#06_4e08# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S1T2 => 16#06_4e0c# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S2T1 => 16#06_4e10# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S2T2 => 16#06_4e14# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S3T1 => 16#06_4e18# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S3T2 => 16#06_4e1c# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S4T1 => 16#06_4e20# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S4T2 => 16#06_4e24# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S5T1 => 16#06_4e28# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S5T2 => 16#06_4e2c# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S6T1 => 16#06_4e30# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S6T2 => 16#06_4e34# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S7T1 => 16#06_4e38# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S7T2 => 16#06_4e3c# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S8T1 => 16#06_4e40# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S8T2 => 16#06_4e44# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S9T1 => 16#06_4e48# / Register_Width,
|
||||
DDI_BUF_TRANS_A_S9T2 => 16#06_4e4c# / Register_Width,
|
||||
DDI_AUX_CTL_A => 16#06_4010# / Register_Width, -- aliased by DP_AUX_CTL_A
|
||||
DDI_AUX_DATA_A_1 => 16#06_4014# / Register_Width, -- aliased by DP_AUX_DATA_A_1
|
||||
DDI_AUX_DATA_A_2 => 16#06_4018# / Register_Width, -- aliased by DP_AUX_DATA_A_2
|
||||
@@ -865,7 +985,28 @@ is
|
||||
DDI_AUX_DATA_A_4 => 16#06_4020# / Register_Width, -- aliased by DP_AUX_DATA_A_4
|
||||
DDI_AUX_DATA_A_5 => 16#06_4024# / Register_Width, -- aliased by DP_AUX_DATA_A_5
|
||||
DDI_AUX_MUTEX_A => 16#06_402c# / Register_Width,
|
||||
|
||||
DDI_BUF_CTL_B => 16#06_4100# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S0T1 => 16#06_4e60# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S0T2 => 16#06_4e64# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S1T1 => 16#06_4e68# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S1T2 => 16#06_4e6c# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S2T1 => 16#06_4e70# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S2T2 => 16#06_4e74# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S3T1 => 16#06_4e78# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S3T2 => 16#06_4e7c# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S4T1 => 16#06_4e80# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S4T2 => 16#06_4e84# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S5T1 => 16#06_4e88# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S5T2 => 16#06_4e8c# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S6T1 => 16#06_4e90# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S6T2 => 16#06_4e94# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S7T1 => 16#06_4e98# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S7T2 => 16#06_4e9c# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S8T1 => 16#06_4ea0# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S8T2 => 16#06_4ea4# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S9T1 => 16#06_4ea8# / Register_Width,
|
||||
DDI_BUF_TRANS_B_S9T2 => 16#06_4eac# / Register_Width,
|
||||
DDI_AUX_CTL_B => 16#06_4110# / Register_Width,
|
||||
DDI_AUX_DATA_B_1 => 16#06_4114# / Register_Width,
|
||||
DDI_AUX_DATA_B_2 => 16#06_4118# / Register_Width,
|
||||
@@ -873,7 +1014,28 @@ is
|
||||
DDI_AUX_DATA_B_4 => 16#06_4120# / Register_Width,
|
||||
DDI_AUX_DATA_B_5 => 16#06_4124# / Register_Width,
|
||||
DDI_AUX_MUTEX_B => 16#06_412c# / Register_Width,
|
||||
|
||||
DDI_BUF_CTL_C => 16#06_4200# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S0T1 => 16#06_4ec0# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S0T2 => 16#06_4ec4# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S1T1 => 16#06_4ec8# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S1T2 => 16#06_4ecc# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S2T1 => 16#06_4ed0# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S2T2 => 16#06_4ed4# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S3T1 => 16#06_4ed8# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S3T2 => 16#06_4edc# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S4T1 => 16#06_4ee0# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S4T2 => 16#06_4ee4# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S5T1 => 16#06_4ee8# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S5T2 => 16#06_4eec# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S6T1 => 16#06_4ef0# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S6T2 => 16#06_4ef4# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S7T1 => 16#06_4ef8# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S7T2 => 16#06_4efc# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S8T1 => 16#06_4f00# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S8T2 => 16#06_4f04# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S9T1 => 16#06_4f08# / Register_Width,
|
||||
DDI_BUF_TRANS_C_S9T2 => 16#06_4f0c# / Register_Width,
|
||||
DDI_AUX_CTL_C => 16#06_4210# / Register_Width,
|
||||
DDI_AUX_DATA_C_1 => 16#06_4214# / Register_Width,
|
||||
DDI_AUX_DATA_C_2 => 16#06_4218# / Register_Width,
|
||||
@@ -881,7 +1043,28 @@ is
|
||||
DDI_AUX_DATA_C_4 => 16#06_4220# / Register_Width,
|
||||
DDI_AUX_DATA_C_5 => 16#06_4224# / Register_Width,
|
||||
DDI_AUX_MUTEX_C => 16#06_422c# / Register_Width,
|
||||
|
||||
DDI_BUF_CTL_D => 16#06_4300# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S0T1 => 16#06_4f20# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S0T2 => 16#06_4f24# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S1T1 => 16#06_4f28# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S1T2 => 16#06_4f2c# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S2T1 => 16#06_4f30# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S2T2 => 16#06_4f34# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S3T1 => 16#06_4f38# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S3T2 => 16#06_4f3c# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S4T1 => 16#06_4f40# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S4T2 => 16#06_4f44# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S5T1 => 16#06_4f48# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S5T2 => 16#06_4f4c# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S6T1 => 16#06_4f50# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S6T2 => 16#06_4f54# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S7T1 => 16#06_4f58# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S7T2 => 16#06_4f5c# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S8T1 => 16#06_4f60# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S8T2 => 16#06_4f64# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S9T1 => 16#06_4f68# / Register_Width,
|
||||
DDI_BUF_TRANS_D_S9T2 => 16#06_4f6c# / Register_Width,
|
||||
DDI_AUX_CTL_D => 16#06_4310# / Register_Width,
|
||||
DDI_AUX_DATA_D_1 => 16#06_4314# / Register_Width,
|
||||
DDI_AUX_DATA_D_2 => 16#06_4318# / Register_Width,
|
||||
@@ -889,7 +1072,28 @@ is
|
||||
DDI_AUX_DATA_D_4 => 16#06_4320# / Register_Width,
|
||||
DDI_AUX_DATA_D_5 => 16#06_4324# / Register_Width,
|
||||
DDI_AUX_MUTEX_D => 16#06_432c# / Register_Width,
|
||||
|
||||
DDI_BUF_CTL_E => 16#06_4400# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S0T1 => 16#06_4f80# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S0T2 => 16#06_4f84# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S1T1 => 16#06_4f88# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S1T2 => 16#06_4f8c# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S2T1 => 16#06_4f90# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S2T2 => 16#06_4f94# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S3T1 => 16#06_4f98# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S3T2 => 16#06_4f9c# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S4T1 => 16#06_4fa0# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S4T2 => 16#06_4fa4# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S5T1 => 16#06_4fa8# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S5T2 => 16#06_4fac# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S6T1 => 16#06_4fb0# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S6T2 => 16#06_4fb4# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S7T1 => 16#06_4fb8# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S7T2 => 16#06_4fbc# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S8T1 => 16#06_4fc0# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S8T2 => 16#06_4fc4# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S9T1 => 16#06_4fc8# / Register_Width,
|
||||
DDI_BUF_TRANS_E_S9T2 => 16#06_4fcc# / Register_Width,
|
||||
DP_TP_CTL_A => 16#06_4040# / Register_Width,
|
||||
DP_TP_CTL_B => 16#06_4140# / Register_Width,
|
||||
DP_TP_CTL_C => 16#06_4240# / Register_Width,
|
||||
|
||||
@@ -1,3 +1,4 @@
|
||||
gfxinit-y += hw-gfx-gma-connectors-ddi-buffers.ads
|
||||
gfxinit-y += hw-gfx-gma-ddi_phy.ads
|
||||
gfxinit-y += hw-gfx-gma-plls-dpll.adb
|
||||
gfxinit-y += hw-gfx-gma-plls-dpll.ads
|
||||
|
||||
21
common/skylake/hw-gfx-gma-connectors-ddi-buffers.ads
Normal file
21
common/skylake/hw-gfx-gma-connectors-ddi-buffers.ads
Normal file
@@ -0,0 +1,21 @@
|
||||
--
|
||||
-- Copyright (C) 2017 secunet Security Networks AG
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License as published by
|
||||
-- the Free Software Foundation; either version 2 of the License, or
|
||||
-- (at your option) any later version.
|
||||
--
|
||||
-- This program is distributed in the hope that it will be useful,
|
||||
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
-- GNU General Public License for more details.
|
||||
--
|
||||
|
||||
private package HW.GFX.GMA.Connectors.DDI.Buffers
|
||||
is
|
||||
|
||||
procedure Translations (Trans : out Buf_Trans_Array; Port : Digital_Port)
|
||||
is null;
|
||||
|
||||
end HW.GFX.GMA.Connectors.DDI.Buffers;
|
||||
Reference in New Issue
Block a user