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skylake: make PAD_CFG_GPI default to GPIO ownership

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The prior implementation of PAD_CFG_GPI kept the pad
ownership as ACPI. The gpio driver in the kernel then
wouldn't allow one to export those GPIOs through sysfs
in /sys/class/gpio. Fix this by setting the ownership
to GPIO.

BUG=chrome-os-partner:44147
BRANCH=None
TEST=Built and boot glados. PCH_WP gpio is properly exported
     by crossystem.

Original-Change-Id: I9fc7ab141a3fd74e0ff8b3ff5009b007b8a0d69b
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/294081
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Change-Id: Ifbb61c5d64bb6a04f140685c70f4681e2babecef
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11283
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Aaron Durbin
2015-08-17 16:27:09 -05:00
parent 56260850e8
commit 028bcaae32
1 changed files with 3 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
src/soc/intel/skylake/include/soc/gpio.h
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@@ -121,8 +121,9 @@ void gpio_configure_pads(const struct pad_config *cfgs, size_t num);
/* General purpose input with no special IRQ routing. */
#define PAD_CFG_GPI(pad_, term_, rst_) \
_PAD_CFG(pad_, term_, \
_DW0_VALS(rst_, RAW, NO, LEVEL, NO, NO, NO, NO, NO, NO, GPIO, NO, YES))
_PAD_CFG_ATTRS(pad_, term_, \
_DW0_VALS(rst_, RAW, NO, LEVEL, NO, NO, NO, NO, NO, NO, GPIO, NO, YES),\
PAD_FIELD(HOSTSW, GPIO))
/* General purpose input passed through to IOxAPIC. Assume APIC logic can
* handle polarity/edge/level constraints. */