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stoney: Rename GPIO_PCH_RCIN_L to GPIO_SYS_RESET_L
Pin rename only; no functional changes. See also b/72426192 for earlier functional changes. BUG=b:77301519 TEST=make -j buildall BRANCH=none Change-Id: I18e71118e584a5b36ba001bac24951929d2c93ff Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1087207 Reviewed-by: Edward Hill <ecgh@chromium.org>
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@@ -31,7 +31,7 @@ GPIO(ENABLE_BACKLIGHT_L, PIN(D, 3), GPIO_OUT_HIGH) /* Enable Backlight */
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GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC */
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GPIO(PCH_PWRBTN_L, PIN(C, 1), GPIO_OUT_HIGH) /* Power Button to SOC */
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GPIO(PCH_WAKE_L, PIN(7, 4), GPIO_OUT_HIGH) /* Wake SOC */
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GPIO(PCH_RCIN_L, PIN(3, 5), GPIO_ODR_HIGH) /* Cold Reset to SOC */
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GPIO(SYS_RESET_L, PIN(3, 5), GPIO_ODR_HIGH) /* Cold Reset to SOC */
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GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT) /* Case Closed Debug Mode */
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GPIO(ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW) /* EC Entering RW */
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GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT | GPIO_PULL_UP) /* Battery Present */
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@@ -32,7 +32,7 @@ GPIO(ENABLE_BACKLIGHT_L, PIN(D, 3), GPIO_OUT_HIGH) /* Enable Backlight */
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GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC */
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GPIO(PCH_PWRBTN_L, PIN(C, 1), GPIO_OUT_HIGH) /* Power Button to SOC */
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GPIO(PCH_WAKE_L, PIN(7, 4), GPIO_OUT_HIGH) /* Wake SOC */
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GPIO(PCH_RCIN_L, PIN(0, 2), GPIO_ODR_HIGH) /* Cold Reset to SOC */
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GPIO(SYS_RESET_L, PIN(0, 2), GPIO_ODR_HIGH) /* Cold Reset to SOC */
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GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT) /* Case Closed Debug Mode */
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GPIO(ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW) /* EC Entering RW */
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GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT | GPIO_PULL_UP) /* Battery Present */
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@@ -86,7 +86,7 @@ GPIO(USB_C1_HPD_ODL, PIN(9, 5), GPIO_INPUT)
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* be used. Set as input for now, we'll set it as an output when we want to use
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* it. Has external pull-down resistor. */
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GPIO(EC_PCH_RTCRST, PIN(B, 7), GPIO_INPUT)
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GPIO(PCH_RCIN_L, PIN(6, 1), GPIO_ODR_HIGH) /* SYS_RST_ODL */
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GPIO(SYS_RESET_L, PIN(6, 1), GPIO_ODR_HIGH) /* SYS_RST_ODL */
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GPIO(USB_A_CHARGE_EN_L, PIN(3, 6), GPIO_OUT_LOW)
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GPIO(USB1_ENABLE, PIN(4, 1), GPIO_OUT_LOW)
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@@ -63,9 +63,9 @@ void chipset_reset(void)
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/*
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* Send a pulse to SYS_RST to trigger a warm reset.
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*/
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gpio_set_level(GPIO_PCH_RCIN_L, 0);
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gpio_set_level(GPIO_SYS_RESET_L, 0);
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usleep(32 * MSEC);
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gpio_set_level(GPIO_PCH_RCIN_L, 1);
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gpio_set_level(GPIO_SYS_RESET_L, 1);
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}
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void chipset_throttle_cpu(int throttle)
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