mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-09 00:51:29 +00:00
cleanup: Remove honeybuns board
BUG=None TEST=`make buildall -j` BRANCH=None Change-Id: Ieeb98eee02eabdf03413975ecf286ca69550ddfc Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/803946 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
committed by
chrome-bot
chrome-bot
parent
d81dbdff79
commit
0819d61af0
@@ -1,226 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
/* Honeybuns board configuration */
|
||||
|
||||
#include "adc.h"
|
||||
#include "adc_chip.h"
|
||||
#include "common.h"
|
||||
#include "console.h"
|
||||
#include "ec_version.h"
|
||||
#include "gpio.h"
|
||||
#include "hooks.h"
|
||||
#include "i2c.h"
|
||||
#include "registers.h"
|
||||
#include "task.h"
|
||||
#include "timer.h"
|
||||
#include "usb_bb.h"
|
||||
#include "usb_descriptor.h"
|
||||
#include "usb_pd.h"
|
||||
#include "util.h"
|
||||
|
||||
static volatile uint64_t hpd_prev_ts;
|
||||
static volatile int hpd_prev_level;
|
||||
|
||||
void vbus_event(enum gpio_signal signal)
|
||||
{
|
||||
ccprintf("VBUS!\n");
|
||||
}
|
||||
|
||||
|
||||
#include "gpio_list.h"
|
||||
|
||||
/**
|
||||
* Hotplug detect deferred task
|
||||
*
|
||||
* Called after level change on hpd GPIO to evaluate (and debounce) what event
|
||||
* has occurred. There are 3 events that occur on HPD:
|
||||
* 1. low : downstream display sink is deattached
|
||||
* 2. high : downstream display sink is attached
|
||||
* 3. irq : downstream display sink signalling an interrupt.
|
||||
*
|
||||
* The debounce times for these various events are:
|
||||
* HPD_USTREAM_DEBOUNCE_LVL : min pulse width of level value.
|
||||
* HPD_USTREAM_DEBOUNCE_IRQ : min pulse width of IRQ low pulse.
|
||||
*
|
||||
* lvl(n-2) lvl(n-1) lvl prev_delta now_delta event
|
||||
* ----------------------------------------------------
|
||||
* 1 0 1 <IRQ n/a low glitch (ignore)
|
||||
* 1 0 1 >IRQ <LVL irq
|
||||
* x 0 1 n/a >LVL high
|
||||
* 0 1 0 <LVL n/a high glitch (ignore)
|
||||
* x 1 0 n/a >LVL low
|
||||
*/
|
||||
|
||||
void hpd_irq_deferred(void)
|
||||
{
|
||||
pd_send_hpd(0, hpd_irq);
|
||||
}
|
||||
DECLARE_DEFERRED(hpd_irq_deferred);
|
||||
|
||||
void hpd_lvl_deferred(void)
|
||||
{
|
||||
int level = gpio_get_level(GPIO_DP_HPD);
|
||||
|
||||
if (level != hpd_prev_level)
|
||||
/* It's a glitch while in deferred or canceled action */
|
||||
return;
|
||||
|
||||
pd_send_hpd(0, (level) ? hpd_high : hpd_low);
|
||||
}
|
||||
DECLARE_DEFERRED(hpd_lvl_deferred);
|
||||
|
||||
void hpd_event(enum gpio_signal signal)
|
||||
{
|
||||
timestamp_t now = get_time();
|
||||
int level = gpio_get_level(signal);
|
||||
uint64_t cur_delta = now.val - hpd_prev_ts;
|
||||
|
||||
/* store current time */
|
||||
hpd_prev_ts = now.val;
|
||||
|
||||
/* All previous hpd level events need to be re-triggered */
|
||||
hook_call_deferred(&hpd_lvl_deferred_data, -1);
|
||||
|
||||
/* It's a glitch. Previous time moves but level is the same. */
|
||||
if (cur_delta < HPD_USTREAM_DEBOUNCE_IRQ)
|
||||
return;
|
||||
|
||||
if ((!hpd_prev_level && level) &&
|
||||
(cur_delta < HPD_USTREAM_DEBOUNCE_LVL))
|
||||
/* It's an irq */
|
||||
hook_call_deferred(&hpd_irq_deferred_data, 0);
|
||||
else if (cur_delta >= HPD_USTREAM_DEBOUNCE_LVL)
|
||||
hook_call_deferred(&hpd_lvl_deferred_data,
|
||||
HPD_USTREAM_DEBOUNCE_LVL);
|
||||
|
||||
hpd_prev_level = level;
|
||||
}
|
||||
|
||||
static void honeybuns_test_led_update(void)
|
||||
{
|
||||
static int toggle_count;
|
||||
toggle_count++;
|
||||
|
||||
gpio_set_level(GPIO_TP6, toggle_count&1);
|
||||
}
|
||||
DECLARE_HOOK(HOOK_TICK, honeybuns_test_led_update, HOOK_PRIO_DEFAULT);
|
||||
|
||||
/* Initialize board. */
|
||||
void board_config_pre_init(void)
|
||||
{
|
||||
/* enable SYSCFG clock */
|
||||
STM32_RCC_APB2ENR |= 1 << 0;
|
||||
|
||||
/*
|
||||
* the DMA mapping is :
|
||||
* Chan 2 : TIM1_CH1 (C0 RX)
|
||||
* Chan 3 : SPI1_TX (C0 TX)
|
||||
* Chan 4 : USART1_TX
|
||||
* Chan 5 : USART1_RX
|
||||
* Chan 6 :
|
||||
* Chan 7 :
|
||||
*/
|
||||
/* Remap USART DMA to match the USART driver */
|
||||
STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10);
|
||||
}
|
||||
|
||||
/* Initialize board. */
|
||||
static void board_init(void)
|
||||
{
|
||||
timestamp_t now;
|
||||
|
||||
now = get_time();
|
||||
hpd_prev_level = gpio_get_level(GPIO_DP_HPD);
|
||||
hpd_prev_ts = now.val;
|
||||
gpio_enable_interrupt(GPIO_DP_HPD);
|
||||
}
|
||||
|
||||
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
|
||||
|
||||
/* ADC channels */
|
||||
const struct adc_t adc_channels[] = {
|
||||
/* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
|
||||
[ADC_CH_CC1_PD] = {"CC1_PD", 3300, 4096, 0, STM32_AIN(1)},
|
||||
/* VBUS sense via 100k/8.8k voltage divder 3.3V -> 40.8V */
|
||||
[ADC_CH_VIN_DIV_P] = {"VIN_DIV_P", 40800, 4096, 0, STM32_AIN(5)},
|
||||
[ADC_CH_VIN_DIV_N] = {"VIN_DIV_N", 40800, 4096, 0, STM32_AIN(6)},
|
||||
};
|
||||
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
|
||||
|
||||
/* I2C ports */
|
||||
const struct i2c_port_t i2c_ports[] = {
|
||||
{"master", I2C_PORT_MASTER, 100,
|
||||
GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA},
|
||||
};
|
||||
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
|
||||
|
||||
const void * const usb_strings[] = {
|
||||
[USB_STR_DESC] = usb_string_desc,
|
||||
[USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."),
|
||||
[USB_STR_PRODUCT] = USB_STRING_DESC("Honeybuns"),
|
||||
[USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32),
|
||||
[USB_STR_BB_URL] = USB_STRING_DESC(USB_GOOGLE_TYPEC_URL),
|
||||
};
|
||||
BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
|
||||
|
||||
/**
|
||||
* USB configuration
|
||||
* Any type-C device with alternate mode capabilities must have the following
|
||||
* set of descriptors.
|
||||
*
|
||||
* 1. Standard Device
|
||||
* 2. BOS
|
||||
* 2a. Container ID
|
||||
* 2b. Billboard Caps
|
||||
*/
|
||||
struct my_bos {
|
||||
struct usb_bos_hdr_descriptor bos;
|
||||
struct usb_contid_caps_descriptor contid_caps;
|
||||
struct usb_bb_caps_base_descriptor bb_caps;
|
||||
struct usb_bb_caps_svid_descriptor bb_caps_svids[1];
|
||||
};
|
||||
|
||||
static struct my_bos bos_desc = {
|
||||
.bos = {
|
||||
.bLength = USB_DT_BOS_SIZE,
|
||||
.bDescriptorType = USB_DT_BOS,
|
||||
.wTotalLength = (USB_DT_BOS_SIZE + USB_DT_CONTID_SIZE +
|
||||
USB_BB_CAPS_BASE_SIZE +
|
||||
USB_BB_CAPS_SVID_SIZE * 1),
|
||||
.bNumDeviceCaps = 2, /* contid + bb_caps */
|
||||
},
|
||||
.contid_caps = {
|
||||
.bLength = USB_DT_CONTID_SIZE,
|
||||
.bDescriptorType = USB_DT_DEVICE_CAPABILITY,
|
||||
.bDevCapabilityType = USB_DC_DTYPE_CONTID,
|
||||
.bReserved = 0,
|
||||
.ContainerID = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||
},
|
||||
.bb_caps = {
|
||||
.bLength = (USB_BB_CAPS_BASE_SIZE + USB_BB_CAPS_SVID_SIZE * 1),
|
||||
.bDescriptorType = USB_DT_DEVICE_CAPABILITY,
|
||||
.bDevCapabilityType = USB_DC_DTYPE_BILLBOARD,
|
||||
.iAdditionalInfoURL = USB_STR_BB_URL,
|
||||
.bNumberOfAlternateModes = 1,
|
||||
.bPreferredAlternateMode = 1,
|
||||
.VconnPower = 0,
|
||||
.bmConfigured = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
||||
},
|
||||
.bReserved = 0,
|
||||
},
|
||||
.bb_caps_svids = {
|
||||
{
|
||||
.wSVID = USB_SID_DISPLAYPORT,
|
||||
.bAlternateMode = 1,
|
||||
.iAlternateModeString = USB_STR_BB_URL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
const struct bos_context bos_ctx = {
|
||||
.descp = (void *)&bos_desc,
|
||||
.size = sizeof(struct my_bos),
|
||||
};
|
||||
@@ -1,124 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Honeybuns board configuration */
|
||||
|
||||
#ifndef __CROS_EC_BOARD_H
|
||||
#define __CROS_EC_BOARD_H
|
||||
|
||||
/* 48 MHz SYSCLK clock frequency */
|
||||
#define CPU_CLOCK 48000000
|
||||
|
||||
/* the UART console is on USART1 (PA9/PA10) */
|
||||
#define CONFIG_UART_CONSOLE 1
|
||||
|
||||
/* Optional features */
|
||||
#define CONFIG_ADC
|
||||
#define CONFIG_BOARD_PRE_INIT
|
||||
#define CONFIG_HW_CRC
|
||||
#define CONFIG_I2C
|
||||
#define CONFIG_I2C_MASTER
|
||||
#undef CONFIG_LID_SWITCH
|
||||
#define CONFIG_RSA
|
||||
#define CONFIG_RWSIG
|
||||
#define CONFIG_RWSIG_TYPE_USBPD1
|
||||
#define CONFIG_SHA256
|
||||
#define CONFIG_STM_HWTIMER32
|
||||
#undef CONFIG_TASK_PROFILING
|
||||
#define CONFIG_USB
|
||||
#define CONFIG_USB_POWER_DELIVERY
|
||||
#define CONFIG_USB_PD_ALT_MODE
|
||||
#undef CONFIG_USB_PD_ALT_MODE_DFP
|
||||
#define CONFIG_USB_PD_CUSTOM_VDM
|
||||
#undef CONFIG_USB_PD_DUAL_ROLE
|
||||
#define CONFIG_USB_PD_HW_DEV_ID_BOARD_MAJOR USB_PD_HW_DEV_ID_HONEYBUNS
|
||||
#define CONFIG_USB_PD_HW_DEV_ID_BOARD_MINOR 0
|
||||
#define CONFIG_USB_PD_IDENTITY_HW_VERS 1
|
||||
#define CONFIG_USB_PD_IDENTITY_SW_VERS 1
|
||||
#define CONFIG_USB_PD_INTERNAL_COMP
|
||||
#define CONFIG_USB_PD_PORT_COUNT 1
|
||||
#define CONFIG_USB_PD_TCPC
|
||||
#define CONFIG_USB_PD_TCPM_STUB
|
||||
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
|
||||
#define CONFIG_USBC_SS_MUX
|
||||
#define CONFIG_USBC_VCONN
|
||||
#undef CONFIG_WATCHDOG_HELP
|
||||
|
||||
/* I2C ports configuration */
|
||||
#define I2C_PORT_MASTER 0
|
||||
|
||||
/* USB configuration */
|
||||
#define CONFIG_USB_PID 0x5015
|
||||
#define CONFIG_USB_BCD_DEV 0x0001 /* v 0.01 */
|
||||
/* By default, enable all console messages excepted USB */
|
||||
#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_USB))
|
||||
|
||||
/*
|
||||
* Allow dangerous commands all the time, since we don't have a write protect
|
||||
* switch.
|
||||
*/
|
||||
#define CONFIG_SYSTEM_UNLOCKED
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* Timer selection */
|
||||
#define TIM_CLOCK32 2
|
||||
#define TIM_ADC 3
|
||||
|
||||
#include "gpio_signal.h"
|
||||
|
||||
/* ADC signal */
|
||||
enum adc_channel {
|
||||
ADC_CH_CC1_PD = 0,
|
||||
ADC_CH_VIN_DIV_P,
|
||||
ADC_CH_VIN_DIV_N,
|
||||
/* Number of ADC channels */
|
||||
ADC_CH_COUNT
|
||||
};
|
||||
|
||||
/* USB string indexes */
|
||||
enum usb_strings {
|
||||
USB_STR_DESC = 0,
|
||||
USB_STR_VENDOR,
|
||||
USB_STR_PRODUCT,
|
||||
USB_STR_VERSION,
|
||||
USB_STR_BB_URL,
|
||||
|
||||
USB_STR_COUNT
|
||||
};
|
||||
|
||||
/* 3.0A Rp */
|
||||
#define PD_SRC_VNC PD_SRC_3_0_VNC_MV
|
||||
#define PD_SRC_RD_THRESHOLD PD_SRC_3_0_RD_THRESH_MV
|
||||
|
||||
/* delay necessary for the voltage transition on the power supply */
|
||||
/* TODO (code.google.com/p/chrome-os-partner/issues/detail?id=37078)
|
||||
* Need to measure these and adjust for honeybuns.
|
||||
*/
|
||||
#define PD_POWER_SUPPLY_TURN_ON_DELAY 50000 /* us */
|
||||
#define PD_POWER_SUPPLY_TURN_OFF_DELAY 50000 /* us */
|
||||
|
||||
/* Define typical operating power and max power */
|
||||
#define PD_OPERATING_POWER_MW 1000
|
||||
#define PD_MAX_POWER_MW 60000
|
||||
#define PD_MAX_CURRENT_MA 3000
|
||||
#define PD_MAX_VOLTAGE_MV 20000
|
||||
|
||||
/* Enable/disable USB Hub */
|
||||
void hx3_enable(int enable);
|
||||
|
||||
/* DisplayPort hotplug detection interrupt */
|
||||
void hpd_event(enum gpio_signal signal);
|
||||
|
||||
#endif /* !__ASSEMBLER__ */
|
||||
|
||||
/* USB interface indexes (use define rather than enum to expand them) */
|
||||
#define USB_IFACE_COUNT 0
|
||||
|
||||
/* USB endpoint indexes (use define rather than enum to expand them) */
|
||||
#define USB_EP_CONTROL 0
|
||||
#define USB_EP_COUNT 1
|
||||
|
||||
#endif /* __CROS_EC_BOARD_H */
|
||||
@@ -1,14 +0,0 @@
|
||||
# -*- makefile -*-
|
||||
# Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
# Use of this source code is governed by a BSD-style license that can be
|
||||
# found in the LICENSE file.
|
||||
#
|
||||
# Board specific files build
|
||||
|
||||
# the IC is STmicro STM32F072CBU6
|
||||
CHIP:=stm32
|
||||
CHIP_FAMILY:=stm32f0
|
||||
CHIP_VARIANT:=stm32f07x
|
||||
|
||||
board-y=board.o hx3.o
|
||||
board-$(CONFIG_USB_POWER_DELIVERY)+=usb_mux.o usb_pd_policy.o
|
||||
@@ -1,27 +0,0 @@
|
||||
-----BEGIN RSA PRIVATE KEY-----
|
||||
MIIEoQIBAAKCAQEAwNVNJSer2LuF2tfx8vc/UKEKC2rXwDRuptib9YH8eSicpCmd
|
||||
9xVcL7yKkrRUGTnD7DCeEilY3oo5wD41shhOIgOTQlFeo7h0CCJqyP9vMh+9tZpk
|
||||
QSVUY/yIQEC8fqVGUAFA/sDrODnRpv1nJvdOOlfD3wuei9BPgm2XtfK2cxOpgsFN
|
||||
MplNWvQ733+/GMQPdFO6SF440yTThxCzX9IkxjIVdr9dEUgSkkWZQGFUnZ05Jd6c
|
||||
hKK/N7+oIhdCfQIe6M2byNNvKWXXS7Qqblu+4CFDC14VxKXr29dS89zJEAmie4vi
|
||||
RwuMPA6M1x50OvO2c/CLUuy3w4E7elCTu+/+EQIDAQABAoIBAQCv/DsKtLj19LZF
|
||||
sp0Ck7l5+W60Ws8KgA+YP8md9wKXBIRoof6jeCAJBPYmy2KRHxH6pagthQSxHM91
|
||||
7pCMt/fevQqRFLfdjUKABgEU7WHrCeLWMVBb0BjDo74pfatJncacz3gkx6YkS0hW
|
||||
MaAJhNwlDOIa1nzctsFJlIFHsXnnbKxkrFOhs206SgFomp/VDABm/pzTqibmxHkX
|
||||
HoEXGdEpDx23uVwbXK609BehoH0SkwDjJtpK43U0zh9VM8GAYK9ymEtiMA2NgmY8
|
||||
ZBjbf/KqHHcXc7xC67WVyianBMLFL+92CYYaJzxs63W/g1Yt4ZyurMAufM6/arAZ
|
||||
kMoVMgwBAoGBAPGtO42qtownw5srbuxOGcFio0zu5u42z0iCT3riBzJ8lchIrOf/
|
||||
4MLU2bwXg/A3zUkdWHd3YvbJaCbSJIChC6cOL+FSePxrrvC5ebU4++8x6IdjQ9aV
|
||||
VRuPSV+7vqa3NLNUaJj8QIO3FqBkG4ncREQlF7PQ/R4sT6PYgPpbnBDRAoGBAMxD
|
||||
AW4qQMKJXY/iUjayLvqmJWVU4czv8fzFAgnRazCYHalQrUD/M3PxZ5TM9gACxO+I
|
||||
J6ZlClT/oUxwL5wCYW4K7ElMIc5KgppFFw9Y0aqzJtu3H0+7vSryORtoucCzLJSP
|
||||
Mmc3UAydZmiWJ8O+r4nL1YeUO86YUmJ1bR96SmlBAn8h/DpjsZ36F51qNLFkiZcV
|
||||
mslcCDxxQ0Pi7nA+14orj1mA0Ld/6Huy6ju0N5pWLYKwxW+rXR6NlcUPsH1xmTQK
|
||||
SfRxuydIV9xB/dMfqOPEvz/zygHAKz/MoFmxHLWyvBCtJzGOUerAmv6Tj4BP4qm2
|
||||
64BpyPnPRGvunoOEsV1BAoGAC9f2xUR97Mm6OxWMXs+GGdJ4aJ+7V/6xsU5bB+a0
|
||||
qGSpk5+x7ArgGODueJpJyUZf1OO4KNXC+5q254+5svoQXCkV+koHy8ZWPEu1QpaL
|
||||
0bIBlsvPbPgdx9ezp/syihHZi+OhsIpsgc6+mWHbfGYaF4tSHkJiFWCPplXYtfKJ
|
||||
TgECgYBql7ZdDENBPuGa1U+DuGLafj0QchvDMuvxJA21q9lJhkFPaGkDLrBvriks
|
||||
nUdONlB2cYdkDGfM+KwyV+wpATQTWYr0ZNZKwVXvfpEq0USZldCXhScShAM+a/Jv
|
||||
LdkSmW/7CDbj4U1waOCYqTgdNQhHfIn1elpKi55nUQ5L/pzWIg==
|
||||
-----END RSA PRIVATE KEY-----
|
||||
@@ -1,23 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/**
|
||||
* List of enabled tasks in the priority order
|
||||
*
|
||||
* The first one has the lowest priority.
|
||||
*
|
||||
* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
|
||||
* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
|
||||
* where :
|
||||
* 'n' in the name of the task
|
||||
* 'r' in the main routine of the task
|
||||
* 'd' in an opaque parameter passed to the routine at startup
|
||||
* 's' is the stack size in bytes; must be a multiple of 8
|
||||
*/
|
||||
#define CONFIG_TASK_LIST \
|
||||
TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK_ALWAYS(USBCFG, hx3_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
|
||||
TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE)
|
||||
@@ -1,56 +0,0 @@
|
||||
/* -*- mode:c -*-
|
||||
*
|
||||
* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Declare symbolic names for all the GPIOs that we care about.
|
||||
* Note: Those with interrupt handlers must be declared first. */
|
||||
|
||||
GPIO_INT(DP_HPD, PIN(A, 0), GPIO_INT_BOTH, hpd_event)
|
||||
|
||||
/* PD RX/TX */
|
||||
GPIO(USB_CC1_PD, PIN(A, 1), GPIO_ANALOG)
|
||||
GPIO(PD_VBUS_P, PIN(A, 5), GPIO_ANALOG)
|
||||
GPIO(PD_VBUS_N, PIN(A, 6), GPIO_ANALOG)
|
||||
GPIO(PD_TX_EN, PIN(A, 15), GPIO_OUT_LOW)
|
||||
GPIO(PD_TX_DATA, PIN(B, 4), GPIO_OUT_LOW)
|
||||
|
||||
/* Power and muxes control */
|
||||
GPIO(PP20000_EN, PIN(A, 8), GPIO_OUT_LOW)
|
||||
GPIO(PP12000_EN, PIN(A, 14), GPIO_OUT_LOW)
|
||||
GPIO(PPVAR_VBUS_EN, PIN(B, 12), GPIO_OUT_LOW)
|
||||
GPIO(SS_MUX_OE_L, PIN(B, 13), GPIO_OUT_HIGH)
|
||||
GPIO(SS_MUX_SEL, PIN(B, 14), GPIO_OUT_LOW)
|
||||
|
||||
/* Display Port/HDMI */
|
||||
GPIO(PD_SBU_ENABLE, PIN(A, 7), GPIO_OUT_LOW)
|
||||
|
||||
/* Chip Resets */
|
||||
GPIO(BRIDGE_RESET_L, PIN(B, 0), GPIO_OUT_LOW)
|
||||
GPIO(SPLITTER_RESET_L, PIN(B, 1), GPIO_OUT_LOW)
|
||||
GPIO(HUB_RESET_L, PIN(B, 15), GPIO_OUT_LOW)
|
||||
|
||||
|
||||
/*
|
||||
* I2C pins should be configured as inputs until I2C module is
|
||||
* initialized. This will avoid driving the lines unintentionally.
|
||||
*/
|
||||
GPIO(MASTER_I2C_SCL, PIN(B, 6), GPIO_INPUT)
|
||||
GPIO(MASTER_I2C_SDA, PIN(B, 7), GPIO_INPUT)
|
||||
|
||||
|
||||
/* Test points */
|
||||
GPIO(TP6, PIN(A, 13), GPIO_OUT_HIGH /*GPIO_ODR_HIGH*/)
|
||||
|
||||
/* Unimplemented signals which we need to emulate for now */
|
||||
UNIMPLEMENTED(ENTERING_RW)
|
||||
UNIMPLEMENTED(WP_L)
|
||||
|
||||
ALTERNATE(PIN_MASK(B, 0x0018), 0, MODULE_USB_PD, 0) /* SPI1 SCK/MISO: PB3/PB4 */
|
||||
ALTERNATE(PIN_MASK(B, 0x0200), 2, MODULE_USB_PD, 0) /* TIM17_CH1: PB9 */
|
||||
ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, GPIO_PULL_UP) /* USART1: PA9/PA10 */
|
||||
ALTERNATE(PIN_MASK(A, 0x000C), 1, MODULE_UART, GPIO_PULL_UP) /* USART2: PA2/PA3 */
|
||||
ALTERNATE(PIN_MASK(B, 0x0C00), 4, MODULE_UART, GPIO_PULL_UP) /* USART3: PB10/PB11 */
|
||||
ALTERNATE(PIN_MASK(B, 0x00C0), 1, MODULE_I2C, 0) /* I2C MASTER: PB6/PB7 */
|
||||
@@ -1,142 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
/* Cypress HX3 USB Hub configuration */
|
||||
|
||||
#include "common.h"
|
||||
#include "console.h"
|
||||
#include "ec_version.h"
|
||||
#include "gpio.h"
|
||||
#include "hooks.h"
|
||||
#include "i2c.h"
|
||||
#include "task.h"
|
||||
#include "timer.h"
|
||||
#include "usb_descriptor.h"
|
||||
#include "util.h"
|
||||
|
||||
/* Cypress HX3 I2C address */
|
||||
#define HX3_I2C_ADDR (0x60 << 1)
|
||||
|
||||
/* Full size setting blob */
|
||||
#define HX3_SETTINGS_SIZE 192
|
||||
|
||||
/* USB PID assigned the HX3 USB Hub */
|
||||
#define USB_PID_HUB 0x5016
|
||||
|
||||
/* represent a 16-bit integer as 2 uint8_t in little endian */
|
||||
#define U16(n) ((n) & 0xff), ((n) >> 8)
|
||||
|
||||
/* Cypress HX3 hub settings blob */
|
||||
const uint8_t hx3_settings[5 + HX3_SETTINGS_SIZE] = {
|
||||
'C', 'Y', /* Cypress magic signature */
|
||||
0x30, /* I2C speed : 100kHz */
|
||||
0xd4, /* Image type: Only settings, no firmware */
|
||||
HX3_SETTINGS_SIZE, /* 192 bytes payload */
|
||||
U16(USB_VID_GOOGLE), U16(USB_PID_HUB), /* USB VID:PID 0x18d1:0x5016 */
|
||||
U16(0x0100), /* bcdDevice 1.00 */
|
||||
0x00, /* Reserved */
|
||||
0x0f, /* 4 SuperSpeed ports, no shared link */
|
||||
0x32, /* bPwrOn2PwrGood : 100 ms */
|
||||
0xef, /* 4 Downstream ports : DS4 is non-removable (MCU) */
|
||||
0x10,
|
||||
0xa0, /* Suspend indicator disabled, Power switch : active HIGH */
|
||||
0x15, /* BC1.2 + ACA Dock + Ghost charging */
|
||||
0xf0, /* CDP enabled, DCP disabled */
|
||||
0x68,
|
||||
0x00, /* Reserved */
|
||||
0x08, /* USB String descriptors enabled */
|
||||
0x00, 0x00,
|
||||
0x12, 0x00, 0x2c,
|
||||
0x66, 0x66, /* USB3.0 TX driver de-emphasis */
|
||||
0x69, 0x29, 0x29, 0x29, 0x29, /* TX amplitude */
|
||||
0x00, /* Reserved */
|
||||
U16(USB_PID_HUB), /* USB2.0 PID: 0x5016 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Reserved */
|
||||
0x04, USB_DT_STRING, 0x09, 0x04, /* LangID = 0x0409 US English */
|
||||
|
||||
0x18, USB_DT_STRING, /* Manufacturer string descriptor */
|
||||
0x47, 0x00, 0x6f, 0x00, 0x6f, 0x00, 0x67, 0x00, /* Google Inc. */
|
||||
0x6c, 0x00, 0x65, 0x00, 0x20, 0x00, 0x49, 0x00, /* as UTF-8 */
|
||||
0x6e, 0x00, 0x63, 0x00, 0x2e, 0x00,
|
||||
|
||||
0x1C, USB_DT_STRING, /* Product string descriptor */
|
||||
0x48, 0x00, 0x6f, 0x00, 0x6e, 0x00, 0x65, 0x00, /* HoneyBuns Hub */
|
||||
0x79, 0x00, 0x62, 0x00, 0x75, 0x00, 0x6e, 0x00, /* as UTF-8 */
|
||||
0x73, 0x00, 0x20, 0x00, 0x48, 0x00, 0x75, 0x00,
|
||||
0x62, 0x00,
|
||||
|
||||
0x02, USB_DT_STRING, /* Serial string descriptor : empty */
|
||||
/* Free space for more strings */
|
||||
};
|
||||
|
||||
static int hx3_configured;
|
||||
|
||||
static int configure_hx3(void)
|
||||
{
|
||||
int ret;
|
||||
int remaining, len;
|
||||
uint8_t *data = (uint8_t *)hx3_settings;
|
||||
uint16_t addr = 0x0000;
|
||||
int success = 1;
|
||||
|
||||
remaining = sizeof(hx3_settings);
|
||||
while (remaining && gpio_get_level(GPIO_HUB_RESET_L)) {
|
||||
/* do 64-byte Page Write */
|
||||
len = MIN(remaining, 64);
|
||||
i2c_lock(I2C_PORT_MASTER, 1);
|
||||
/* send Page Write address */
|
||||
ret = i2c_xfer(I2C_PORT_MASTER, HX3_I2C_ADDR,
|
||||
(uint8_t *)&addr, 2, NULL, 0, I2C_XFER_START);
|
||||
/* send page data */
|
||||
ret |= i2c_xfer(I2C_PORT_MASTER, HX3_I2C_ADDR,
|
||||
data, len, NULL, 0, I2C_XFER_STOP);
|
||||
i2c_lock(I2C_PORT_MASTER, 0);
|
||||
if (ret != EC_SUCCESS) {
|
||||
success = 0;
|
||||
ccprintf("HX3 transfer failed %d\n", ret);
|
||||
break;
|
||||
}
|
||||
remaining -= len;
|
||||
data += len;
|
||||
}
|
||||
return gpio_get_level(GPIO_HUB_RESET_L) ? success : 0;
|
||||
}
|
||||
|
||||
void hx3_task(void)
|
||||
{
|
||||
while (1) {
|
||||
task_wait_event(-1);
|
||||
if (!hx3_configured && gpio_get_level(GPIO_HUB_RESET_L)) {
|
||||
/* wait for the HX3 to come out of reset */
|
||||
msleep(5);
|
||||
hx3_configured = configure_hx3();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void hx3_enable(int enable)
|
||||
{
|
||||
/* Release reset when the Hub is enabled */
|
||||
gpio_set_level(GPIO_HUB_RESET_L, !!enable);
|
||||
/* Trigger I2C configuration if needed */
|
||||
if (enable)
|
||||
task_wake(TASK_ID_USBCFG);
|
||||
else
|
||||
hx3_configured = 0;
|
||||
}
|
||||
|
||||
static int command_hx3(int argc, char **argv)
|
||||
{
|
||||
/* Reset the bridge to put it back in bootloader mode */
|
||||
hx3_enable(0);
|
||||
/* Keep the reset low at least 10ms (same as the RC) */
|
||||
msleep(50);
|
||||
/* Release reset and wait for the hub to come up */
|
||||
hx3_enable(1);
|
||||
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
DECLARE_CONSOLE_COMMAND(hx3, command_hx3,
|
||||
"",
|
||||
"Reset and Send HX3 Hub settings over I2C");
|
||||
@@ -1,79 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Honeybuns-custom USB mux driver. */
|
||||
|
||||
#include "common.h"
|
||||
#include "gpio.h"
|
||||
#include "usb_mux.h"
|
||||
#include "util.h"
|
||||
|
||||
static int board_init_usb_mux(int port)
|
||||
{
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
static int board_set_usb_mux(int port, mux_state_t mux_state)
|
||||
{
|
||||
if (!(mux_state & (MUX_USB_ENABLED | MUX_DP_ENABLED))) {
|
||||
/* put the mux in the high impedance state */
|
||||
gpio_set_level(GPIO_SS_MUX_OE_L, 1);
|
||||
/* Disable display hardware */
|
||||
gpio_set_level(GPIO_BRIDGE_RESET_L, 0);
|
||||
gpio_set_level(GPIO_SPLITTER_RESET_L, 0);
|
||||
/* Put the USB hub under reset */
|
||||
hx3_enable(0);
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
/* Trigger USB Hub configuration */
|
||||
hx3_enable(1);
|
||||
|
||||
if (mux_state & MUX_USB_ENABLED)
|
||||
/* Low selects USB Dock */
|
||||
gpio_set_level(GPIO_SS_MUX_SEL, 0);
|
||||
else
|
||||
/* high selects display port */
|
||||
gpio_set_level(GPIO_SS_MUX_SEL, 1);
|
||||
|
||||
/* clear OE line to make mux active */
|
||||
gpio_set_level(GPIO_SS_MUX_OE_L, 0);
|
||||
|
||||
if (mux_state & MUX_DP_ENABLED) {
|
||||
/* Enable display hardware */
|
||||
gpio_set_level(GPIO_BRIDGE_RESET_L, 1);
|
||||
gpio_set_level(GPIO_SPLITTER_RESET_L, 1);
|
||||
}
|
||||
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
static int board_get_usb_mux(int port, mux_state_t *mux_state)
|
||||
{
|
||||
int oe_disabled = gpio_get_level(GPIO_SS_MUX_OE_L);
|
||||
int dp_4lanes = gpio_get_level(GPIO_SS_MUX_SEL);
|
||||
|
||||
if (oe_disabled)
|
||||
*mux_state = 0;
|
||||
else if (dp_4lanes)
|
||||
*mux_state = MUX_DP_ENABLED;
|
||||
else
|
||||
*mux_state = MUX_USB_ENABLED | MUX_DP_ENABLED;
|
||||
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
const struct usb_mux_driver board_custom_usb_mux_driver = {
|
||||
.init = board_init_usb_mux,
|
||||
.set = board_set_usb_mux,
|
||||
.get = board_get_usb_mux,
|
||||
};
|
||||
|
||||
struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
|
||||
{
|
||||
.port_addr = 0,
|
||||
.driver = &board_custom_usb_mux_driver,
|
||||
},
|
||||
};
|
||||
@@ -1,141 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* USB Power delivery board configuration */
|
||||
|
||||
#ifndef __CROS_EC_USB_PD_CONFIG_H
|
||||
#define __CROS_EC_USB_PD_CONFIG_H
|
||||
|
||||
/* Timer selection for baseband PD communication */
|
||||
#define TIM_CLOCK_PD_TX_C0 17
|
||||
#define TIM_CLOCK_PD_RX_C0 1
|
||||
|
||||
#define TIM_CLOCK_PD_TX(p) TIM_CLOCK_PD_TX_C0
|
||||
#define TIM_CLOCK_PD_RX(p) TIM_CLOCK_PD_RX_C0
|
||||
|
||||
/* Timer channel */
|
||||
#define TIM_RX_CCR_C0 1
|
||||
#define TIM_TX_CCR_C0 1
|
||||
|
||||
/* RX timer capture/compare register */
|
||||
#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0))
|
||||
#define TIM_RX_CCR_REG(p) TIM_CCR_C0
|
||||
|
||||
/* TX and RX timer register */
|
||||
#define TIM_REG_TX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C0))
|
||||
#define TIM_REG_RX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C0))
|
||||
#define TIM_REG_TX(p) TIM_REG_TX_C0
|
||||
#define TIM_REG_RX(p) TIM_REG_RX_C0
|
||||
|
||||
/* use the hardware accelerator for CRC */
|
||||
#define CONFIG_HW_CRC
|
||||
|
||||
/* TX is using SPI1 on PB4 */
|
||||
#define SPI_REGS(p) STM32_SPI1_REGS
|
||||
|
||||
static inline void spi_enable_clock(int port)
|
||||
{
|
||||
STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1;
|
||||
}
|
||||
|
||||
/* SPI1_TX no remap needed */
|
||||
#define DMAC_SPI_TX(p) STM32_DMAC_CH3
|
||||
|
||||
/* RX is using COMP1 triggering TIM1 CH1 */
|
||||
#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1
|
||||
#define CMP2OUTSEL 0
|
||||
|
||||
#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0
|
||||
#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0
|
||||
#define TIM_CCR_CS 1
|
||||
#define EXTI_COMP_MASK(p) (1 << 21)
|
||||
#define IRQ_COMP STM32_IRQ_COMP
|
||||
/* triggers packet detection on comparator falling edge */
|
||||
#define EXTI_XTSR STM32_EXTI_FTSR
|
||||
|
||||
#define DMAC_TIM_RX(p) STM32_DMAC_CH2
|
||||
|
||||
/* the pins used for communication need to be hi-speed */
|
||||
static inline void pd_set_pins_speed(int port)
|
||||
{
|
||||
/* 40 Mhz pin speed on TX_EN (PA15) */
|
||||
STM32_GPIO_OSPEEDR(GPIO_A) |= 0xC0000000;
|
||||
/* 40 MHz pin speed on SPI CLK/MOSI (PB3/4) TIM17_CH1 (PB9) */
|
||||
STM32_GPIO_OSPEEDR(GPIO_B) |= 0x000C03C0;
|
||||
}
|
||||
|
||||
/* Reset SPI peripheral used for TX */
|
||||
static inline void pd_tx_spi_reset(int port)
|
||||
{
|
||||
/* Reset SPI1 */
|
||||
STM32_RCC_APB1RSTR |= (1 << 12);
|
||||
STM32_RCC_APB1RSTR &= ~(1 << 12);
|
||||
}
|
||||
|
||||
/* Drive the CC line from the TX block */
|
||||
static inline void pd_tx_enable(int port, int polarity)
|
||||
{
|
||||
/* PB4 is SPI1_MISO */
|
||||
gpio_set_alternate_function(GPIO_B, 0x0010, 0);
|
||||
|
||||
gpio_set_level(GPIO_PD_TX_EN, 1);
|
||||
}
|
||||
|
||||
/* Put the TX driver in Hi-Z state */
|
||||
static inline void pd_tx_disable(int port, int polarity)
|
||||
{
|
||||
/* TX_DATA on PB4 is an output low GPIO to disable the FET */
|
||||
STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) & ~(3 << (2*4)))
|
||||
| (1 << (2*4));
|
||||
/*
|
||||
* Tri-state the low side after the high side
|
||||
* to ensure we are not going above Vnc
|
||||
*/
|
||||
gpio_set_level(GPIO_PD_TX_EN, 0);
|
||||
}
|
||||
|
||||
/* we know the plug polarity, do the right configuration */
|
||||
static inline void pd_select_polarity(int port, int polarity)
|
||||
{
|
||||
/*
|
||||
* use the right comparator : CC1 -> PA1 (COMP1 INP)
|
||||
* use VrefInt / 2 as INM (about 600mV)
|
||||
*/
|
||||
STM32_COMP_CSR = (STM32_COMP_CSR & ~STM32_COMP_CMP1INSEL_MASK)
|
||||
| STM32_COMP_CMP1EN | STM32_COMP_CMP1INSEL_VREF12;
|
||||
}
|
||||
|
||||
/* Initialize pins used for TX and put them in Hi-Z */
|
||||
static inline void pd_tx_init(void)
|
||||
{
|
||||
gpio_config_module(MODULE_USB_PD, 1);
|
||||
}
|
||||
|
||||
|
||||
static inline void pd_set_host_mode(int port, int enable)
|
||||
{
|
||||
if (!enable)
|
||||
gpio_set_level(GPIO_PPVAR_VBUS_EN, 0);
|
||||
}
|
||||
|
||||
static inline void pd_config_init(int port, uint8_t power_role)
|
||||
{
|
||||
/* Initialize TX pins and put them in Hi-Z */
|
||||
pd_tx_init();
|
||||
}
|
||||
|
||||
static inline int pd_adc_read(int port, int cc)
|
||||
{
|
||||
/* only one CC line, assume other one is always high */
|
||||
return (cc == 0) ? adc_read_channel(ADC_CH_CC1_PD) : 3300;
|
||||
}
|
||||
|
||||
|
||||
static inline void pd_set_vconn(int port, int polarity, int enable)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
#endif /* __CROS_EC_USB_PD_CONFIG_H */
|
||||
@@ -1,327 +0,0 @@
|
||||
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
#include "charger.h"
|
||||
#include "common.h"
|
||||
#include "console.h"
|
||||
#include "ec_commands.h"
|
||||
#include "gpio.h"
|
||||
#include "hooks.h"
|
||||
#include "registers.h"
|
||||
#include "system.h"
|
||||
#include "task.h"
|
||||
#include "timer.h"
|
||||
#include "util.h"
|
||||
#include "usb_api.h"
|
||||
#include "usb_mux.h"
|
||||
#include "usb_pd.h"
|
||||
|
||||
|
||||
#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
|
||||
#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
|
||||
|
||||
#define PDO_FIXED_FLAGS (PDO_FIXED_EXTERNAL | PDO_FIXED_DATA_SWAP |\
|
||||
PDO_FIXED_COMM_CAP)
|
||||
|
||||
/* Voltage indexes for the PDOs */
|
||||
enum volt_idx {
|
||||
PDO_IDX_5V = 0,
|
||||
PDO_IDX_12V = 1,
|
||||
PDO_IDX_20V = 2,
|
||||
|
||||
PDO_IDX_COUNT
|
||||
};
|
||||
|
||||
const uint32_t pd_src_pdo[] = {
|
||||
[PDO_IDX_5V] = PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS),
|
||||
[PDO_IDX_12V] = PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS),
|
||||
[PDO_IDX_20V] = PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS),
|
||||
};
|
||||
const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
|
||||
BUILD_ASSERT(ARRAY_SIZE(pd_src_pdo) == PDO_IDX_COUNT);
|
||||
|
||||
/* Holds valid object position (opos) for entered mode */
|
||||
static int alt_mode[PD_AMODE_COUNT];
|
||||
|
||||
void pd_set_input_current_limit(int port, uint32_t max_ma,
|
||||
uint32_t supply_voltage)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
int pd_is_valid_input_voltage(int mv)
|
||||
{
|
||||
/* Any voltage less than the max is allowed */
|
||||
return 1;
|
||||
}
|
||||
|
||||
void pd_transition_voltage(int idx)
|
||||
{
|
||||
/* PDO index are starting from 1 */
|
||||
switch (idx - 1) {
|
||||
case PDO_IDX_20V:
|
||||
gpio_set_level(GPIO_PP20000_EN, 1);
|
||||
gpio_set_level(GPIO_PPVAR_VBUS_EN, 0);
|
||||
break;
|
||||
case PDO_IDX_12V:
|
||||
gpio_set_level(GPIO_PP12000_EN, 1);
|
||||
gpio_set_level(GPIO_PP20000_EN, 0);
|
||||
gpio_set_level(GPIO_PPVAR_VBUS_EN, 1);
|
||||
break;
|
||||
case PDO_IDX_5V:
|
||||
default:
|
||||
gpio_set_level(GPIO_PP12000_EN, 0);
|
||||
gpio_set_level(GPIO_PP20000_EN, 0);
|
||||
gpio_set_level(GPIO_PPVAR_VBUS_EN, 1);
|
||||
}
|
||||
}
|
||||
|
||||
int pd_set_power_supply_ready(int port)
|
||||
{
|
||||
/* provide VBUS */
|
||||
gpio_set_level(GPIO_PPVAR_VBUS_EN, 1);
|
||||
return EC_SUCCESS; /* we are ready */
|
||||
}
|
||||
|
||||
void pd_power_supply_reset(int port)
|
||||
{
|
||||
/* Kill VBUS */
|
||||
gpio_set_level(GPIO_PPVAR_VBUS_EN, 0);
|
||||
gpio_set_level(GPIO_PP12000_EN, 0);
|
||||
gpio_set_level(GPIO_PP20000_EN, 0);
|
||||
}
|
||||
|
||||
int pd_snk_is_vbus_provided(int port)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pd_board_checks(void)
|
||||
{
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
||||
int pd_check_power_swap(int port)
|
||||
{
|
||||
/* We are source-only */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pd_check_data_swap(int port, int data_role)
|
||||
{
|
||||
/*
|
||||
* Ensure we always are a UFP :
|
||||
* Allow data swap if we are a DFP, otherwise don't allow.
|
||||
*/
|
||||
return (data_role == PD_ROLE_DFP) ? 1 : 0;
|
||||
}
|
||||
|
||||
void pd_execute_data_swap(int port, int data_role)
|
||||
{
|
||||
/* Do nothing */
|
||||
}
|
||||
|
||||
void pd_check_pr_role(int port, int pr_role, int flags)
|
||||
{
|
||||
}
|
||||
|
||||
void pd_check_dr_role(int port, int dr_role, int flags)
|
||||
{
|
||||
/* if the partner is a DRP (e.g. tablet), try to switch to UFP */
|
||||
if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_DFP)
|
||||
pd_request_data_swap(port);
|
||||
}
|
||||
|
||||
int pd_alt_mode(int port, uint16_t svid)
|
||||
{
|
||||
if (svid == USB_SID_DISPLAYPORT)
|
||||
return alt_mode[PD_AMODE_DISPLAYPORT];
|
||||
else if (svid == USB_VID_GOOGLE)
|
||||
return alt_mode[PD_AMODE_GOOGLE];
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ----------------- Vendor Defined Messages ------------------ */
|
||||
const uint32_t vdo_idh = VDO_IDH(0, /* data caps as USB host */
|
||||
1, /* data caps as USB device */
|
||||
IDH_PTYPE_AMA, /* Alternate mode */
|
||||
1, /* supports alt modes */
|
||||
USB_VID_GOOGLE);
|
||||
|
||||
const uint32_t vdo_product = VDO_PRODUCT(CONFIG_USB_PID, CONFIG_USB_BCD_DEV);
|
||||
|
||||
const uint32_t vdo_ama = VDO_AMA(CONFIG_USB_PD_IDENTITY_HW_VERS,
|
||||
CONFIG_USB_PD_IDENTITY_SW_VERS,
|
||||
0, 0, 0, 0, /* SS[TR][12] */
|
||||
0, /* Vconn power */
|
||||
0, /* Vconn power required */
|
||||
0, /* Vbus power required */
|
||||
AMA_USBSS_U31_GEN1 /* USB SS support */);
|
||||
|
||||
static int svdm_response_identity(int port, uint32_t *payload)
|
||||
{
|
||||
payload[VDO_I(IDH)] = vdo_idh;
|
||||
payload[VDO_I(CSTAT)] = VDO_CSTAT(0);
|
||||
payload[VDO_I(PRODUCT)] = vdo_product;
|
||||
payload[VDO_I(AMA)] = vdo_ama;
|
||||
return VDO_I(AMA) + 1;
|
||||
}
|
||||
|
||||
static int svdm_response_svids(int port, uint32_t *payload)
|
||||
{
|
||||
payload[1] = VDO_SVID(USB_SID_DISPLAYPORT, USB_VID_GOOGLE);
|
||||
payload[2] = 0;
|
||||
return 3;
|
||||
}
|
||||
|
||||
#define OPOS_DP 1
|
||||
#define OPOS_GFU 1
|
||||
|
||||
const uint32_t vdo_dp_modes[1] = {
|
||||
VDO_MODE_DP(0, /* UFP pin cfg supported : none */
|
||||
MODE_DP_PIN_C | MODE_DP_PIN_D, /* DFP pin cfg supported */
|
||||
0, /* usb2.0 signalling even in AMode */
|
||||
CABLE_PLUG, /* its a plug */
|
||||
MODE_DP_V13, /* DPv1.3 Support, no Gen2 */
|
||||
MODE_DP_SNK) /* Its a sink only */
|
||||
};
|
||||
|
||||
const uint32_t vdo_goog_modes[1] = {
|
||||
VDO_MODE_GOOGLE(MODE_GOOGLE_FU)
|
||||
};
|
||||
|
||||
static int svdm_response_modes(int port, uint32_t *payload)
|
||||
{
|
||||
if (PD_VDO_VID(payload[0]) == USB_SID_DISPLAYPORT) {
|
||||
memcpy(payload + 1, vdo_dp_modes, sizeof(vdo_dp_modes));
|
||||
return ARRAY_SIZE(vdo_dp_modes) + 1;
|
||||
} else if (PD_VDO_VID(payload[0]) == USB_VID_GOOGLE) {
|
||||
memcpy(payload + 1, vdo_goog_modes, sizeof(vdo_goog_modes));
|
||||
return ARRAY_SIZE(vdo_goog_modes) + 1;
|
||||
} else {
|
||||
return 0; /* nak */
|
||||
}
|
||||
}
|
||||
|
||||
static int dp_status(int port, uint32_t *payload)
|
||||
{
|
||||
int opos = PD_VDO_OPOS(payload[0]);
|
||||
int hpd = gpio_get_level(GPIO_DP_HPD);
|
||||
if (opos != OPOS_DP)
|
||||
return 0; /* nak */
|
||||
|
||||
payload[1] = VDO_DP_STATUS(0, /* IRQ_HPD */
|
||||
(hpd == 1), /* HPD_HI|LOW */
|
||||
0, /* request exit DP */
|
||||
0, /* request exit USB */
|
||||
1, /* MF pref */
|
||||
gpio_get_level(GPIO_PD_SBU_ENABLE),
|
||||
0, /* power low */
|
||||
0x2);
|
||||
return 2;
|
||||
}
|
||||
|
||||
static int dp_config(int port, uint32_t *payload)
|
||||
{
|
||||
/* is it a 2+2 or 4 DP lanes mode ? */
|
||||
enum typec_mux mux = PD_DP_CFG_PIN(payload[1]) & MODE_DP_PIN_MF_MASK ?
|
||||
TYPEC_MUX_DOCK : TYPEC_MUX_DP;
|
||||
|
||||
if (PD_DP_CFG_DPON(payload[1]))
|
||||
gpio_set_level(GPIO_PD_SBU_ENABLE, 1);
|
||||
/* Get the DP lanes (or DP+USB SS depending on the mode) */
|
||||
usb_mux_set(port, mux, USB_SWITCH_CONNECT, pd_get_polarity(port));
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int svdm_enter_mode(int port, uint32_t *payload)
|
||||
{
|
||||
int rv = 0; /* will generate a NAK */
|
||||
|
||||
/* SID & mode request is valid */
|
||||
if ((PD_VDO_VID(payload[0]) == USB_SID_DISPLAYPORT) &&
|
||||
(PD_VDO_OPOS(payload[0]) == OPOS_DP)) {
|
||||
alt_mode[PD_AMODE_DISPLAYPORT] = OPOS_DP;
|
||||
rv = 1;
|
||||
pd_log_event(PD_EVENT_VIDEO_DP_MODE, 0, 1, NULL);
|
||||
} else if ((PD_VDO_VID(payload[0]) == USB_VID_GOOGLE) &&
|
||||
(PD_VDO_OPOS(payload[0]) == OPOS_GFU)) {
|
||||
alt_mode[PD_AMODE_GOOGLE] = OPOS_GFU;
|
||||
rv = 1;
|
||||
}
|
||||
|
||||
if (rv)
|
||||
/*
|
||||
* If we failed initial mode entry we'll have enumerated the USB
|
||||
* Billboard class. If so we should disconnect.
|
||||
*/
|
||||
usb_disconnect();
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int svdm_exit_mode(int port, uint32_t *payload)
|
||||
{
|
||||
if (PD_VDO_VID(payload[0]) == USB_SID_DISPLAYPORT) {
|
||||
gpio_set_level(GPIO_PD_SBU_ENABLE, 0);
|
||||
alt_mode[PD_AMODE_DISPLAYPORT] = 0;
|
||||
pd_log_event(PD_EVENT_VIDEO_DP_MODE, 0, 0, NULL);
|
||||
} else if (PD_VDO_VID(payload[0]) == USB_VID_GOOGLE) {
|
||||
alt_mode[PD_AMODE_GOOGLE] = 0;
|
||||
} else {
|
||||
CPRINTF("Unknown exit mode req:0x%08x\n", payload[0]);
|
||||
}
|
||||
|
||||
return 1; /* Must return ACK */
|
||||
}
|
||||
|
||||
static struct amode_fx dp_fx = {
|
||||
.status = &dp_status,
|
||||
.config = &dp_config,
|
||||
};
|
||||
|
||||
const struct svdm_response svdm_rsp = {
|
||||
.identity = &svdm_response_identity,
|
||||
.svids = &svdm_response_svids,
|
||||
.modes = &svdm_response_modes,
|
||||
.enter_mode = &svdm_enter_mode,
|
||||
.amode = &dp_fx,
|
||||
.exit_mode = &svdm_exit_mode,
|
||||
};
|
||||
|
||||
int pd_custom_vdm(int port, int cnt, uint32_t *payload,
|
||||
uint32_t **rpayload)
|
||||
{
|
||||
int rsize;
|
||||
|
||||
if (PD_VDO_VID(payload[0]) != USB_VID_GOOGLE ||
|
||||
!alt_mode[PD_AMODE_GOOGLE])
|
||||
return 0;
|
||||
|
||||
*rpayload = payload;
|
||||
|
||||
rsize = pd_custom_flash_vdm(port, cnt, payload);
|
||||
if (!rsize) {
|
||||
int cmd = PD_VDO_CMD(payload[0]);
|
||||
switch (cmd) {
|
||||
#ifdef CONFIG_USB_PD_LOGGING
|
||||
case VDO_CMD_GET_LOG:
|
||||
rsize = pd_vdm_get_log_entry(payload);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
/* Unknown : do not answer */
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* respond (positively) to the request */
|
||||
payload[0] |= VDO_SRC_RESPONDER;
|
||||
|
||||
return rsize;
|
||||
}
|
||||
|
||||
@@ -63,7 +63,6 @@ BOARDS_STM32=(
|
||||
eve_fp
|
||||
glados_pd
|
||||
hammer
|
||||
honeybuns
|
||||
jerry
|
||||
kitty
|
||||
minimuffin
|
||||
|
||||
Reference in New Issue
Block a user