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ARM platforms: Define exception macros
Define number of priority bits, and allocate priority levels for SDEI. Change-Id: Ib6bb6c5c09397f7caef950c4caed5a737b3d4112 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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@@ -454,5 +454,11 @@
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*/
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#define PLAT_PERCPU_BAKERY_LOCK_SIZE (1 * CACHE_WRITEBACK_GRANULE)
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/* Priority levels for ARM platforms */
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#define PLAT_SDEI_CRITICAL_PRI 0x60
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#define PLAT_SDEI_NORMAL_PRI 0x70
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/* ARM platforms use 3 upper bits of secure interrupt priority */
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#define ARM_PRI_BITS 3
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#endif /* __ARM_DEF_H__ */
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24
plat/arm/common/aarch64/arm_ehf.c
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24
plat/arm/common/aarch64/arm_ehf.c
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@@ -0,0 +1,24 @@
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <ehf.h>
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#include <platform_def.h>
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/*
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* Enumeration of priority levels on ARM platforms.
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*/
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ehf_pri_desc_t arm_exceptions[] = {
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#if SDEI_SUPPORT
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/* Critical priority SDEI */
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EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SDEI_CRITICAL_PRI),
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/* Normal priority SDEI */
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EHF_PRI_DESC(ARM_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
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#endif
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};
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/* Plug in ARM exceptions to Exception Handling Framework. */
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EHF_REGISTER_PRIORITIES(arm_exceptions, ARRAY_SIZE(arm_exceptions), ARM_PRI_BITS);
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@@ -184,6 +184,10 @@ BL31_SOURCES += plat/arm/common/arm_sip_svc.c \
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lib/pmf/pmf_smc.c
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endif
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ifeq (${EL3_EXCEPTION_HANDLING},1)
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BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c
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endif
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ifneq (${TRUSTED_BOARD_BOOT},0)
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# Include common TBB sources
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