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chip/it83xx: Configure IRQTP for KBC when using eSPI

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SERIIRQ# is by default deasserted level high. However, when using
eSPI, SERIRQ# is routed over virtual wire as interrupt event. As per
eSPI base spec (doc#327432), all virtual wire interrupt events are
deasserted level low. Thus, it is necessary to configure this
interrupt as inverted. ITE hardware takes care of routing the SERIRQ#
signal appropriately over eSPI/LPC depending upon the selected mode.

BUG=b:79897267
BRANCH=None
TEST=Verified using evtest that keypresses are properly identified on
the OS side.

Change-Id: Ie3b92f20fa915ba8f17dcbcb600ebfe5cbfb4d57
Signed-off-by: Dino Li <dino.li@ite.corp-partner.google.com>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1069570
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
This commit is contained in:
Furquan Shaikh
2018-05-23 09:54:32 -07:00
committed by chrome-bot
parent 57ed31bcc5
commit 0d47794e6c
2 changed files with 25 additions and 0 deletions
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22
chip/it83xx/ec2i.c
View File

@@ -19,6 +19,28 @@ static const struct ec2i_t pnpcfg_settings[] = {
{HOST_INDEX_LDN, LDN_KBC_KEYBOARD},
/* Set IRQ=01h for logical device */
{HOST_INDEX_IRQNUMX, 0x01},
/* Configure IRQTP for KBC. */
#ifdef CONFIG_HOSTCMD_ESPI
/*
* Interrupt request type select (IRQTP) for KBC.
* bit 1, 0: IRQ request is buffered and applied to SERIRQ
* 1: IRQ request is inverted before being applied to SERIRQ
* bit 0, 0: Edge triggered mode
* 1: Level triggered mode
*
* SERIRQ# is by default deasserted level high. However, when using
* eSPI, SERIRQ# is routed over virtual wire as interrupt event. As
* per eSPI base spec (doc#327432), all virtual wire interrupt events
* are deasserted level low. Thus, it is necessary to configure this
* interrupt as inverted. ITE hardware takes care of routing the SERIRQ#
* signal appropriately over eSPI / LPC depending upon the selected
* mode.
*
* Additionally, this interrupt is configured as edge-triggered on the
* host side. So, match the trigger mode on the EC side as well.
*/
{HOST_INDEX_IRQTP, 0x02},
#endif
/* Enable logical device */
{HOST_INDEX_LDA, 0x01},

3
chip/it83xx/ec2i_chip.h
View File

@@ -16,6 +16,9 @@
enum ec2i_setting {
EC2I_SET_KB_LDN,
EC2I_SET_KB_IRQ,
#ifdef CONFIG_HOSTCMD_ESPI
EC2I_SET_KB_IRQ_TYPE,
#endif
EC2I_SET_KB_ENABLE,
EC2I_SET_MOUSE_LDN,
EC2I_SET_MOUSE_IRQ,