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cleanup: Change meaning of storage offset CONFIGs

Browse Source 
In order to support architectures with non-contiguous writable and
protected regions, change storage offsets to be relative to writable and
protected regions, rather than relative to "the start of the region of
storage belonging to the EC".

Spec doc available at https://goo.gl/fnzTvr.

BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I796f8e7305a6336495bd256a78774595cb16a2e4
Reviewed-on: https://chromium-review.googlesource.com/297823
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
2015-09-07 13:47:48 -07:00
committed by chrome-bot
parent 558c465165
commit 1167cad6a8
15 changed files with 146 additions and 82 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
chip/mec1322/config_chip.h
View File

@@ -94,10 +94,6 @@
/* One page size for write */
#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256
/* Independent of the Flash Physical size of the board
256KB Max size used. Located at the top most segment */
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000
/* Program memory base address */
#define CONFIG_PROGRAM_MEMORY_BASE 0x00100000

21
chip/mec1322/config_flash_layout.h
View File

@@ -20,13 +20,19 @@
#undef CONFIG_FLASH_PSTATE
#define CONFIG_SPI_FLASH
/* Size of SPI memory used by EC (lfw + RSA Keys + RO + RW + boot header) */
#define CONFIG_FLASH_BASE_SPI (CONFIG_SPI_FLASH_SIZE - (0x40000))
/* EC region of SPI resides at end of ROM, protected region follows writable */
#define CONFIG_EC_PROTECTED_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x20000)
#define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x20000
#define CONFIG_EC_WRITABLE_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x40000)
#define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x20000
/* Size of one firmware image in flash */
#ifndef CONFIG_FW_IMAGE_SIZE
#define CONFIG_FW_IMAGE_SIZE (96 * 1024)
#endif
/* redundant..*/
#define CONFIG_FLASH_PHYSICAL_SIZE CONFIG_SPI_FLASH_SIZE
#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE
/* Loader resides at the beginning of program memory */
@@ -34,12 +40,12 @@
#define CONFIG_LOADER_SIZE 0x1000
/* Write protect Loader and RO Image */
#define CONFIG_WP_OFF (CONFIG_FLASH_PHYSICAL_SIZE >> 1)
#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
/*
* Write protect 128k section of 256k physical flash which contains loader
* and RO Images.
*/
#define CONFIG_WP_SIZE (CONFIG_FLASH_PHYSICAL_SIZE >> 1)
#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
/*
* RO / RW images follow the loader in program memory. Either RO or RW
@@ -52,7 +58,7 @@
#define CONFIG_RW_SIZE CONFIG_RO_SIZE
/* WP region consists of second half of SPI, and begins with the boot header */
#define CONFIG_BOOT_HEADER_STORAGE_OFF CONFIG_WP_OFF
#define CONFIG_BOOT_HEADER_STORAGE_OFF 0
#define CONFIG_BOOT_HEADER_STORAGE_SIZE 0x240
/* Loader / lfw image immediately follows the boot header on SPI */
@@ -66,9 +72,4 @@
/* RW image starts at the beginning of SPI */
#define CONFIG_RW_STORAGE_OFF 0
#define CONFIG_RO_IMAGE_FLASHADDR (CONFIG_FLASH_BASE_SPI + \
CONFIG_RO_STORAGE_OFF)
#define CONFIG_RW_IMAGE_FLASHADDR (CONFIG_FLASH_BASE_SPI + \
CONFIG_RW_STORAGE_OFF)
#endif /* __CROS_EC_CONFIG_FLASH_LAYOUT_H */

16
chip/mec1322/flash.c
View File

@@ -38,8 +38,6 @@ int flash_physical_read(int offset, int size, char *data)
{
int ret, i, read_size;
offset += CONFIG_FLASH_BASE_SPI;
for (i = 0; i < size; i += read_size) {
read_size = MIN((size - i), SPI_FLASH_MAX_READ_SIZE);
ret = spi_flash_read((uint8_t *)(data + i),
@@ -70,8 +68,6 @@ int flash_physical_write(int offset, int size, const char *data)
if (entire_flash_locked)
return EC_ERROR_ACCESS_DENIED;
offset += CONFIG_FLASH_BASE_SPI;
/* Fail if offset, size, and data aren't at least word-aligned */
if ((offset | size | (uint32_t)(uintptr_t)data) & 3)
return EC_ERROR_INVAL;
@@ -102,7 +98,6 @@ int flash_physical_erase(int offset, int size)
if (entire_flash_locked)
return EC_ERROR_ACCESS_DENIED;
offset += CONFIG_FLASH_BASE_SPI;
ret = spi_flash_erase(offset, size);
return ret;
}
@@ -115,8 +110,7 @@ int flash_physical_erase(int offset, int size)
*/
int flash_physical_get_protect(int bank)
{
return spi_flash_check_protect(CONFIG_FLASH_BASE_SPI +
bank * CONFIG_FLASH_BANK_SIZE,
return spi_flash_check_protect(bank * CONFIG_FLASH_BANK_SIZE,
CONFIG_FLASH_BANK_SIZE);
}
@@ -153,8 +147,8 @@ uint32_t flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
if (spi_flash_check_protect(CONFIG_FLASH_BASE_SPI +
CONFIG_RO_STORAGE_OFF, CONFIG_RO_SIZE)) {
if (spi_flash_check_protect(CONFIG_WP_STORAGE_OFF,
CONFIG_WP_STORAGE_SIZE)) {
flags |= EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW;
}
@@ -225,8 +219,8 @@ int flash_physical_protect_at_boot(enum flash_wp_range range)
entire_flash_locked = 1;
/* Fallthrough */
case FLASH_WP_RO:
offset = CONFIG_FLASH_BASE_SPI + CONFIG_WP_OFF;
size = CONFIG_WP_SIZE;
offset = CONFIG_WP_STORAGE_OFF;
size = CONFIG_WP_STORAGE_SIZE;
flashwp = SPI_WP_HARDWARE;
break;
}

6
chip/mec1322/lfw/ec_lfw.c
View File

@@ -259,11 +259,13 @@ void lfw_main()
case SYSTEM_IMAGE_RW:
uart_puts("lfw-RW load\n");
init_addr = CONFIG_RW_MEM_OFF + CONFIG_PROGRAM_MEMORY_BASE;
spi_image_load(CONFIG_RW_IMAGE_FLASHADDR);
spi_image_load(CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF);
break;
case SYSTEM_IMAGE_RO:
uart_puts("lfw-RO load\n");
spi_image_load(CONFIG_RO_IMAGE_FLASHADDR);
spi_image_load(CONFIG_EC_PROTECTED_STORAGE_OFF +
CONFIG_RO_STORAGE_OFF);
/* fall through */
default:
MEC1322_VBAT_RAM(MEC1322_IMAGETYPE_IDX) =

15
chip/npcx/config_flash_layout.h
View File

@@ -20,6 +20,11 @@
#define CONFIG_MAPPED_STORAGE_BASE 0x64000000
#undef CONFIG_FLASH_PSTATE
#define CONFIG_EC_PROTECTED_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x40000)
#define CONFIG_EC_PROTECTED_STORAGE_SIZE 0x20000
#define CONFIG_EC_WRITABLE_STORAGE_OFF (CONFIG_SPI_FLASH_SIZE - 0x20000)
#define CONFIG_EC_WRITABLE_STORAGE_SIZE 0x20000
/* Size of one firmware image in flash */
#ifndef CONFIG_FW_IMAGE_SIZE
#define CONFIG_FW_IMAGE_SIZE (CONFIG_FLASH_PHYSICAL_SIZE / 2)
@@ -30,8 +35,8 @@
#define CONFIG_RO_HDR_MEM_OFF 0x0
#define CONFIG_RO_HDR_SIZE 0x40
#define CONFIG_WP_OFF CONFIG_RO_STORAGE_OFF
#define CONFIG_WP_SIZE CONFIG_FW_IMAGE_SIZE
#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
/* RO firmware offset in flash */
#define CONFIG_RO_MEM_OFF CONFIG_RO_HDR_SIZE
@@ -42,8 +47,8 @@
#define CONFIG_RW_MEM_OFF CONFIG_RW_STORAGE_OFF
#define CONFIG_RW_SIZE (96 * 1024) /* 96KB for RW FW */
/* The storage offset of ec.R*.flat */
#define CONFIG_RO_STORAGE_OFF 0
#define CONFIG_RW_STORAGE_OFF CONFIG_FW_IMAGE_SIZE /* 128 KB alignemnt */
/* The storage offset of ec.R*.flat which is used for CONFIG_CDRAM_ARCH */
#define CONFIG_RO_STORAGE_OFF CONFIG_RO_HDR_SIZE
#define CONFIG_RW_STORAGE_OFF 0
#endif /* __CROS_EC_CONFIG_FLASH_LAYOUT_H */

41
common/flash.c
View File

@@ -722,11 +722,24 @@ DECLARE_CONSOLE_COMMAND(flashwp, command_flash_wp,
/*****************************************************************************/
/* Host commands */
/*
* All internal EC code assumes that offsets are provided relative to
* physical address zero of storage. In some cases, the region of storage
* belonging to the EC is not physical address zero - a non-zero fmap_base
* indicates so. Since fmap_base is not yet handled correctly by external
* code, we must perform the adjustment in our host command handlers -
* adjust all offsets so they are relative to the beginning of the storage
* region belonging to the EC. TODO(crbug.com/529365): Handle fmap_base
* correctly in flashrom, dump_fmap, etc. and remove EC_FLASH_REGION_START.
*/
#define EC_FLASH_REGION_START MIN(CONFIG_EC_PROTECTED_STORAGE_OFF, \
CONFIG_EC_WRITABLE_STORAGE_OFF)
static int flash_command_get_info(struct host_cmd_handler_args *args)
{
struct ec_response_flash_info_1 *r = args->response;
r->flash_size = CONFIG_FLASH_SIZE;
r->flash_size = CONFIG_FLASH_SIZE - EC_FLASH_REGION_START;
r->write_block_size = CONFIG_FLASH_WRITE_SIZE;
r->erase_block_size = CONFIG_FLASH_ERASE_SIZE;
r->protect_block_size = CONFIG_FLASH_BANK_SIZE;
@@ -772,11 +785,12 @@ DECLARE_HOST_COMMAND(EC_CMD_FLASH_INFO,
static int flash_command_read(struct host_cmd_handler_args *args)
{
const struct ec_params_flash_read *p = args->params;
uint32_t offset = p->offset + EC_FLASH_REGION_START;
if (p->size > args->response_max)
return EC_RES_OVERFLOW;
if (flash_read(p->offset, p->size, args->response))
if (flash_read(offset, p->size, args->response))
return EC_RES_ERROR;
args->response_size = p->size;
@@ -796,6 +810,7 @@ DECLARE_HOST_COMMAND(EC_CMD_FLASH_READ,
static int flash_command_write(struct host_cmd_handler_args *args)
{
const struct ec_params_flash_write *p = args->params;
uint32_t offset = p->offset + EC_FLASH_REGION_START;
if (flash_get_protect() & EC_FLASH_PROTECT_ALL_NOW)
return EC_RES_ACCESS_DENIED;
@@ -803,10 +818,10 @@ static int flash_command_write(struct host_cmd_handler_args *args)
if (p->size + sizeof(*p) > args->params_size)
return EC_RES_INVALID_PARAM;
if (system_unsafe_to_overwrite(p->offset, p->size))
if (system_unsafe_to_overwrite(offset, p->size))
return EC_RES_ACCESS_DENIED;
if (flash_write(p->offset, p->size, (const uint8_t *)(p + 1)))
if (flash_write(offset, p->size, (const uint8_t *)(p + 1)))
return EC_RES_ERROR;
return EC_RES_SUCCESS;
@@ -818,11 +833,12 @@ DECLARE_HOST_COMMAND(EC_CMD_FLASH_WRITE,
static int flash_command_erase(struct host_cmd_handler_args *args)
{
const struct ec_params_flash_erase *p = args->params;
uint32_t offset = p->offset + EC_FLASH_REGION_START;
if (flash_get_protect() & EC_FLASH_PROTECT_ALL_NOW)
return EC_RES_ACCESS_DENIED;
if (system_unsafe_to_overwrite(p->offset, p->size))
if (system_unsafe_to_overwrite(offset, p->size))
return EC_RES_ACCESS_DENIED;
/* Indicate that we might be a while */
@@ -830,7 +846,7 @@ static int flash_command_erase(struct host_cmd_handler_args *args)
args->result = EC_RES_IN_PROGRESS;
host_send_response(args);
#endif
if (flash_erase(p->offset, p->size))
if (flash_erase(offset, p->size))
return EC_RES_ERROR;
return EC_RES_SUCCESS;
@@ -890,16 +906,21 @@ static int flash_command_region_info(struct host_cmd_handler_args *args)
switch (p->region) {
case EC_FLASH_REGION_RO:
r->offset = CONFIG_RO_STORAGE_OFF;
r->offset = CONFIG_EC_PROTECTED_STORAGE_OFF +
CONFIG_RO_STORAGE_OFF -
EC_FLASH_REGION_START;
r->size = CONFIG_RO_SIZE;
break;
case EC_FLASH_REGION_RW:
r->offset = CONFIG_RW_STORAGE_OFF;
r->offset = CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF -
EC_FLASH_REGION_START;
r->size = CONFIG_RW_SIZE;
break;
case EC_FLASH_REGION_WP_RO:
r->offset = CONFIG_WP_OFF;
r->size = CONFIG_WP_SIZE;
r->offset = CONFIG_WP_STORAGE_OFF -
EC_FLASH_REGION_START;
r->size = CONFIG_WP_STORAGE_SIZE;
break;
default:
return EC_RES_INVALID_PARAM;

41
common/fmap.c
View File

@@ -7,6 +7,7 @@
#include <stddef.h>
#include "common.h"
#include "util.h"
#include "version.h"
/* FMAP structs. See http://code.google.com/p/flashmap/wiki/FmapSpec */
@@ -20,10 +21,25 @@
* For address containing CONFIG_PROGRAM_MEMORY_BASE (symbols in *.RO.lds.S and
* variable), this computes the offset to the start of the image on flash.
*/
#define RELATIVE_RO(addr) ((addr) - CONFIG_PROGRAM_MEMORY_BASE - \
CONFIG_RO_MEM_OFF)
/*
* All internal EC code assumes that offsets are provided relative to
* physical address zero of storage. In some cases, the region of storage
* belonging to the EC is not physical address zero - a non-zero fmap_base
* indicates so. Since fmap_base is not yet handled correctly by external
* code, we must perform the adjustment in our host command handlers -
* adjust all offsets so they are relative to the beginning of the storage
* region belonging to the EC. TODO(crbug.com/529365): Handle fmap_base
* correctly in flashrom, dump_fmap, etc. and remove EC_FLASH_REGION_START.
*/
#if CONFIG_EC_WRITABLE_STORAGE_OFF < CONFIG_EC_PROTECTED_STORAGE_OFF
#define FMAP_REGION_START CONFIG_EC_WRITABLE_STORAGE_OFF
#else
#define FMAP_REGION_START CONFIG_EC_PROTECTED_STORAGE_OFF
#endif
struct fmap_header {
char fmap_signature[FMAP_SIGNATURE_SIZE];
uint8_t fmap_ver_major;
@@ -71,14 +87,16 @@ const struct _ec_fmap {
* volatile data (ex, calibration results).
*/
.area_name = "EC_RO",
.area_offset = CONFIG_RO_STORAGE_OFF,
.area_offset = CONFIG_EC_PROTECTED_STORAGE_OFF -
FMAP_REGION_START + CONFIG_RO_STORAGE_OFF,
.area_size = CONFIG_RO_SIZE,
.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
},
{
/* (Optional) RO firmware code. */
.area_name = "FR_MAIN",
.area_offset = CONFIG_RO_STORAGE_OFF,
.area_offset = CONFIG_EC_PROTECTED_STORAGE_OFF -
FMAP_REGION_START + CONFIG_RO_STORAGE_OFF,
.area_size = CONFIG_RO_SIZE,
.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
},
@@ -88,7 +106,8 @@ const struct _ec_fmap {
* ASCII, and padded with \0.
*/
.area_name = "RO_FRID",
.area_offset = CONFIG_RO_STORAGE_OFF +
.area_offset = CONFIG_EC_PROTECTED_STORAGE_OFF -
FMAP_REGION_START + CONFIG_RO_STORAGE_OFF +
RELATIVE_RO((uint32_t)__version_struct_offset) +
offsetof(struct version_struct, version),
.area_size = sizeof(version_data.version),
@@ -98,7 +117,8 @@ const struct _ec_fmap {
/* Other RO stuff: FMAP, WP, KEYS, etc. */
{
.area_name = "FMAP",
.area_offset = CONFIG_RO_STORAGE_OFF +
.area_offset = CONFIG_EC_PROTECTED_STORAGE_OFF -
FMAP_REGION_START + CONFIG_RO_STORAGE_OFF +
RELATIVE_RO((uint32_t)&ec_fmap),
.area_size = sizeof(ec_fmap),
.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
@@ -110,8 +130,9 @@ const struct _ec_fmap {
* EC_RO and aligned to hardware specification.
*/
.area_name = "WP_RO",
.area_offset = CONFIG_WP_OFF,
.area_size = CONFIG_WP_SIZE,
.area_offset = CONFIG_WP_STORAGE_OFF -
FMAP_REGION_START,
.area_size = CONFIG_WP_STORAGE_SIZE,
.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
},
@@ -119,7 +140,8 @@ const struct _ec_fmap {
{
/* The range of RW firmware to be auto-updated. */
.area_name = "EC_RW",
.area_offset = CONFIG_RW_STORAGE_OFF,
.area_offset = CONFIG_EC_WRITABLE_STORAGE_OFF -
FMAP_REGION_START + CONFIG_RW_STORAGE_OFF,
.area_size = CONFIG_RW_SIZE,
.area_flags = FMAP_AREA_STATIC | FMAP_AREA_RO,
},
@@ -132,7 +154,8 @@ const struct _ec_fmap {
* accomodate image asymmetry.
*/
.area_name = "RW_FWID",
.area_offset = CONFIG_RW_STORAGE_OFF +
.area_offset = CONFIG_EC_WRITABLE_STORAGE_OFF -
FMAP_REGION_START + CONFIG_RW_STORAGE_OFF +
RELATIVE_RO((uint32_t)__version_struct_offset) +
offsetof(struct version_struct, version),
.area_size = sizeof(version_data.version),

17
common/system.c
View File

@@ -351,8 +351,9 @@ int system_get_image_used(enum system_image_copy_t copy)
* the end of the image.
*/
#ifndef CONFIG_MAPPED_STORAGE
image_offset = (copy == SYSTEM_IMAGE_RW) ? CONFIG_RW_STORAGE_OFF :
CONFIG_RO_STORAGE_OFF;
image_offset = (copy == SYSTEM_IMAGE_RW) ?
CONFIG_EC_WRITABLE_STORAGE_OFF + CONFIG_RW_STORAGE_OFF :
CONFIG_EC_PROTECTED_STORAGE_OFF + CONFIG_RO_STORAGE_OFF;
image = buf;
do {
@@ -382,11 +383,13 @@ test_mockable int system_unsafe_to_overwrite(uint32_t offset, uint32_t size)
switch (system_get_image_copy()) {
case SYSTEM_IMAGE_RO:
r_offset = CONFIG_RO_STORAGE_OFF;
r_offset = CONFIG_EC_PROTECTED_STORAGE_OFF +
CONFIG_RO_STORAGE_OFF;
r_size = CONFIG_RO_SIZE;
break;
case SYSTEM_IMAGE_RW:
r_offset = CONFIG_RW_STORAGE_OFF;
r_offset = CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF;
r_size = CONFIG_RW_SIZE;
break;
default:
@@ -564,10 +567,12 @@ const char *system_get_version(enum system_image_copy_t copy)
* Read the version information from the proper location
* on storage.
*/
addr += (copy == SYSTEM_IMAGE_RW) ? CONFIG_RW_STORAGE_OFF :
CONFIG_RO_STORAGE_OFF;
addr += (copy == SYSTEM_IMAGE_RW) ?
CONFIG_EC_WRITABLE_STORAGE_OFF + CONFIG_RW_STORAGE_OFF :
CONFIG_EC_PROTECTED_STORAGE_OFF + CONFIG_RO_STORAGE_OFF;
#ifdef CONFIG_MAPPED_STORAGE
addr += CONFIG_MAPPED_STORAGE_BASE;
v = (const struct version_struct *)addr;
#else

12
common/usb_pd_policy.c
View File

@@ -816,7 +816,8 @@ DECLARE_HOST_COMMAND(EC_CMD_USB_PD_GET_AMODE,
#endif
#define FW_RW_END (CONFIG_RW_STORAGE_OFF + CONFIG_RW_SIZE)
#define FW_RW_END (CONFIG_EC_WRITABLE_STORAGE_OFF + \
CONFIG_RW_STORAGE_OFF + CONFIG_RW_SIZE)
uint8_t *flash_hash_rw(void)
{
@@ -878,14 +879,17 @@ int pd_custom_flash_vdm(int port, int cnt, uint32_t *payload)
if (system_get_image_copy() != SYSTEM_IMAGE_RO)
break;
pd_log_event(PD_EVENT_ACC_RW_ERASE, 0, 0, NULL);
flash_offset = CONFIG_RW_STORAGE_OFF;
flash_physical_erase(CONFIG_RW_STORAGE_OFF, CONFIG_RW_SIZE);
flash_offset = CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF;
flash_physical_erase(CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF, CONFIG_RW_SIZE);
rw_flash_changed = 1;
break;
case VDO_CMD_FLASH_WRITE:
/* do not kill the code under our feet */
if ((system_get_image_copy() != SYSTEM_IMAGE_RO) ||
(flash_offset < CONFIG_RW_STORAGE_OFF))
(flash_offset < CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF))
break;
flash_physical_write(flash_offset, 4*(cnt - 1),
(const char *)(payload+1));

13
common/vboot_hash.c
View File

@@ -222,7 +222,8 @@ static void vboot_hash_init(void)
#endif
{
/* Start computing the hash of RW firmware */
vboot_hash_start(CONFIG_RW_STORAGE_OFF,
vboot_hash_start(CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF,
system_get_image_used(SYSTEM_IMAGE_RW),
NULL, 0);
}
@@ -256,7 +257,8 @@ DECLARE_HOOK(HOOK_SYSJUMP, vboot_hash_preserve_state, HOOK_PRIO_DEFAULT);
#ifdef CONFIG_CMD_HASH
static int command_hash(int argc, char **argv)
{
uint32_t offset = CONFIG_RW_STORAGE_OFF;
uint32_t offset = CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF;
uint32_t size = CONFIG_RW_SIZE;
char *e;
@@ -282,11 +284,13 @@ static int command_hash(int argc, char **argv)
return EC_SUCCESS;
} else if (!strcasecmp(argv[1], "rw")) {
return vboot_hash_start(
CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF,
system_get_image_used(SYSTEM_IMAGE_RW),
NULL, 0);
} else if (!strcasecmp(argv[1], "ro")) {
return vboot_hash_start(
CONFIG_EC_PROTECTED_STORAGE_OFF +
CONFIG_RO_STORAGE_OFF,
system_get_image_used(SYSTEM_IMAGE_RO),
NULL, 0);
@@ -359,10 +363,11 @@ static int host_start_hash(const struct ec_params_vboot_hash *p)
/* Handle special offset values */
if (offset == EC_VBOOT_HASH_OFFSET_RO) {
offset = CONFIG_RO_STORAGE_OFF;
offset = CONFIG_EC_PROTECTED_STORAGE_OFF +
CONFIG_RO_STORAGE_OFF;
size = system_get_image_used(SYSTEM_IMAGE_RO);
} else if (p->offset == EC_VBOOT_HASH_OFFSET_RW) {
offset = CONFIG_RW_STORAGE_OFF;
offset = CONFIG_EC_WRITABLE_STORAGE_OFF + CONFIG_RW_STORAGE_OFF;
size = system_get_image_used(SYSTEM_IMAGE_RW);
}

BIN
ec.bin Normal file
View File

Binary file not shown.

21
include/config.h
View File

@@ -732,8 +732,13 @@
#undef CONFIG_FLASH_WRITE_IDEAL_SIZE
#undef CONFIG_FLASH_WRITE_SIZE
/* Base address of SPI Flash. */
#undef CONFIG_FLASH_BASE_SPI
/* Protected region of storage belonging to EC */
#undef CONFIG_EC_PROTECTED_STORAGE_OFF
#undef CONFIG_EC_PROTECTED_STORAGE_SIZE
/* Writable region of storage belonging to EC */
#undef CONFIG_EC_WRITABLE_STORAGE_OFF
#undef CONFIG_EC_WRITABLE_STORAGE_SIZE
/*****************************************************************************/
@@ -760,10 +765,12 @@
* for STORAGE and for MEMORY.
*/
#undef CONFIG_RO_MEM_OFF
/* Offset relative to CONFIG_EC_PROTECTED_STORAGE_OFF */
#undef CONFIG_RO_STORAGE_OFF
#undef CONFIG_RO_SIZE
#undef CONFIG_RW_MEM_OFF
/* Offset relative to CONFIG_EC_WRITABLE_STORAGE_OFF */
#undef CONFIG_RW_STORAGE_OFF
#undef CONFIG_RW_SIZE
@@ -778,8 +785,8 @@
* Write protect region offset / size. This region normally encompasses the
* RO image, but may also contain additional images or data.
*/
#undef CONFIG_WP_OFF
#undef CONFIG_WP_SIZE
#undef CONFIG_WP_STORAGE_OFF
#undef CONFIG_WP_STORAGE_SIZE
/*
* Board Image ec.bin contains a RO firmware. If not defined, the image will
@@ -1353,12 +1360,6 @@
/* Define the RSA key size. */
#undef CONFIG_RSA_KEY_SIZE
/* Flash address of the RO image. */
#undef CONFIG_RO_IMAGE_FLASHADDR
/* Flash address of the RW image. */
#undef CONFIG_RW_IMAGE_FLASHADDR
/*
* Verify the RW firmware using the RSA signature.
* (for accessories without software sync)

13
include/config_std_internal_flash.h
View File

@@ -67,11 +67,16 @@
#define CONFIG_RO_SIZE (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE)
#define CONFIG_RW_MEM_OFF (CONFIG_SHAREDLIB_MEM_OFF + \
CONFIG_SHAREDLIB_SIZE)
#define CONFIG_RW_STORAGE_OFF (CONFIG_SHAREDLIB_STORAGE_OFF + \
CONFIG_SHAREDLIB_SIZE)
#define CONFIG_RW_STORAGE_OFF 0
#define CONFIG_RW_SIZE CONFIG_FW_IMAGE_SIZE
#define CONFIG_WP_OFF CONFIG_RO_STORAGE_OFF
#define CONFIG_WP_SIZE CONFIG_FW_IMAGE_SIZE
#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF
#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF
#define CONFIG_EC_WRITABLE_STORAGE_SIZE (CONFIG_FLASH_SIZE - \
CONFIG_EC_WRITABLE_STORAGE_OFF)
#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
#endif /* __CROS_EC_CONFIG_STD_INTERNAL_FLASH_H */

4
include/flash.h
View File

@@ -15,8 +15,8 @@
#define PHYSICAL_BANKS (CONFIG_FLASH_PHYSICAL_SIZE / CONFIG_FLASH_BANK_SIZE)
/*WP region offset and size in units of flash banks */
#define WP_BANK_OFFSET (CONFIG_WP_OFF / CONFIG_FLASH_BANK_SIZE)
#define WP_BANK_COUNT (CONFIG_WP_SIZE / CONFIG_FLASH_BANK_SIZE)
#define WP_BANK_OFFSET (CONFIG_WP_STORAGE_OFF / CONFIG_FLASH_BANK_SIZE)
#define WP_BANK_COUNT (CONFIG_WP_STORAGE_SIZE / CONFIG_FLASH_BANK_SIZE)
/* Persistent protection state flash offset / size / bank */
#if defined(CONFIG_FLASH_PSTATE) && defined(CONFIG_FLASH_PSTATE_BANK)

4
test/flash.c
View File

@@ -361,11 +361,13 @@ static int test_flash_info(void)
static int test_region_info(void)
{
VERIFY_REGION_INFO(EC_FLASH_REGION_RO,
CONFIG_EC_PROTECTED_STORAGE_OFF +
CONFIG_RO_STORAGE_OFF, CONFIG_RO_SIZE);
VERIFY_REGION_INFO(EC_FLASH_REGION_RW,
CONFIG_EC_WRITABLE_STORAGE_OFF +
CONFIG_RW_STORAGE_OFF, CONFIG_RW_SIZE);
VERIFY_REGION_INFO(EC_FLASH_REGION_WP_RO,
CONFIG_WP_OFF, CONFIG_WP_SIZE);
CONFIG_WP_STORAGE_OFF, CONFIG_WP_STORAGE_SIZE);
return EC_SUCCESS;
}