rambi: fix PP3300_LTE_EN gpio

The gpio table had the wrong pin assigned to
PP3300_LTE_EN. It should be D4 instead of D2.

BUG=chrome-os-partner:24201
BRANCH=None
TEST=Built and booted. Stuff shows up on lsusb, and I can confirm
     3.3V on the bulk caps of the IO board.

Change-Id: I574599645ce21c175346e2ecde35b974aa0b68f7
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177694
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
This commit is contained in:
Aaron Durbin
2013-11-22 16:59:58 -06:00
committed by chrome-internal-fetch
parent b29aba1921
commit 11aed2342e

View File

@@ -93,7 +93,7 @@ const struct gpio_info gpio_list[] = {
{"PCH_WAKE_L", LM4_GPIO_F, (1<<0), GPIO_ODR_HIGH, NULL},
{"PP1350_EN", LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL},
{"PP3300_DX_EN", LM4_GPIO_J, (1<<2), GPIO_OUT_LOW, NULL},
{"PP3300_LTE_EN", LM4_GPIO_D, (1<<2), GPIO_OUT_LOW, NULL},
{"PP3300_LTE_EN", LM4_GPIO_D, (1<<4), GPIO_OUT_LOW, NULL},
{"PP3300_WLAN_EN", LM4_GPIO_J, (1<<0), GPIO_OUT_LOW, NULL},
/*
* TODO(crosbug.com/p/23673): PP5000_EN should default to GPIO_OUT_LOW