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cr50: describe GPIO assignment
Just a clean up patch attempting to make it easier to new users to come up to speed with cr50 use of H1 GPIO subsystem. BRANCH=none BUG=none TEST=none Change-Id: I539e7629ee94ddef26ae1616dc6eb5c151e9d97e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/412412 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@@ -4,6 +4,43 @@
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* found in the LICENSE file.
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*/
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/*
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* This file describes GPIO mapping for the cr50 code running on the H1 chip.
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*
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* For the purposes of this file H1 core has the following logical and
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* physical items and properties:
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*
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* - 32 internal GPIOs, which are split into two ports of 16 bits each.
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* Ports' architecture and programmig is described in "ARM Cortex-M System
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* Design Kit TRM" DDIO47B.
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*
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* - a set of peripherals - slave and master SPI and I2C controllers, UARTs,
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* interrupt controller, etc.
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*
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* - 28 pins on the package named DIOA0..14, DIOB0..7 and DIOM0..4
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*
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* - a PINMUX - a unit which allows to interconnect objects from the three
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* groups listed above. Note that some peripherals are attached to some
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* pins directly, so in case those peripherals are used the pins should
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* not be connected by PINMUX to any other outputs.
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*
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* The below macros are somewhat misleading (apparently for historical
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* reasons), as PIN(p, b) component in fact refers not to the external pin,
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* but to the GPIO (bit b on port p), where bit is in 0..15 range, and port is
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* in 0..1 range.
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*
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* To describe routing of an external signal two macro instantiations are
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* required:
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*
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* The GPIO_INT() or GPIO() macro assigns the signal a name and assigns it to
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* the internal GPIO port, (again, defining the port using the PIN(port, bit)
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* component of the macro invocation). GPIO_INT definitions assign their
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* respective signals to interrupts and ISRs.
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*
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* The PINMUX macro assigns the previously defined GPIO to another object,
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* most commonly to an external pin, but possibly to some internal component.
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*/
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/* Declare symbolic names for all the GPIOs that we care about.
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* Note: Those with interrupt handlers must be declared first. */
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