Add FMAP even if VBOOT is not activated

This simplifies the re-flashing for stm32 based platforms.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BUG=chrome-os-partner:8865
TEST=On Daisy, flashrom -p internal:bus=lpc -w ec.bin

Change-Id: I66860383c34110b1edf852929c244a2b682bc105
This commit is contained in:
Vincent Palatin
2012-05-21 23:28:37 +00:00
parent 16d8f6c8bc
commit 15854fa680
8 changed files with 26 additions and 10 deletions

View File

@@ -14,9 +14,6 @@
/* Use USART1 as console serial port */
#define CONFIG_CONSOLE_UART 1
/* support programming on-chip flash */
#define CONFIG_FLASH
/* use I2C for host communication */
#define CONFIG_I2C

View File

@@ -14,9 +14,6 @@
/* Use USART1 as console serial port */
#define CONFIG_CONSOLE_UART 1
/* support programming on-chip flash */
#define CONFIG_FLASH
/* use I2C for host communication */
#define CONFIG_I2C

View File

@@ -29,6 +29,13 @@
#define CONFIG_SECTION_B_OFF CONFIG_FW_B_OFF
#define CONFIG_SECTION_B_SIZE CONFIG_FW_B_SIZE
/* no keys for now */
#define CONFIG_VBOOT_ROOTKEY_OFF (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
#define CONFIG_VBLOCK_A_OFF (CONFIG_FW_A_OFF + CONFIG_FW_A_SIZE)
#define CONFIG_VBLOCK_B_OFF (CONFIG_FW_B_OFF + CONFIG_FW_B_SIZE)
#define CONFIG_VBOOT_ROOTKEY_SIZE 0
#define CONFIG_VBLOCK_SIZE 0
/* Number of IRQ vectors on the NVIC */
#define CONFIG_IRQ_COUNT 61

View File

@@ -27,6 +27,14 @@
#define CONFIG_SECTION_B_OFF CONFIG_FW_B_OFF
#define CONFIG_SECTION_B_SIZE CONFIG_FW_B_SIZE
/* no keys for now */
#define CONFIG_VBOOT_ROOTKEY_OFF (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE)
#define CONFIG_VBLOCK_A_OFF (CONFIG_FW_A_OFF + CONFIG_FW_A_SIZE)
#define CONFIG_VBLOCK_B_OFF (CONFIG_FW_B_OFF + CONFIG_FW_B_SIZE)
#define CONFIG_VBOOT_ROOTKEY_SIZE 0
#define CONFIG_VBLOCK_SIZE 0
/* Number of IRQ vectors on the NVIC */
#define CONFIG_IRQ_COUNT 45

View File

@@ -18,6 +18,9 @@
/* System stack size */
#define CONFIG_STACK_SIZE 1024
/* support programming on-chip flash */
#define CONFIG_FLASH
/* build with assertions and debug messages */
#define CONFIG_DEBUG

View File

@@ -12,7 +12,7 @@ common-y+=gpio_commands.o version.o
common-$(CONFIG_BATTERY_ATL706486)+=battery_atl706486.o
common-$(CONFIG_CHARGER_BQ24725)+=charger_bq24725.o
common-$(CONFIG_EOPTION)+=eoption.o
common-$(CONFIG_FLASH)+=flash_common.o flash_commands.o
common-$(CONFIG_FLASH)+=flash_common.o flash_commands.o fmap.o
common-$(CONFIG_LPC)+=port80.o host_event_commands.o
common-$(CONFIG_POWER_LED)+=power_led.o
common-$(CONFIG_PSTORE)+=pstore_commands.o
@@ -36,7 +36,7 @@ VBOOT_DEVKEYS?=/usr/share/vboot/devkeys
CFLAGS_$(CONFIG_VBOOT)+= -DCHROMEOS_ENVIRONMENT -DCHROMEOS_EC
# CFLAGS_$(CONFIG_VBOOT)+= -DVBOOT_DEBUG
common-$(CONFIG_VBOOT)+= fmap.o vboot.o vboot_stub.o
common-$(CONFIG_VBOOT)+= vboot.o vboot_stub.o
includes-$(CONFIG_VBOOT)+= \
$(VBOOT_SOURCE)/include \

View File

@@ -336,10 +336,14 @@ int flash_get_protect_lock(void)
int flash_pre_init(void)
{
#ifdef CHIP_stm32
usable_flash_size = flash_physical_size();
#else
/* Calculate usable flash size. Reserve one protection block
* at the top to hold the "pretend SPI" write protect data. */
usable_flash_size = flash_physical_size() -
flash_get_protect_block_size();
#endif
/* Apply write protect to blocks if needed */
return apply_pstate();

View File

@@ -90,7 +90,7 @@ SECTIONS
. = ALIGN(4);
*(.rodata*)
#if defined(SECTION_IS_RO) && defined(CONFIG_VBOOT)
#if defined(SECTION_IS_RO) && defined(CONFIG_FLASH)
. = ALIGN(64);
*(.google)
#endif
@@ -122,7 +122,7 @@ SECTIONS
ASSERT(FW_SIZE(SECTION) >
(LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)),
"No room left in the flash")
#if !(defined(SECTION_IS_RO) && defined(CONFIG_VBOOT))
#if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH))
/DISCARD/ : {
*(.google)
}