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glados_pd: oak_pd: fix PD tx_disable timing

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Disabling CC TX_DATA needs to be very fast to avoid clocking out
an extra garbage bit at the end of transmit. This change fixes
pd_tx_disable() to disable the TX_DATA line as fast as possible.

BUG=chrome-os-partner:40920
BRANCH=none
TEST=test on glados with scope attached to CC. note before this
change we occasionally get a garbage bit at the end of CC transmit.
With this change, it looks clean.

Change-Id: I86b47881e3846b2e3dd4fc2afcf2d28386a068a6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277295
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Alec Berg
2015-06-12 15:05:25 -07:00
committed by ChromeOS Commit Bot
parent 181913141d
commit 1599e7a6f1
2 changed files with 36 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
board/glados_pd/usb_pd_config.h
View File

@@ -170,32 +170,34 @@ static inline void pd_tx_enable(int port, int polarity)
static inline void pd_tx_disable(int port, int polarity)
{
if (port == 0) {
if (polarity) {/* PA6 is SPI1 MISO */
if (polarity) {
/* Set TX_DATA to Hi-Z, PA6 is SPI1 MISO */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
& ~(3 << (2*6)));
/* set ADC PA4 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*4))) /* PA4 as ADC */
& ~(1 << (2*4)); /* disable GPO */
gpio_set_alternate_function(GPIO_A, 0x0040, -1);
} else {/* PB4 is SPI1 MISO */
/* set ADC PA4 pin to ADC function (Hi-Z) */
| (3 << (2*4))); /* PA4 as ADC */
} else {
/* Set TX_DATA to Hi-Z, PB4 is SPI1 MISO */
STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B)
& ~(3 << (2*4)));
/* set ADC PA2 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*2))) /* PA2 as ADC */
& ~(1 << (2*2)); /* disable GPO */
gpio_set_alternate_function(GPIO_B, 0x0010, -1);
| (3 << (2*2))); /* PA2 as ADC */
}
} else {
/* Set TX_DATA (PB14) Hi-Z */
STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B)
& ~(3 << (2*14)));
if (polarity) {
/* set ADC PA4 pin to ADC function (Hi-Z) */
/* set ADC PA5 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*5))) /* PA5 as ADC */
& ~(1 << (2*5)); /* disable GPO */
| (3 << (2*5))); /* PA5 as ADC */
} else {
/* set ADC PA4 pin to ADC function (Hi-Z) */
/* set ADC PA0 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*0))) /* PA0 as ADC */
& ~(1 << (2*0)); /* disable GPO */
| (3 << (2*0))); /* PA0 as ADC */
}
gpio_set_alternate_function(GPIO_B, 0x4000, -1);
}
}

34
board/oak_pd/usb_pd_config.h
View File

@@ -170,32 +170,34 @@ static inline void pd_tx_enable(int port, int polarity)
static inline void pd_tx_disable(int port, int polarity)
{
if (port == 0) {
if (polarity) {/* PA6 is SPI1 MISO */
if (polarity) {
/* Set TX_DATA to Hi-Z, PA6 is SPI1 MISO */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
& ~(3 << (2*6)));
/* set ADC PA4 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*4))) /* PA4 as ADC */
& ~(1 << (2*4)); /* disable GPO */
gpio_set_alternate_function(GPIO_A, 0x0040, -1);
} else {/* PB4 is SPI1 MISO */
/* set ADC PA4 pin to ADC function (Hi-Z) */
| (3 << (2*4))); /* PA4 as ADC */
} else {
/* Set TX_DATA to Hi-Z, PB4 is SPI1 MISO */
STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B)
& ~(3 << (2*4)));
/* set ADC PA2 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*2))) /* PA2 as ADC */
& ~(1 << (2*2)); /* disable GPO */
gpio_set_alternate_function(GPIO_B, 0x0010, -1);
| (3 << (2*2))); /* PA2 as ADC */
}
} else {
/* Set TX_DATA (PB14) Hi-Z */
STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B)
& ~(3 << (2*14)));
if (polarity) {
/* set ADC PA4 pin to ADC function (Hi-Z) */
/* set ADC PA5 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*5))) /* PA5 as ADC */
& ~(1 << (2*5)); /* disable GPO */
| (3 << (2*5))); /* PA5 as ADC */
} else {
/* set ADC PA4 pin to ADC function (Hi-Z) */
/* set ADC PA0 pin to ADC function (Hi-Z) */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
| (3 << (2*0))) /* PA0 as ADC */
& ~(1 << (2*0)); /* disable GPO */
| (3 << (2*0))); /* PA0 as ADC */
}
gpio_set_alternate_function(GPIO_B, 0x4000, -1);
}
}