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ISH: Added UART Rx/Tx interrupt mode

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Added UART Tx/Rx interrupt mode related code.

BUG=None
BRANCH=None
TEST=On ISH enabled Reef board, check if Tx message is working
and tested Rx input from console with console command.

Change-Id: I5067304dc74abc29bbbea983b22db3e193e36e6b
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/424322
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
This commit is contained in:
Kyoung Kim
2016-12-23 15:46:04 -08:00
committed by chrome-bot
parent a1ca00d157
commit 166d7a72df
2 changed files with 54 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

59
chip/ish/uart.c
View File

@@ -57,17 +57,39 @@ int uart_init_done(void)
void uart_tx_start(void)
{
/* TBD for RX and interrupt enabled TX */
#if !defined(CONFIG_POLLING_UART)
enum UART_PORT id = UART_PORT_1; /* UART1 for ISH */
if ( REG8(IER(id) & IER_TDRQ) )
return;
/* TODO: disable low power mode while transmit */
REG8(IER(id)) |= IER_TDRQ;
task_trigger_irq(ISH_UART1_IRQ);
#endif
}
void uart_tx_stop(void)
{
/* TBD for RX and interrupt enabled TX */
#if !defined(CONFIG_POLLING_UART)
enum UART_PORT id = UART_PORT_1; /* UART1 for ISH */
REG8(IER(id)) &= ~IER_TDRQ;
/* TODO: re-enable low power mode */
#endif
}
void uart_tx_flush(void)
{
/* TBD for RX and interrupt enabled TX */
#if !defined(CONFIG_POLLING_UART)
enum UART_PORT id = UART_PORT_1; /* UART1 for ISH */
while (!(REG8(LSR(id)) & LSR_TEMT) )
;
#endif
}
int uart_tx_ready(void)
@@ -77,13 +99,18 @@ int uart_tx_ready(void)
int uart_rx_available(void)
{
/* No RX FIFO */
#if !defined(CONFIG_POLLING_UART)
enum UART_PORT id = UART_PORT_1; /* UART1 for ISH */
return REG8(LSR(id)) & LSR_DR;
#else
return 0;
#endif
}
void uart_write_char(char c)
{
int id = 1; /* In ISH, UART1 is assigned for console outpu */
enum UART_PORT id = UART_PORT_1; /* UART1 for ISH */
/* Wait till reciever is ready */
while ((REG8(LSR(id)) & LSR_TEMT) == 0)
@@ -92,6 +119,23 @@ void uart_write_char(char c)
REG8(THR(id)) = c;
}
#if !defined(CONFIG_POLLING_UART)
int uart_read_char(void)
{
enum UART_PORT id = UART_PORT_1; /* UART1 for ISH */
return REG8(RBR(id));
}
void uart_ec_interrupt(void)
{
/* Read input FIFO until empty, then fill output FIFO */
uart_process_input();
uart_process_output();
}
DECLARE_IRQ(ISH_UART1_IRQ, uart_ec_interrupt); /* TODO: 'priority' */
#endif /* !defined(CONFIG_POLLING_UART) */
static int uart_return_baud_rate_by_id(int baud_rate_id)
{
int i;
@@ -147,8 +191,11 @@ static void uart_hw_init(enum UART_PORT id)
/* clear the port */
REG8(RBR(ctx->id));
#ifdef CONFIG_POLLING_UART
REG8(IER(ctx->id)) = 0x00;
#else
REG8(IER(ctx->id)) = IER_RECV;
#endif
interrupt_enable();
}

1
core/minute-ia/interrupts.c
View File

@@ -73,6 +73,7 @@ static const irq_desc_t system_irqs[] = {
LEVEL_INTR(ISH_IPC_HOST2ISH_IRQ, ISH_IPC_VEC),
LEVEL_INTR(ISH_HPET_TIMER0_IRQ, ISH_HPET_TIMER0_VEC),
LEVEL_INTR(ISH_HPET_TIMER1_IRQ, ISH_HPET_TIMER1_VEC),
LEVEL_INTR(ISH_UART1_IRQ, ISH_UART1_VEC),
};