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Use precision internal osciallator for UART and ADC

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This simplifies upcoming transitions to/from sleep (with PLL shutdown).

Signed-off-by: Randall Spangler <rspangler@chromium.org>

BUG=none
TEST=manual - make sure 'adc' command and uarts still work

Change-Id: I070ca2d96ba4fef6fef6519896e7e9a181866efc
This commit is contained in:
Randall Spangler
2012-03-08 12:22:33 -08:00
parent b3798eaacd
commit 186deea4c4
4 changed files with 23 additions and 8 deletions
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9
chip/lm4/adc.c
View File

@@ -5,11 +5,11 @@
/* LM4-specific ADC module for Chrome EC */
#include "lm4_adc.h"
#include "console.h"
#include "adc.h"
#include "timer.h"
#include "console.h"
#include "lm4_adc.h"
#include "registers.h"
#include "timer.h"
#include "uart.h"
#include "util.h"
@@ -173,6 +173,9 @@ int adc_init(void)
* VDDA and GNDA. */
LM4_ADC_ADCCTL = 0x01;
/* Use internal oscillator */
LM4_ADC_ADCCC = 0x1;
/* Initialize ADC sequencer */
for (i = 0; i < ADC_CH_COUNT; ++i) {
adc = adc_channels + i;

8
chip/lm4/config.h
View File

@@ -3,6 +3,12 @@
* found in the LICENSE file.
*/
#ifndef __CROS_EC_CHIP_CONFIG_H
#define __CROS_EC_CHIP_CONFIG_H
/* 16.000 Mhz internal oscillator frequency (PIOSC) */
#define INTERNAL_CLOCK 16000000
/* Memory mapping */
#define CONFIG_FLASH_BASE 0x00000000
#define CONFIG_FLASH_SIZE 0x00040000
@@ -46,3 +52,5 @@
/* Compile for running from RAM instead of flash */
/* #define COMPILE_FOR_RAM */
#endif /* __CROS_EC_CHIP_CONFIG_H */

6
chip/lm4/registers.h
View File

@@ -31,11 +31,12 @@ static inline int lm4_uart_addr(int ch, int offset)
#define LM4_UART_IM(ch) LM4UARTREG(ch, 0x038)
#define LM4_UART_ICR(ch) LM4UARTREG(ch, 0x044)
#define LM4_UART_DMACTL(ch) LM4UARTREG(ch, 0x048)
#define LM4_UART_CC(ch) LM4UARTREG(ch, 0xfc8)
#define LM4_ADC_ADCACTSS LM4REG(0x40038000)
#define LM4_ADC_ADCRIS LM4REG(0x40038004)
#define LM4_ADC_ADCIM LM4REG(0x40038008)
#define LM4_ADC_ADCISC LM4REG(0x4003800C)
#define LM4_ADC_ADCISC LM4REG(0x4003800c)
#define LM4_ADC_ADCOSTAT LM4REG(0x40038010)
#define LM4_ADC_ADCEMUX LM4REG(0x40038014)
#define LM4_ADC_ADCUSTAT LM4REG(0x40038018)
@@ -44,6 +45,7 @@ static inline int lm4_uart_addr(int ch, int offset)
#define LM4_ADC_ADCPSSI LM4REG(0x40038028)
#define LM4_ADC_ADCSAC LM4REG(0x40038030)
#define LM4_ADC_ADCCTL LM4REG(0x40038038)
#define LM4_ADC_ADCCC LM4REG(0x40038fc8)
#define LM4_ADC_SS0_BASE 0x40038040
#define LM4_ADC_SS1_BASE 0x40038060
#define LM4_ADC_SS2_BASE 0x40038080
@@ -68,7 +70,7 @@ static inline int lm4_adc_addr(int ss, int offset)
#define LM4_LPC_LPCIM LM4REG(0x40080100)
#define LM4_LPC_LPCRIS LM4REG(0x40080104)
#define LM4_LPC_LPCMIS LM4REG(0x40080108)
#define LM4_LPC_LPCIC LM4REG(0x4008010C)
#define LM4_LPC_LPCIC LM4REG(0x4008010c)
#define LM4_LPC_INT_MASK(ch, bits) ((bits) << (4 * (ch)))
#define LM4_LPC_LPCDMACX LM4REG(0x40080120)
#define LM4_LPC_CH0_BASE 0x40080010

8
chip/lm4/uart.c
View File

@@ -159,11 +159,13 @@ int uart_init(void)
for (ch = 0; ch < 2; ch++) {
/* Disable the port */
LM4_UART_CTL(ch) = 0x0300;
/* Use the internal oscillator */
LM4_UART_CC(ch) = 0x1;
/* Set the baud rate divisor */
LM4_UART_IBRD(ch) = (CPU_CLOCK / 16) / BAUD_RATE;
LM4_UART_IBRD(ch) = (INTERNAL_CLOCK / 16) / BAUD_RATE;
LM4_UART_FBRD(ch) =
(((CPU_CLOCK / 16) % BAUD_RATE) * 64 + BAUD_RATE / 2) /
BAUD_RATE;
(((INTERNAL_CLOCK / 16) % BAUD_RATE) * 64
+ BAUD_RATE / 2) / BAUD_RATE;
/* 8-N-1, FIFO enabled. Must be done after setting
* the divisor for the new divisor to take effect. */
LM4_UART_LCRH(ch) = 0x70;