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Merge pull request #62 from athoelke/set-little-endian-v2

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Set processor endianness immediately after RESET v2
This commit is contained in:
danh-arm
2014-05-08 12:01:24 +01:00
parent fd6fede5b6 40fd072548
commit 18a17e6a4a
3 changed files with 12 additions and 4 deletions
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3
bl1/aarch64/bl1_arch_setup.c
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@@ -39,10 +39,9 @@ void bl1_arch_setup(void)
{
unsigned long tmp_reg = 0;
/* Enable alignment checks and set the exception endianess to LE */
/* Enable alignment checks */
tmp_reg = read_sctlr_el3();
tmp_reg |= (SCTLR_A_BIT | SCTLR_SA_BIT);
tmp_reg &= ~SCTLR_EE_BIT;
write_sctlr_el3(tmp_reg);
isb();

10
bl1/aarch64/bl1_entrypoint.S
View File

@@ -42,6 +42,16 @@
*/
func bl1_entrypoint
/* ---------------------------------------------
* Set the CPU endianness before doing anything
* that might involve memory reads or writes
* ---------------------------------------------
*/
mrs x0, sctlr_el3
bic x0, x0, #SCTLR_EE_BIT
msr sctlr_el3, x0
isb
/* ---------------------------------------------
* Perform any processor specific actions upon
* reset e.g. cache, tlb invalidations etc.

3
bl31/aarch64/bl31_arch_setup.c
View File

@@ -45,10 +45,9 @@ void bl31_arch_setup(void)
unsigned long tmp_reg = 0;
uint64_t counter_freq;
/* Enable alignment checks and set the exception endianness to LE */
/* Enable alignment checks */
tmp_reg = read_sctlr_el3();
tmp_reg |= (SCTLR_A_BIT | SCTLR_SA_BIT);
tmp_reg &= ~SCTLR_EE_BIT;
write_sctlr_el3(tmp_reg);
/*