gma hsw+: Revise Has_DDI_D flag

The GFX Programmer's Reference Manuals (PRMs) aren't clear on this but
it's pretty clear from the processor datasheets which SKUs expose which
pins: All U/Y processors lack DDI D.

Change-Id: I84c40b6bc01091de8a512e21354243c74643e0f5
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20820
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Nico Huber
2017-07-30 01:05:05 +02:00
parent 5fd9a31968
commit 19729a747b

View File

@@ -91,9 +91,11 @@ is
and CPU_Var = ULT) or
CPU >= Skylake;
Has_DDI_D : constant Boolean := (CPU in Haswell .. Broadwell
and CPU_Var = Normal)
or CPU >= Skylake;
Has_DDI_PHYs : constant Boolean := CPU = Broxton;
Has_DDI_D : constant Boolean := CPU >= Haswell and
CPU_Var = Normal and
not Has_DDI_PHYs;
Has_DDI_Buffer_Trans : constant Boolean := CPU >= Haswell and
CPU /= Broxton;
@@ -102,8 +104,6 @@ is
Need_DP_Aux_Mutex : constant Boolean := False; -- Skylake & (PSR | GTC)
Has_DDI_PHYs : constant Boolean := CPU = Broxton;
----- GMBUS: -----------
Ungate_GMBUS_Unit_Level : constant Boolean := CPU >= Skylake;
GMBUS_Alternative_Pins : constant Boolean := CPU = Broxton;