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nrf51: add definitions for RADIO and FICR registers.

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TEST=tested that the radio sends and receives packets correctly.
BRANCH=NONE
BUG=None

Signed-off-by: Myles Watson <mylesgw@chromium.org>

Change-Id: I7f59521062558be90c217013e2ea2dae502005c4
Reviewed-on: https://chromium-review.googlesource.com/254110
Tested-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Myles Watson <mylesgw@chromium.org>
This commit is contained in:
Myles Watson
2014-12-23 16:52:47 -08:00
committed by ChromeOS Commit Bot
parent 1dccd0450e
commit 199edf4be1
1 changed files with 183 additions and 0 deletions
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183
chip/nrf51/registers.h
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@@ -81,6 +81,52 @@
#define NRF51_LPCOMP_ALT_FUNC 21
#define NRF51_MAX_ALT_FUNCS 22
/*
* Configuration Registers
*/
/*
* FICR
*/
#define NRF51_FICR_BASE 0x10000000
#define NRF51_FICR_CODEPAGESIZE REG32(NRF51_FICR_BASE + 0x010)
#define NRF51_FICR_CLENR0 REG32(NRF51_FICR_BASE + 0x014)
#define NRF51_FICR_PPFC REG32(NRF51_FICR_BASE + 0x028)
#define NRF51_FICR_NUMRAMBLOCK REG32(NRF51_FICR_BASE + 0x02C)
#define NRF51_FICR_SIZERAMBLOCK(n) REG32(NRF51_FICR_BASE + 0x034 + ((n)*4))
#define NRF51_FICR_CONFIGID REG32(NRF51_FICR_BASE + 0x05C)
#define NRF51_FICR_DEVICEID(n) REG32(NRF51_FICR_BASE + 0x060 + ((n)*4))
#define NRF51_FICR_ER(n) REG32(NRF51_FICR_BASE + 0x080 + ((n)*4))
#define NRF51_FICR_IR(n) REG32(NRF51_FICR_BASE + 0x090 + ((n)*4))
#define NRF51_FICR_DEVICEADDRTYPE REG32(NRF51_FICR_BASE + 0x0A0)
#define NRF51_FICR_DEVICEADDR(n) REG32(NRF51_FICR_BASE + 0x0A4 + ((n)*4))
#define NRF51_FICR_OVERRIDDEN REG32(NRF51_FICR_BASE + 0x0AC)
#define NRF51_FICR_BLE_1MBIT(n) REG32(NRF51_FICR_BASE + 0x0EC + ((n)*4))
/* DEVICEADDRTYPE */
#define NRF51_FICR_DEVICEADDRTYPE_RANDOM 1
/* OVERRIDDEN */
#define NRF51_FICR_OVERRIDDEN_NRF_BIT_N 1
#define NRF51_FICR_OVERRIDDEN_BLE_BIT_N 8
/*
* UICR
*/
#define NRF51_UICR_BASE 0x10001000
#define NRF51_UICR_CLENR0 REG32(NRF51_UICR_BASE + 0x000)
#define NRF51_UICR_RBPCONF REG32(NRF51_UICR_BASE + 0x004)
#define NRF51_UICR_XTALFREQ REG32(NRF51_UICR_BASE + 0x008)
#define NRF51_UICR_FWID REG32(NRF51_UICR_BASE + 0x010)
#define NRF51_UICR_FWID_CUSTOMER(n) REG32(NRF51_UICR_BASE + 0x080 + ((n)*4))
#define NRF51_UICR_XTALFREQ_16MHZ 0xFF
#define NRF51_UICR_XTALFREQ_32MHZ 0x00
/*
* Devices
*/
/*
* Power
*/
@@ -128,6 +174,143 @@
#define NRF51_CLOCK_CTIV REG32(NRF51_CLOCK_BASE + 0x538)
#define NRF51_CLOCK_XTALFREQ REG32(NRF51_CLOCK_BASE + 0x550)
/*
* Radio
*/
#define NRF51_RADIO_BASE 0x40001000
/* Tasks */
#define NRF51_RADIO_TXEN REG32(NRF51_RADIO_BASE + 0x000)
#define NRF51_RADIO_RXEN REG32(NRF51_RADIO_BASE + 0x004)
#define NRF51_RADIO_START REG32(NRF51_RADIO_BASE + 0x008)
#define NRF51_RADIO_STOP REG32(NRF51_RADIO_BASE + 0x00C)
#define NRF51_RADIO_DISABLE REG32(NRF51_RADIO_BASE + 0x010)
#define NRF51_RADIO_RSSISTART REG32(NRF51_RADIO_BASE + 0x014)
#define NRF51_RADIO_RSSISTOP REG32(NRF51_RADIO_BASE + 0x018)
#define NRF51_RADIO_BCSTART REG32(NRF51_RADIO_BASE + 0x01C)
#define NRF51_RADIO_BCSTOP REG32(NRF51_RADIO_BASE + 0x020)
/* Events */
#define NRF51_RADIO_READY REG32(NRF51_RADIO_BASE + 0x100)
#define NRF51_RADIO_ADDRESS REG32(NRF51_RADIO_BASE + 0x104)
#define NRF51_RADIO_PAYLOAD REG32(NRF51_RADIO_BASE + 0x108)
#define NRF51_RADIO_END REG32(NRF51_RADIO_BASE + 0x10C)
#define NRF51_RADIO_DISABLED REG32(NRF51_RADIO_BASE + 0x110)
#define NRF51_RADIO_DEVMATCH REG32(NRF51_RADIO_BASE + 0x114)
#define NRF51_RADIO_DEVMISS REG32(NRF51_RADIO_BASE + 0x118)
#define NRF51_RADIO_RSSIEND REG32(NRF51_RADIO_BASE + 0x11C)
#define NRF51_RADIO_BCMATCH REG32(NRF51_RADIO_BASE + 0x128)
/* Registers */
#define NRF51_RADIO_SHORTS REG32(NRF51_RADIO_BASE + 0x200)
#define NRF51_RADIO_INTENSET REG32(NRF51_RADIO_BASE + 0x304)
#define NRF51_RADIO_INTENCLR REG32(NRF51_RADIO_BASE + 0x308)
#define NRF51_RADIO_CRCSTATUS REG32(NRF51_RADIO_BASE + 0x400)
#define NRF51_RADIO_RXMATCH REG32(NRF51_RADIO_BASE + 0x408)
#define NRF51_RADIO_RXCRC REG32(NRF51_RADIO_BASE + 0x40C)
#define NRF51_RADIO_DAI REG32(NRF51_RADIO_BASE + 0x410)
#define NRF51_RADIO_PACKETPTR REG32(NRF51_RADIO_BASE + 0x504)
#define NRF51_RADIO_FREQUENCY REG32(NRF51_RADIO_BASE + 0x508)
#define NRF51_RADIO_TXPOWER REG32(NRF51_RADIO_BASE + 0x50C)
#define NRF51_RADIO_MODE REG32(NRF51_RADIO_BASE + 0x510)
#define NRF51_RADIO_PCNF0 REG32(NRF51_RADIO_BASE + 0x514)
#define NRF51_RADIO_PCNF1 REG32(NRF51_RADIO_BASE + 0x518)
#define NRF51_RADIO_BASE0 REG32(NRF51_RADIO_BASE + 0x51C)
#define NRF51_RADIO_BASE1 REG32(NRF51_RADIO_BASE + 0x520)
#define NRF51_RADIO_PREFIX0 REG32(NRF51_RADIO_BASE + 0x524)
#define NRF51_RADIO_PREFIX1 REG32(NRF51_RADIO_BASE + 0x528)
#define NRF51_RADIO_TXADDRESS REG32(NRF51_RADIO_BASE + 0x52C)
#define NRF51_RADIO_RXADDRESSES REG32(NRF51_RADIO_BASE + 0x530)
#define NRF51_RADIO_CRCCNF REG32(NRF51_RADIO_BASE + 0x534)
#define NRF51_RADIO_CRCPOLY REG32(NRF51_RADIO_BASE + 0x538)
#define NRF51_RADIO_CRCINIT REG32(NRF51_RADIO_BASE + 0x53C)
#define NRF51_RADIO_TEST REG32(NRF51_RADIO_BASE + 0x540)
#define NRF51_RADIO_TIFS REG32(NRF51_RADIO_BASE + 0x544)
#define NRF51_RADIO_RSSISAMPLE REG32(NRF51_RADIO_BASE + 0x548)
#define NRF51_RADIO_STATE REG32(NRF51_RADIO_BASE + 0x550)
#define NRF51_RADIO_DATAWHITEIV REG32(NRF51_RADIO_BASE + 0x554)
#define NRF51_RADIO_BCC REG32(NRF51_RADIO_BASE + 0x560)
#define NRF51_RADIO_DAB(n) REG32(NRF51_RADIO_BASE + 0x600 + ((n) * 4))
#define NRF51_RADIO_DAP(n) REG32(NRF51_RADIO_BASE + 0x620 + ((n) * 4))
#define NRF51_RADIO_DACNF REG32(NRF51_RADIO_BASE + 0x640)
#define NRF51_RADIO_OVERRIDE(n) REG32(NRF51_RADIO_BASE + 0x724 + ((n) * 4))
#define NRF51_RADIO_POWER REG32(NRF51_RADIO_BASE + 0xFFC)
/* Shorts */
#define NRF51_RADIO_SHORTS_READY_START 0x001
#define NRF51_RADIO_SHORTS_END_DISABLE 0x002
#define NRF51_RADIO_SHORTS_DISABLED_TXEN 0x004
#define NRF51_RADIO_SHORTS_DISABLED_RXEN 0x008
#define NRF51_RADIO_SHORTS_ADDRESS_RSSISTART 0x010
/* NRF51_RADIO_SHORTS_END_START (0x20) is Broken (PAN 2.4) */
#define NRF51_RADIO_SHORTS_ADDRESS_BCSTART 0x040
#define NRF51_RADIO_SHORTS_DISABLED_RSSISTOP 0x100
/* CRC Status */
#define NRF51_RADIO_CRCSTATUS_OK 0x1
/* Frequency (in MHz) */
#define NRF51_RADIO_FREQUENCY_VAL(x) ((x) - 2400)
/* TX Power */
#define NRF51_RADIO_TXPOWER_POS_4_DBM 0x04
#define NRF51_RADIO_TXPOWER_0_DBM 0x00
#define NRF51_RADIO_TXPOWER_NEG_8_DBM 0xFC
#define NRF51_RADIO_TXPOWER_NEG_12_DBM 0xF8
#define NRF51_RADIO_TXPOWER_NEG_16_DBM 0xF4
#define NRF51_RADIO_TXPOWER_NEG_20_DBM 0xEC
#define NRF51_RADIO_TXPOWER_NEG_30_DBM 0xD8
/* TX Mode */
#define NRF51_RADIO_MODE_BLE_1MBIT 0x03
/* PCNF0 Packet Configuration */
#define NRF51_RADIO_PCNF0_LFLEN_SHIFT 0
#define NRF51_RADIO_PCNF0_S0LEN_SHIFT 8
#define NRF51_RADIO_PCNF0_S1LEN_SHIFT 16
/* PCNF1 Packet Configuration */
#define NRF51_RADIO_PCNF1_MAXLEN_SHIFT 0
#define NRF51_RADIO_PCNF1_STATLEN_SHIFT 8
#define NRF51_RADIO_PCNF1_BALEN_SHIFT 16
#define NRF51_RADIO_PCNF1_ENDIAN_BIG 0x1000000
#define NRF51_RADIO_PCNF1_WHITEEN 0x2000000
/* PREFIX0 */
#define NRF51_RADIO_PREFIX0_AP0_SHIFT 0
#define NRF51_RADIO_PREFIX0_AP1_SHIFT 8
#define NRF51_RADIO_PREFIX0_AP2_SHIFT 16
#define NRF51_RADIO_PREFIX0_AP3_SHIFT 24
/* PREFIX1 */
#define NRF51_RADIO_PREFIX1_AP4_SHIFT 0
#define NRF51_RADIO_PREFIX1_AP5_SHIFT 8
#define NRF51_RADIO_PREFIX1_AP6_SHIFT 16
#define NRF51_RADIO_PREFIX1_AP7_SHIFT 24
/* CRCCNF */
#define NRF51_RADIO_CRCCNF_SKIP_ADDR 0x100
/* TEST */
#define NRF51_RADIO_TEST_CONST_CARRIER_EN 0x01
#define NRF51_RADIO_TEST_PLL_LOCK_EN 0x02
/* STATE */
#define NRF51_RADIO_STATE_DISABLED 0
#define NRF51_RADIO_STATE_RXRU 1
#define NRF51_RADIO_STATE_RXIDLE 2
#define NRF51_RADIO_STATE_RX 3
#define NRF51_RADIO_STATE_RXDISABLE 4
#define NRF51_RADIO_STATE_TXRU 9
#define NRF51_RADIO_STATE_TXIDLE 10
#define NRF51_RADIO_STATE_TX 11
#define NRF51_RADIO_STATE_TXDISABLE 12
/* DACNF */
#define NRF51_RADIO_DACNF_ENA(n) (1 << (n))
#define NRF51_RADIO_DACNF_TXADD(n) (1 << ((n)+8))
/* OVERRIDE4 */
#define NRF51_RADIO_OVERRIDE_EN (1 << 31)
/*
* UART
*/