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eve: Remove MP2949 workaround
Remove the MP2949 workaround as it was only needed for P0 boards. The fix is "sticky" so any P0 board will already have fixed values in the MP2949 EEPROM. BUG=chrome-os-partner:58666 BRANCH=none TEST=build and boot on Eve P1 Change-Id: I2cb13a6c5ff5ec521e75d51e31fb8356a5081193 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/446594 Reviewed-by: Scott Collyer <scollyer@chromium.org>
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chrome-bot
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commit
1c16a8040c
@@ -385,68 +385,6 @@ static void board_init(void)
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}
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DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
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#define MP2949_PAGE_SELECT 0x00 /* Select rail/page */
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#define MP2949_STORE_USER_ALL 0x15 /* Write settings to EEPROM */
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#define MP2949_MFR_TRANS_FAST 0xfa /* Slew rate control */
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#define MP2949_FIXED_SLEW_RATE 0x0ac5 /* 40mV/uS */
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/*
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* Workaround for P0 boards:
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* Set voltage slew rate to 40mV/uS for all rails
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*/
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void board_before_rsmrst(int rsmrst)
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{
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int rail, rate;
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int fixed = 0;
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/* Only trigger on RSMRST# deassertion */
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if (!rsmrst)
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return;
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/* Only apply workaround to P0 boards */
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if (system_get_board_version() > BOARD_VERSION_P0B)
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return;
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i2c_lock(I2C_PORT_MP2949, 1);
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for (rail = 2; rail >= 0; rail--) {
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uint8_t buf[3];
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/* Select register page for this rail */
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buf[0] = MP2949_PAGE_SELECT;
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buf[1] = rail;
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i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
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buf, 2, NULL, 0, I2C_XFER_SINGLE);
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/* Check for workaround already applied */
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buf[0] = MP2949_MFR_TRANS_FAST;
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i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
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buf, 1, buf+1, 2, I2C_XFER_SINGLE);
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rate = ((int)buf[2] << 8) | buf[1];
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if (rate == MP2949_FIXED_SLEW_RATE)
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continue;
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fixed = 1;
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/* Set slew rate */
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buf[0] = MP2949_MFR_TRANS_FAST;
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buf[1] = MP2949_FIXED_SLEW_RATE & 0xff;
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buf[2] = (MP2949_FIXED_SLEW_RATE >> 8) & 0xff;
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i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
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buf, 3, NULL, 0, I2C_XFER_SINGLE);
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/* Store new settings (1 byte write, no data) */
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buf[0] = MP2949_STORE_USER_ALL;
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i2c_xfer(I2C_PORT_MP2949, I2C_ADDR_MP2949,
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buf, 1, NULL, 0, I2C_XFER_SINGLE);
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}
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i2c_lock(I2C_PORT_MP2949, 0);
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CPRINTS("P0 board - IMVP8 workaround %sapplied",
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fixed ? "" : "already ");
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}
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/**
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* Buffer the AC present GPIO to the PCH.
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*/
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@@ -25,7 +25,6 @@
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/* EC */
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#define CONFIG_ADC
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#define CONFIG_BACKLIGHT_LID
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#define CONFIG_BOARD_HAS_BEFORE_RSMRST
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#define CONFIG_BOARD_VERSION
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#define CONFIG_BOARD_SPECIFIC_VERSION
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#define CONFIG_BUTTON_COUNT 2
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