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Ryu: Sensor hub changes for p1.

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- Added LID_CLOSED_L and BASE_PRESET_L to PA2/PA3.
- Moved UART_TX/RX to PA9/PA10 (UART 1)
- Change DMA mapping to keep using DMA 4,5 for UART

BUG=chrome-os-partner:31527
TEST=None
BRANCH=ToT

Change-Id: Ie6138075bd901225b4fee48fc4ab4fa2add24b45
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/215131
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Gwendal Grignou
2014-08-28 15:24:42 -07:00
committed by chrome-internal-fetch
parent 27a2fdf665
commit 1cf5ca93b6
3 changed files with 24 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
board/ryu_sh/board.c
View File

@@ -30,3 +30,19 @@ const struct i2c_port_t i2c_ports[] = {
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
void board_config_pre_init(void)
{
/*
* enable SYSCFG clock:
* otherwise the SYSCFG peripheral is not clocked during the pre-init
* and the register write as no effect.
*/
STM32_RCC_APB2ENR |= 1 << 0;
/*
* Remap USART DMA to match the USART driver
* the DMA mapping is :
* Chan 4 : USART1_TX
* Chan 5 : USART1_RX
*/
STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10);/* Remap USART1 RX/TX DMA */
}

5
board/ryu_sh/board.h
View File

@@ -11,9 +11,9 @@
/* 48 MHz SYSCLK clock frequency */
#define CPU_CLOCK 48000000
/* the UART console is on USART2 (PA2/PA3) */
/* the UART console is on USART1 (PA9/PA10) */
#undef CONFIG_UART_CONSOLE
#define CONFIG_UART_CONSOLE 2
#define CONFIG_UART_CONSOLE 1
/* By default, enable all console messages */
#define CC_DEFAULT CC_ALL
@@ -21,6 +21,7 @@
/* Optional features */
#define CONFIG_STM_HWTIMER32
#define CONFIG_I2C
#define CONFIG_BOARD_PRE_INIT
#undef CONFIG_LID_SWITCH
#define CONFIG_VBOOT_HASH
#undef CONFIG_WATCHDOG_HELP

8
board/ryu_sh/gpio.inc
View File

@@ -18,13 +18,15 @@ GPIO(SH_EC_SIGNAL, A, 7, GPIO_OUT_LOW, NULL)
GPIO(SH_IRQ_L, A, 11, GPIO_OUT_LOW, NULL)
/* Inputs */
GPIO(LID_CLOSED, A, 2, GPIO_INPUT, NULL)
GPIO(BASE_PRESENT, A, 3, GPIO_INPUT, NULL)
GPIO(COMPASS_DRDY, B, 11, GPIO_INPUT, NULL)
GPIO(AP_IN_SUSPEND, B, 15, GPIO_INPUT, NULL)
#if 0
/* Alternate functions */
GPIO(UART_TX, A, 2, GPIO_OUT_LOW, NULL)
GPIO(UART_RX, A, 3, GPIO_OUT_LOW, NULL)
GPIO(UART_TX, A, 9, GPIO_OUT_LOW, NULL)
GPIO(UART_RX, A, 10, GPIO_OUT_LOW, NULL)
#endif
/* Needed to bypass flash write protection */
@@ -40,6 +42,6 @@ GPIO(SLAVE_I2C_SDA, B, 7, GPIO_INPUT, NULL)
GPIO(MASTER_I2C_SCL, B, 13, GPIO_INPUT, NULL)
GPIO(MASTER_I2C_SDA, B, 14, GPIO_INPUT, NULL)
ALTERNATE(A, 0x000C, 1, MODULE_UART, 0) /* USART2: PA2/PA3 */
ALTERNATE(A, 0x0600, 1, MODULE_UART, 0) /* USART1: PA9/PA10 */
ALTERNATE(B, 0x00C0, 1, MODULE_I2C, 0) /* I2C SLAVE:PB6/7 */
ALTERNATE(B, 0x6000, 5, MODULE_I2C, 0) /* I2C MASTER:PB13/14 */