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Merge pull request #1065 from jenswi-linaro/optee_qemu

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qemu: Add OP-TEE extra image parsing support
This commit is contained in:
davidcunado-arm
2017-08-25 11:38:56 +01:00
committed by GitHub
parent c1f814660f e2af1cadf7
commit 263ed50e56
9 changed files with 121 additions and 8 deletions
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8
plat/qemu/include/platform_def.h
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@@ -73,6 +73,11 @@
#define SEC_DRAM_BASE 0x0e100000
#define SEC_DRAM_SIZE 0x00f00000
/* Load pageable part of OP-TEE at end of secure DRAM */
#define QEMU_OPTEE_PAGEABLE_LOAD_BASE (SEC_DRAM_BASE + SEC_DRAM_SIZE - \
QEMU_OPTEE_PAGEABLE_LOAD_SIZE)
#define QEMU_OPTEE_PAGEABLE_LOAD_SIZE 0x00400000
/*
* ARM-TF lives in SRAM, partition it here
*/
@@ -154,7 +159,8 @@
#define NS_IMAGE_OFFSET 0x60000000
#define ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
#define MAX_MMAP_REGIONS 8
#define MAX_XLAT_TABLES 6
#define MAX_IO_DEVICES 3

16
plat/qemu/platform.mk
View File

@@ -65,6 +65,10 @@ BL2_SOURCES += plat/qemu/qemu_bl2_mem_params_desc.c \
plat/qemu/qemu_image_load.c \
common/desc_image_load.c
endif
ifeq (${SPD},opteed)
BL2_SOURCES += lib/optee/optee_utils.c
endif
BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \
lib/cpus/aarch64/cortex_a53.S \
@@ -72,13 +76,23 @@ BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \
drivers/arm/gic/v2/gicv2_helpers.c \
drivers/arm/gic/v2/gicv2_main.c \
drivers/arm/gic/common/gic_common.c \
plat/common/aarch64/plat_psci_common.c \
plat/common/plat_psci_common.c \
plat/qemu/qemu_pm.c \
plat/qemu/topology.c \
plat/qemu/aarch64/plat_helpers.S \
plat/qemu/qemu_bl31_setup.c \
plat/qemu/qemu_gic.c
# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
# in the FIP if the platform requires.
ifneq ($(BL32_EXTRA1),)
$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
endif
ifneq ($(BL32_EXTRA2),)
$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
endif
# Disable the PSCI platform compatibility layer
ENABLE_PLAT_COMPAT := 0

37
plat/qemu/qemu_bl2_mem_params_desc.c
View File

@@ -72,6 +72,43 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
.next_handoff_image_id = BL33_IMAGE_ID,
},
/*
* Fill BL32 external 1 related information.
* A typical use for extra1 image is with OP-TEE where it is the
* pager image.
*/
{ .image_id = BL32_EXTRA1_IMAGE_ID,
SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
entry_point_info_t, SECURE | NON_EXECUTABLE),
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
.image_info.image_base = BL32_BASE,
.image_info.image_max_size = BL32_LIMIT - BL32_BASE,
.next_handoff_image_id = INVALID_IMAGE_ID,
},
/*
* Fill BL32 external 2 related information.
* A typical use for extra2 image is with OP-TEE where it is the
* paged image.
*/
{ .image_id = BL32_EXTRA2_IMAGE_ID,
SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
entry_point_info_t, SECURE | NON_EXECUTABLE),
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
#ifdef SPD_opteed
.image_info.image_base = QEMU_OPTEE_PAGEABLE_LOAD_BASE,
.image_info.image_max_size = QEMU_OPTEE_PAGEABLE_LOAD_SIZE,
#endif
.next_handoff_image_id = INVALID_IMAGE_ID,
},
# endif /* QEMU_LOAD_BL32 */
/* Fill BL33 related information */

27
plat/qemu/qemu_bl2_setup.c
View File

@@ -9,6 +9,9 @@
#include <console.h>
#include <debug.h>
#include <desc_image_load.h>
#ifdef SPD_opteed
#include <optee_utils.h>
#endif
#include <libfdt.h>
#include <platform_def.h>
#include <string.h>
@@ -225,12 +228,36 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id)
{
int err = 0;
bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
#ifdef SPD_opteed
bl_mem_params_node_t *pager_mem_params = NULL;
bl_mem_params_node_t *paged_mem_params = NULL;
#endif
assert(bl_mem_params);
switch (image_id) {
# ifdef AARCH64
case BL32_IMAGE_ID:
#ifdef SPD_opteed
pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
assert(pager_mem_params);
paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
assert(paged_mem_params);
err = parse_optee_header(&bl_mem_params->ep_info,
&pager_mem_params->image_info,
&paged_mem_params->image_info);
if (err != 0) {
WARN("OPTEE header parse error.\n");
}
/*
* OP-TEE expect to receive DTB address in x2.
* This will be copied into x2 by dispatcher.
*/
bl_mem_params->ep_info.args.arg3 = PLAT_QEMU_DT_BASE;
#endif
bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl32_entry();
break;
# endif

28
plat/qemu/qemu_io_storage.c
View File

@@ -21,6 +21,8 @@
#define BL2_IMAGE_NAME "bl2.bin"
#define BL31_IMAGE_NAME "bl31.bin"
#define BL32_IMAGE_NAME "bl32.bin"
#define BL32_EXTRA1_IMAGE_NAME "bl32_extra1.bin"
#define BL32_EXTRA2_IMAGE_NAME "bl32_extra2.bin"
#define BL33_IMAGE_NAME "bl33.bin"
#if TRUSTED_BOARD_BOOT
@@ -61,6 +63,14 @@ static const io_uuid_spec_t bl32_uuid_spec = {
.uuid = UUID_SECURE_PAYLOAD_BL32,
};
static const io_uuid_spec_t bl32_extra1_uuid_spec = {
.uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA1,
};
static const io_uuid_spec_t bl32_extra2_uuid_spec = {
.uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA2,
};
static const io_uuid_spec_t bl33_uuid_spec = {
.uuid = UUID_NON_TRUSTED_FIRMWARE_BL33,
};
@@ -112,6 +122,14 @@ static const io_file_spec_t sh_file_spec[] = {
.path = BL32_IMAGE_NAME,
.mode = FOPEN_MODE_RB
},
[BL32_EXTRA1_IMAGE_ID] = {
.path = BL32_EXTRA1_IMAGE_NAME,
.mode = FOPEN_MODE_RB
},
[BL32_EXTRA2_IMAGE_ID] = {
.path = BL32_EXTRA2_IMAGE_NAME,
.mode = FOPEN_MODE_RB
},
[BL33_IMAGE_ID] = {
.path = BL33_IMAGE_NAME,
.mode = FOPEN_MODE_RB
@@ -185,6 +203,16 @@ static const struct plat_io_policy policies[] = {
(uintptr_t)&bl32_uuid_spec,
open_fip
},
[BL32_EXTRA1_IMAGE_ID] = {
&fip_dev_handle,
(uintptr_t)&bl32_extra1_uuid_spec,
open_fip
},
[BL32_EXTRA2_IMAGE_ID] = {
&fip_dev_handle,
(uintptr_t)&bl32_extra2_uuid_spec,
open_fip
},
[BL33_IMAGE_ID] = {
&fip_dev_handle,
(uintptr_t)&bl33_uuid_spec,

3
services/spd/opteed/opteed_common.c
View File

@@ -20,7 +20,7 @@
void opteed_init_optee_ep_state(struct entry_point_info *optee_entry_point,
uint32_t rw, uint64_t pc,
uint64_t pageable_part, uint64_t mem_limit,
optee_context_t *optee_ctx)
uint64_t dt_addr, optee_context_t *optee_ctx)
{
uint32_t ep_attr;
@@ -54,6 +54,7 @@ void opteed_init_optee_ep_state(struct entry_point_info *optee_entry_point,
zeromem(&optee_entry_point->args, sizeof(optee_entry_point->args));
optee_entry_point->args.arg0 = pageable_part;
optee_entry_point->args.arg1 = mem_limit;
optee_entry_point->args.arg2 = dt_addr;
}
/*******************************************************************************

7
services/spd/opteed/opteed_main.c
View File

@@ -96,6 +96,7 @@ int32_t opteed_setup(void)
uint32_t linear_id;
uint64_t opteed_pageable_part;
uint64_t opteed_mem_limit;
uint64_t dt_addr;
linear_id = plat_my_core_pos();
@@ -120,19 +121,17 @@ int32_t opteed_setup(void)
if (!optee_ep_info->pc)
return 1;
/*
* We could inspect the SP image and determine it's execution
* state i.e whether AArch32 or AArch64.
*/
opteed_rw = optee_ep_info->args.arg0;
opteed_pageable_part = optee_ep_info->args.arg1;
opteed_mem_limit = optee_ep_info->args.arg2;
dt_addr = optee_ep_info->args.arg3;
opteed_init_optee_ep_state(optee_ep_info,
opteed_rw,
optee_ep_info->pc,
opteed_pageable_part,
opteed_mem_limit,
dt_addr,
&opteed_sp_context[linear_id]);
/*

2
services/spd/opteed/opteed_pm.c
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@@ -99,7 +99,7 @@ static void opteed_cpu_on_finish_handler(uint64_t unused)
opteed_init_optee_ep_state(&optee_on_entrypoint, opteed_rw,
(uint64_t)&optee_vectors->cpu_on_entry,
0, 0, optee_ctx);
0, 0, 0, optee_ctx);
/* Initialise this cpu's secure context */
cm_init_my_context(&optee_on_entrypoint);

1
services/spd/opteed/opteed_private.h
View File

@@ -149,6 +149,7 @@ void opteed_init_optee_ep_state(struct entry_point_info *optee_ep,
uint64_t pc,
uint64_t pageable_part,
uint64_t mem_limit,
uint64_t dt_addr,
optee_context_t *optee_ctx);
extern optee_context_t opteed_sp_context[OPTEED_CORE_COUNT];