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More cleanup of board/chip configs and initialization

Browse Source 
More modules can be disabled individually through CONFIG_ defines.

Reordered early module pre-init and init, and added comments to
explain why things are ordered in main() the way they are.

Fixed a few assorted init-related bugs along the way, like st32m
keyboard scan double-initializing.

BUG=none
TEST=build link, bds, daisy

Signed-off-by: Randall Spangler <rspangler@chromium.org>

Change-Id: I04a7fa51d743adfab4be4bdddaeef68943b96dec
This commit is contained in:
Randall Spangler
2012-03-16 15:43:34 -07:00
parent eb3920ec7a
commit 2a9f80d2d9
16 changed files with 109 additions and 93 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
board/link/board.h
View File

@@ -9,13 +9,17 @@
#define __BOARD_H
/* Optional features */
#define CONFIG_BATTERY_ATL706486
#define CONFIG_CHARGER
#define CONFIG_CHARGER_BQ24725
#define CONFIG_LIGHTBAR
#define CONFIG_ONEWIRE
#define CONFIG_PECI
#define CONFIG_POWER_LED
#define CONFIG_PSTORE
#define CONFIG_SMART_BATTERY
#define CONFIG_TMP006
#define CONFIG_USB_CHARGE
/* 66.667 Mhz clock frequency */
#define CPU_CLOCK 66666667
@@ -71,7 +75,6 @@ enum adc_channel
};
/* Charger module */
#define CONFIG_CHARGER_BQ24725
/* Set charger input current limit
* Note - this value should depend on external power adapter,
* designed charging voltage, and the maximum power of
@@ -83,9 +86,6 @@ enum adc_channel
#define CONFIG_BQ24725_R_SNS 10 /* 10 mOhm charge sense resistor */
#define CONFIG_BQ24725_R_AC 20 /* 20 mOhm input current sense resistor */
/* Battery module */
#define CONFIG_SMART_BATTERY
#define CONFIG_BATTERY_ATL706486
/* I2C ports */
#define I2C_PORT_BATTERY 0

10
chip/lm4/build.mk
View File

@@ -8,10 +8,14 @@
# LM4 SoC has a Cortex-M4 ARM core
CORE:=cortex-m
chip-y=i2c.o adc.o jtag.o
chip-y+=clock.o gpio.o system.o uart.o
chip-y+=watchdog.o eeprom.o hwtimer.o
# Required chip modules
chip-y=clock.o gpio.o hwtimer.o jtag.o system.o uart.o watchdog.o
# Optional chip modules
chip-$(CONFIG_ADC)+=adc.o
chip-$(CONFIG_EEPROM)+=eeprom.o
chip-$(CONFIG_FLASH)+=flash.o
chip-$(CONFIG_I2C)+=i2c.o
chip-$(CONFIG_LPC)+=lpc.o
chip-$(CONFIG_ONEWIRE)+=onewire.o
chip-$(CONFIG_PECI)+=peci.o

5
chip/lm4/config.h
View File

@@ -42,10 +42,13 @@
#define CONFIG_DEBUG
/* Optional features present on this chip */
#define CONFIG_ADC
#define CONFIG_EEPROM
#define CONFIG_FLASH
#define CONFIG_FPU
#define CONFIG_I2C
#define CONFIG_LPC
#define CONFIG_PWM
#define CONFIG_FPU
/* Compile for running from RAM instead of flash */
/* #define COMPILE_FOR_RAM */

2
chip/lm4/flash.c
View File

@@ -287,7 +287,7 @@ int flash_get_write_protect_status(void)
}
int flash_init(void)
int flash_pre_init(void)
{
/* Calculate usable flash size. Reserve one protection block
* at the top to hold the write protect range. FSIZE already

6
chip/lm4/gpio.c
View File

@@ -98,6 +98,12 @@ int gpio_pre_init(void)
/* Interrupt is enabled by gpio_enable_interrupt() */
}
return EC_SUCCESS;
}
int gpio_init(void)
{
/* Enable IRQs now that pins are set up */
task_enable_irq(LM4_IRQ_GPIOA);
task_enable_irq(LM4_IRQ_GPIOB);

6
chip/lm4/keyboard_scan.c
View File

@@ -359,9 +359,6 @@ int keyboard_scan_init(void)
update_key_state();
recovery_key_pressed = check_recovery_key();
/* Enable interrupts, now that we're set up */
task_enable_irq(KB_SCAN_ROW_IRQ);
return EC_SUCCESS;
}
@@ -374,6 +371,9 @@ void keyboard_scan_task(void)
if (recovery_key_pressed)
uart_puts("[KB recovery key pressed at init!]\n");
/* Enable interrupts */
task_enable_irq(KB_SCAN_ROW_IRQ);
while (1) {
wait_for_interrupt();
task_wait_msg(-1);

4
chip/lm4/uart.c
View File

@@ -99,8 +99,7 @@ static void uart_1_interrupt(void)
/* Clear transmit and receive interrupt status */
LM4_UART_ICR(1) = 0x70;
/* TODO: (crosbug.com/p/7488) handle input */
#ifdef CONFIG_LPC
/* If we have space in our FIFO and a character is pending in LPC,
* handle that character. */
if (!(LM4_UART_FR(1) & 0x20) && lpc_comx_has_char()) {
@@ -115,6 +114,7 @@ static void uart_1_interrupt(void)
* on the UART receive-side either. */
if (!(LM4_UART_FR(1) & 0x10))
lpc_comx_put_char(LM4_UART_DR(1));
#endif
}
/* Must be same prio as LPC interrupt handler so they don't preempt */
DECLARE_IRQ(LM4_IRQ_UART1, uart_1_interrupt, 2);

3
chip/stm32l/build.mk
View File

@@ -8,7 +8,6 @@
# STM32L15xx SoC family has a Cortex-M3 ARM core
CORE:=cortex-m
chip-y=uart.o clock.o hwtimer.o system.o gpio.o
chip-y+=jtag.o stubs.o
chip-y=clock.o gpio.o hwtimer.o jtag.o system.o uart.o
chip-$(CONFIG_TASK_WATCHDOG)+=watchdog.o
chip-$(CONFIG_TASK_KEYSCAN)+=keyboard_scan.o

6
chip/stm32l/gpio.c
View File

@@ -61,6 +61,12 @@ int gpio_pre_init(void)
/* Interrupt is enabled by gpio_enable_interrupt() */
}
return EC_SUCCESS;
}
int gpio_init(void)
{
/* Enable IRQs now that pins are set up */
task_enable_irq(STM32L_IRQ_EXTI0);
task_enable_irq(STM32L_IRQ_EXTI1);

23
chip/stm32l/keyboard_scan.c
View File

@@ -51,6 +51,9 @@
* KB_COL05:06 = PC14:15
* KB_COL07 = PD2
* Other:
*
* TODO: clean up the nomenclature above; it's weird that KB_ROW00 is a column
* and KB_COL00 is a row...
*/
extern struct gpio_info gpio_list[];
@@ -204,6 +207,7 @@ static void select_column(int col)
}
}
int keyboard_scan_init(void)
{
int i, j;
@@ -287,15 +291,6 @@ int keyboard_scan_init(void)
* key mask properly */
actual_key_mask = actual_key_masks[0];
gpio_enable_interrupt(KB_COL00);
gpio_enable_interrupt(KB_COL01);
gpio_enable_interrupt(KB_COL02);
gpio_enable_interrupt(KB_COL03);
gpio_enable_interrupt(KB_COL04);
gpio_enable_interrupt(KB_COL05);
gpio_enable_interrupt(KB_COL06);
gpio_enable_interrupt(KB_COL07);
return EC_SUCCESS;
}
@@ -418,7 +413,15 @@ void keyboard_scan_task(void)
{
int key_press_timer = 0;
keyboard_scan_init();
/* Enable interrupts for keyboard rows */
gpio_enable_interrupt(KB_COL00);
gpio_enable_interrupt(KB_COL01);
gpio_enable_interrupt(KB_COL02);
gpio_enable_interrupt(KB_COL03);
gpio_enable_interrupt(KB_COL04);
gpio_enable_interrupt(KB_COL05);
gpio_enable_interrupt(KB_COL06);
gpio_enable_interrupt(KB_COL07);
while (1) {
wait_for_interrupt();

30
chip/stm32l/stubs.c
View File

@@ -1,30 +0,0 @@
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Stubs for non implemented drivers */
#include "common.h"
/**
* TODO: implement
*/
int eeprom_init(void)
{
return EC_SUCCESS;
}
int i2c_init(void)
{
return EC_SUCCESS;
}
int power_button_init(void)
{
return EC_SUCCESS;
}
int adc_init(void)
{
return EC_SUCCESS;
}

15
common/build.mk
View File

@@ -5,15 +5,19 @@
# Common files build
#
common-y=main.o util.o console.o vboot.o uart_buffering.o usb_charge_commands.o
common-y+=memory_commands.o shared_mem.o system.o usb_charge.o
common-y=main.o util.o console.o vboot.o uart_buffering.o
common-y+=memory_commands.o shared_mem.o system_common.o
common-y+=gpio_commands.o version.o
common-$(CONFIG_BATTERY_ATL706486)+=battery_atl706486.o
common-$(CONFIG_CHARGER_BQ24725)+=charger_bq24725.o
common-$(CONFIG_FLASH)+=flash_commands.o
common-$(CONFIG_LIGHTBAR)+=leds.o
common-$(CONFIG_LPC)+=port80.o host_event_commands.o
common-$(CONFIG_POWER_LED)+=power_led.o
common-$(CONFIG_PSTORE)+=pstore_commands.o
common-$(CONFIG_PWM)+=pwm_commands.o
common-$(CONFIG_SMART_BATTERY)+=smart_battery.o charge_state.o \
battery_commands.o
common-$(CONFIG_TASK_GAIAPOWER)+=gaia_power.o
common-$(CONFIG_TASK_HOSTCMD)+=host_command.o
common-$(CONFIG_TASK_I8042CMD)+=i8042.o keyboard.o
@@ -21,9 +25,4 @@ common-$(CONFIG_TASK_TEMPSENSOR)+=temp_sensor.o temp_sensor_commands.o
common-$(CONFIG_TASK_THERMAL)+=thermal.o thermal_commands.o
common-$(CONFIG_TASK_X86POWER)+=x86_power.o
common-$(CONFIG_TMP006)+=tmp006.o
# Board driver modules
common-$(CONFIG_BATTERY_ATL706486)+=battery_atl706486.o
common-$(CONFIG_CHARGER_BQ24725)+=charger_bq24725.o
common-$(CONFIG_SMART_BATTERY)+=smart_battery.o charge_state.o \
battery_commands.o
common-$(CONFIG_USB_CHARGE)+=usb_charge.o usb_charge_commands.o

71
common/main.c
View File

@@ -38,44 +38,72 @@
int main(void)
{
/* Configure the pin multiplexers */
/* Pre-initialization (pre-verified boot) stage. Initialization at
* this level should do as little as possible, because verified boot
* may need to jump to another image, which will repeat this
* initialization. In particular, modules should NOT enable
* interrupts.*/
/* Configure the pin multiplexers and GPIOs */
configure_board();
jtag_pre_init();
gpio_pre_init();
#ifdef CONFIG_FLASH
flash_pre_init();
#endif
/* Verified boot pre-init. This write-protects flash if necessary.
* Flash and GPIOs must be initialized first. */
vboot_pre_init();
/* Initialize the system module. This enables the hibernate clock
* source we need to calibrate the internal oscillator. */
system_pre_init();
/* Set the CPU clocks / PLLs and timer */
/* Set the CPU clocks / PLLs. System is now running at full speed. */
clock_init();
timer_init();
/* The timer used by get_time() is now started, so everything after
* this can be benchmarked. */
/* Do system, gpio, and vboot pre-initialization so we can jump to
* another image if necessary. This must be done as early as
* possible, so that the minimum number of components get
* re-initialized if we jump to another image. */
gpio_pre_init();
vboot_pre_init();
/* Initialize interrupts, but don't enable any of them. Note that
* task scheduling is not enabled until task_start() below. */
task_init();
/* Main initialization stage. Modules may enable interrupts here. */
/* Initialize UART. uart_printf(), etc. may now be used. */
uart_init();
#ifdef CONFIG_TASK_WATCHDOG
/* Intialize watchdog timer. All lengthy operations between now and
* task_start() must periodically call watchdog_reload() to avoid
* triggering a watchdog reboot. (This pretty much applies only to
* verified boot, because all *other* lengthy operations should be done
* by tasks.) */
watchdog_init(1100);
#endif
uart_init();
system_init();
/* Initialize timer. Everything after this can be benchmarked.
* get_time() and udelay() may now be used. usleep() requires task
* scheduling, so cannot be used yet. */
timer_init();
/* Verified boot needs to read the initial keyboard state and EEPROM
* contents. */
#ifdef CONFIG_TASK_KEYSCAN
keyboard_scan_init();
#endif
#ifdef CONFIG_FLASH
flash_init();
#endif
#ifdef CONFIG_EEPROM
eeprom_init();
#endif
/* Verified boot initialization. This may jump to another image, which
* will need to reconfigure / reinitialize the system, so as little as
* possible should be done above this step. */
vboot_init();
system_init();
gpio_init();
#ifdef CONFIG_LPC
port_80_init();
lpc_init();
@@ -84,7 +112,9 @@ int main(void)
#ifdef CONFIG_PWM
pwm_init();
#endif
#ifdef CONFIG_I2C
i2c_init();
#endif
#ifdef CONFIG_TASK_TEMPSENSOR
temp_sensor_init();
chip_temp_sensor_init();
@@ -92,18 +122,21 @@ int main(void)
#ifdef CONFIG_TASK_POWERBTN
power_button_init();
#endif
#ifdef CONFIG_ADC
adc_init();
usb_charge_init();
#endif
#ifdef CONFIG_ONEWIRE
onewire_init();
#endif
#ifdef CONFIG_CHARGER
charger_init();
#endif
#ifdef CONFIG_PECI
peci_init();
#endif
#ifdef CONFIG_USB_CHARGE
usb_charge_init();
#endif
/* Print the init time and reset cause. Init time isn't completely
* accurate because it can't take into account the time for the first

2
common/system.c → common/system_common.c
View File

@@ -230,7 +230,7 @@ static enum lpc_status host_command_get_version(uint8_t *data)
strzcpy(r->version_string_rw_b, system_get_version(SYSTEM_IMAGE_RW_B),
sizeof(r->version_string_rw_b));
switch(system_get_image_copy()) {
switch (system_get_image_copy()) {
case SYSTEM_IMAGE_RO:
r->current_image = EC_LPC_IMAGE_RO;
break;

7
common/usb_charge.c
View File

@@ -14,7 +14,6 @@
static void usb_charge_set_control_mode(int port_id, int mode)
{
#ifdef BOARD_link
if (port_id == 0) {
gpio_set_level(GPIO_USB1_CTL1, (mode & 0x4) >> 2);
gpio_set_level(GPIO_USB1_CTL2, (mode & 0x2) >> 1);
@@ -25,32 +24,26 @@ static void usb_charge_set_control_mode(int port_id, int mode)
gpio_set_level(GPIO_USB2_CTL2, (mode & 0x2) >> 1);
gpio_set_level(GPIO_USB2_CTL3, mode & 0x1);
}
#endif
}
static void usb_charge_set_enabled(int port_id, int en)
{
#ifdef BOARD_link
if (port_id == 0)
gpio_set_level(GPIO_USB1_ENABLE, en);
else
gpio_set_level(GPIO_USB2_ENABLE, en);
#endif
}
static void usb_charge_set_ilim(int port_id, int sel)
{
#ifdef BOARD_link
if (port_id == 0)
gpio_set_level(GPIO_USB1_ILIM_SEL, sel);
else
gpio_set_level(GPIO_USB2_ILIM_SEL, sel);
#endif
}
int usb_charge_set_mode(int port_id, enum usb_charge_mode mode)
{
if (port_id >= USB_CHARGE_PORT_COUNT)
return EC_ERROR_INVAL;

4
include/flash.h
View File

@@ -1,4 +1,4 @@
/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -19,7 +19,7 @@
/* Initializes the module. */
int flash_init(void);
int flash_pre_init(void);
/* Returns the usable size of flash in bytes. Note that this is
* smaller than the actual flash size, */