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rambi: Increase REST# pulse length for warm reboot

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The PCH uses a 16 ms debounce, so need to assert the signal for twice
that to be assured of a reboot.

BUG=chrome-os-partner:25088
BRANCH=rambi
TEST=Alt+VolUp+R reboots the system

Change-Id: I51fd54fd992e4e54e6c3bc9c13f9fd59e9bf55ac
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183726
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>
This commit is contained in:
Randall Spangler
2014-01-23 14:14:20 -08:00
committed by chrome-internal-fetch
parent 75857e80d0
commit 2d39c66ee9
1 changed files with 3 additions and 3 deletions
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6
power/baytrail.c
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@@ -89,11 +89,11 @@ void chipset_reset(int cold_reset)
/*
* Send a reset pulse to the PCH. This just causes it to
* assert INIT# to the CPU without dropping power or asserting
* PLTRST# to reset the rest of the system. Pulse must be at
* least 16 PCI clocks long = 500 ns.
* PLTRST# to reset the rest of the system. The PCH uses a 16
* ms debounce time, so assert the signal for twice that.
*/
gpio_set_level(GPIO_PCH_RCIN_L, 0);
udelay(10);
usleep(32 * MSEC);
gpio_set_level(GPIO_PCH_RCIN_L, 1);
}
}