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glados / chell: Power Optimize S0ix PMIC VRs
Allow VCCIO to decay to 0 and reduce the voltage of V0.85A supply in S0ix. BUG=chrome-os-partner:43908 TEST=Stress-test glados stability coming into and out of S0ix BRANCH=glados Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I5aa61164c43ac624cef86f478919294e4cd4e581 Reviewed-on: https://chromium-review.googlesource.com/293345 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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chrome-bot
parent
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commit
2e37a50b37
@@ -226,12 +226,24 @@ static void board_pmic_init(void)
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if (system_jumped_to_this_image())
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return;
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/* Set CSDECAYEN / VCCIO decays to 0V at assertion of SLP_S0# */
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0x4a);
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/*
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* Set V100ACNT / V1.00A Control Register:
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* Nominal output = 1.0V.
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*/
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x1a);
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/*
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* Set V085ACNT / V0.85A Control Register:
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* Lower power mode = 0.7V.
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* Nominal output = 1.0V.
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*/
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a);
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/* VRMODECTRL - enable low-power mode for VCCIO and V0.85A */
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3b, 0x18);
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}
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DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT);
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@@ -230,12 +230,24 @@ static void board_pmic_init(void)
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if (system_jumped_to_this_image())
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return;
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/* Set CSDECAYEN / VCCIO decays to 0V at assertion of SLP_S0# */
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0x4a);
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/*
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* Set V100ACNT / V1.00A Control Register:
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* Nominal output = 1.0V.
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*/
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x1a);
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/*
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* Set V085ACNT / V0.85A Control Register:
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* Lower power mode = 0.7V.
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* Nominal output = 1.0V.
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*/
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a);
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/* VRMODECTRL - enable low-power mode for VCCIO and V0.85A */
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i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3b, 0x18);
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}
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DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT);
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