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apollolake: modify PMIC_EN and RSMRST_N handling

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Move power rail and pmic enable control to be handled at
board level due to specific board design.

Modify rsmrst where assertion is pass-through at all time
and de-assertion is only pass-through at power up.

BUG=chrome-os-partner:53666
BRANCH=none
TEST=amenia is able to handle apreset warm/cold, pmic shutdown,
     soc reset/shutdown.

Change-Id: I7ff819d88d0e194073bee8f02b1e3fa70ca44ba7
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/347370
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Divya Jyothi <divya.jyothi@intel.com>
This commit is contained in:
Kevin K Wong
2016-05-25 08:13:39 -07:00
committed by chrome-bot
parent 00c1a0993f
commit 3026836a59
3 changed files with 55 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
board/amenia/board.c
View File

@@ -267,6 +267,20 @@ const struct button_config buttons[CONFIG_BUTTON_COUNT] = {
30 * MSEC, 0},
};
/* Called by APL power state machine when transitioning from G3 to S5 */
static void chipset_pre_init(void)
{
/* Enable V5A / PMIC */
gpio_set_level(GPIO_V5A_EN, 1);
}
DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, chipset_pre_init, HOOK_PRIO_DEFAULT);
void chipset_do_shutdown(void)
{
/* Disable V5A / PMIC */
gpio_set_level(GPIO_V5A_EN, 0);
}
/* Initialize board. */
static void board_init(void)
{

3
board/reef/board.c
View File

@@ -290,6 +290,9 @@ static void chipset_pre_init(void)
gpio_set_level(GPIO_EN_PP3300, 1);
udelay(1500); /* Double the PG low to high delay for converter. */
/* Enable PMIC */
gpio_set_level(GPIO_V5A_EN, 1);
/* FIXME: for debugging */
cprintf(CC_HOOK, "PP3300_PG: %d", gpio_get_level(GPIO_PP3300_PG));
cprintf(CC_HOOK, "PP5000_PG: %d", gpio_get_level(GPIO_PP5000_PG));

57
power/apollolake.c
View File

@@ -53,10 +53,7 @@ static int power_s5_up; /* Chipset is sequencing up or down */
__attribute__((weak)) void chipset_do_shutdown(void)
{
/*
* Disable V5A which de-assert PMIC_EN and causes PMIC to shutdown.
*/
gpio_set_level(GPIO_V5A_EN, 0);
/* Need to implement board specific shutdown */
}
void chipset_force_shutdown(void)
@@ -116,24 +113,44 @@ enum power_state power_chipset_init(void)
return POWER_G3;
}
static void handle_pass_through(enum power_state state,
enum gpio_signal pin_in,
enum gpio_signal pin_out)
static void handle_rsmrst_l_pgood(enum power_state state)
{
/*
* Pass through asynchronously, as SOC may not react
* immediately to power changes.
*/
int in_level = gpio_get_level(pin_in);
int out_level = gpio_get_level(pin_out);
int in_level = gpio_get_level(GPIO_RSMRST_L_PGOOD);
int out_level = gpio_get_level(GPIO_PCH_RSMRST_L);
/* Nothing to do. */
if (in_level == out_level)
return;
gpio_set_level(pin_out, in_level);
/* Only passthrough RSMRST_L de-assertion on power up */
if (in_level && !power_s5_up)
return;
CPRINTS("Pass through %s: %d", gpio_get_name(pin_in), in_level);
gpio_set_level(GPIO_PCH_RSMRST_L, in_level);
CPRINTS("Pass through GPIO_RSMRST_L_PGOOD: %d", in_level);
}
static void handle_all_sys_pgood(enum power_state state)
{
/*
* Pass through asynchronously, as SOC may not react
* immediately to power changes.
*/
int in_level = gpio_get_level(GPIO_ALL_SYS_PGOOD);
int out_level = gpio_get_level(GPIO_PCH_SYS_PWROK);
/* Nothing to do. */
if (in_level == out_level)
return;
gpio_set_level(GPIO_PCH_SYS_PWROK, in_level);
CPRINTS("Pass through GPIO_ALL_SYS_PGOOD: %d", in_level);
}
#ifdef CONFIG_BOARD_HAS_RTC_RESET
@@ -259,10 +276,7 @@ static enum power_state _power_handle_state(enum power_state state)
return POWER_G3;
}
/* Enable V5A */
gpio_set_level(GPIO_V5A_EN, 1);
msleep(10);
/* Wait for RSMRST_L de-assert */
if (power_wait_signals(IN_PGOOD_ALL_CORE)) {
chipset_force_shutdown();
return POWER_G3;
@@ -394,14 +408,19 @@ enum power_state power_handle_state(enum power_state state)
{
enum power_state new_state;
/* Process RSMRST_L state changes. */
handle_pass_through(state, GPIO_RSMRST_L_PGOOD, GPIO_PCH_RSMRST_L);
/* Process ALL_SYS_PGOOD state changes. */
handle_pass_through(state, GPIO_ALL_SYS_PGOOD, GPIO_PCH_SYS_PWROK);
handle_all_sys_pgood(state);
new_state = _power_handle_state(state);
/*
* Process RSMRST_L state changes:
* RSMRST_L de-assertion is passed to SoC only on G3S5 to S5 transition.
* RSMRST_L is also checked in some states and, if asserted, will
* force shutdown.
*/
handle_rsmrst_l_pgood(new_state);
return new_state;
}