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Cr50: Configure GPIOs for Kevin proto0

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BUG=chrome-os-partner:49952
BRANCH=none
TEST=make buildall, run on Cr50 board

It's kind of hard to test GPIOs that aren't attached to anything,
but I've examined all the PINMUX controls and ARM GPIO settings,
and I *think* they're right.

Change-Id: I66ae94118f73c41193c6ca5c0af9708f6cc8a3e8
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329526
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This commit is contained in:
Bill Richardson
2016-02-26 14:37:18 -08:00
committed by chrome-bot
parent 55bc46fe45
commit 30585eb36b
3 changed files with 77 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
board/cr50/board.c
View File

@@ -97,6 +97,12 @@ static void board_init(void)
init_interrupts();
init_trng();
init_runlevel(PERMISSION_MEDIUM);
/* TODO(crosbug.com/p/49959): For now, leave flash WP unlocked */
GREG32(RBOX, EC_WP_L) = 1;
/* Indication that firmware is running, for debug purposes. */
GREG32(PMU, PWRDN_SCRATCH16) = 0xCAFECAFE;
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);

63
board/cr50/gpio.inc
View File

@@ -1,5 +1,5 @@
/* -*- mode:c -*-
* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Copyright (c) 2016 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -7,6 +7,26 @@
/* Declare symbolic names for all the GPIOs that we care about.
* Note: Those with interrupt handlers must be declared first. */
/* Pull this low to interrupt the AP */
GPIO(INT_AP_L, PIN(0, 0), GPIO_ODR_HIGH)
/* Use these to take over the AP & EC flash (only when AP & EC are off!) */
GPIO(EC_FLASH_SELECT, PIN(0, 1), GPIO_OUT_LOW)
GPIO(AP_FLASH_SELECT, PIN(0, 2), GPIO_OUT_LOW)
/* As an input this mirrors EC_WP_L (which is controlled by RBOX, not a GPIO).
* As an output it can override EC_WP_L, although why would we? */
GPIO(AP_WP_L, PIN(0, 3), GPIO_INPUT)
/* Drive high to reset the EC & AP */
GPIO(SYS_RST, PIN(0, 4), GPIO_OUT_LOW)
/* Indicate to EC when CCD is enabled */
GPIO(CCD_MODE, PIN(0, 5), GPIO_OUT_LOW)
/* Battery has a 10K pulldown on its side. We provide the pullup. */
GPIO(BATT_PRES, PIN(0, 6), GPIO_INPUT | GPIO_PULL_UP)
/* Unimplemented signals which we need to emulate for now */
/* TODO(wfrichar): Half the boards don't use this signal. Take it out. */
UNIMPLEMENTED(ENTERING_RW)
@@ -20,8 +40,43 @@ UNIMPLEMENTED(ENTERING_RW)
#define PINMUX(...)
#endif
/* The serial port is one of the SoC peripheral functions */
PINMUX(FUNC(UART0_TX), A0, DIO_OUTPUT) /* bootrom sets this already */
PINMUX(FUNC(UART0_RX), A1, DIO_INPUT) /* we need to set this */
/* GPIOs - mark outputs as inputs too, to read back from the driven pad */
PINMUX(GPIO(INT_AP_L), B7, DIO_INPUT) /* DIOB7 is p_digitial_od */
/* We can't pull it up */
PINMUX(GPIO(EC_FLASH_SELECT), A3, DIO_INPUT)
PINMUX(GPIO(AP_FLASH_SELECT), A7, DIO_INPUT)
PINMUX(GPIO(AP_WP_L), A5, 0)
PINMUX(GPIO(SYS_RST), M0, DIO_INPUT)
PINMUX(GPIO(CCD_MODE), M1, DIO_INPUT)
PINMUX(GPIO(BATT_PRES), M2, 0)
/* UARTs */
PINMUX(FUNC(UART0_TX), A0, DIO_OUTPUT) /* Cr50 console */
PINMUX(FUNC(UART0_RX), A1, DIO_INPUT)
PINMUX(FUNC(UART1_TX), B3, DIO_OUTPUT) /* AP console */
PINMUX(FUNC(UART1_RX), B2, DIO_INPUT)
PINMUX(FUNC(UART2_TX), B5, DIO_OUTPUT) /* EC console */
PINMUX(FUNC(UART2_RX), B6, DIO_INPUT)
/* I2C pins are bi-directional */
PINMUX(FUNC(I2C0_SCL), B0, DIO_OUTPUT|DIO_INPUT)
PINMUX(FUNC(I2C0_SDA), B1, DIO_OUTPUT|DIO_INPUT)
/* Both SPI master and slave buses are wired directly to specific pads
*
* If CONFIG_SPS is defined, these pads are used:
* DIOA2 = SPS_MOSI (input)
* DIOA6 = SPS_CLK (input)
* DIOA10 = SPS_MISO (output)
* DIOA12 = SPS_CS_L (input)
* The digital inputs are enabled in sps.c
*
* If CONFIG_SPI_MASTER is defined, these pads are used:
* DIOA4 = SPI_MOSI (output)
* DIOA8 = SPI_CLK (output)
* DIOA11 = SPI_MISO (input)
* DIOA14 = SPI_CS_L (output)
* Note: Double-check to be sure these are configured in spi_master.c
*/
#undef PINMUX

12
chip/g/gpio.c
View File

@@ -147,6 +147,7 @@ static const struct pinmux pinmux_list[] = {
#include "gpio.wrap"
};
/* Return true if DIO should be a digital input */
static int connect_dio_to_peripheral(struct pinmux const *p)
{
if (p->flags & DIO_OUTPUT)
@@ -158,6 +159,7 @@ static int connect_dio_to_peripheral(struct pinmux const *p)
return p->flags & DIO_INPUT;
}
/* Return true if DIO should be a digital input */
static int connect_dio_to_gpio(struct pinmux const *p)
{
const struct gpio_info *g = gpio_list + p->signal;
@@ -169,6 +171,16 @@ static int connect_dio_to_gpio(struct pinmux const *p)
if ((g->flags & GPIO_INPUT) || (p->flags & DIO_INPUT))
GET_GPIO_SEL_REG(g->port, bitnum) = p->dio.value;
if (g->flags & GPIO_PULL_UP)
REG_WRITE_MLV(DIO_CTL_REG(p->dio.offset),
DIO_CTL_PU_MASK,
DIO_CTL_PU_LSB, 1);
if (g->flags & GPIO_PULL_DOWN)
REG_WRITE_MLV(DIO_CTL_REG(p->dio.offset),
DIO_CTL_PD_MASK,
DIO_CTL_PD_LSB, 1);
return (g->flags & GPIO_INPUT) || (p->flags & DIO_INPUT);
}