stm32l: set SYSCFGEN for boards using stm32l

This sets the SYSCFGEN bit. Writes to external interrupt config
registers (SYSCFG_EXTICRn) will not stick unless this is set.

Signed-off-by: David Hendricks <dhendrix@chromium.org>

BUG=none
TEST=tested on daisy

Change-Id: I9a92b424e9ac1f909206f89ed773248807619ab2
This commit is contained in:
David Hendricks
2012-04-12 19:59:38 -07:00
parent e21e5bd46a
commit 340f1feb9b
3 changed files with 5 additions and 4 deletions

View File

@@ -63,6 +63,7 @@ void configure_board(void)
* TODO: more fine-grained enabling for power saving
*/
STM32L_RCC_AHBENR |= 0x3f;
STM32L_RCC_APB2ENR |= 0x01;
/* Select Alternate function for USART2 on pins PA2/PA3 */
gpio_set_alternate_function(GPIO_A, (1<<2) | (1<<3), GPIO_ALT_USART);

View File

@@ -77,19 +77,18 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
void configure_board(void)
{
/* Required to configure external IRQ lines (SYSCFG_EXTICRn) */
STM32L_RCC_APB2ENR |= 1 << 0;
dma_init();
/* Enable all GPIOs clocks
* TODO: more fine-grained enabling for power saving
*/
STM32L_RCC_AHBENR |= 0x3f;
/* Required to configure external IRQ lines (SYSCFG_EXTICRn) */
/* FIXME: This seems to break USB download in U-Boot (?!?) */
STM32L_RCC_APB2ENR |= 1 << 0;
/* Enable SPI */
STM32L_RCC_APB2ENR |= (1<<12);
/*| (1 << 0); - removed since this breaks USB download? */
/* SPI1 on pins PA4-7 (push-pull, no pullup/down, 10MHz) */
STM32L_GPIO_PUPDR_OFF(GPIO_A) &= ~((2 << (7 * 2)) |

View File

@@ -51,6 +51,7 @@ void configure_board(void)
*/
STM32L_RCC_AHBENR |= 0x3f;
STM32L_RCC_AHBLPENR |= 0x0e;
STM32L_RCC_APB2ENR |= 0x01;
#if CONFIG_CONSOLE_UART == 1
/* Select Alternate function for USART1 on pins PA9/PA10 */