stm32f0: Fix repeated start for I2C

We want repeated start instead of stop+start. Apparently, we need to set
START bit along with read configuration. Otherwise, the I2C module
generates a STOP condition.

BUG=None
TEST=Monitor I2C with a logic analyzer. See repeated start instead of
stop+start.
BRANCH=All using stm32f0.

Change-Id: I47491e240f2543e5d023e950d15468ec0e3c301b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208760
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This commit is contained in:
Vic Yang
2014-07-17 11:36:39 -07:00
committed by chrome-internal-fetch
parent a9b0d15e6e
commit 3bb7de950f

View File

@@ -302,12 +302,11 @@ int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_bytes,
if (rv)
goto xfer_exit;
}
/* Configure the read transfer */
/* Configure the read transfer and (re)start */
STM32_I2C_CR2(port) = ((in_bytes & 0xFF) << 16)
| STM32_I2C_CR2_RD_WRN | slave_addr
| STM32_I2C_CR2_AUTOEND;
/* START or repeated start */
STM32_I2C_CR2(port) |= STM32_I2C_CR2_START;
| STM32_I2C_CR2_AUTOEND
| STM32_I2C_CR2_START;
for (i = 0; i < in_bytes; i++) {
/* Wait for receive buffer not empty */