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stm32f0: Fix repeated start for I2C
We want repeated start instead of stop+start. Apparently, we need to set START bit along with read configuration. Otherwise, the I2C module generates a STOP condition. BUG=None TEST=Monitor I2C with a logic analyzer. See repeated start instead of stop+start. BRANCH=All using stm32f0. Change-Id: I47491e240f2543e5d023e950d15468ec0e3c301b Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/208760 Reviewed-by: Alec Berg <alecaberg@chromium.org>
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chrome-internal-fetch
parent
a9b0d15e6e
commit
3bb7de950f
@@ -302,12 +302,11 @@ int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_bytes,
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if (rv)
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goto xfer_exit;
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}
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/* Configure the read transfer */
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/* Configure the read transfer and (re)start */
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STM32_I2C_CR2(port) = ((in_bytes & 0xFF) << 16)
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| STM32_I2C_CR2_RD_WRN | slave_addr
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| STM32_I2C_CR2_AUTOEND;
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/* START or repeated start */
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STM32_I2C_CR2(port) |= STM32_I2C_CR2_START;
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| STM32_I2C_CR2_AUTOEND
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| STM32_I2C_CR2_START;
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for (i = 0; i < in_bytes; i++) {
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/* Wait for receive buffer not empty */
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