mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-12 19:04:59 +00:00
Add pit board
GPIO mapping is correct for current schematics. Things to fix are #ifdef'd out with PORT_TO_PIT, but those require changing other files (which is most tidily done in separate CLs). BUG=chrome-os-partner:18657 BRANCH=pit TEST=build pit (can't test the binary yet; no hardware) Change-Id: Id1d1bb0c2925cfc0c21ee2d91666028aa6d2a707 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47599 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
This commit is contained in:
Randall Spangler
committed by
ChromeBot
ChromeBot
parent
54ea657965
commit
3e9d365e2c
187
board/pit/board.c
Normal file
187
board/pit/board.c
Normal file
@@ -0,0 +1,187 @@
|
||||
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
/* Pit board-specific configuration */
|
||||
|
||||
#include "common.h"
|
||||
#include "gaia_power.h"
|
||||
#include "gpio.h"
|
||||
#include "i2c.h"
|
||||
#include "keyboard_raw.h"
|
||||
#include "pmu_tpschrome.h"
|
||||
#include "registers.h"
|
||||
#include "spi.h"
|
||||
#include "task.h"
|
||||
#include "util.h"
|
||||
|
||||
#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH)
|
||||
#define GPIO_KB_OUTPUT (GPIO_OUTPUT | GPIO_PULL_UP | GPIO_OPEN_DRAIN)
|
||||
|
||||
/* GPIO signal list. Must match order from enum gpio_signal. */
|
||||
const struct gpio_info gpio_list[GPIO_COUNT] = {
|
||||
/* Inputs with interrupt handlers are first for efficiency */
|
||||
{"KB_PWR_ON_L", GPIO_B, (1<<5), GPIO_INT_BOTH, gaia_power_event},
|
||||
{"PP1800_LDO2", GPIO_A, (1<<1), GPIO_INT_BOTH, gaia_power_event},
|
||||
{"XPSHOLD", GPIO_A, (1<<3), GPIO_INT_RISING, gaia_power_event},
|
||||
{"CHARGER_INT", GPIO_C, (1<<4), GPIO_INT_RISING, pmu_irq_handler},
|
||||
{"LID_OPEN", GPIO_C, (1<<13), GPIO_INT_RISING, gaia_lid_event},
|
||||
{"SUSPEND_L", GPIO_C, (1<<7), GPIO_INT_BOTH, gaia_suspend_event},
|
||||
{"KB_IN00", GPIO_C, (1<<8), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
{"KB_IN01", GPIO_C, (1<<9), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
{"KB_IN02", GPIO_C, (1<<10), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
{"KB_IN03", GPIO_C, (1<<11), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
{"KB_IN04", GPIO_C, (1<<12), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
{"KB_IN05", GPIO_C, (1<<14), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
{"KB_IN06", GPIO_C, (1<<15), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
{"KB_IN07", GPIO_D, (1<<2), GPIO_KB_INPUT,
|
||||
keyboard_raw_gpio_interrupt},
|
||||
/* Other inputs */
|
||||
{"AC_PWRBTN_L", GPIO_A, (1<<0), GPIO_INT_BOTH, NULL},
|
||||
{"WP_L", GPIO_B, (1<<4), GPIO_INPUT, NULL},
|
||||
/* Outputs */
|
||||
{"AC_STATUS", GPIO_A, (1<<5), GPIO_OUT_HIGH, NULL},
|
||||
{"AP_RESET_L", GPIO_B, (1<<3), GPIO_HI_Z, NULL},
|
||||
{"CHARGER_EN", GPIO_B, (1<<2), GPIO_OUT_LOW, NULL},
|
||||
{"EC_INT", GPIO_B, (1<<9), GPIO_HI_Z, NULL},
|
||||
{"EN_PP1350", GPIO_A, (1<<2), GPIO_OUT_LOW, NULL},
|
||||
{"EN_PP3300", GPIO_A, (1<<8), GPIO_OUT_LOW, NULL},
|
||||
{"EN_PP5000", GPIO_A, (1<<11), GPIO_OUT_LOW, NULL},
|
||||
{"ENTERING_RW", GPIO_H, (1<<0), GPIO_OUT_LOW, NULL},
|
||||
/*
|
||||
* I2C pins should be configured as inputs until I2C module is
|
||||
* initialized. This will avoid driving the lines unintentionally.
|
||||
*/
|
||||
{"I2C1_SCL", GPIO_B, (1<<6), GPIO_INPUT, NULL},
|
||||
{"I2C1_SDA", GPIO_B, (1<<7), GPIO_INPUT, NULL},
|
||||
{"I2C2_SCL", GPIO_B, (1<<10), GPIO_INPUT, NULL},
|
||||
{"I2C2_SDA", GPIO_B, (1<<11), GPIO_INPUT, NULL},
|
||||
{"LED_POWER_L", GPIO_A, (1<<14), GPIO_OUT_HIGH, NULL},
|
||||
{"PMIC_PWRON_L",GPIO_A, (1<<12), GPIO_OUT_HIGH, NULL},
|
||||
{"PMIC_RESET", GPIO_A, (1<<15), GPIO_OUT_LOW, NULL},
|
||||
#ifndef CONFIG_SPI
|
||||
{"SPI1_MISO", GPIO_A, (1<<6), GPIO_OUT_HIGH, NULL},
|
||||
{"SPI1_NSS", GPIO_A, (1<<4), GPIO_PULL_UP, NULL},
|
||||
#endif
|
||||
{"KB_OUT00", GPIO_B, (1<<0), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT01", GPIO_B, (1<<8), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT02", GPIO_B, (1<<12), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT03", GPIO_B, (1<<13), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT04", GPIO_B, (1<<14), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT05", GPIO_B, (1<<15), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT06", GPIO_C, (1<<0), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT07", GPIO_C, (1<<1), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT08", GPIO_C, (1<<2), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT09", GPIO_B, (1<<1), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT10", GPIO_C, (1<<5), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT11", GPIO_C, (1<<6), GPIO_KB_OUTPUT, NULL},
|
||||
{"KB_OUT12", GPIO_A, (1<<13), GPIO_KB_OUTPUT, NULL},
|
||||
};
|
||||
|
||||
void board_config_post_gpio_init(void)
|
||||
{
|
||||
/* I2C SCL/SDA on PB10-11 and PB6-7 */
|
||||
gpio_set_alternate_function(GPIO_B, (1<<11) |
|
||||
(1<<10) |
|
||||
(1<<7) |
|
||||
(1<<6), GPIO_ALT_I2C);
|
||||
|
||||
/* Select Alternate function for USART1 on pins PA9/PA10 */
|
||||
gpio_set_alternate_function(GPIO_A, (1<<9) | (1<<10), GPIO_ALT_USART);
|
||||
|
||||
#ifdef CONFIG_SPI
|
||||
/* SPI1 on pins PA4-7 (alt. function push-pull, 10MHz) */
|
||||
val = STM32_GPIO_CRL_OFF(GPIO_A) & ~0xffff0000;
|
||||
val |= 0x99990000;
|
||||
STM32_GPIO_CRL_OFF(GPIO_A) = val;
|
||||
|
||||
gpio_set_flags(GPIO_SPI1_NSS, GPIO_INT_BOTH);
|
||||
#endif
|
||||
|
||||
/* TODO: which of these are necessary on pit? */
|
||||
#ifdef PORT_TO_PIT
|
||||
|
||||
/* remap OSC_IN/OSC_OUT to PD0/PD1 */
|
||||
STM32_GPIO_AFIO_MAPR |= 1 << 15;
|
||||
|
||||
/* use PB3 as a GPIO, so disable JTAG and keep only SWD */
|
||||
STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x7 << 24))
|
||||
| (2 << 24);
|
||||
|
||||
/* remap TIM2_CH2 to PB3 */
|
||||
STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x3 << 8))
|
||||
| (1 << 8);
|
||||
|
||||
#endif /* PORT_TO_PIT */
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PMU_BOARD_INIT
|
||||
int pmu_board_init(void)
|
||||
{
|
||||
int ver, failure = 0;
|
||||
|
||||
/* Set fast charging timeout to 6 hours*/
|
||||
if (!failure)
|
||||
failure = pmu_set_fastcharge(TIMEOUT_6HRS);
|
||||
/* Enable external gpio CHARGER_EN control */
|
||||
if (!failure)
|
||||
failure = pmu_enable_ext_control(1);
|
||||
/* Disable force charging */
|
||||
if (!failure)
|
||||
failure = pmu_enable_charger(0);
|
||||
|
||||
/* Set NOITERM bit */
|
||||
if (!failure)
|
||||
failure = pmu_low_current_charging(1);
|
||||
|
||||
/*
|
||||
* High temperature charging
|
||||
* termination voltage: 2.1V
|
||||
* termination current: 100%
|
||||
*/
|
||||
if (!failure)
|
||||
failure = pmu_set_term_voltage(RANGE_T34, TERM_V2100);
|
||||
if (!failure)
|
||||
failure = pmu_set_term_current(RANGE_T34, TERM_I1000);
|
||||
/*
|
||||
* Standard temperature charging
|
||||
* termination voltage: 2.1V
|
||||
* termination current: 100%
|
||||
*/
|
||||
if (!failure)
|
||||
failure = pmu_set_term_voltage(RANGE_T23, TERM_V2100);
|
||||
if (!failure)
|
||||
failure = pmu_set_term_current(RANGE_T23, TERM_I1000);
|
||||
|
||||
/*
|
||||
* Ignore TPSCHROME NTC reading in T40. This is snow board specific
|
||||
* setting. Check:
|
||||
* http://crosbug.com/p/12221
|
||||
* http://crosbug.com/p/13171
|
||||
*/
|
||||
if (!failure)
|
||||
failure = pmu_set_term_voltage(RANGE_T40, TERM_V2100);
|
||||
if (!failure)
|
||||
failure = pmu_set_term_current(RANGE_T40, TERM_I1000);
|
||||
|
||||
/* Workaround init values before ES3 */
|
||||
if (pmu_version(&ver) || ver < 3) {
|
||||
/* Termination current: 75% */
|
||||
if (!failure)
|
||||
failure = pmu_set_term_current(RANGE_T34, TERM_I0750);
|
||||
if (!failure)
|
||||
failure = pmu_set_term_current(RANGE_T23, TERM_I0750);
|
||||
if (!failure)
|
||||
failure = pmu_set_term_current(RANGE_T40, TERM_I0750);
|
||||
}
|
||||
|
||||
return failure ? EC_ERROR_UNKNOWN : EC_SUCCESS;
|
||||
}
|
||||
#endif /* CONFIG_BOARD_PMU_INIT */
|
||||
126
board/pit/board.h
Normal file
126
board/pit/board.h
Normal file
@@ -0,0 +1,126 @@
|
||||
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/* Pit board configuration */
|
||||
|
||||
#ifndef __BOARD_H
|
||||
#define __BOARD_H
|
||||
|
||||
/* 16 MHz SYSCLK clock frequency */
|
||||
#define CPU_CLOCK 16000000
|
||||
|
||||
/* Use USART1 as console serial port */
|
||||
#define CONFIG_CONSOLE_UART 1
|
||||
|
||||
/* Debug features */
|
||||
#define CONFIG_ASSERT_HELP
|
||||
#define CONFIG_CONSOLE_CMDHELP
|
||||
#define CONFIG_PANIC_HELP
|
||||
#undef CONFIG_TASK_PROFILING
|
||||
|
||||
/* Optional features */
|
||||
#define CONFIG_BATTERY_BQ20Z453
|
||||
#define CONFIG_BOARD_POST_GPIO_INIT
|
||||
#define CONFIG_CHIPSET_GAIA
|
||||
#define CONFIG_CMD_PMU
|
||||
#define CONFIG_EXTPOWER_SNOW
|
||||
#define CONFIG_HOST_COMMAND_STATUS
|
||||
#define CONFIG_I2C
|
||||
#define CONFIG_KEYBOARD_PROTOCOL_MKBP
|
||||
#define CONFIG_PMU_BOARD_INIT
|
||||
#define CONFIG_PMU_HARD_RESET
|
||||
#define CONFIG_PMU_TPS65090
|
||||
#define CONFIG_SMART_BATTERY
|
||||
|
||||
|
||||
#ifdef PORT_TO_PIT
|
||||
/* TODO(rspangler): enable these features when they compile */
|
||||
#define CONFIG_LOW_POWER_IDLE
|
||||
#define CONFIG_SPI
|
||||
#define CONFIG_WATCHDOG_HELP
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/* By default, enable all console messages except keyboard */
|
||||
#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_KEYSCAN))
|
||||
|
||||
#define USB_CHARGE_PORT_COUNT 0
|
||||
|
||||
/* Keyboard output port list */
|
||||
#define KB_OUT_PORT_LIST GPIO_A, GPIO_B, GPIO_C
|
||||
|
||||
/* Charging */
|
||||
#define I2C_PORT_HOST 0
|
||||
#define I2C_PORT_BATTERY I2C_PORT_HOST
|
||||
#define I2C_PORT_CHARGER I2C_PORT_HOST
|
||||
#define I2C_PORT_SLAVE 1
|
||||
|
||||
/* Timer selection */
|
||||
#define TIM_CLOCK_MSB 3
|
||||
#define TIM_CLOCK_LSB 4
|
||||
|
||||
/* GPIO signal list */
|
||||
enum gpio_signal {
|
||||
/* Inputs with interrupt handlers are first for efficiency */
|
||||
GPIO_KB_PWR_ON_L = 0,
|
||||
GPIO_PP1800_LDO2,
|
||||
GPIO_SOC1V8_XPSHOLD,
|
||||
GPIO_CHARGER_INT,
|
||||
GPIO_LID_OPEN,
|
||||
GPIO_SUSPEND_L,
|
||||
/* Keyboard inputs */
|
||||
GPIO_KB_IN00,
|
||||
GPIO_KB_IN01,
|
||||
GPIO_KB_IN02,
|
||||
GPIO_KB_IN03,
|
||||
GPIO_KB_IN04,
|
||||
GPIO_KB_IN05,
|
||||
GPIO_KB_IN06,
|
||||
GPIO_KB_IN07,
|
||||
/* Other inputs */
|
||||
GPIO_AC_PWRBTN_L,
|
||||
GPIO_WP_L,
|
||||
/* Outputs */
|
||||
GPIO_AC_STATUS,
|
||||
GPIO_AP_RESET_L,
|
||||
GPIO_CHARGER_EN,
|
||||
GPIO_EC_INT,
|
||||
GPIO_EN_PP1350,
|
||||
GPIO_EN_PP3300,
|
||||
GPIO_EN_PP5000,
|
||||
GPIO_ENTERING_RW,
|
||||
GPIO_I2C1_SCL,
|
||||
GPIO_I2C1_SDA,
|
||||
GPIO_I2C2_SCL,
|
||||
GPIO_I2C2_SDA,
|
||||
GPIO_LED_POWER_L,
|
||||
GPIO_PMIC_PWRON_L,
|
||||
GPIO_PMIC_RESET,
|
||||
#ifndef CONFIG_SPI
|
||||
GPIO_SPI1_MISO,
|
||||
GPIO_SPI1_NSS,
|
||||
#endif
|
||||
GPIO_KB_OUT00,
|
||||
GPIO_KB_OUT01,
|
||||
GPIO_KB_OUT02,
|
||||
GPIO_KB_OUT03,
|
||||
GPIO_KB_OUT04,
|
||||
GPIO_KB_OUT05,
|
||||
GPIO_KB_OUT06,
|
||||
GPIO_KB_OUT07,
|
||||
GPIO_KB_OUT08,
|
||||
GPIO_KB_OUT09,
|
||||
GPIO_KB_OUT10,
|
||||
GPIO_KB_OUT11,
|
||||
GPIO_KB_OUT12,
|
||||
/* Number of GPIOs; not an actual GPIO */
|
||||
GPIO_COUNT
|
||||
};
|
||||
|
||||
#endif /* !__ASSEMBLER__ */
|
||||
|
||||
#endif /* __BOARD_H */
|
||||
12
board/pit/build.mk
Normal file
12
board/pit/build.mk
Normal file
@@ -0,0 +1,12 @@
|
||||
# -*- makefile -*-
|
||||
# Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
|
||||
# Use of this source code is governed by a BSD-style license that can be
|
||||
# found in the LICENSE file.
|
||||
#
|
||||
# Board specific files build
|
||||
|
||||
# the IC is STmicro STM32L151R8H6
|
||||
CHIP:=stm32
|
||||
CHIP_VARIANT:=stm32l15x
|
||||
|
||||
board-y=board.o
|
||||
24
board/pit/ec.tasklist
Normal file
24
board/pit/ec.tasklist
Normal file
@@ -0,0 +1,24 @@
|
||||
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*/
|
||||
|
||||
/**
|
||||
* List of enabled tasks in the priority order
|
||||
*
|
||||
* The first one has the lowest priority.
|
||||
*
|
||||
* For each task, use the macro TASK(n, r, d, s) where :
|
||||
* 'n' in the name of the task
|
||||
* 'r' in the main routine of the task
|
||||
* 'd' in an opaque parameter passed to the routine at startup
|
||||
* 's' is the stack size in bytes; must be a multiple of 8
|
||||
*/
|
||||
#define CONFIG_TASK_LIST \
|
||||
TASK(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK(VBOOTHASH, vboot_hash_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK(CHARGER, charger_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
|
||||
TASK(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE)
|
||||
Reference in New Issue
Block a user