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rambi: Add duplicate GPIO outputs for proto 2.0 board

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Proto 2.0 makes these changes:
  KBD_IRQ# moves from PM4 to PM3.
  EC_PWROK moves from PH2 to PJ1.

Since PM3 and PJ1 are unused on proto 1.5, it's harmless to duplicate
the current functionality on those outputs.  We can remove the old
outputs when we deprecate the 1.5 boards.

BUG=chrome-os-partner:24424
BRANCH=none
TEST=boot rambi

Change-Id: Iff77651ef575a8405878fe75f025a0507b02b771
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180081
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Randall Spangler
2013-12-06 13:20:49 -08:00
committed by chrome-internal-fetch
parent 05bd0cdec7
commit 400d7758bd
4 changed files with 42 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
board/rambi/board.c
View File

@@ -89,7 +89,12 @@ const struct gpio_info gpio_list[] = {
{"PCH_RSMRST_L", LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL},
{"PCH_SMI_L", LM4_GPIO_F, (1<<4), GPIO_ODR_HIGH, NULL},
{"PCH_SOC_OVERRIDE_L", LM4_GPIO_G, (1<<1), GPIO_OUT_HIGH, NULL},
/*
* TODO(crosbug.com/p/24424): Remove old assignment and remove _NEW
* from the new one when we deprecate the 1.5 boards.
*/
{"PCH_SYS_PWROK", LM4_GPIO_H, (1<<2), GPIO_OUT_LOW, NULL},
{"PCH_SYS_PWROK_NEW", LM4_GPIO_J, (1<<1), GPIO_OUT_LOW, NULL},
{"PCH_WAKE_L", LM4_GPIO_F, (1<<0), GPIO_ODR_HIGH, NULL},
{"PP1350_EN", LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL},
{"PP3300_DX_EN", LM4_GPIO_J, (1<<2), GPIO_OUT_LOW, NULL},
@@ -106,7 +111,12 @@ const struct gpio_info gpio_list[] = {
{"VCORE_EN", LM4_GPIO_C, (1<<5), GPIO_OUT_LOW, NULL},
{"WLAN_OFF_L", LM4_GPIO_J, (1<<4), GPIO_OUT_LOW, NULL},
{"PCH_SCI_L", LM4_GPIO_M, (1<<1), GPIO_ODR_HIGH, NULL},
/*
* TODO(crosbug.com/p/24424): Remove old assignment and remove _NEW
* from the new one when we deprecate the 1.5 boards.
*/
{"KBD_IRQ_L", LM4_GPIO_M, (1<<4), GPIO_OUT_HIGH, NULL},
{"KBD_IRQ_NEW_L", LM4_GPIO_M, (1<<3), GPIO_OUT_HIGH, NULL},
};
BUILD_ASSERT(ARRAY_SIZE(gpio_list) == GPIO_COUNT);

10
board/rambi/board.h
View File

@@ -99,7 +99,12 @@ enum gpio_signal {
GPIO_PCH_SMI_L, /* System management interrupt to PCH */
GPIO_PCH_SOC_OVERRIDE_L, /* SOC override signal to PCH; when high, ME
* ignores security descriptor */
/*
* TODO(crosbug.com/p/24424): Remove old assignment and remove _NEW
* from the new one when we deprecate the 1.5 boards.
*/
GPIO_PCH_SYS_PWROK, /* EC thinks everything is up and ready */
GPIO_PCH_SYS_PWROK_NEW, /* Duplicate of SYS_PWROK for 2.0 boards */
GPIO_PCH_WAKE_L, /* Wake signal from EC to PCH */
GPIO_PP1350_EN, /* Enable 1.35V supply */
GPIO_PP3300_DX_EN, /* Enable power to lots of peripherals */
@@ -116,7 +121,12 @@ enum gpio_signal {
GPIO_VCORE_EN, /* Enable core power supplies */
GPIO_WLAN_OFF_L, /* Disable WiFi radio */
GPIO_PCH_SCI_L, /* Assert SCI to PCH */
/*
* TODO(crosbug.com/p/24424): Remove old assignment and remove _NEW
* from the new one when we deprecate the 1.5 boards.
*/
GPIO_KBD_IRQ_L, /* Negative edge triggered irq. */
GPIO_KBD_IRQ_NEW_L, /* Duplicate of KBD_IRQ# for 2.0 boards */
/* Number of GPIOs; not an actual GPIO */
GPIO_COUNT

12
chip/lm4/lpc.c
View File

@@ -88,8 +88,20 @@ static void keyboard_irq_assert(void)
{
/* Negative edge-triggered keyboard interrupt. */
gpio_set_level(CONFIG_KEYBOARD_IRQ_GPIO, 0);
#ifdef BOARD_RAMBI
/*
* TODO(crosbug.com/p/24424): Remove duplicate IRQ output when we
* finish transitioning from proto 1.5 to proto 2.0.
*/
gpio_set_level(GPIO_KBD_IRQ_NEW_L, 0);
#endif
wait_irq_sent();
gpio_set_level(CONFIG_KEYBOARD_IRQ_GPIO, 1);
#ifdef BOARD_RAMBI
gpio_set_level(GPIO_KBD_IRQ_NEW_L, 1);
#endif
}
#else
static void wait_send_serirq(uint32_t lpcirqctl)

10
power/baytrail.c
View File

@@ -61,6 +61,11 @@ void chipset_force_shutdown(void)
* transitions to G3.
*/
gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
/*
* TODO(crosbug.com/p/24424): Remove duplicate SYS_PWROK output when we
* finish transitioning from proto 1.5 to proto 2.0.
*/
gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0);
gpio_set_level(GPIO_PCH_RSMRST_L, 0);
}
@@ -82,8 +87,10 @@ void chipset_reset(int cold_reset)
/* PWROK must deassert for at least 3 RTC clocks = 91 us */
gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0);
udelay(100);
gpio_set_level(GPIO_PCH_SYS_PWROK, 1);
gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 1);
} else {
/*
@@ -129,6 +136,7 @@ enum x86_state x86_chipset_init(void)
gpio_set_level(GPIO_PP5000_EN, 0);
gpio_set_level(GPIO_PCH_RSMRST_L, 0);
gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0);
wireless_enable(0);
}
}
@@ -276,6 +284,7 @@ enum x86_state x86_handle_state(enum x86_state state)
/* Set SYS and CORE PWROK */
gpio_set_level(GPIO_PCH_SYS_PWROK, 1);
gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 1);
gpio_set_level(GPIO_PCH_CORE_PWROK, 1);
return X86_S0;
@@ -285,6 +294,7 @@ enum x86_state x86_handle_state(enum x86_state state)
/* Clear SYS and CORE PWROK */
gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
gpio_set_level(GPIO_PCH_SYS_PWROK_NEW, 0);
gpio_set_level(GPIO_PCH_CORE_PWROK, 0);
/* Wait 40ns */