mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-09 00:51:29 +00:00
BD9995X: Rename common code of BD99955 and BD99956 as BD9995X
Except the CHIP_ID and charger name code is common between BD99955
and BD99956. Hence renamed the code to BD9995X so that valid
output is printed from console commands.
BUG=chrome-os-partner:57519
BRANCH=none
TEST=Manually tested on Reef. 'charger' console command prints
charger name as 'bd99956'
Change-Id: I3c995757941bcc5a6a8026dd807d76a7a47c9911
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/387119
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
committed by
chrome-bot
parent
d94fd4faf5
commit
420b423096
@@ -19,7 +19,7 @@
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#include "driver/accel_kx022.h"
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#include "driver/accelgyro_bmi160.h"
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#include "driver/baro_bmp280.h"
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#include "driver/charger/bd99955.h"
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#include "driver/charger/bd9995x.h"
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#include "driver/tcpm/anx74xx.h"
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#include "driver/tcpm/tcpci.h"
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#include "driver/tcpm/ps8751.h"
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@@ -119,7 +119,7 @@ const struct adc_t adc_channels[] = {
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[ADC_VBUS] = {"VBUS", NPCX_ADC_CH1, 28160, ADC_READ_MAX+1, 0},
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/* Adapter current output or battery discharging current */
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[ADC_AMON_BMON] = {"AMON_BMON", NPCX_ADC_CH4,
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(5 << BD99955_IOUT_GAIN_SELECT) * 10000,
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(5 << BD9995X_IOUT_GAIN_SELECT) * 10000,
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ADC_READ_MAX+1, 0},
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/* System current consumption */
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[ADC_PSYS] = {"PSYS", NPCX_ADC_CH3, ADC_MAX_VOLT * 10,
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@@ -269,19 +269,19 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
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int pd_snk_is_vbus_provided(int port)
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{
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enum bd99955_charge_port bd99955_port;
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enum bd9995x_charge_port bd9995x_port;
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switch (port) {
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case 0:
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case 1:
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bd99955_port = bd99955_pd_port_to_chg_port(port);
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bd9995x_port = bd9995x_pd_port_to_chg_port(port);
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break;
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default:
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panic("Invalid charge port\n");
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break;
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}
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return bd99955_is_vbus_provided(bd99955_port);
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return bd9995x_is_vbus_provided(bd9995x_port);
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}
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/**
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@@ -294,7 +294,7 @@ int pd_snk_is_vbus_provided(int port)
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*/
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int board_set_active_charge_port(int charge_port)
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{
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enum bd99955_charge_port bd99955_port;
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enum bd9995x_charge_port bd9995x_port;
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static int initialized;
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/* charge port is a realy physical port */
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@@ -325,10 +325,10 @@ int board_set_active_charge_port(int charge_port)
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switch (charge_port) {
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case 0:
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case 1:
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bd99955_port = bd99955_pd_port_to_chg_port(charge_port);
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bd9995x_port = bd9995x_pd_port_to_chg_port(charge_port);
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break;
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case CHARGE_PORT_NONE:
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bd99955_port = BD99955_CHARGE_PORT_NONE;
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bd9995x_port = BD9995X_CHARGE_PORT_NONE;
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break;
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default:
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panic("Invalid charge port\n");
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@@ -337,7 +337,7 @@ int board_set_active_charge_port(int charge_port)
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initialized = 1;
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return bd99955_select_input_port(bd99955_port);
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return bd9995x_select_input_port(bd9995x_port);
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}
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/**
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@@ -355,7 +355,7 @@ void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma)
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supplier == CHARGE_SUPPLIER_BC12_SDP ||
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supplier == CHARGE_SUPPLIER_OTHER);
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if (bd99955_bc12_enable_charging(port, bc12_enable))
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if (bd9995x_bc12_enable_charging(port, bc12_enable))
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return;
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charge_set_input_current_limit(MAX(charge_ma,
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@@ -383,7 +383,7 @@ int board_is_ramp_allowed(int supplier)
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*/
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int board_get_ramp_current_limit(int supplier, int sup_curr)
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{
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return bd99955_get_bc12_ilim(supplier);
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return bd9995x_get_bc12_ilim(supplier);
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}
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/**
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@@ -401,7 +401,7 @@ int board_is_consuming_full_charge(void)
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*/
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int board_is_vbus_too_low(enum chg_ramp_vbus_state ramp_state)
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{
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return charger_get_vbus_level() < BD99955_BC12_MIN_VOLTAGE;
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return charger_get_vbus_level() < BD9995X_BC12_MIN_VOLTAGE;
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}
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/* Enable or disable input devices, based upon chipset state and tablet mode */
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@@ -682,7 +682,7 @@ void board_hibernate(void)
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CPRINTS("Enter Pseudo G3");
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/* Enable both the VBUS & VCC ports before entering PG3 */
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bd99955_select_input_port(BD99955_CHARGE_PORT_BOTH);
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bd9995x_select_input_port(BD9995X_CHARGE_PORT_BOTH);
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/*
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* Clean up the UART buffer and prevent any unwanted garbage characters
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@@ -46,12 +46,12 @@
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#define CONFIG_CMD_CHARGER_ADC_AMON_BMON
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#define CONFIG_CHARGER_SENSE_RESISTOR 10
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#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
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#define BD99955_IOUT_GAIN_SELECT \
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BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V
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#define BD9995X_IOUT_GAIN_SELECT \
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BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V
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#define CONFIG_CMD_CHARGER_PSYS
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#define BD99955_PSYS_GAIN_SELECT \
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BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW
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#define BD9995X_PSYS_GAIN_SELECT \
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BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW
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#define CONFIG_CHIPSET_APOLLOLAKE
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#define CONFIG_CMD_ACCELS
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@@ -28,7 +28,7 @@ GPIO_INT(RSMRST_L_PGOOD, PIN(9, 3), GPIO_INT_BOTH, power_
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GPIO_INT(USB_C0_PD_INT, PIN(8, 5), GPIO_INT_RISING, tcpc_alert_event) /* A43 - RXD for USB_C0_PHY_INT */
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GPIO_INT(USB_C1_PD_INT_L, PIN(9, 4), GPIO_INT_FALLING, tcpc_alert_event) /* B49 - GPIO94 for USB_C1_PHY_INT_N */
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GPIO_INT(CHARGER_INT_L, PIN(0, 2), GPIO_INT_FALLING | GPIO_PULL_UP, bd99955_vbus_interrupt) /* A01 - GPIO02 for CHRGR_INT_N */
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GPIO_INT(CHARGER_INT_L, PIN(0, 2), GPIO_INT_FALLING | GPIO_PULL_UP, bd9995x_vbus_interrupt) /* A01 - GPIO02 for CHRGR_INT_N */
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GPIO(NC_USB_C0_VBUS_WAKE_L, PIN(A, 7), GPIO_INPUT | GPIO_PULL_UP) /* B56 - PS2_DAT3/TB2/F_DIO3 for USB_C0_VBUS_DET_N */
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GPIO(NC_USB_C1_VBUS_WAKE_L, PIN(6, 1), GPIO_INPUT | GPIO_PULL_UP) /* B32 - GPIO61 for USB_C1_VBUS_DET_N */
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@@ -7,7 +7,7 @@
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#include "charge_manager.h"
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#include "common.h"
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#include "console.h"
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#include "driver/charger/bd99955.h"
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#include "driver/charger/bd9995x.h"
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#include "driver/tcpm/anx74xx.h"
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#include "driver/tcpm/ps8751.h"
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#include "gpio.h"
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@@ -55,7 +55,7 @@ int pd_set_power_supply_ready(int port)
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{
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/* Ensure we're not charging from this port */
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if (charge_manager_get_active_charge_port() == port)
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bd99955_select_input_port(BD99955_CHARGE_PORT_NONE);
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bd9995x_select_input_port(BD9995X_CHARGE_PORT_NONE);
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/* Provide VBUS */
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gpio_set_level(port ? GPIO_USB_C1_5V_EN :
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@@ -18,7 +18,7 @@
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#include "driver/accel_kionix.h"
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#include "driver/accel_kx022.h"
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#include "driver/accelgyro_bmi160.h"
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#include "driver/charger/bd99955.h"
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#include "driver/charger/bd9995x.h"
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#include "driver/tcpm/fusb302.h"
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#include "extpower.h"
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#include "gpio.h"
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@@ -198,7 +198,7 @@ uint16_t tcpc_get_alert_status(void)
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int board_set_active_charge_port(int charge_port)
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{
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enum bd99955_charge_port bd99955_port;
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enum bd9995x_charge_port bd9995x_port;
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static int initialized;
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/*
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@@ -222,10 +222,10 @@ int board_set_active_charge_port(int charge_port)
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GPIO_USB_C0_5V_EN : GPIO_USB_C1_5V_EN))
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return -1;
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bd99955_port = bd99955_pd_port_to_chg_port(charge_port);
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bd9995x_port = bd9995x_pd_port_to_chg_port(charge_port);
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break;
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case CHARGE_PORT_NONE:
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bd99955_port = BD99955_CHARGE_PORT_NONE;
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bd9995x_port = BD9995X_CHARGE_PORT_NONE;
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break;
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default:
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panic("Invalid charge port\n");
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@@ -233,7 +233,7 @@ int board_set_active_charge_port(int charge_port)
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}
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initialized = 1;
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return bd99955_select_input_port(bd99955_port);
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return bd9995x_select_input_port(bd9995x_port);
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}
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void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma)
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@@ -266,28 +266,28 @@ int extpower_is_present(void)
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if (p0_src && p1_src)
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return 0;
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else if (!p0_src && !p1_src)
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port = BD99955_CHARGE_PORT_BOTH;
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port = BD9995X_CHARGE_PORT_BOTH;
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else
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port = bd99955_pd_port_to_chg_port(p0_src);
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port = bd9995x_pd_port_to_chg_port(p0_src);
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return bd99955_is_vbus_provided(port);
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return bd9995x_is_vbus_provided(port);
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}
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int pd_snk_is_vbus_provided(int port)
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{
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enum bd99955_charge_port bd99955_port;
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enum bd9995x_charge_port bd9995x_port;
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switch (port) {
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case 0:
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case 1:
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bd99955_port = bd99955_pd_port_to_chg_port(port);
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bd9995x_port = bd9995x_pd_port_to_chg_port(port);
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break;
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default:
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panic("Invalid charge port\n");
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break;
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}
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return bd99955_is_vbus_provided(bd99955_port);
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return bd9995x_is_vbus_provided(bd9995x_port);
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}
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static void board_spi_enable(void)
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@@ -58,8 +58,8 @@
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#define CONFIG_VBOOT_HASH
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_BD99955
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#define CONFIG_BD99955_POWER_SAVE_MODE BD99955_PWR_SAVE_HIGH
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#define CONFIG_CHARGER_BD99956
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#define CONFIG_BD9995X_POWER_SAVE_MODE BD9995X_PWR_SAVE_HIGH
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#define CONFIG_CHARGER_INPUT_CURRENT 512
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#define CONFIG_CHARGER_NARROW_VDC
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#define CONFIG_CHARGER_V2
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@@ -143,8 +143,8 @@
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#define CONFIG_CMD_CHARGER_PSYS
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/* Set PSYS gain for 50W max measurement */
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#define BD99955_PSYS_GAIN_SELECT \
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BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_08UAW
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#define BD9995X_PSYS_GAIN_SELECT \
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BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_08UAW
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#define CONFIG_UART_HOST 0
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@@ -41,7 +41,7 @@ GPIO_INT(WARM_RESET_REQ, PIN(7, 3), GPIO_INT_RISING | GPIO_PULL_DOWN,
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GPIO_INT(AP_OVERTEMP, PIN(7, 4), GPIO_INT_RISING | GPIO_PULL_DOWN,
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overtemp_interrupt)
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GPIO_INT(CHARGER_INT_L, PIN(3, 3), GPIO_INT_FALLING | GPIO_PULL_UP,
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bd99955_vbus_interrupt)
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bd9995x_vbus_interrupt)
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GPIO_INT(BASE_SIXAXIS_INT_L,PIN(4, 0), GPIO_INT_FALLING | GPIO_SEL_1P8V,
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bmi160_interrupt)
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@@ -7,7 +7,7 @@
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#include "charge_manager.h"
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#include "common.h"
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#include "console.h"
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#include "driver/charger/bd99955.h"
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#include "driver/charger/bd9995x.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "host_command.h"
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@@ -56,7 +56,7 @@ int pd_set_power_supply_ready(int port)
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{
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/* Ensure we're not charging from this port */
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if (charge_manager_get_active_charge_port() == port)
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bd99955_select_input_port(BD99955_CHARGE_PORT_NONE);
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bd9995x_select_input_port(BD9995X_CHARGE_PORT_NONE);
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/* Ensure we advertise the proper available current quota */
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charge_manager_source_port(port, 1);
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@@ -20,7 +20,7 @@
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#include "driver/accel_kx022.h"
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#include "driver/accelgyro_bmi160.h"
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#include "driver/baro_bmp280.h"
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#include "driver/charger/bd99955.h"
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#include "driver/charger/bd9995x.h"
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#include "driver/tcpm/anx74xx.h"
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#include "driver/tcpm/ps8751.h"
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#include "driver/tcpm/tcpci.h"
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@@ -456,19 +456,19 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_FIRST);
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int pd_snk_is_vbus_provided(int port)
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{
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enum bd99955_charge_port bd99955_port;
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enum bd9995x_charge_port bd9995x_port;
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switch (port) {
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case 0:
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case 1:
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bd99955_port = bd99955_pd_port_to_chg_port(port);
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bd9995x_port = bd9995x_pd_port_to_chg_port(port);
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break;
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default:
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panic("Invalid charge port\n");
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break;
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}
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return bd99955_is_vbus_provided(bd99955_port);
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return bd9995x_is_vbus_provided(bd9995x_port);
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}
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/**
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@@ -481,7 +481,7 @@ int pd_snk_is_vbus_provided(int port)
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*/
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int board_set_active_charge_port(int charge_port)
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{
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enum bd99955_charge_port bd99955_port;
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enum bd9995x_charge_port bd9995x_port;
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static int initialized;
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/* charge port is a physical port */
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@@ -513,10 +513,10 @@ int board_set_active_charge_port(int charge_port)
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switch (charge_port) {
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case 0:
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case 1:
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bd99955_port = bd99955_pd_port_to_chg_port(charge_port);
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bd9995x_port = bd9995x_pd_port_to_chg_port(charge_port);
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break;
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case CHARGE_PORT_NONE:
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bd99955_port = BD99955_CHARGE_PORT_NONE;
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bd9995x_port = BD9995X_CHARGE_PORT_NONE;
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break;
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default:
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panic("Invalid charge port\n");
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@@ -525,7 +525,7 @@ int board_set_active_charge_port(int charge_port)
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initialized = 1;
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return bd99955_select_input_port(bd99955_port);
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return bd9995x_select_input_port(bd9995x_port);
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}
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/**
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@@ -543,7 +543,7 @@ void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma)
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supplier == CHARGE_SUPPLIER_BC12_SDP ||
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supplier == CHARGE_SUPPLIER_OTHER);
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if (bd99955_bc12_enable_charging(port, bc12_enable))
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if (bd9995x_bc12_enable_charging(port, bc12_enable))
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return;
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charge_set_input_current_limit(MAX(charge_ma,
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@@ -571,7 +571,7 @@ int board_is_ramp_allowed(int supplier)
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*/
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int board_get_ramp_current_limit(int supplier, int sup_curr)
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{
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return bd99955_get_bc12_ilim(supplier);
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return bd9995x_get_bc12_ilim(supplier);
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}
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/**
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@@ -589,7 +589,7 @@ int board_is_consuming_full_charge(void)
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*/
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int board_is_vbus_too_low(enum chg_ramp_vbus_state ramp_state)
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{
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return charger_get_vbus_level() < BD99955_BC12_MIN_VOLTAGE;
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return charger_get_vbus_level() < BD9995X_BC12_MIN_VOLTAGE;
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}
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/* Enable or disable input devices, based upon chipset state and tablet mode */
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@@ -940,7 +940,7 @@ void board_hibernate(void)
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msleep(100);
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/* Enable both the VBUS & VCC ports before entering PG3 */
|
||||
bd99955_select_input_port(BD99955_CHARGE_PORT_BOTH);
|
||||
bd9995x_select_input_port(BD9995X_CHARGE_PORT_BOTH);
|
||||
}
|
||||
|
||||
struct {
|
||||
|
||||
@@ -31,12 +31,12 @@
|
||||
#define CONFIG_CMD_CHARGER_ADC_AMON_BMON
|
||||
#define CONFIG_CHARGER_SENSE_RESISTOR 10
|
||||
#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10
|
||||
#define BD99955_IOUT_GAIN_SELECT \
|
||||
BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V
|
||||
#define BD9995X_IOUT_GAIN_SELECT \
|
||||
BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V
|
||||
|
||||
#define CONFIG_CMD_CHARGER_PSYS
|
||||
#define BD99955_PSYS_GAIN_SELECT \
|
||||
BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW
|
||||
#define BD9995X_PSYS_GAIN_SELECT \
|
||||
BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW
|
||||
|
||||
/* Battery */
|
||||
#define CONFIG_BATTERY_CUT_OFF
|
||||
@@ -49,7 +49,7 @@
|
||||
#define CONFIG_CHARGE_RAMP
|
||||
#define CONFIG_CHARGER
|
||||
#define CONFIG_CHARGER_V2
|
||||
#define CONFIG_CHARGER_BD99955
|
||||
#define CONFIG_CHARGER_BD99956
|
||||
#define CONFIG_CHARGER_DISCHARGE_ON_AC
|
||||
#define CONFIG_CHARGER_INPUT_CURRENT 512
|
||||
#define CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT 1
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
/* Declare symbolic names for all the GPIOs that we care about.
|
||||
* Note: Those with interrupt handlers must be declared first. */
|
||||
|
||||
GPIO_INT(CHARGER_INT_L, PIN(3, 3), GPIO_INT_FALLING, bd99955_vbus_interrupt) /* CHARGER_EC_INT_ODL from BD99955 */
|
||||
GPIO_INT(CHARGER_INT_L, PIN(3, 3), GPIO_INT_FALLING, bd9995x_vbus_interrupt) /* CHARGER_EC_INT_ODL from BD99956 */
|
||||
/*
|
||||
* TODO: The pull ups for Parade TCPC interrupt line can be removed in versions
|
||||
* of board following EVT in which daughter card (which has an external pull up)
|
||||
@@ -29,7 +29,7 @@ GPIO_INT(SUSPWRNACK, PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt)
|
||||
GPIO_INT(RSMRST_L_PGOOD, PIN(6, 0), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_RSMRST_ODL */
|
||||
GPIO_INT(ALL_SYS_PGOOD, PIN(5, 0), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_PWROK_OD */
|
||||
|
||||
GPIO_INT(AC_PRESENT, PIN(C, 1), GPIO_INT_BOTH, extpower_interrupt) /* ACOK_OD from BD99955 */
|
||||
GPIO_INT(AC_PRESENT, PIN(C, 1), GPIO_INT_BOTH, extpower_interrupt) /* ACOK_OD from BD99956 */
|
||||
/* TODO: We might remove external pull-up for POWER_BUTTON_L in EVT */
|
||||
GPIO_INT(POWER_BUTTON_L, PIN(0, 4), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */
|
||||
#if IS_PROTO == 1
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
#include "charge_manager.h"
|
||||
#include "common.h"
|
||||
#include "console.h"
|
||||
#include "driver/charger/bd99955.h"
|
||||
#include "driver/charger/bd9995x.h"
|
||||
#include "driver/tcpm/anx74xx.h"
|
||||
#include "driver/tcpm/ps8751.h"
|
||||
#include "gpio.h"
|
||||
@@ -55,7 +55,7 @@ int pd_set_power_supply_ready(int port)
|
||||
{
|
||||
/* Ensure we're not charging from this port */
|
||||
if (charge_manager_get_active_charge_port() == port)
|
||||
bd99955_select_input_port(BD99955_CHARGE_PORT_NONE);
|
||||
bd9995x_select_input_port(BD9995X_CHARGE_PORT_NONE);
|
||||
|
||||
/* Provide VBUS */
|
||||
gpio_set_level(port ? GPIO_USB_C1_5V_EN :
|
||||
|
||||
@@ -415,7 +415,7 @@ static int charge_request(int voltage, int current)
|
||||
* Set the charge inhibit bit when possible as it appears to save
|
||||
* power in some cases (e.g. Nyan with BQ24735).
|
||||
*/
|
||||
#ifdef CONFIG_CHARGER_BD99955
|
||||
#if defined(CONFIG_CHARGER_BD99955) || defined(CONFIG_CHARGER_BD99956)
|
||||
/* Charger auto exits from battery learn mode if charge inhibited */
|
||||
if (current > 0 || chg_ctl_mode == CHARGE_CONTROL_DISCHARGE)
|
||||
#else
|
||||
|
||||
@@ -33,7 +33,8 @@ driver-$(CONFIG_BATTERY_BQ27621)+=battery/bq27621_g1.o
|
||||
driver-$(CONFIG_BATTERY_SMART)+=battery/smart.o
|
||||
|
||||
# Battery charger ICs
|
||||
driver-$(CONFIG_CHARGER_BD99955)+=charger/bd99955.o
|
||||
driver-$(CONFIG_CHARGER_BD99955)+=charger/bd9995x.o
|
||||
driver-$(CONFIG_CHARGER_BD99956)+=charger/bd9995x.o
|
||||
driver-$(CONFIG_CHARGER_BQ24192)+=charger/bq24192.o
|
||||
driver-$(CONFIG_CHARGER_BQ24707A)+=charger/bq24707a.o
|
||||
driver-$(CONFIG_CHARGER_BQ24715)+=charger/bq24715.o
|
||||
|
||||
@@ -1,354 +0,0 @@
|
||||
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*
|
||||
* ROHM BD99955 battery charger driver.
|
||||
*/
|
||||
|
||||
#ifndef __CROS_EC_BD99955_H
|
||||
#define __CROS_EC_BD99955_H
|
||||
|
||||
#define BD99955_ADDR 0x12 /* 7bit address 0001_001 */
|
||||
#define I2C_ADDR_CHARGER BD99955_ADDR
|
||||
|
||||
/* BD99955 commands to change the command code map */
|
||||
enum bd99955_command {
|
||||
BD99955_BAT_CHG_COMMAND,
|
||||
BD99955_EXTENDED_COMMAND,
|
||||
BD99955_DEBUG_COMMAND,
|
||||
BD99955_INVALID_COMMAND
|
||||
};
|
||||
|
||||
enum bd99955_charge_port {
|
||||
BD99955_CHARGE_PORT_VBUS,
|
||||
BD99955_CHARGE_PORT_VCC,
|
||||
BD99955_CHARGE_PORT_BOTH,
|
||||
BD99955_CHARGE_PORT_NONE,
|
||||
};
|
||||
|
||||
/* Charger parameters */
|
||||
#define CHARGER_NAME "bd99955"
|
||||
#define CHARGE_V_MAX 19200
|
||||
#define CHARGE_V_MIN 3072
|
||||
#define CHARGE_V_STEP 16
|
||||
#define CHARGE_I_MAX 16320
|
||||
#define CHARGE_I_MIN 128
|
||||
#define CHARGE_I_OFF 0
|
||||
#define CHARGE_I_STEP 64
|
||||
#define INPUT_I_MAX 16352
|
||||
#define INPUT_I_MIN 512
|
||||
#define INPUT_I_STEP 32
|
||||
|
||||
/* Min. charge current w/ no battery to prevent collapse */
|
||||
#define BD99955_NO_BATTERY_CHARGE_I_MIN 512
|
||||
|
||||
/* VSYSREG settings */
|
||||
#define BD99955_DISCHARGE_VSYSREG 8960
|
||||
#define BD99955_CHARGE_VSYSREG 6144
|
||||
|
||||
/*
|
||||
* BC1.2 minimum voltage threshold.
|
||||
* BC1.2 charging port output voltage range is 4.75V to 5.25V,
|
||||
* BD99955 Anti-Collapse Threshold Voltage Accuracy is -100mV to +100mV,
|
||||
* and Delta of 50mV.
|
||||
*/
|
||||
#define BD99955_BC12_MIN_VOLTAGE 4600
|
||||
|
||||
/* Battery Charger Commands */
|
||||
#define BD99955_CMD_CHG_CURRENT 0x14
|
||||
#define BD99955_CMD_CHG_VOLTAGE 0x15
|
||||
#define BD99955_CMD_IBUS_LIM_SET 0x3C
|
||||
#define BD99955_CMD_ICC_LIM_SET 0x3D
|
||||
#define BD99955_CMD_PROTECT_SET 0x3E
|
||||
#define BD99955_CMD_MAP_SET 0x3F
|
||||
|
||||
/* Extended commands */
|
||||
#define BD99955_CMD_CHGSTM_STATUS 0x00
|
||||
#define BD99955_CMD_VBAT_VSYS_STATUS 0x01
|
||||
#define BD99955_CMD_VBUS_VCC_STATUS 0x02
|
||||
#define BD99955_CMD_VBUS_VCC_STATUS_VCC_DETECT (1 << 8)
|
||||
#define BD99955_CMD_VBUS_VCC_STATUS_VBUS_DETECT (1 << 0)
|
||||
|
||||
#define BD99955_CMD_CHGOP_STATUS 0x03
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP2 (1 << 10)
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP1 (1 << 9)
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP0 (1 << 8)
|
||||
#define BD99955_BATTTEMP_MASK 0x700
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_ROOMTEMP 0
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_HOT1 1
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_HOT2 2
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_HOT3 3
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_COLD1 4
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_COLD2 5
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_DISABLE 6
|
||||
#define BD99955_CMD_CHGOP_STATUS_BATTEMP_BATOPEN 7
|
||||
#define BD99955_CMD_CHGOP_STATUS_RBOOST_UV (1 << 1)
|
||||
|
||||
#define BD99955_CMD_WDT_STATUS 0x04
|
||||
#define BD99955_CMD_CUR_ILIM_VAL 0x05
|
||||
#define BD99955_CMD_SEL_ILIM_VAL 0x06
|
||||
#define BD99955_CMD_EXT_IBUS_LIM_SET 0x07
|
||||
#define BD99955_CMD_EXT_ICC_LIM_SET 0x08
|
||||
#define BD99955_CMD_IOTG_LIM_SET 0x09
|
||||
#define BD99955_CMD_VIN_CTRL_SET 0x0A
|
||||
#define BD99955_CMD_VIN_CTRL_SET_PP_BOTH_THRU (1 << 11)
|
||||
#define BD99955_CMD_VIN_CTRL_SET_VBUS_PRIORITY (1 << 7)
|
||||
#define BD99955_CMD_VIN_CTRL_SET_VBUS_EN (1 << 6)
|
||||
#define BD99955_CMD_VIN_CTRL_SET_VCC_EN (1 << 5)
|
||||
|
||||
#define BD99955_CMD_CHGOP_SET1 0x0B
|
||||
#define BD99955_CMD_CHGOP_SET1_ILIM_AUTO_DISEN (1 << 13)
|
||||
#define BD99955_CMD_CHGOP_SET1_VCC_BC_DISEN (1 << 11)
|
||||
#define BD99955_CMD_CHGOP_SET1_VBUS_BC_DISEN (1 << 10)
|
||||
#define BD99955_CMD_CHGOP_SET1_SDP_CHG_TRIG_EN (1 << 9)
|
||||
#define BD99955_CMD_CHGOP_SET1_SDP_CHG_TRIG (1 << 8)
|
||||
|
||||
#define BD99955_CMD_CHGOP_SET2 0x0C
|
||||
#define BD99955_CMD_CHGOP_SET2_BATT_LEARN (1 << 8)
|
||||
#define BD99955_CMD_CHGOP_SET2_CHG_EN (1 << 7)
|
||||
#define BD99955_CMD_CHGOP_SET2_USB_SUS (1 << 6)
|
||||
#define BD99955_CMD_CHGOP_SET2_DCDC_CLK_SEL (3 << 2)
|
||||
#define BD99955_CMD_CHGOP_SET2_DCDC_CLK_SEL_600 (0 << 2)
|
||||
#define BD99955_CMD_CHGOP_SET2_DCDC_CLK_SEL_857 (1 << 2)
|
||||
#define BD99955_CMD_CHGOP_SET2_DCDC_CLK_SEL_1000 (2 << 2)
|
||||
#define BD99955_CMD_CHGOP_SET2_DCDC_CLK_SEL_1200 (3 << 2)
|
||||
|
||||
#define BD99955_CMD_VBUSCLPS_TH_SET 0x0D
|
||||
#define BD99955_CMD_VCCCLPS_TH_SET 0x0E
|
||||
#define BD99955_CMD_CHGWDT_SET 0x0F
|
||||
#define BD99955_CMD_BATTWDT_SET 0x10
|
||||
#define BD99955_CMD_VSYSREG_SET 0x11
|
||||
#define BD99955_CMD_VSYSVAL_THH_SET 0x12
|
||||
#define BD99955_CMD_VSYSVAL_THL_SET 0x13
|
||||
#define BD99955_CMD_ITRICH_SET 0x14
|
||||
|
||||
#define BD99955_CMD_IPRECH_SET 0x15
|
||||
#define BD99955_IPRECH_MAX 1024
|
||||
|
||||
#define BD99955_CMD_ICHG_SET 0x16
|
||||
#define BD99955_CMD_ITERM_SET 0x17
|
||||
#define BD99955_CMD_VPRECHG_TH_SET 0x18
|
||||
#define BD99955_CMD_VRBOOST_SET 0x19
|
||||
#define BD99955_CMD_VFASTCHG_REG_SET1 0x1A
|
||||
#define BD99955_CMD_VFASTCHG_REG_SET2 0x1B
|
||||
#define BD99955_CMD_VFASTCHG_REG_SET3 0x1C
|
||||
#define BD99955_CMD_VRECHG_SET 0x1D
|
||||
#define BD99955_CMD_VBATOVP_SET 0x1E
|
||||
#define BD99955_CMD_IBATSHORT_SET 0x1F
|
||||
#define BD99955_CMD_PROCHOT_CTRL_SET 0x20
|
||||
#define BD99955_CMD_PROCHOT_CTRL_SET_PROCHOT_EN4 (1 << 4)
|
||||
#define BD99955_CMD_PROCHOT_CTRL_SET_PROCHOT_EN3 (1 << 3)
|
||||
#define BD99955_CMD_PROCHOT_CTRL_SET_PROCHOT_EN2 (1 << 2)
|
||||
#define BD99955_CMD_PROCHOT_CTRL_SET_PROCHOT_EN1 (1 << 1)
|
||||
#define BD99955_CMD_PROCHOT_CTRL_SET_PROCHOT_EN0 (1 << 0)
|
||||
|
||||
#define BD99955_CMD_PROCHOT_ICRIT_SET 0x21
|
||||
#define BD99955_CMD_PROCHOT_INORM_SET 0x22
|
||||
#define BD99955_CMD_PROCHOT_IDCHG_SET 0x23
|
||||
#define BD99955_CMD_PROCHOT_VSYS_SET 0x24
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET 0x25
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IMON_INSEL (1 << 9)
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_INSEL (1 << 8)
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_OUT_EN (1 << 7)
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_SOURCE_SEL (1 << 6)
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_MASK 0x30
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_40V 0x03
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V 0x02
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_10V 0x01
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_05V 0x00
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_OUT_EN (1 << 3)
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_MASK 0x07
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_64UAW 0x06
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_32UAW 0x05
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_16UAW 0x04
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_08UAW 0x03
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_04UAW 0x02
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW 0x01
|
||||
#define BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_01UAW 0x00
|
||||
#define BD99955_PMON_IOUT_ADC_READ_COUNT 100
|
||||
|
||||
#define BD99955_CMD_PMON_DACIN_VAL 0x26
|
||||
#define BD99955_CMD_IOUT_DACIN_VAL 0x27
|
||||
#define BD99955_CMD_VCC_UCD_SET 0x28
|
||||
/* Bits for both VCC_UCD_SET and VBUS_UCD_SET regs */
|
||||
#define BD99955_CMD_UCD_SET_BCSRETRY (1 << 12)
|
||||
#define BD99955_CMD_UCD_SET_USBDETEN (1 << 7)
|
||||
#define BD99955_CMD_UCD_SET_USB_SW_EN (1 << 1)
|
||||
|
||||
#define BD99955_CMD_VCC_UCD_STATUS 0x29
|
||||
/* Bits for both VCC_UCD_STATUS and VBUS_UCD_STATUS regs */
|
||||
#define BD99955_CMD_UCD_STATUS_DCDFAIL (1 << 15)
|
||||
#define BD99955_CMD_UCD_STATUS_CHGPORT1 (1 << 13)
|
||||
#define BD99955_CMD_UCD_STATUS_CHGPORT0 (1 << 12)
|
||||
#define BD99955_CMD_UCD_STATUS_PUPDET (1 << 11)
|
||||
#define BD99955_CMD_UCD_STATUS_CHGDET (1 << 6)
|
||||
#define BD99955_TYPE_MASK (BD99955_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD99955_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD99955_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD99955_CMD_UCD_STATUS_PUPDET | \
|
||||
BD99955_CMD_UCD_STATUS_CHGDET)
|
||||
|
||||
/* BC1.2 chargers */
|
||||
#define BD99955_TYPE_CDP (BD99955_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD99955_CMD_UCD_STATUS_CHGDET)
|
||||
#define BD99955_TYPE_DCP (BD99955_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD99955_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD99955_CMD_UCD_STATUS_CHGDET)
|
||||
#define BD99955_TYPE_SDP (BD99955_CMD_UCD_STATUS_CHGPORT0)
|
||||
/* non-standard BC1.2 chargers */
|
||||
#define BD99955_TYPE_OTHER (BD99955_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD99955_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD99955_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD99955_CMD_UCD_STATUS_CHGDET)
|
||||
#define BD99955_TYPE_PUP_PORT (BD99955_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD99955_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD99955_CMD_UCD_STATUS_PUPDET)
|
||||
/* Open ports */
|
||||
#define BD99955_TYPE_OPEN_PORT (BD99955_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD99955_CMD_UCD_STATUS_CHGPORT0)
|
||||
#define BD99955_TYPE_VBUS_OPEN 0
|
||||
|
||||
#define BD99955_CMD_VCC_IDD_STATUS 0x2A
|
||||
#define BD99955_CMD_VCC_UCD_FCTRL_SET 0x2B
|
||||
#define BD99955_CMD_VCC_UCD_FCTRL_EN 0x2C
|
||||
#define BD99955_CMD_VBUS_UCD_SET 0x30
|
||||
#define BD99955_CMD_VBUS_UCD_STATUS 0x31
|
||||
#define BD99955_CMD_VBUS_IDD_STATUS 0x32
|
||||
#define BD99955_CMD_VBUS_UCD_FCTRL_SET 0x33
|
||||
#define BD99955_CMD_VBUS_UCD_FCTRL_EN 0x34
|
||||
#define BD99955_CMD_CHIP_ID 0x38
|
||||
#define BD99955_CMD_CHIP_REV 0x39
|
||||
#define BD99955_CMD_IC_SET1 0x3A
|
||||
#define BD99955_CMD_IC_SET2 0x3B
|
||||
#define BD99955_CMD_SYSTEM_STATUS 0x3C
|
||||
#define BD99955_CMD_SYSTEM_STATUS_OTPLD_STATE (1 << 1)
|
||||
#define BD99955_CMD_SYSTEM_STATUS_ALLRST_STATE (1 << 0)
|
||||
|
||||
#define BD99955_CMD_SYSTEM_CTRL_SET 0x3D
|
||||
#define BD99955_CMD_SYSTEM_CTRL_SET_OTPLD (1 << 1)
|
||||
#define BD99955_CMD_SYSTEM_CTRL_SET_ALLRST (1 << 0)
|
||||
|
||||
#define BD99955_CMD_EXT_PROTECT_SET 0x3E
|
||||
#define BD99955_CMD_EXT_MAP_SET 0x3F
|
||||
#define BD99955_CMD_VM_CTRL_SET 0x40
|
||||
#define BD99955_CMD_VM_CTRL_SET_EXTIADPEN (1 << 9)
|
||||
#define BD99955_CMD_THERM_WINDOW_SET1 0x41
|
||||
#define BD99955_CMD_THERM_WINDOW_SET2 0x42
|
||||
#define BD99955_CMD_THERM_WINDOW_SET3 0x43
|
||||
#define BD99955_CMD_THERM_WINDOW_SET4 0x44
|
||||
#define BD99955_CMD_THERM_WINDOW_SET5 0x45
|
||||
#define BD99955_CMD_IBATP_TH_SET 0x46
|
||||
#define BD99955_CMD_IBATM_TH_SET 0x47
|
||||
#define BD99955_CMD_VBAT_TH_SET 0x48
|
||||
#define BD99955_CMD_THERM_TH_SET 0x49
|
||||
#define BD99955_CMD_IACP_TH_SET 0x4A
|
||||
#define BD99955_CMD_VACP_TH_SET 0x4B
|
||||
|
||||
/* Enable discharge when VBUS falls below BD99955_VBUS_DISCHARGE_TH */
|
||||
#define BD99955_VBUS_DISCHARGE_TH 3900
|
||||
#define BD99955_CMD_VBUS_TH_SET 0x4C
|
||||
#define BD99955_CMD_VCC_TH_SET 0x4D
|
||||
|
||||
#define BD99955_CMD_VSYS_TH_SET 0x4E
|
||||
#define BD99955_CMD_EXTIADP_TH_SET 0x4F
|
||||
#define BD99955_CMD_IBATP_VAL 0x50
|
||||
#define BD99955_CMD_IBATP_AVE_VAL 0x51
|
||||
#define BD99955_CMD_IBATM_VAL 0x52
|
||||
#define BD99955_CMD_IBATM_AVE_VAL 0x53
|
||||
#define BD99955_CMD_VBAT_VAL 0x54
|
||||
#define BD99955_CMD_VBAT_AVE_VAL 0x55
|
||||
#define BD99955_CMD_THERM_VAL 0x56
|
||||
#define BD99955_CMD_VTH_VAL 0x57
|
||||
#define BD99955_CMD_IACP_VAL 0x58
|
||||
#define BD99955_CMD_IACP_AVE_VAL 0x59
|
||||
#define BD99955_CMD_VACP_VAL 0x5A
|
||||
#define BD99955_CMD_VACP_AVE_VAL 0x5B
|
||||
#define BD99955_CMD_VBUS_VAL 0x5C
|
||||
#define BD99955_CMD_VBUS_AVE_VAL 0x5D
|
||||
#define BD99955_CMD_VCC_VAL 0x5E
|
||||
#define BD99955_CMD_VCC_AVE_VAL 0x5F
|
||||
#define BD99955_CMD_VSYS_VAL 0x60
|
||||
#define BD99955_CMD_VSYS_AVE_VAL 0x61
|
||||
#define BD99955_CMD_EXTIADP_VAL 0x62
|
||||
#define BD99955_CMD_EXTIADP_AVE_VAL 0x63
|
||||
#define BD99955_CMD_VACPCLPS_TH_SET 0x64
|
||||
#define BD99955_CMD_INT0_SET 0x68
|
||||
#define BD99955_CMD_INT0_SET_INT2_EN (1 << 2)
|
||||
#define BD99955_CMD_INT0_SET_INT1_EN (1 << 1)
|
||||
#define BD99955_CMD_INT0_SET_INT0_EN (1 << 0)
|
||||
|
||||
#define BD99955_CMD_INT1_SET 0x69
|
||||
/* Bits for both INT1 & INT2 reg */
|
||||
#define BD99955_CMD_INT_SET_TH_DET (1 << 9)
|
||||
#define BD99955_CMD_INT_SET_TH_RES (1 << 8)
|
||||
#define BD99955_CMD_INT_SET_DET (1 << 1)
|
||||
#define BD99955_CMD_INT_SET_RES (1 << 0)
|
||||
#define BD99955_CMD_INT_VBUS_DET (BD99955_CMD_INT_SET_RES | \
|
||||
BD99955_CMD_INT_SET_DET)
|
||||
#define BD99955_CMD_INT_VBUS_TH (BD99955_CMD_INT_SET_TH_RES | \
|
||||
BD99955_CMD_INT_SET_TH_DET)
|
||||
|
||||
#define BD99955_CMD_INT2_SET 0x6A
|
||||
#define BD99955_CMD_INT3_SET 0x6B
|
||||
#define BD99955_CMD_INT4_SET 0x6C
|
||||
#define BD99955_CMD_INT5_SET 0x6D
|
||||
#define BD99955_CMD_INT6_SET 0x6E
|
||||
#define BD99955_CMD_INT7_SET 0x6F
|
||||
#define BD99955_CMD_INT0_STATUS 0x70
|
||||
#define BD99955_CMD_INT1_STATUS 0x71
|
||||
/* Bits for both INT1_STATUS & INT2_STATUS reg */
|
||||
#define BD99955_CMD_INT_STATUS_DET (1 << 1)
|
||||
#define BD99955_CMD_INT_STATUS_RES (1 << 0)
|
||||
|
||||
#define BD99955_CMD_INT2_STATUS 0x72
|
||||
#define BD99955_CMD_INT3_STATUS 0x73
|
||||
#define BD99955_CMD_INT4_STATUS 0x74
|
||||
#define BD99955_CMD_INT5_STATUS 0x75
|
||||
#define BD99955_CMD_INT6_STATUS 0x76
|
||||
#define BD99955_CMD_INT7_STATUS 0x77
|
||||
#define BD99955_CMD_REG0 0x78
|
||||
#define BD99955_CMD_REG1 0x79
|
||||
#define BD99955_CMD_OTPREG0 0x7A
|
||||
#define BD99955_CMD_OTPREG1 0x7B
|
||||
#define BD99955_CMD_SMBREG 0x7C
|
||||
/* Normal functionality - power save mode disabled. */
|
||||
#define BD99955_PWR_SAVE_OFF 0
|
||||
/* BGATE ON w/ PROCHOT# monitored only system voltage. */
|
||||
#define BD99955_PWR_SAVE_LOW 0x1
|
||||
/* BGATE ON w/ PROCHOT# monitored only system voltage every 1ms. */
|
||||
#define BD99955_PWR_SAVE_MED 0x2
|
||||
/* BGATE ON w/o PROCHOT# monitoring. */
|
||||
#define BD99955_PWR_SAVE_HIGH 0x5
|
||||
/* BGATE OFF */
|
||||
#define BD99955_PWR_SAVE_MAX 0x6
|
||||
#define BD99955_CMD_DEBUG_MODE_SET 0x7F
|
||||
|
||||
/* Map PD port number to charge port number */
|
||||
static inline enum bd99955_charge_port bd99955_pd_port_to_chg_port(int port)
|
||||
{
|
||||
#ifdef CONFIG_BD99955_PRIMARY_CHARGE_PORT_VCC
|
||||
return port ? BD99955_CHARGE_PORT_VBUS : BD99955_CHARGE_PORT_VCC;
|
||||
#else
|
||||
return port ? BD99955_CHARGE_PORT_VCC : BD99955_CHARGE_PORT_VBUS;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Non-standard interface functions - bd99955 integrates additional
|
||||
* functionality not part of the standard charger interface.
|
||||
*/
|
||||
|
||||
/* Is VBUS provided or external power present */
|
||||
int bd99955_is_vbus_provided(int port);
|
||||
/* Select input port from {VCC, VBUS, VCC&VBUS, NONE}. */
|
||||
int bd99955_select_input_port(enum bd99955_charge_port port);
|
||||
/* Get input current limit for BC1.2 suppliers */
|
||||
int bd99955_get_bc12_ilim(int charge_supplier);
|
||||
/* Enable/Disable charging triggered by BC1.2 */
|
||||
int bd99955_bc12_enable_charging(enum bd99955_charge_port port, int enable);
|
||||
/* Interrupt handler for USB charger VBUS */
|
||||
void bd99955_vbus_interrupt(enum gpio_signal signal);
|
||||
/* Read temperature measurement value (in Celsius) */
|
||||
int bd99955_get_battery_temp(int *temp_ptr);
|
||||
|
||||
#endif /* __CROS_EC_BD99955_H */
|
||||
File diff suppressed because it is too large
Load Diff
362
driver/charger/bd9995x.h
Normal file
362
driver/charger/bd9995x.h
Normal file
@@ -0,0 +1,362 @@
|
||||
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
|
||||
* Use of this source code is governed by a BSD-style license that can be
|
||||
* found in the LICENSE file.
|
||||
*
|
||||
* ROHM BD9995X battery charger driver.
|
||||
*/
|
||||
|
||||
#ifndef __CROS_EC_BD9995X_H
|
||||
#define __CROS_EC_BD9995X_H
|
||||
|
||||
#define BD9995X_ADDR 0x12 /* 7bit address 0001_001 */
|
||||
#define I2C_ADDR_CHARGER BD9995X_ADDR
|
||||
|
||||
#ifdef CONFIG_CHARGER_BD99955
|
||||
#define BD9995X_CHARGER_NAME "bd99955"
|
||||
#define BD9995X_CHIP_ID 0x221
|
||||
#elif defined(CONFIG_CHARGER_BD99956)
|
||||
#define BD9995X_CHARGER_NAME "bd99956"
|
||||
#define BD9995X_CHIP_ID 0x331
|
||||
#endif
|
||||
|
||||
/* BD9995X commands to change the command code map */
|
||||
enum bd9995x_command {
|
||||
BD9995X_BAT_CHG_COMMAND,
|
||||
BD9995X_EXTENDED_COMMAND,
|
||||
BD9995X_DEBUG_COMMAND,
|
||||
BD9995X_INVALID_COMMAND
|
||||
};
|
||||
|
||||
enum bd9995x_charge_port {
|
||||
BD9995X_CHARGE_PORT_VBUS,
|
||||
BD9995X_CHARGE_PORT_VCC,
|
||||
BD9995X_CHARGE_PORT_BOTH,
|
||||
BD9995X_CHARGE_PORT_NONE,
|
||||
};
|
||||
|
||||
/* Charger parameters */
|
||||
#define CHARGER_NAME BD9995X_CHARGER_NAME
|
||||
#define CHARGE_V_MAX 19200
|
||||
#define CHARGE_V_MIN 3072
|
||||
#define CHARGE_V_STEP 16
|
||||
#define CHARGE_I_MAX 16320
|
||||
#define CHARGE_I_MIN 128
|
||||
#define CHARGE_I_OFF 0
|
||||
#define CHARGE_I_STEP 64
|
||||
#define INPUT_I_MAX 16352
|
||||
#define INPUT_I_MIN 512
|
||||
#define INPUT_I_STEP 32
|
||||
|
||||
/* Min. charge current w/ no battery to prevent collapse */
|
||||
#define BD9995X_NO_BATTERY_CHARGE_I_MIN 512
|
||||
|
||||
/* VSYSREG settings */
|
||||
#define BD9995X_DISCHARGE_VSYSREG 8960
|
||||
#define BD9995X_CHARGE_VSYSREG 6144
|
||||
|
||||
/*
|
||||
* BC1.2 minimum voltage threshold.
|
||||
* BC1.2 charging port output voltage range is 4.75V to 5.25V,
|
||||
* BD9995X Anti-Collapse Threshold Voltage Accuracy is -100mV to +100mV,
|
||||
* and Delta of 50mV.
|
||||
*/
|
||||
#define BD9995X_BC12_MIN_VOLTAGE 4600
|
||||
|
||||
/* Battery Charger Commands */
|
||||
#define BD9995X_CMD_CHG_CURRENT 0x14
|
||||
#define BD9995X_CMD_CHG_VOLTAGE 0x15
|
||||
#define BD9995X_CMD_IBUS_LIM_SET 0x3C
|
||||
#define BD9995X_CMD_ICC_LIM_SET 0x3D
|
||||
#define BD9995X_CMD_PROTECT_SET 0x3E
|
||||
#define BD9995X_CMD_MAP_SET 0x3F
|
||||
|
||||
/* Extended commands */
|
||||
#define BD9995X_CMD_CHGSTM_STATUS 0x00
|
||||
#define BD9995X_CMD_VBAT_VSYS_STATUS 0x01
|
||||
#define BD9995X_CMD_VBUS_VCC_STATUS 0x02
|
||||
#define BD9995X_CMD_VBUS_VCC_STATUS_VCC_DETECT (1 << 8)
|
||||
#define BD9995X_CMD_VBUS_VCC_STATUS_VBUS_DETECT (1 << 0)
|
||||
|
||||
#define BD9995X_CMD_CHGOP_STATUS 0x03
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP2 (1 << 10)
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP1 (1 << 9)
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP0 (1 << 8)
|
||||
#define BD9995X_BATTTEMP_MASK 0x700
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_ROOMTEMP 0
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_HOT1 1
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_HOT2 2
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_HOT3 3
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_COLD1 4
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_COLD2 5
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_DISABLE 6
|
||||
#define BD9995X_CMD_CHGOP_STATUS_BATTEMP_BATOPEN 7
|
||||
#define BD9995X_CMD_CHGOP_STATUS_RBOOST_UV (1 << 1)
|
||||
|
||||
#define BD9995X_CMD_WDT_STATUS 0x04
|
||||
#define BD9995X_CMD_CUR_ILIM_VAL 0x05
|
||||
#define BD9995X_CMD_SEL_ILIM_VAL 0x06
|
||||
#define BD9995X_CMD_EXT_IBUS_LIM_SET 0x07
|
||||
#define BD9995X_CMD_EXT_ICC_LIM_SET 0x08
|
||||
#define BD9995X_CMD_IOTG_LIM_SET 0x09
|
||||
#define BD9995X_CMD_VIN_CTRL_SET 0x0A
|
||||
#define BD9995X_CMD_VIN_CTRL_SET_PP_BOTH_THRU (1 << 11)
|
||||
#define BD9995X_CMD_VIN_CTRL_SET_VBUS_PRIORITY (1 << 7)
|
||||
#define BD9995X_CMD_VIN_CTRL_SET_VBUS_EN (1 << 6)
|
||||
#define BD9995X_CMD_VIN_CTRL_SET_VCC_EN (1 << 5)
|
||||
|
||||
#define BD9995X_CMD_CHGOP_SET1 0x0B
|
||||
#define BD9995X_CMD_CHGOP_SET1_ILIM_AUTO_DISEN (1 << 13)
|
||||
#define BD9995X_CMD_CHGOP_SET1_VCC_BC_DISEN (1 << 11)
|
||||
#define BD9995X_CMD_CHGOP_SET1_VBUS_BC_DISEN (1 << 10)
|
||||
#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG_EN (1 << 9)
|
||||
#define BD9995X_CMD_CHGOP_SET1_SDP_CHG_TRIG (1 << 8)
|
||||
|
||||
#define BD9995X_CMD_CHGOP_SET2 0x0C
|
||||
#define BD9995X_CMD_CHGOP_SET2_BATT_LEARN (1 << 8)
|
||||
#define BD9995X_CMD_CHGOP_SET2_CHG_EN (1 << 7)
|
||||
#define BD9995X_CMD_CHGOP_SET2_USB_SUS (1 << 6)
|
||||
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL (3 << 2)
|
||||
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_600 (0 << 2)
|
||||
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_857 (1 << 2)
|
||||
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_1000 (2 << 2)
|
||||
#define BD9995X_CMD_CHGOP_SET2_DCDC_CLK_SEL_1200 (3 << 2)
|
||||
|
||||
#define BD9995X_CMD_VBUSCLPS_TH_SET 0x0D
|
||||
#define BD9995X_CMD_VCCCLPS_TH_SET 0x0E
|
||||
#define BD9995X_CMD_CHGWDT_SET 0x0F
|
||||
#define BD9995X_CMD_BATTWDT_SET 0x10
|
||||
#define BD9995X_CMD_VSYSREG_SET 0x11
|
||||
#define BD9995X_CMD_VSYSVAL_THH_SET 0x12
|
||||
#define BD9995X_CMD_VSYSVAL_THL_SET 0x13
|
||||
#define BD9995X_CMD_ITRICH_SET 0x14
|
||||
|
||||
#define BD9995X_CMD_IPRECH_SET 0x15
|
||||
#define BD9995X_IPRECH_MAX 1024
|
||||
|
||||
#define BD9995X_CMD_ICHG_SET 0x16
|
||||
#define BD9995X_CMD_ITERM_SET 0x17
|
||||
#define BD9995X_CMD_VPRECHG_TH_SET 0x18
|
||||
#define BD9995X_CMD_VRBOOST_SET 0x19
|
||||
#define BD9995X_CMD_VFASTCHG_REG_SET1 0x1A
|
||||
#define BD9995X_CMD_VFASTCHG_REG_SET2 0x1B
|
||||
#define BD9995X_CMD_VFASTCHG_REG_SET3 0x1C
|
||||
#define BD9995X_CMD_VRECHG_SET 0x1D
|
||||
#define BD9995X_CMD_VBATOVP_SET 0x1E
|
||||
#define BD9995X_CMD_IBATSHORT_SET 0x1F
|
||||
#define BD9995X_CMD_PROCHOT_CTRL_SET 0x20
|
||||
#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN4 (1 << 4)
|
||||
#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN3 (1 << 3)
|
||||
#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN2 (1 << 2)
|
||||
#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN1 (1 << 1)
|
||||
#define BD9995X_CMD_PROCHOT_CTRL_SET_PROCHOT_EN0 (1 << 0)
|
||||
|
||||
#define BD9995X_CMD_PROCHOT_ICRIT_SET 0x21
|
||||
#define BD9995X_CMD_PROCHOT_INORM_SET 0x22
|
||||
#define BD9995X_CMD_PROCHOT_IDCHG_SET 0x23
|
||||
#define BD9995X_CMD_PROCHOT_VSYS_SET 0x24
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET 0x25
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IMON_INSEL (1 << 9)
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_INSEL (1 << 8)
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_OUT_EN (1 << 7)
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_SOURCE_SEL (1 << 6)
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_MASK 0x30
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_40V 0x03
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_20V 0x02
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_10V 0x01
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_IOUT_GAIN_SET_05V 0x00
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_OUT_EN (1 << 3)
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_MASK 0x07
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_64UAW 0x06
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_32UAW 0x05
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_16UAW 0x04
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_08UAW 0x03
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_04UAW 0x02
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_02UAW 0x01
|
||||
#define BD9995X_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_01UAW 0x00
|
||||
#define BD9995X_PMON_IOUT_ADC_READ_COUNT 100
|
||||
|
||||
#define BD9995X_CMD_PMON_DACIN_VAL 0x26
|
||||
#define BD9995X_CMD_IOUT_DACIN_VAL 0x27
|
||||
#define BD9995X_CMD_VCC_UCD_SET 0x28
|
||||
/* Bits for both VCC_UCD_SET and VBUS_UCD_SET regs */
|
||||
#define BD9995X_CMD_UCD_SET_BCSRETRY (1 << 12)
|
||||
#define BD9995X_CMD_UCD_SET_USBDETEN (1 << 7)
|
||||
#define BD9995X_CMD_UCD_SET_USB_SW_EN (1 << 1)
|
||||
|
||||
#define BD9995X_CMD_VCC_UCD_STATUS 0x29
|
||||
/* Bits for both VCC_UCD_STATUS and VBUS_UCD_STATUS regs */
|
||||
#define BD9995X_CMD_UCD_STATUS_DCDFAIL (1 << 15)
|
||||
#define BD9995X_CMD_UCD_STATUS_CHGPORT1 (1 << 13)
|
||||
#define BD9995X_CMD_UCD_STATUS_CHGPORT0 (1 << 12)
|
||||
#define BD9995X_CMD_UCD_STATUS_PUPDET (1 << 11)
|
||||
#define BD9995X_CMD_UCD_STATUS_CHGDET (1 << 6)
|
||||
#define BD9995X_TYPE_MASK (BD9995X_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD9995X_CMD_UCD_STATUS_PUPDET | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGDET)
|
||||
|
||||
/* BC1.2 chargers */
|
||||
#define BD9995X_TYPE_CDP (BD9995X_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGDET)
|
||||
#define BD9995X_TYPE_DCP (BD9995X_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGDET)
|
||||
#define BD9995X_TYPE_SDP (BD9995X_CMD_UCD_STATUS_CHGPORT0)
|
||||
/* non-standard BC1.2 chargers */
|
||||
#define BD9995X_TYPE_OTHER (BD9995X_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGPORT1 | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGDET)
|
||||
#define BD9995X_TYPE_PUP_PORT (BD9995X_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGPORT0 | \
|
||||
BD9995X_CMD_UCD_STATUS_PUPDET)
|
||||
/* Open ports */
|
||||
#define BD9995X_TYPE_OPEN_PORT (BD9995X_CMD_UCD_STATUS_DCDFAIL | \
|
||||
BD9995X_CMD_UCD_STATUS_CHGPORT0)
|
||||
#define BD9995X_TYPE_VBUS_OPEN 0
|
||||
|
||||
#define BD9995X_CMD_VCC_IDD_STATUS 0x2A
|
||||
#define BD9995X_CMD_VCC_UCD_FCTRL_SET 0x2B
|
||||
#define BD9995X_CMD_VCC_UCD_FCTRL_EN 0x2C
|
||||
#define BD9995X_CMD_VBUS_UCD_SET 0x30
|
||||
#define BD9995X_CMD_VBUS_UCD_STATUS 0x31
|
||||
#define BD9995X_CMD_VBUS_IDD_STATUS 0x32
|
||||
#define BD9995X_CMD_VBUS_UCD_FCTRL_SET 0x33
|
||||
#define BD9995X_CMD_VBUS_UCD_FCTRL_EN 0x34
|
||||
#define BD9995X_CMD_CHIP_ID 0x38
|
||||
#define BD9995X_CMD_CHIP_REV 0x39
|
||||
#define BD9995X_CMD_IC_SET1 0x3A
|
||||
#define BD9995X_CMD_IC_SET2 0x3B
|
||||
#define BD9995X_CMD_SYSTEM_STATUS 0x3C
|
||||
#define BD9995X_CMD_SYSTEM_STATUS_OTPLD_STATE (1 << 1)
|
||||
#define BD9995X_CMD_SYSTEM_STATUS_ALLRST_STATE (1 << 0)
|
||||
|
||||
#define BD9995X_CMD_SYSTEM_CTRL_SET 0x3D
|
||||
#define BD9995X_CMD_SYSTEM_CTRL_SET_OTPLD (1 << 1)
|
||||
#define BD9995X_CMD_SYSTEM_CTRL_SET_ALLRST (1 << 0)
|
||||
|
||||
#define BD9995X_CMD_EXT_PROTECT_SET 0x3E
|
||||
#define BD9995X_CMD_EXT_MAP_SET 0x3F
|
||||
#define BD9995X_CMD_VM_CTRL_SET 0x40
|
||||
#define BD9995X_CMD_VM_CTRL_SET_EXTIADPEN (1 << 9)
|
||||
#define BD9995X_CMD_THERM_WINDOW_SET1 0x41
|
||||
#define BD9995X_CMD_THERM_WINDOW_SET2 0x42
|
||||
#define BD9995X_CMD_THERM_WINDOW_SET3 0x43
|
||||
#define BD9995X_CMD_THERM_WINDOW_SET4 0x44
|
||||
#define BD9995X_CMD_THERM_WINDOW_SET5 0x45
|
||||
#define BD9995X_CMD_IBATP_TH_SET 0x46
|
||||
#define BD9995X_CMD_IBATM_TH_SET 0x47
|
||||
#define BD9995X_CMD_VBAT_TH_SET 0x48
|
||||
#define BD9995X_CMD_THERM_TH_SET 0x49
|
||||
#define BD9995X_CMD_IACP_TH_SET 0x4A
|
||||
#define BD9995X_CMD_VACP_TH_SET 0x4B
|
||||
|
||||
/* Enable discharge when VBUS falls below BD9995X_VBUS_DISCHARGE_TH */
|
||||
#define BD9995X_VBUS_DISCHARGE_TH 3900
|
||||
#define BD9995X_CMD_VBUS_TH_SET 0x4C
|
||||
#define BD9995X_CMD_VCC_TH_SET 0x4D
|
||||
|
||||
#define BD9995X_CMD_VSYS_TH_SET 0x4E
|
||||
#define BD9995X_CMD_EXTIADP_TH_SET 0x4F
|
||||
#define BD9995X_CMD_IBATP_VAL 0x50
|
||||
#define BD9995X_CMD_IBATP_AVE_VAL 0x51
|
||||
#define BD9995X_CMD_IBATM_VAL 0x52
|
||||
#define BD9995X_CMD_IBATM_AVE_VAL 0x53
|
||||
#define BD9995X_CMD_VBAT_VAL 0x54
|
||||
#define BD9995X_CMD_VBAT_AVE_VAL 0x55
|
||||
#define BD9995X_CMD_THERM_VAL 0x56
|
||||
#define BD9995X_CMD_VTH_VAL 0x57
|
||||
#define BD9995X_CMD_IACP_VAL 0x58
|
||||
#define BD9995X_CMD_IACP_AVE_VAL 0x59
|
||||
#define BD9995X_CMD_VACP_VAL 0x5A
|
||||
#define BD9995X_CMD_VACP_AVE_VAL 0x5B
|
||||
#define BD9995X_CMD_VBUS_VAL 0x5C
|
||||
#define BD9995X_CMD_VBUS_AVE_VAL 0x5D
|
||||
#define BD9995X_CMD_VCC_VAL 0x5E
|
||||
#define BD9995X_CMD_VCC_AVE_VAL 0x5F
|
||||
#define BD9995X_CMD_VSYS_VAL 0x60
|
||||
#define BD9995X_CMD_VSYS_AVE_VAL 0x61
|
||||
#define BD9995X_CMD_EXTIADP_VAL 0x62
|
||||
#define BD9995X_CMD_EXTIADP_AVE_VAL 0x63
|
||||
#define BD9995X_CMD_VACPCLPS_TH_SET 0x64
|
||||
#define BD9995X_CMD_INT0_SET 0x68
|
||||
#define BD9995X_CMD_INT0_SET_INT2_EN (1 << 2)
|
||||
#define BD9995X_CMD_INT0_SET_INT1_EN (1 << 1)
|
||||
#define BD9995X_CMD_INT0_SET_INT0_EN (1 << 0)
|
||||
|
||||
#define BD9995X_CMD_INT1_SET 0x69
|
||||
/* Bits for both INT1 & INT2 reg */
|
||||
#define BD9995X_CMD_INT_SET_TH_DET (1 << 9)
|
||||
#define BD9995X_CMD_INT_SET_TH_RES (1 << 8)
|
||||
#define BD9995X_CMD_INT_SET_DET (1 << 1)
|
||||
#define BD9995X_CMD_INT_SET_RES (1 << 0)
|
||||
#define BD9995X_CMD_INT_VBUS_DET (BD9995X_CMD_INT_SET_RES | \
|
||||
BD9995X_CMD_INT_SET_DET)
|
||||
#define BD9995X_CMD_INT_VBUS_TH (BD9995X_CMD_INT_SET_TH_RES | \
|
||||
BD9995X_CMD_INT_SET_TH_DET)
|
||||
|
||||
#define BD9995X_CMD_INT2_SET 0x6A
|
||||
#define BD9995X_CMD_INT3_SET 0x6B
|
||||
#define BD9995X_CMD_INT4_SET 0x6C
|
||||
#define BD9995X_CMD_INT5_SET 0x6D
|
||||
#define BD9995X_CMD_INT6_SET 0x6E
|
||||
#define BD9995X_CMD_INT7_SET 0x6F
|
||||
#define BD9995X_CMD_INT0_STATUS 0x70
|
||||
#define BD9995X_CMD_INT1_STATUS 0x71
|
||||
/* Bits for both INT1_STATUS & INT2_STATUS reg */
|
||||
#define BD9995X_CMD_INT_STATUS_DET (1 << 1)
|
||||
#define BD9995X_CMD_INT_STATUS_RES (1 << 0)
|
||||
|
||||
#define BD9995X_CMD_INT2_STATUS 0x72
|
||||
#define BD9995X_CMD_INT3_STATUS 0x73
|
||||
#define BD9995X_CMD_INT4_STATUS 0x74
|
||||
#define BD9995X_CMD_INT5_STATUS 0x75
|
||||
#define BD9995X_CMD_INT6_STATUS 0x76
|
||||
#define BD9995X_CMD_INT7_STATUS 0x77
|
||||
#define BD9995X_CMD_REG0 0x78
|
||||
#define BD9995X_CMD_REG1 0x79
|
||||
#define BD9995X_CMD_OTPREG0 0x7A
|
||||
#define BD9995X_CMD_OTPREG1 0x7B
|
||||
#define BD9995X_CMD_SMBREG 0x7C
|
||||
/* Normal functionality - power save mode disabled. */
|
||||
#define BD9995X_PWR_SAVE_OFF 0
|
||||
/* BGATE ON w/ PROCHOT# monitored only system voltage. */
|
||||
#define BD9995X_PWR_SAVE_LOW 0x1
|
||||
/* BGATE ON w/ PROCHOT# monitored only system voltage every 1ms. */
|
||||
#define BD9995X_PWR_SAVE_MED 0x2
|
||||
/* BGATE ON w/o PROCHOT# monitoring. */
|
||||
#define BD9995X_PWR_SAVE_HIGH 0x5
|
||||
/* BGATE OFF */
|
||||
#define BD9995X_PWR_SAVE_MAX 0x6
|
||||
#define BD9995X_CMD_DEBUG_MODE_SET 0x7F
|
||||
|
||||
/* Map PD port number to charge port number */
|
||||
static inline enum bd9995x_charge_port bd9995x_pd_port_to_chg_port(int port)
|
||||
{
|
||||
#ifdef CONFIG_BD9995X_PRIMARY_CHARGE_PORT_VCC
|
||||
return port ? BD9995X_CHARGE_PORT_VBUS : BD9995X_CHARGE_PORT_VCC;
|
||||
#else
|
||||
return port ? BD9995X_CHARGE_PORT_VCC : BD9995X_CHARGE_PORT_VBUS;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Non-standard interface functions - bd9995x integrates additional
|
||||
* functionality not part of the standard charger interface.
|
||||
*/
|
||||
|
||||
/* Is VBUS provided or external power present */
|
||||
int bd9995x_is_vbus_provided(int port);
|
||||
/* Select input port from {VCC, VBUS, VCC&VBUS, NONE}. */
|
||||
int bd9995x_select_input_port(enum bd9995x_charge_port port);
|
||||
/* Get input current limit for BC1.2 suppliers */
|
||||
int bd9995x_get_bc12_ilim(int charge_supplier);
|
||||
/* Enable/Disable charging triggered by BC1.2 */
|
||||
int bd9995x_bc12_enable_charging(enum bd9995x_charge_port port, int enable);
|
||||
/* Interrupt handler for USB charger VBUS */
|
||||
void bd9995x_vbus_interrupt(enum gpio_signal signal);
|
||||
/* Read temperature measurement value (in Celsius) */
|
||||
int bd9995x_get_battery_temp(int *temp_ptr);
|
||||
|
||||
#endif /* __CROS_EC_BD9995X_H */
|
||||
@@ -360,6 +360,7 @@
|
||||
|
||||
/* Compile charger-specific code for these chargers (pick at most one) */
|
||||
#undef CONFIG_CHARGER_BD99955
|
||||
#undef CONFIG_CHARGER_BD99956
|
||||
#undef CONFIG_CHARGER_BQ24707A
|
||||
#undef CONFIG_CHARGER_BQ24715
|
||||
#undef CONFIG_CHARGER_BQ24725
|
||||
@@ -374,20 +375,20 @@
|
||||
#undef CONFIG_CHARGER_TPS65090 /* Note: does not use CONFIG_CHARGER */
|
||||
|
||||
/*
|
||||
* BD99955 PD port to charger port mapping.
|
||||
* BD9995X PD port to charger port mapping.
|
||||
* By default VBUS is selected as primary port.
|
||||
* Define only if the VCC is the primary port.
|
||||
*/
|
||||
#undef CONFIG_BD99955_PRIMARY_CHARGE_PORT_VCC
|
||||
#undef CONFIG_BD9995X_PRIMARY_CHARGE_PORT_VCC
|
||||
|
||||
/*
|
||||
* BD99955 Power Save Mode
|
||||
* BD9995X Power Save Mode
|
||||
*
|
||||
* Which power save mode should the charger enter when VBUS is removed. Check
|
||||
* driver/bd99955.h for the power save settings. By default, no power save mode
|
||||
* driver/bd9995x.h for the power save settings. By default, no power save mode
|
||||
* is enabled.
|
||||
*/
|
||||
#undef CONFIG_BD99955_POWER_SAVE_MODE
|
||||
#undef CONFIG_BD9995X_POWER_SAVE_MODE
|
||||
|
||||
/*
|
||||
* If the battery temperature sense pin is connected to charger,
|
||||
|
||||
Reference in New Issue
Block a user