S0ix: use both SLP_S0 interrupt and host command for s0ix

EC currently uses a host command from kernel to enter s0ix. This patch waits for the SLP_S0 interrupt to come after receiving the host command before entering S0ix. On the exit path, the SLP_S0 interrupt directly triggers the exit rather than waiting for the host command. BRANCH=none BUG=b:37443151 TEST=check in EC logs for SLP_S0 entry and powerindebug output, check suspend_stress_test on reef and soraka works fine, make -j8 buildall runs fine Change-Id: Ie5507b7a1e723532f07bc0671c2abd364f6224a2 Signed-off-by: Subramony Sesha <subramony.sesha@intel.com> Signed-off-by: Archana Patni <archana.patni@intel.com> Signed-off-by: Jenny TC <jenny.tc@intel.com> Reviewed-on: https://chromium-review.googlesource.com/513705 Commit-Ready: Jenny Tc <jenny.tc@intel.com> Tested-by: Jenny Tc <jenny.tc@intel.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2025-12-29 10:00:51 +00:00 · 2017-05-24 18:12:32 +05:30
parent d7f7f69317
commit 43081fded2
17 changed files with 84 additions and 33 deletions
--- a/board/chell/board.c
+++ b/board/chell/board.c
@@ -81,6 +81,9 @@ void usb1_evt(enum gpio_signal signal)

 /* power signal list.  Must match order of enum power_signal. */
 const struct power_signal_info power_signal_list[] = {
+#ifdef CONFIG_POWER_S0IX
+	{GPIO_PCH_SLP_S0_L,      1, "SLP_S0_DEASSERTED"},
+#endif
 	{GPIO_RSMRST_L_PGOOD,    1, "RSMRST_N_PWRGD"},
 	{GPIO_PCH_SLP_S3_L,      1, "SLP_S3_DEASSERTED"},
 	{GPIO_PCH_SLP_S4_L,      1, "SLP_S4_DEASSERTED"},
--- a/board/chell/board.h
+++ b/board/chell/board.h
@@ -173,7 +173,10 @@ enum pwm_channel {

 /* power signal definitions */
 enum power_signal {
-	X86_RSMRST_L_PWRGD = 0,
+#ifdef CONFIG_POWER_S0IX
+	X86_SLP_S0_DEASSERTED,
+#endif
+	X86_RSMRST_L_PWRGD,
 	X86_SLP_S3_DEASSERTED,
 	X86_SLP_S4_DEASSERTED,
 	X86_SLP_SUS_DEASSERTED,
--- a/board/chell/gpio.inc
+++ b/board/chell/gpio.inc
@@ -13,6 +13,9 @@ GPIO_INT(AC_PRESENT,        PIN(30), GPIO_INT_BOTH, extpower_interrupt)
 GPIO_INT(WP_L,              PIN(33), GPIO_INT_BOTH, switch_interrupt)
 /* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */
 GPIO_INT(POWER_BUTTON_L,    PIN(35), GPIO_INT_BOTH, power_button_interrupt)
+#ifdef CONFIG_POWER_S0IX
+GPIO_INT(PCH_SLP_S0_L,      PIN(211), GPIO_INT_BOTH, power_signal_interrupt)
+#endif
 /* RSMRST from PMIC */
 GPIO_INT(RSMRST_L_PGOOD,    PIN(63),  GPIO_INT_BOTH, power_signal_interrupt)
 GPIO_INT(PCH_SLP_S4_L,      PIN(200), GPIO_INT_BOTH, power_signal_interrupt)
@@ -55,7 +58,9 @@ GPIO(PCH_RSMRST_L,          PIN(143), GPIO_OUT_LOW)
 GPIO(PCH_RTCRST,            PIN(163), GPIO_OUT_LOW)
 GPIO(SYS_RESET_L,           PIN(121), GPIO_ODR_HIGH)
 GPIO(ENTERING_RW,           PIN(41),  GPIO_OUT_LOW)
+#ifndef CONFIG_POWER_S0IX
 GPIO(PCH_SLP_S0_L,          PIN(211), GPIO_INPUT)
+#endif

 /* Devices and power */
 GPIO(PP1800_DX_DMIC_EN,     PIN(11),  GPIO_OUT_LOW)
--- a/board/coral/board.c
+++ b/board/coral/board.c
@@ -124,6 +124,9 @@ void tablet_mode_interrupt(enum gpio_signal signal)

 /* power signal list.  Must match order of enum power_signal. */
 const struct power_signal_info power_signal_list[] = {
+#ifdef CONFIG_POWER_S0IX
+	{GPIO_PCH_SLP_S0_L,       1, "SLP_S0_DEASSERTED"},
+#endif
 	{GPIO_RSMRST_L_PGOOD,     1, "RSMRST_L"},
 	{GPIO_PCH_SLP_S3_L,       1, "SLP_S3_DEASSERTED"},
 	{GPIO_PCH_SLP_S4_L,       1, "SLP_S4_DEASSERTED"},
--- a/board/coral/board.h
+++ b/board/coral/board.h
@@ -235,7 +235,10 @@ enum pwm_channel {
 };

 enum power_signal {
-	X86_RSMRST_N = 0,
+#ifdef CONFIG_POWER_S0IX
+	X86_SLP_S0_N,
+#endif
+	X86_RSMRST_N,
 	X86_SLP_S3_N,
 	X86_SLP_S4_N,
 	X86_SUSPWRDNACK,
--- a/board/coral/gpio.inc
+++ b/board/coral/gpio.inc
@@ -18,7 +18,9 @@ GPIO_INT(USB_C0_PD_INT_ODL,	PIN(3, 7), GPIO_INT_FALLING, tcpc_alert_event)			/*
 GPIO_INT(USB_C1_PD_INT_ODL,	PIN(B, 1), GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_alert_event)	/* from Parade TCPC */

 GPIO_INT(USB_C0_CABLE_DET,	PIN(C, 5), GPIO_INT_RISING, anx74xx_cable_det_interrupt)	/* CABLE_DET from ANX3429 */
-
+#ifdef CONFIG_POWER_S0IX
+GPIO_INT(PCH_SLP_S0_L,		PIN(7, 5), GPIO_INT_BOTH, power_signal_interrupt)				/* SLP_S0_L */
+#endif
 GPIO_INT(PCH_SLP_S4_L,		PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt)		/* SLP_S4_L */
 GPIO_INT(PCH_SLP_S3_L,		PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt)		/* SLP_S3_L */
 GPIO_INT(SUSPWRNACK,		PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt)
@@ -69,7 +71,9 @@ GPIO(EC_I2C_POWER_SCL,		PIN(D, 1), GPIO_INPUT)

 GPIO(PCH_SMI_L,			PIN(A, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V)	/* EC_SMI_ODL */
 GPIO(PCH_SCI_L,			PIN(A, 7), GPIO_ODR_HIGH | GPIO_SEL_1P8V)	/* EC_SCI_ODL */
+#ifndef CONFIG_POWER_S0IX
 GPIO(PCH_SLP_S0_L,              PIN(7, 5), GPIO_INPUT)				/* SLP_S0_L */
+#endif

 /* Enable for board and SKU ID ADCs */
 GPIO(EC_BRD_ID_EN,		PIN(3, 5), GPIO_INPUT)
--- a/board/poppy/board.c
+++ b/board/poppy/board.c
@@ -298,6 +298,9 @@ void base_detect_interrupt(enum gpio_signal signal)

 /* power signal list.  Must match order of enum power_signal. */
 const struct power_signal_info power_signal_list[] = {
+#ifdef CONFIG_POWER_S0IX
+	{GPIO_PCH_SLP_S0_L,	1, "SLP_S0_DEASSERTED"},
+#endif
 #ifdef CONFIG_ESPI_VW_SIGNALS
 	{VW_SLP_S3_L,		1, "SLP_S3_DEASSERTED"},
 	{VW_SLP_S4_L,		1, "SLP_S4_DEASSERTED"},
--- a/board/poppy/board.h
+++ b/board/poppy/board.h
@@ -196,6 +196,9 @@
 #include "registers.h"

 enum power_signal {
+#ifdef CONFIG_POWER_S0IX
+	X86_SLP_S0_DEASSERTED,
+#endif
 	X86_SLP_S3_DEASSERTED,
 	X86_SLP_S4_DEASSERTED,
 	X86_SLP_SUS_DEASSERTED,
--- a/board/poppy/gpio.inc
+++ b/board/poppy/gpio.inc
@@ -10,6 +10,9 @@

 GPIO_INT(USB_C0_PD_INT_ODL,	PIN(3, 7), GPIO_INT_FALLING,			tcpc_alert_event)
 GPIO_INT(USB_C1_PD_INT_ODL,	PIN(C, 5), GPIO_INT_FALLING,			tcpc_alert_event)
+#ifdef CONFIG_POWER_S0IX
+GPIO_INT(PCH_SLP_S0_L,		PIN(7, 5), GPIO_INT_BOTH,			power_signal_interrupt)
+#endif
 /* Use VW signals instead of GPIOs */
 #ifndef CONFIG_ESPI_VW_SIGNALS
 GPIO_INT(PCH_SLP_S3_L,		PIN(7, 3), GPIO_INT_BOTH,			power_signal_interrupt)
@@ -51,7 +54,9 @@ GPIO(CCD_MODE_ODL,		PIN(6, 3), GPIO_INPUT)				/* Case Closed Debug Mode */
 GPIO(EC_HAVEN_RESET_ODL,	PIN(0, 2), GPIO_ODR_HIGH)			/* H1 Reset */
 GPIO(ENTERING_RW,		PIN(7, 6), GPIO_OUTPUT)				/* EC Entering RW */
 GPIO(PMIC_INT_L,		PIN(6, 0), GPIO_INPUT)				/* PMIC interrupt */
+#ifndef CONFIG_POWER_S0IX
 GPIO(PCH_SLP_S0_L,		PIN(7, 5), GPIO_INPUT)
+#endif

 /* Sensor interrupts, not implemented yet */
 GPIO(ALS_INT_L,			PIN(2, 5), GPIO_INPUT)
--- a/board/reef/board.c
+++ b/board/reef/board.c
@@ -125,6 +125,9 @@ void tablet_mode_interrupt(enum gpio_signal signal)

 /* power signal list.  Must match order of enum power_signal. */
 const struct power_signal_info power_signal_list[] = {
+#ifdef CONFIG_POWER_S0IX
+	{GPIO_PCH_SLP_S0_L,       1, "SLP_S0_DEASSERTED"},
+#endif
 	{GPIO_RSMRST_L_PGOOD,     1, "RSMRST_L"},
 	{GPIO_PCH_SLP_S3_L,       1, "SLP_S3_DEASSERTED"},
 	{GPIO_PCH_SLP_S4_L,       1, "SLP_S4_DEASSERTED"},
--- a/board/reef/board.h
+++ b/board/reef/board.h
@@ -240,7 +240,10 @@ enum pwm_channel {
 };

 enum power_signal {
-	X86_RSMRST_N = 0,
+#ifdef CONFIG_POWER_S0IX
+	X86_SLP_S0_N,
+#endif
+	X86_RSMRST_N,
 	X86_SLP_S3_N,
 	X86_SLP_S4_N,
 	X86_SUSPWRDNACK,
--- a/board/reef/gpio.inc
+++ b/board/reef/gpio.inc
@@ -19,6 +19,9 @@ GPIO_INT(USB_C1_PD_INT_ODL,	PIN(B, 1), GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_ale

 GPIO_INT(USB_C0_CABLE_DET,	PIN(C, 5), GPIO_INT_RISING, anx74xx_cable_det_interrupt)	/* CABLE_DET from ANX3429 */

+#ifdef CONFIG_POWER_S0IX
+GPIO_INT(PCH_SLP_S0_L,		PIN(7, 5), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S0_L */
+#endif
 GPIO_INT(PCH_SLP_S4_L,		PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt)		/* SLP_S4_L */
 GPIO_INT(PCH_SLP_S3_L,		PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt)		/* SLP_S3_L */
 GPIO_INT(SUSPWRNACK,		PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt)
@@ -69,7 +72,9 @@ GPIO(EC_I2C_POWER_SCL,		PIN(D, 1), GPIO_INPUT)

 GPIO(PCH_SMI_L,			PIN(A, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V)	/* EC_SMI_ODL */
 GPIO(PCH_SCI_L,			PIN(A, 7), GPIO_ODR_HIGH | GPIO_SEL_1P8V)	/* EC_SCI_ODL */
+#ifndef CONFIG_POWER_S0IX
 GPIO(PCH_SLP_S0_L,              PIN(7, 5), GPIO_INPUT)				/* SLP_S0_L */
+#endif

 /*
 * BRD_ID1 is a an ADC pin which will be used to measure multiple values.
--- a/board/reef_it8320/board.c
+++ b/board/reef_it8320/board.c
@@ -60,6 +60,9 @@

 /* power signal list.  Must match order of enum power_signal. */
 const struct power_signal_info power_signal_list[] = {
+#ifdef CONFIG_POWER_S0IX
+	{GPIO_PCH_SLP_S0_L,       1, "SLP_S0_DEASSERTED"},
+#endif
 	{GPIO_RSMRST_L_PGOOD,     1, "RSMRST_L"},
 	{GPIO_PCH_SLP_S3_L,       1, "SLP_S3_DEASSERTED"},
 	{GPIO_PCH_SLP_S4_L,       1, "SLP_S4_DEASSERTED"},
--- a/board/reef_it8320/board.h
+++ b/board/reef_it8320/board.h
@@ -172,7 +172,10 @@ enum adc_channel {
 };

 enum power_signal {
-	X86_RSMRST_N = 0,
+#ifdef CONFIG_POWER_S0IX
+	X86_SLP_S0_N,
+#endif
+	X86_RSMRST_N,
 	X86_SLP_S3_N,
 	X86_SLP_S4_N,
 	X86_SUSPWRDNACK,
--- a/board/reef_it8320/gpio.inc
+++ b/board/reef_it8320/gpio.inc
@@ -15,6 +15,9 @@ GPIO_INT(UART1_RX,		PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt)	/* UA
 #endif
 GPIO_INT(EC_VOLUP_BTN_ODL,	PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)	/* EC_VOLUP_BTN_ODL */
 GPIO_INT(EC_VOLDN_BTN_ODL,	PIN(D, 6), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)	/* EC_VOLDN_BTN_ODL */
+#ifdef CONFIG_POWER_S0IX
+GPIO_INT(PCH_SLP_S0_L,		PIN(B, 7), GPIO_INT_BOTH, power_signal_interrupt)				/* SLP_S0_L */
+#endif
 GPIO_INT(SUSPWRNACK,		PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt)	/* SUSPWRNACK */
 GPIO_INT(LID_OPEN,		PIN(E, 2), GPIO_INT_BOTH, lid_interrupt)		/* LID_OPEN */
 GPIO_INT(PCH_PLTRST_L,   	PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP,  lpcrst_interrupt)	/* PLT_RST_L */
@@ -36,7 +39,9 @@ GPIO(EC_I2C_A_SCL,		PIN(B, 3), GPIO_INPUT | GPIO_SEL_1P8V)		/* EC_I2C_GYRO_SCL *
 GPIO(EC_I2C_A_SDA,		PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V)		/* EC_I2C_GYRO_SDA */
 GPIO(ENABLE_BACKLIGHT,		PIN(B, 5), GPIO_ODR_HIGH | GPIO_SEL_1P8V)	/* EC_BL_EN_OD */
 GPIO(PCH_RCIN_L,		PIN(B, 6), GPIO_ODR_HIGH)			/* SYS_RST_ODL */
+#ifndef CONFIG_POWER_S0IX
 GPIO(PCH_SLP_S0_L,		PIN(B, 7), GPIO_INPUT)				/* SLP_S0_L */
+#endif
 GPIO(EC_BATT_PRES_L,		PIN(C, 0), GPIO_INPUT)				/* EC_BATT_PRES_L */
 GPIO(EC_I2C_B_SCL,		PIN(C, 1), GPIO_INPUT | GPIO_SEL_1P8V)		/* EC_I2C_SENSOR_U_SCL */
 GPIO(EC_I2C_B_SDA,		PIN(C, 2), GPIO_INPUT | GPIO_SEL_1P8V)		/* EC_I2C_SENSOR_U_SDA */
--- a/power/common.c
+++ b/power/common.c
@@ -735,22 +735,6 @@ static int host_command_host_sleep_event(struct host_cmd_handler_args *args)

 	host_sleep_state = p->sleep_event;

-#ifdef CONFIG_POWER_S0IX
-	if (p->sleep_event == HOST_SLEEP_EVENT_S0IX_SUSPEND) {
-		CPRINTS("S0ix sus evt");
-		task_wake(TASK_ID_CHIPSET);
-	} else if (p->sleep_event == HOST_SLEEP_EVENT_S0IX_RESUME) {
-		CPRINTS("S0ix res evt");
-		/*
-		 * For all scenarios where lid is not open
-		 * this will be trigerred when other wake
-		 * sources like keyboard, trackpad are used.
-		 */
-		if (!chipset_in_state(CHIPSET_STATE_ON))
-			task_wake(TASK_ID_CHIPSET);
-	}
-#endif /* CONFIG_POWER_S0IX */
-
 	return EC_RES_SUCCESS;
 }
 DECLARE_HOST_COMMAND(EC_CMD_HOST_SLEEP_EVENT,
--- a/power/intel_x86.c
+++ b/power/intel_x86.c
@@ -37,20 +37,24 @@

 enum sys_sleep_state {
 	SYS_SLEEP_S3,
-	SYS_SLEEP_S4
+	SYS_SLEEP_S4,
+#ifdef CONFIG_POWER_S0IX
+	SYS_SLEEP_S0IX,
+#endif
 };

+static const int sleep_sig[] = {
 #ifdef CONFIG_ESPI_VW_SIGNALS
-static const enum espi_vw_signal espi_vm_sig[] = {
 	[SYS_SLEEP_S3] = VW_SLP_S3_L,
 	[SYS_SLEEP_S4] = VW_SLP_S4_L,
-};
 #else
-static const enum gpio_signal gpio_sig[] = {
 	[SYS_SLEEP_S3] = GPIO_PCH_SLP_S3_L,
 	[SYS_SLEEP_S4] = GPIO_PCH_SLP_S4_L,
-};
 #endif
+#ifdef CONFIG_POWER_S0IX
+	[SYS_SLEEP_S0IX] = GPIO_PCH_SLP_S0_L,
+#endif
+};

 static int power_s5_up;       /* Chipset is sequencing up or down */

@@ -58,10 +62,11 @@ static int power_s5_up;       /* Chipset is sequencing up or down */
 static inline int chipset_get_sleep_signal(enum sys_sleep_state state)
 {
 #ifdef CONFIG_ESPI_VW_SIGNALS
-	return espi_vw_get_wire(espi_vm_sig[state]);
-#else
-	return gpio_get_level(gpio_sig[state]);
+	if (sleep_sig[state] > VW_SIGNAL_BASE)
+		return espi_vw_get_wire(sleep_sig[state]);
+	else
 #endif
+		return gpio_get_level(sleep_sig[state]);
 }

 #ifdef CONFIG_BOARD_HAS_RTC_RESET
@@ -220,8 +225,16 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state)
 			/* Power down to next state */
 			return POWER_S0S3;
 #ifdef CONFIG_POWER_S0IX
-		} else if (power_get_host_sleep_state() ==
-			    HOST_SLEEP_EVENT_S0IX_SUSPEND) {
+		/*
+		 * SLP_S0 may assert in system idle scenario without a kernel
+		 * freeze call. This may cause interrupt storm since there is
+		 * no freeze/unfreeze of threads/process in the idle scenario.
+		 * Ignore the SLP_S0 assertions in idle scenario by checking
+		 * the host sleep state.
+		 */
+		} else if (power_get_host_sleep_state()
+					== HOST_SLEEP_EVENT_S0IX_SUSPEND &&
+				chipset_get_sleep_signal(SYS_SLEEP_S0IX) == 0) {
 			return POWER_S0S0ix;
 #endif
 		}
@@ -230,8 +243,8 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state)

 #ifdef CONFIG_POWER_S0IX
 	case POWER_S0ix:
-		if ((power_get_host_sleep_state() ==
-		     HOST_SLEEP_EVENT_S0IX_RESUME) &&
+		/* System in S0 only if SLP_S0 and SLP_S3 are de-asserted */
+		if ((chipset_get_sleep_signal(SYS_SLEEP_S0IX) == 1) &&
 		   (chipset_get_sleep_signal(SYS_SLEEP_S3) == 1)) {
 			return POWER_S0ixS0;
 		} else if (!power_has_signals(IN_PGOOD_ALL_CORE)) {