it83xx: ec2i: move 'ec2i_setting' to header file of chip

This enum can be included in common.

BUG=none
BRANCH=none
TEST=build boards: it83xx_evb and reef_it8320
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>

Change-Id: Id7014b7de170cb3324c45d43fbf04ebe48a69f5e
Reviewed-on: https://chromium-review.googlesource.com/505864
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
This commit is contained in:
Dino Li
2017-05-17 12:03:35 +08:00
committed by chrome-bot
parent a457573b0c
commit 432f3f4686
3 changed files with 44 additions and 88 deletions

View File

@@ -80,50 +80,6 @@ enum adc_channel {
ADC_CH_COUNT
};
enum ec2i_setting {
EC2I_SET_KB_LDN,
EC2I_SET_KB_IRQ,
EC2I_SET_KB_ENABLE,
EC2I_SET_MOUSE_LDN,
EC2I_SET_MOUSE_IRQ,
EC2I_SET_MOUSE_ENABLE,
EC2I_SET_PMC1_LDN,
EC2I_SET_PMC1_IRQ,
EC2I_SET_PMC1_ENABLE,
EC2I_SET_PMC2_LDN,
EC2I_SET_PMC2_BASE0_MSB,
EC2I_SET_PMC2_BASE0_LSB,
EC2I_SET_PMC2_BASE1_MSB,
EC2I_SET_PMC2_BASE1_LSB,
EC2I_SET_PMC2_IRQ,
EC2I_SET_PMC2_ENABLE,
EC2I_SET_SMFI_LDN,
EC2I_SET_SMFI_H2RAM_IO_BASE,
EC2I_SET_SMFI_H2RAM_MAP_LPC_IO,
EC2I_SET_SMFI_ENABLE,
EC2I_SET_PMC3_LDN,
EC2I_SET_PMC3_BASE0_MSB,
EC2I_SET_PMC3_BASE0_LSB,
EC2I_SET_PMC3_BASE1_MSB,
EC2I_SET_PMC3_BASE1_LSB,
EC2I_SET_PMC3_IRQ,
EC2I_SET_PMC3_ENABLE,
EC2I_SET_RTCT_LDN,
EC2I_SET_RTCT_P80LB,
EC2I_SET_RTCT_P80LE,
EC2I_SET_RTCT_P80LC,
#ifdef CONFIG_UART_HOST
EC2I_SET_UART2_LDN,
EC2I_SET_UART2_IO_BASE_MSB,
EC2I_SET_UART2_IO_BASE_LSB,
EC2I_SET_UART2_IRQ,
EC2I_SET_UART2_IRQ_TYPE,
EC2I_SET_UART2_ENABLE,
#endif
/* Number of EC2I settings */
EC2I_SETTING_COUNT
};
#if IT83XX_PD_EVB
/* Define typical operating power and max power */
#define PD_OPERATING_POWER_MW 15000

View File

@@ -205,50 +205,6 @@ enum reef_it8320_board_version {
BOARD_VERSION_COUNT,
};
enum ec2i_setting {
EC2I_SET_KB_LDN,
EC2I_SET_KB_IRQ,
EC2I_SET_KB_ENABLE,
EC2I_SET_MOUSE_LDN,
EC2I_SET_MOUSE_IRQ,
EC2I_SET_MOUSE_ENABLE,
EC2I_SET_PMC1_LDN,
EC2I_SET_PMC1_IRQ,
EC2I_SET_PMC1_ENABLE,
EC2I_SET_PMC2_LDN,
EC2I_SET_PMC2_BASE0_MSB,
EC2I_SET_PMC2_BASE0_LSB,
EC2I_SET_PMC2_BASE1_MSB,
EC2I_SET_PMC2_BASE1_LSB,
EC2I_SET_PMC2_IRQ,
EC2I_SET_PMC2_ENABLE,
EC2I_SET_SMFI_LDN,
EC2I_SET_SMFI_H2RAM_IO_BASE,
EC2I_SET_SMFI_H2RAM_MAP_LPC_IO,
EC2I_SET_SMFI_ENABLE,
EC2I_SET_PMC3_LDN,
EC2I_SET_PMC3_BASE0_MSB,
EC2I_SET_PMC3_BASE0_LSB,
EC2I_SET_PMC3_BASE1_MSB,
EC2I_SET_PMC3_BASE1_LSB,
EC2I_SET_PMC3_IRQ,
EC2I_SET_PMC3_ENABLE,
EC2I_SET_RTCT_LDN,
EC2I_SET_RTCT_P80LB,
EC2I_SET_RTCT_P80LE,
EC2I_SET_RTCT_P80LC,
#ifdef CONFIG_UART_HOST
EC2I_SET_UART2_LDN,
EC2I_SET_UART2_IO_BASE_MSB,
EC2I_SET_UART2_IO_BASE_LSB,
EC2I_SET_UART2_IRQ,
EC2I_SET_UART2_IRQ_TYPE,
EC2I_SET_UART2_ENABLE,
#endif
/* Number of EC2I settings */
EC2I_SETTING_COUNT
};
/* TODO: determine the following board specific type-C power constants */
/* FIXME(dhendrix): verify all of the below PD_* numbers */
/*

View File

@@ -13,6 +13,50 @@
#define P80L_P80LC 0
#define P80L_BRAM_BANK1_SIZE_MASK 0x3F
enum ec2i_setting {
EC2I_SET_KB_LDN,
EC2I_SET_KB_IRQ,
EC2I_SET_KB_ENABLE,
EC2I_SET_MOUSE_LDN,
EC2I_SET_MOUSE_IRQ,
EC2I_SET_MOUSE_ENABLE,
EC2I_SET_PMC1_LDN,
EC2I_SET_PMC1_IRQ,
EC2I_SET_PMC1_ENABLE,
EC2I_SET_PMC2_LDN,
EC2I_SET_PMC2_BASE0_MSB,
EC2I_SET_PMC2_BASE0_LSB,
EC2I_SET_PMC2_BASE1_MSB,
EC2I_SET_PMC2_BASE1_LSB,
EC2I_SET_PMC2_IRQ,
EC2I_SET_PMC2_ENABLE,
EC2I_SET_SMFI_LDN,
EC2I_SET_SMFI_H2RAM_IO_BASE,
EC2I_SET_SMFI_H2RAM_MAP_LPC_IO,
EC2I_SET_SMFI_ENABLE,
EC2I_SET_PMC3_LDN,
EC2I_SET_PMC3_BASE0_MSB,
EC2I_SET_PMC3_BASE0_LSB,
EC2I_SET_PMC3_BASE1_MSB,
EC2I_SET_PMC3_BASE1_LSB,
EC2I_SET_PMC3_IRQ,
EC2I_SET_PMC3_ENABLE,
EC2I_SET_RTCT_LDN,
EC2I_SET_RTCT_P80LB,
EC2I_SET_RTCT_P80LE,
EC2I_SET_RTCT_P80LC,
#ifdef CONFIG_UART_HOST
EC2I_SET_UART2_LDN,
EC2I_SET_UART2_IO_BASE_MSB,
EC2I_SET_UART2_IO_BASE_LSB,
EC2I_SET_UART2_IRQ,
EC2I_SET_UART2_IRQ_TYPE,
EC2I_SET_UART2_ENABLE,
#endif
/* Number of EC2I settings */
EC2I_SETTING_COUNT
};
/* Index list of the host interface registers of PNPCFG */
enum host_pnpcfg_index {
/* Logical Device Number */