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discovery-stm32f072: Enable SPI over USB tunnel

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Enable master control of SPI2 over USB for testing flashrom's
ability to write to a SPI flash chip attached to the stm32.

Signed-off-by: Anton Staaf <robotboy@chromium.org>

BRANCH=None
BUG=None
TEST=make buildall -j; write image using flashrom

Change-Id: I7d320acd28a03e91fcd7f7d697be40f69ea7bbdc
Reviewed-on: https://chromium-review.googlesource.com/218741
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
This commit is contained in:
Anton Staaf
2014-09-17 15:26:41 -07:00
committed by chrome-internal-fetch
parent 35a01462f1
commit 4b7f64cc2b
6 changed files with 81 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

39
board/discovery-stm32f072/board.h
View File

@@ -26,15 +26,36 @@
/* Optional features */
#define CONFIG_STM_HWTIMER32
#define CONFIG_HW_CRC
/* USB Configuration */
#define CONFIG_USB
#define CONFIG_USB_PID 0x500f
/* USB interface indexes (use define rather than enum to expand them) */
#define USB_IFACE_STREAM 0
#define USB_IFACE_GPIO 1
#define USB_IFACE_SPI 2
#define USB_IFACE_COUNT 3
/* USB endpoint indexes (use define rather than enum to expand them) */
#define USB_EP_CONTROL 0
#define USB_EP_STREAM 1
#define USB_EP_GPIO 2
#define USB_EP_SPI 3
#define USB_EP_COUNT 4
/* Enable control of GPIOs over USB */
#define CONFIG_USB_GPIO
/* Enable control of SPI over USB */
#define CONFIG_SPI_MASTER_PORT 2
#define CONFIG_SPI_CS_GPIO GPIO_SPI_CS
#define CONFIG_USB_SPI
#undef CONFIG_WATCHDOG_HELP
#undef CONFIG_LID_SWITCH
/* USB configuration */
#define CONFIG_USB_PID 0x500f
/*
* Allow dangerous commands all the time, since we don't have a write protect
* switch.
@@ -59,16 +80,4 @@ enum usb_strings {
};
#endif /* !__ASSEMBLER__ */
/* USB interface indexes (use define rather than enum to expand them) */
#define USB_IFACE_STREAM 0
#define USB_IFACE_GPIO 1
#define USB_IFACE_COUNT 2
/* USB endpoint indexes (use define rather than enum to expand them) */
#define USB_EP_CONTROL 0
#define USB_EP_STREAM 1
#define USB_EP_GPIO 2
#define USB_EP_COUNT 3
#endif /* __BOARD_H */

2
board/discovery-stm32f072/build.mk
View File

@@ -10,4 +10,4 @@ CHIP:=stm32
CHIP_FAMILY:=stm32f0
CHIP_VARIANT:=stm32f07x
board-y=board.o echo.o
board-y=board.o echo.o spi.o

7
board/discovery-stm32f072/ec.tasklist
View File

@@ -17,6 +17,7 @@
* 's' is the stack size in bytes; must be a multiple of 8
*/
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE)\
TASK_ALWAYS(ECHO, echo_task, NULL, TASK_STACK_SIZE)
TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(USB_SPI, usb_spi_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(ECHO, echo_task, NULL, TASK_STACK_SIZE)

7
board/discovery-stm32f072/gpio.inc
View File

@@ -14,6 +14,13 @@ GPIO(LED_D, C, 7, GPIO_OUT_LOW, NULL)
GPIO(LED_L, C, 8, GPIO_OUT_LOW, NULL)
GPIO(LED_R, C, 9, GPIO_OUT_LOW, NULL)
/* Flash SPI interface */
GPIO(SPI_WP, C, 3, GPIO_OUT_HIGH, NULL)
GPIO(SPI_HOLD, C, 4, GPIO_OUT_HIGH, NULL)
GPIO(SPI_CS, B, 12, GPIO_OUT_HIGH, NULL)
ALTERNATE(B, 0xE000, 0, MODULE_SPI_MASTER, 0)
/* Unimplemented signals which we need to emulate for now */
UNIMPLEMENTED(ENTERING_RW)
UNIMPLEMENTED(WP_L)

44
board/discovery-stm32f072/spi.c Normal file
View File

@@ -0,0 +1,44 @@
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
#include "gpio.h"
#include "registers.h"
#include "spi.h"
#include "task.h"
#include "usb_spi.h"
void usb_spi_ready(struct usb_spi_config const *config)
{
task_wake(TASK_ID_USB_SPI);
}
USB_SPI_CONFIG(usb_spi, USB_IFACE_SPI, USB_EP_SPI, usb_spi_ready)
void usb_spi_task(void)
{
/* Remap SPI2 to DMA channels 6 and 7 */
STM32_SYSCFG_CFGR1 |= (1 << 24);
gpio_config_module(MODULE_SPI_MASTER, 1);
/* Set all four SPI pins to high speed */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000;
/* Enable clocks to SPI2 module */
STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
/* Reset SPI2 */
STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2;
STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2;
spi_enable(1);
while (1) {
task_wait_event(-1);
while (usb_spi_service_request(&usb_spi))
;
}
}

1
include/module_id.h
View File

@@ -35,6 +35,7 @@ enum module_id {
MODULE_PWM_KBLIGHT,
MODULE_PWM_LED,
MODULE_SPI,
MODULE_SPI_MASTER,
MODULE_SWITCH,
MODULE_SYSTEM,
MODULE_TASK,