Initial Snow board port

Mostly stolen from Daisy. Notable differences: - No SYSCFGEN required for external interrupts ? - No GPIO H bank on STM32F100, OSC_IN and OSC_OUT are not available --> CODEC_INT and ENTERING_RW signals are missing BUG=None TEST=Tested on ADV2/Snow, able to see EC serialconsole Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I955e2ff180d064294d67b630ae2ee6cfcfe52ab9
2025-12-29 01:50:53 +00:00 · 2012-04-25 21:10:25 -07:00
parent 4daea3c1ab
commit 4c8fa572b5
7 changed files with 227 additions and 8 deletions
--- a/board/snow/board.c
+++ b/board/snow/board.c
@@ -0,0 +1,121 @@
+/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* Snow board-specific configuration */
+
+#include "board.h"
+#include "common.h"
+#include "dma.h"
+#include "gpio.h"
+#include "registers.h"
+#include "spi.h"
+#include "util.h"
+
+#define GPIO_KB_INPUT  (GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH)
+#define GPIO_KB_OUTPUT (GPIO_OUTPUT | GPIO_OPEN_DRAIN)
+
+/* GPIO interrupt handlers prototypes */
+#ifndef CONFIG_TASK_GAIAPOWER
+#define gaia_power_event NULL
+#else
+void gaia_power_event(enum gpio_signal signal);
+#endif
+#ifndef CONFIG_TASK_KEYSCAN
+#define matrix_interrupt NULL
+#endif
+
+/* GPIO signal list.  Must match order from enum gpio_signal. */
+const struct gpio_info gpio_list[GPIO_COUNT] = {
+	/* Inputs with interrupt handlers are first for efficiency */
+	{"KB_PWR_ON_L", GPIO_B, (1<<5),  GPIO_INT_BOTH, gaia_power_event},
+	{"PP1800_LDO2", GPIO_A, (1<<1),  GPIO_INT_BOTH, gaia_power_event},
+	{"XPSHOLD",     GPIO_A, (1<<3),  GPIO_INT_RISING, gaia_power_event},
+	{"CHARGER_INT", GPIO_C, (1<<4),  GPIO_INT_RISING, NULL},
+	{"LID_OPEN",    GPIO_C, (1<<13), GPIO_INT_BOTH, NULL},
+	{"KB_IN00",     GPIO_C, (1<<8),  GPIO_KB_INPUT, matrix_interrupt},
+	{"KB_IN01",     GPIO_C, (1<<9),  GPIO_KB_INPUT, matrix_interrupt},
+	{"KB_IN02",     GPIO_C, (1<<10), GPIO_KB_INPUT, matrix_interrupt},
+	{"KB_IN03",     GPIO_C, (1<<11), GPIO_KB_INPUT, matrix_interrupt},
+	{"KB_IN04",     GPIO_C, (1<<12), GPIO_KB_INPUT, matrix_interrupt},
+	{"KB_IN05",     GPIO_C, (1<<14), GPIO_KB_INPUT, matrix_interrupt},
+	{"KB_IN06",     GPIO_C, (1<<15), GPIO_KB_INPUT, matrix_interrupt},
+	{"KB_IN07",     GPIO_D, (1<<2),  GPIO_KB_INPUT, matrix_interrupt},
+	/* Other inputs */
+	{"SPI1_NSS",    GPIO_A, (1<<4), GPIO_INT_RISING, NULL},
+
+	/* Outputs */
+	{"EN_PP1350",   GPIO_A, (1<<2),  GPIO_OUT_LOW, NULL},
+	{"EN_PP5000",   GPIO_A, (1<<11),  GPIO_OUT_LOW, NULL},
+	{"EN_PP3300",   GPIO_A, (1<<8),  GPIO_OUT_LOW, NULL},
+	{"PMIC_PWRON_L",GPIO_A, (1<<12), GPIO_OUT_HIGH, NULL},
+	{"CHARGER_EN",  GPIO_B, (1<<2),  GPIO_OUT_LOW, NULL},
+	{"EC_INT",      GPIO_B, (1<<9),  GPIO_HI_Z, NULL},
+	{"KB_OUT00",    GPIO_B, (1<<0),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT01",    GPIO_B, (1<<8),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT02",    GPIO_B, (1<<12), GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT03",    GPIO_B, (1<<13), GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT04",    GPIO_B, (1<<14), GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT05",    GPIO_B, (1<<15), GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT06",    GPIO_C, (1<<0),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT07",    GPIO_C, (1<<1),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT08",    GPIO_C, (1<<2),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT09",    GPIO_B, (1<<1),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT10",    GPIO_C, (1<<5),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT11",    GPIO_C, (1<<6),  GPIO_KB_OUTPUT, NULL},
+	{"KB_OUT12",    GPIO_C, (1<<7),  GPIO_KB_OUTPUT, NULL},
+};
+
+void configure_board(void)
+{
+	uint32_t val;
+
+	dma_init();
+
+	/* Enable all GPIOs clocks
+	 * TODO: more fine-grained enabling for power saving
+	 */
+	STM32_RCC_APB2ENR |= 0x1fd;
+
+	/* Enable SPI */
+	STM32_RCC_APB2ENR |= (1<<12);
+
+	/* SPI1 on pins PA4-7 (alt. function push-pull, 10MHz) */
+	val = STM32_GPIO_CRL_OFF(GPIO_A) & ~0xffff0000;
+	val |= 0x99990000;
+	STM32_GPIO_CRL_OFF(GPIO_A) = val;
+
+	/*
+	 * I2C SCL/SDA on PB10-11, bi-directional, no pull-up/down, initialized
+	 * as hi-Z until alt. function is set
+	 */
+	val = STM32_GPIO_CRH_OFF(GPIO_B) & ~0x0000ff00;
+	val |= 0x0000dd00;
+	STM32_GPIO_CRH_OFF(GPIO_B) = val;
+	STM32_GPIO_BSRR_OFF(GPIO_B) |= (1<<11) | (1<<10);
+
+	/* Select Alternate function for USART1 on pins PA9/PA10 */
+	val = STM32_GPIO_CRH_OFF(GPIO_A) & ~0x00000ff0;
+	val |= 0x00000990;
+	STM32_GPIO_CRH_OFF(GPIO_A) = val;
+
+	/* EC_INT is output, open-drain */
+	val = STM32_GPIO_CRH_OFF(GPIO_B) & ~0xf0;
+	val |= 0x50;
+	STM32_GPIO_CRH_OFF(GPIO_B) = val;
+	/* put GPIO in Hi-Z state */
+	gpio_set_level(GPIO_EC_INT, 1);
+}
+
+void board_keyboard_scan_ready(void)
+{
+#if 0
+	/* notify audio codec of keypress for noise suppression */
+	gpio_set_level(GPIO_CODEC_INT, 0);
+	gpio_set_level(GPIO_CODEC_INT, 1);
+#endif
+
+	/* interrupt host by toggling EC_INT */
+	gpio_set_level(GPIO_EC_INT, 0);
+	gpio_set_level(GPIO_EC_INT, 1);
+}
--- a/board/snow/board.h
+++ b/board/snow/board.h
@@ -0,0 +1,69 @@
+/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Snow board configuration */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+/* 16 MHz SYSCLK clock frequency */
+#define CPU_CLOCK 16000000
+
+/* Use USART1 as console serial port */
+#define CONFIG_CONSOLE_UART 1
+
+#define USB_CHARGE_PORT_COUNT 0
+
+/* GPIO signal list */
+enum gpio_signal {
+	/* Inputs with interrupt handlers are first for efficiency */
+	GPIO_KB_PWR_ON_L = 0,  /* Keyboard power button */
+	GPIO_PP1800_LDO2,      /* LDO2 is ON (end of PMIC sequence) */
+	GPIO_SOC1V8_XPSHOLD,   /* App Processor ON  */
+	GPIO_CHARGER_INT,
+	GPIO_LID_OPEN,         /* LID switch detection */
+	/* Keyboard inputs */
+	GPIO_KB_IN00,
+	GPIO_KB_IN01,
+	GPIO_KB_IN02,
+	GPIO_KB_IN03,
+	GPIO_KB_IN04,
+	GPIO_KB_IN05,
+	GPIO_KB_IN06,
+	GPIO_KB_IN07,
+	/* Other inputs */
+	GPIO_SPI1_NSS,
+	/* Outputs */
+	GPIO_EN_PP1350,        /* DDR 1.35v rail enable */
+	GPIO_EN_PP5000,        /* 5.0v rail enable */
+	GPIO_EN_PP3300,        /* 3.3v rail enable */
+	GPIO_PMIC_PWRON_L,     /* 5v rail ready */
+	GPIO_CHARGER_EN,
+	GPIO_EC_INT,
+	GPIO_KB_OUT00,
+	GPIO_KB_OUT01,
+	GPIO_KB_OUT02,
+	GPIO_KB_OUT03,
+	GPIO_KB_OUT04,
+	GPIO_KB_OUT05,
+	GPIO_KB_OUT06,
+	GPIO_KB_OUT07,
+	GPIO_KB_OUT08,
+	GPIO_KB_OUT09,
+	GPIO_KB_OUT10,
+	GPIO_KB_OUT11,
+	GPIO_KB_OUT12,
+	/* Number of GPIOs; not an actual GPIO */
+	GPIO_COUNT
+};
+
+void configure_board(void);
+
+void matrix_interrupt(enum gpio_signal signal);
+
+/* Signal to the AP that keyboard scan data is available */
+void board_keyboard_scan_ready(void);
+
+#endif /* __BOARD_H */
--- a/board/snow/build.mk
+++ b/board/snow/build.mk
@@ -0,0 +1,11 @@
+# Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+
+# the IC is STmicro STM32F100R8
+CHIP:=stm32
+CHIP_VARIANT:=stm32f100
+
+board-y=board.o
--- a/board/snow/ec.tasklist
+++ b/board/snow/ec.tasklist
@@ -0,0 +1,22 @@
+/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK(n, r, d) where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ */
+#define CONFIG_TASK_LIST \
+	TASK(WATCHDOG, watchdog_task, NULL) \
+	TASK(KEYSCAN, keyboard_scan_task, NULL) \
+	TASK(GAIAPOWER, gaia_power_task, NULL) \
+	TASK(CONSOLE, console_task, NULL) \
+	TASK(SPI_WORK, spi_work_task, NULL) \
+	TASK(I2C2_WORK, i2c2_work_task, NULL)
--- a/chip/stm32/keyboard_scan.c
+++ b/chip/stm32/keyboard_scan.c
@@ -66,7 +66,7 @@ struct kbc_gpio {
 	int pin;
 };

-#if defined(BOARD_daisy)
+#if defined(BOARD_daisy) || defined(BOARD_snow)
 static const uint32_t ports[] = { GPIO_B, GPIO_C, GPIO_D };
 #else
 #error "Need to specify GPIO ports used by keyboard"
@@ -181,7 +181,6 @@ static int check_keys_changed(void)
 		udelay(50);

 		r = 0;
-#if defined(BOARD_daisy)
 		tmp = STM32_GPIO_IDR(C);
 		/* KB_COL00:04 = PC8:12 */
 		if (tmp & (1 << 8))
@@ -207,9 +206,6 @@ static int check_keys_changed(void)

 		/* Invert it so 0=not pressed, 1=pressed */
 		r ^= 0xff;
-#else
-#error "Key scanning unsupported on this board"
-#endif
 		/* Mask off keys that don't exist so they never show
 		 * as pressed */
 		r &= actual_key_mask[c];
--- a/chip/stm32/spi.c
+++ b/chip/stm32/spi.c
@@ -198,7 +198,7 @@ static int spi_init(void)
 {
 	int port;

-#if defined(BOARD_daisy)
+#if defined(BOARD_daisy) || defined(BOARD_snow)
 	/**
 	 * SPI1
 	 * PA7: SPI1_MOSI
--- a/common/vboot.c
+++ b/common/vboot.c
@@ -46,8 +46,8 @@ static int maybe_jump_to_other_image(void)
 	if (system_jumped_to_this_image())
 		return 0;

-#if !defined(BOARD_daisy)
-	/* TODO: (crosbug.com/p/8572) Daisy doesn't define a GPIO
+#if !defined(CHIP_stm32)
+	/* TODO: (crosbug.com/p/8572) Daisy and Snow don't define a GPIO
 	 * for the recovery signal from servo, so can't check it. */
 	if (gpio_get_level(GPIO_RECOVERYn) == 0) {
 		CPUTS("[Vboot staying in RO due to recovery signal]\n");