scottk/OpenCellular
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenCellular.git synced 2026-01-09 00:51:29 +00:00
Code Issues Packages Projects Releases Wiki Activity

Cr50: Cleanup some of the GPIO handling code

Browse Source 
Just a bit of refactoring. This cleans up some macro definitions
and error checking, and removes a duplicate list of GPIO signal
names.

BUG=none
BRANCH=none
TEST=make buildall, test on Cr50

No functional changes, so nothing new to test.

Change-Id: Iecacc5a0b7da02aa9d0b94f171c70f0b73e8edd5
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329303
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This commit is contained in:
Bill Richardson
2016-02-24 16:50:21 -08:00
committed by chrome-bot
parent 6f3c58741d
commit 4d5adcac87
4 changed files with 16 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
board/cr50/board.c
View File

@@ -16,15 +16,17 @@
#include "usb_hid.h"
#include "util.h"
/* Define interrupt and gpio structs */
#include "gpio_list.h"
/*
* There's no way to trigger on both rising and falling edges, so force a
* compiler error if we try. The workaround is to use the pinmux to connect
* two GPIOs to the same input and configure each one for a separate edge.
*/
#undef GPIO_INT_BOTH
#define GPIO_INT_BOTH NOT_SUPPORTED_ON_CR50
#include "gpio_list.h"
#define GPIO_INT(name, pin, flags, signal) \
BUILD_ASSERT((flags & GPIO_INT_BOTH) != GPIO_INT_BOTH);
#include "gpio.wrap"
#ifdef CONFIG_USB_HID
static void send_hid_event(void)
@@ -87,13 +89,11 @@ static void init_timers(void)
static void init_interrupts(void)
{
int i;
static const enum gpio_signal gpio_signals[] = {
GPIO_SW_N, GPIO_SW_S, GPIO_SW_W, GPIO_SW_E,
GPIO_SW_N_, GPIO_SW_S_, GPIO_SW_W_, GPIO_SW_E_
};
for (i = 0; i < ARRAY_SIZE(gpio_signals); i++)
gpio_enable_interrupt(gpio_signals[i]);
/* Enable all GPIO interrupts */
for (i = 0; i < gpio_ih_count; i++)
if (gpio_list[i].flags & GPIO_INT_ANY)
gpio_enable_interrupt(i);
}
enum permission_level {

6
chip/g/config_chip.h
View File

@@ -56,8 +56,10 @@
/* Maximum number of deferrable functions */
#define DEFERRABLE_MAX_COUNT 8
#define GPIO_PIN(port, index) GPIO_##port, (1 << index)
#define GPIO_PIN_MASK(port, mask) GPIO_##port, (mask)
/* Magic for gpio.inc */
#define GPIO_PIN(port, index) (port), (1 << (index))
#define GPIO_PIN_MASK(port, mask) (port), (mask)
#define DUMMY_GPIO_BANK 0
#define PCLK_FREQ (24 * 1000 * 1000)

4
chip/g/gpio.c
View File

@@ -257,11 +257,11 @@ static void gpio_interrupt(int port)
void _gpio0_interrupt(void)
{
gpio_interrupt(GPIO_0);
gpio_interrupt(0);
}
void _gpio1_interrupt(void)
{
gpio_interrupt(GPIO_1);
gpio_interrupt(1);
}
DECLARE_IRQ(GC_IRQNUM_GPIO0_GPIOCOMBINT, _gpio0_interrupt, 1);
DECLARE_IRQ(GC_IRQNUM_GPIO1_GPIOCOMBINT, _gpio1_interrupt, 1);

5
chip/g/registers.h
View File

@@ -168,11 +168,6 @@ static inline int x_uart_addr(int ch, int offset)
#define GR_UART_FIFO(ch) X_UARTREG(ch, GC_UART_FIFO_OFFSET)
#define GR_UART_RFIFO(ch) X_UARTREG(ch, GC_UART_RFIFO_OFFSET)
/* GPIO port naming scheme left over from the LM4. Must maintain tradition! */
#define GPIO_0 0
#define GPIO_1 1
#define DUMMY_GPIO_BANK 0
/*
* Our ARM core doesn't have GPIO alternate functions, but it does have a full
* NxM crossbar called the pinmux, which connects internal peripherals