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power: create CONFIG_CHIPSET_GEMINILAKE

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Geminilake uses the same power sequencing code as Apollolake. Instead
of the board specifying the wrong chipset, we will make the correct
chipset reuse the existing power code.

This also gives us flexibility in the future if GLK needs to vary from
ALK in any of shared code.

BRANCH=none
BUG=b:74020444
TEST=build all

Change-Id: Icd00286ac4f0612d1bda56677c4141957480c6bf
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/969613
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Jett Rink
2018-03-19 15:27:27 -06:00
committed by chrome-bot
parent b5fddbbe26
commit 50da99d5d4
5 changed files with 28 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
board/glkrvp/board.h
View File

@@ -77,7 +77,7 @@
/* SoC / PCH */
#define CONFIG_ESPI
#define CONFIG_LPC
#define CONFIG_CHIPSET_APOLLOLAKE
#define CONFIG_CHIPSET_GEMINILAKE
#define CONFIG_CHIPSET_RESET_HOOK
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86

3
board/yorp/board.h
View File

@@ -96,8 +96,7 @@
#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0
/* SoC / PCH */
/* GEMINILAKE reuses apollo lake power seq */
#define CONFIG_CHIPSET_APOLLOLAKE
#define CONFIG_CHIPSET_GEMINILAKE
#define CONFIG_CHIPSET_RESET_HOOK
#define CONFIG_ESPI
/* TODO(b/74123961): Enable Virtual Wires after bringup */

31
include/config.h
View File

@@ -699,16 +699,20 @@
/* Chipset config */
/* AP chipset support; pick at most one */
#undef CONFIG_CHIPSET_APOLLOLAKE/* Intel Apollolake (x86) */
#undef CONFIG_CHIPSET_BRASWELL /* Intel Braswell (x86) */
#undef CONFIG_CHIPSET_CANNONLAKE /* Intel Cannonlake (x86) */
#undef CONFIG_CHIPSET_ECDRIVEN /* Dummy power module */
#undef CONFIG_CHIPSET_MEDIATEK /* MediaTek MT81xx */
#undef CONFIG_CHIPSET_RK3399 /* Rockchip rk3399 */
#undef CONFIG_CHIPSET_APOLLOLAKE /* Intel Apollolake (x86) */
#undef CONFIG_CHIPSET_BRASWELL /* Intel Braswell (x86) */
#undef CONFIG_CHIPSET_CANNONLAKE /* Intel Cannonlake (x86) */
#undef CONFIG_CHIPSET_ECDRIVEN /* Dummy power module */
#undef CONFIG_CHIPSET_GEMINILAKE /* Intel Geminilake (x86) */
#undef CONFIG_CHIPSET_MEDIATEK /* MediaTek MT81xx */
#undef CONFIG_CHIPSET_RK3399 /* Rockchip rk3399 */
/* TODO: Rename below config to CONFIG_CHIPSET_RK32XX */
#undef CONFIG_CHIPSET_ROCKCHIP /* Rockchip rk32xx */
#undef CONFIG_CHIPSET_SKYLAKE /* Intel Skylake (x86) */
#undef CONFIG_CHIPSET_STONEY /* AMD Stoney (x86)*/
#undef CONFIG_CHIPSET_ROCKCHIP /* Rockchip rk32xx */
#undef CONFIG_CHIPSET_SKYLAKE /* Intel Skylake (x86) */
#undef CONFIG_CHIPSET_STONEY /* AMD Stoney (x86)*/
/* Shared chipset support; automatically gets defined below. */
#undef CONFIG_CHIPSET_APL_GLK /* Apollolake & Geminilake */
/* Support chipset throttling */
#undef CONFIG_CHIPSET_CAN_THROTTLE
@@ -3408,6 +3412,7 @@
#undef CONFIG_CHIPSET_APOLLOLAKE
#undef CONFIG_CHIPSET_BRASWELL
#undef CONFIG_CHIPSET_CANNONLAKE
#undef CONFIG_CHIPSET_GEMINILAKE
#undef CONFIG_CHIPSET_MEDIATEK
#undef CONFIG_CHIPSET_RK3399
#undef CONFIG_CHIPSET_ROCKCHIP
@@ -3438,6 +3443,14 @@
#undef CONFIG_CMD_ADC
#endif
/*****************************************************************************/
/* Define derived Chipset configs */
#if defined(CONFIG_CHIPSET_APOLLOLAKE) || \
defined(CONFIG_CHIPSET_GEMINILAKE)
#define CONFIG_CHIPSET_APL_GLK
#endif
/*****************************************************************************/
/*
* Apply test config overrides last, since tests need to override some of the

2
power/build.mk
View File

@@ -6,7 +6,7 @@
# Power management for application processor and peripherals
#
power-$(CONFIG_CHIPSET_APOLLOLAKE)+=apollolake.o intel_x86.o
power-$(CONFIG_CHIPSET_APL_GLK)+=apollolake.o intel_x86.o
power-$(CONFIG_CHIPSET_BRASWELL)+=braswell.o
power-$(CONFIG_CHIPSET_CANNONLAKE)+=cannonlake.o intel_x86.o
power-$(CONFIG_CHIPSET_ECDRIVEN)+=ec_driven.o

5
power/intel_x86.c
View File

@@ -24,7 +24,8 @@
#include "wireless.h"
/* Chipset specific header files */
#ifdef CONFIG_CHIPSET_APOLLOLAKE
/* Geminilake and apollolake use same power sequencing. */
#ifdef CONFIG_CHIPSET_APL_GLK
#include "apollolake.h"
#elif defined(CONFIG_CHIPSET_CANNONLAKE)
#include "cannonlake.h"
@@ -451,7 +452,7 @@ void common_intel_x86_handle_rsmrst(enum power_state state)
board_before_rsmrst(rsmrst_in);
#endif
#ifdef CONFIG_CHIPSET_APOLLOLAKE
#ifdef CONFIG_CHIPSET_APL_GLK
/* Only passthrough RSMRST_L de-assertion on power up */
if (rsmrst_in && !power_s5_up)
return;