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cleanup: pd: Define VBUS detection source

Browse Source 
Previously CONFIG_USB_PD_TCPM_VBUS had two uses which were independent:

- When operating as a TCPC, it indicated that the VBUS level should be
  tracked (through GPIO inputs) and sent to the external TCPM when
  appropriate.
- When operating as a TCPM, it indicated that the VBUS level should be
  obtained by querying the TCPC.

These two independent uses have been split into
CONFIG_USB_PD_TCPC_TRACK_VBUS and CONFIG_USB_PD_VBUS_DETECT_TCPC, which
sould be more clear.

In addition, CONFIG_USB_PD_VBUS_DETECT_* CONFIGs have been added for
other means of VBUS detection.

BUG=chromium:616580
BRANCH=None
TEST=Verify kevin continues to boot + charge.

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I936821481d6577e17e3e9c61ff97c037574d6923
Reviewed-on: https://chromium-review.googlesource.com/348950
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This commit is contained in:
Shawn Nematbakhsh
2016-06-01 16:23:30 -07:00
committed by chrome-bot
parent 4f600b32bb
commit 5426122466
29 changed files with 69 additions and 37 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
board/amenia/board.h
View File

@@ -86,6 +86,7 @@
#define TCPC1_I2C_ADDR 0x16
#define CONFIG_USB_PD_TCPM_MUX
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_PORT_POWER_SMART
#define GPIO_USB1_CTL1 GPIO_USB_CTL1
#define GPIO_USB1_CTL2 GPIO_UNIMPLEMENTED

1
board/chell/board.h
View File

@@ -79,6 +79,7 @@
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 2
#define CONFIG_USBC_SS_MUX

2
board/dingdong/board.h
View File

@@ -35,7 +35,7 @@
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USB_PD_IDENTITY_HW_VERS 1
#define CONFIG_USB_PD_IDENTITY_SW_VERS 1
#define CONFIG_USB_PD_NO_VBUS_DETECT
#define CONFIG_USB_PD_VBUS_DETECT_NONE
#define CONFIG_USB_PD_LOGGING
#define CONFIG_USB_PD_LOG_SIZE 256
#define CONFIG_USB_PD_PORT_COUNT 1

1
board/elm/board.h
View File

@@ -95,6 +95,7 @@
#define CONFIG_USB_PD_TCPM_MUX
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#undef CONFIG_TCPC_I2C_BASE_ADDR
#define CONFIG_TCPC_I2C_BASE_ADDR 0x58
#define CONFIG_USB_PD_ANX7688

1
board/glados/board.h
View File

@@ -82,6 +82,7 @@
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 2
#define CONFIG_USBC_SS_MUX

2
board/glados_pd/board.h
View File

@@ -63,7 +63,7 @@
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_VBUS
#define CONFIG_USB_PD_TCPC_TRACK_VBUS
#define CONFIG_USBC_VCONN
#define CONFIG_VBOOT_HASH
#define CONFIG_WATCHDOG

2
board/hoho/board.h
View File

@@ -46,7 +46,7 @@
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_NO_VBUS_DETECT
#define CONFIG_USB_PD_VBUS_DETECT_NONE
/* mcdp2850 serial interface */
#define CONFIG_MCDP28X0 usart3_hw
#define CONFIG_STREAM_USART

1
board/honeybuns/board.h
View File

@@ -40,6 +40,7 @@
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USBC_SS_MUX
#define CONFIG_USBC_VCONN
#undef CONFIG_WATCHDOG_HELP

1
board/it83xx_evb/board.h
View File

@@ -38,6 +38,7 @@
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_ITE83XX
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_POWER_DELIVERY
#define CONFIG_USBC_VCONN
#define CONFIG_USBC_VCONN_SWAP

2
board/kevin/board.h
View File

@@ -73,7 +73,7 @@
#define CONFIG_USB_PD_LOG_SIZE 512
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_FUSB302
#define CONFIG_USB_PD_TCPM_VBUS
#define CONFIG_USB_PD_VBUS_DETECT_TCPC
/* TODO: Enable TRY_SRC */
#undef CONFIG_USB_PD_TRY_SRC

1
board/lucid/board.h
View File

@@ -61,6 +61,7 @@
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#undef CONFIG_WATCHDOG_HELP
/* Use PSTATE embedded in the RO image, not in its own erase block */

2
board/oak/board.h
View File

@@ -101,7 +101,7 @@
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_TCPM_VBUS
#define CONFIG_USB_PD_VBUS_DETECT_TCPC
#define CONFIG_SPI
#define CONFIG_SPI_MASTER
#define CONFIG_STM_HWTIMER32

1
board/plankton/board.h
View File

@@ -29,6 +29,7 @@
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_ADC
#define CONFIG_HW_CRC
#define CONFIG_I2C

2
board/reef/board.h
View File

@@ -38,7 +38,7 @@
#define CONFIG_USB_PD_LOGGING
#define CONFIG_USB_PD_LOG_SIZE 512
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_VBUS
#define CONFIG_USB_PD_VBUS_DETECT_TCPC
#define CONFIG_USB_PD_TCPM_MUX /* for both PS8751 and ANX3429 */
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TCPM_ANX74XX

1
board/ryu/board.h
View File

@@ -47,6 +47,7 @@
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 1
#define CONFIG_USBC_SS_MUX

1
board/samus_pd/board.h
View File

@@ -63,6 +63,7 @@
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 2
#define CONFIG_USBC_SS_MUX_DFP_ONLY

1
board/strago/board.h
View File

@@ -43,6 +43,7 @@
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 1
#define CONFIG_USBC_SS_MUX

1
board/twinkie/board.h
View File

@@ -24,6 +24,7 @@
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_PD_USE_DAC_AS_REF
/*
* use #define CONFIG_USBC_SNIFFER_HEADER_V1

1
board/wheatley/board.h
View File

@@ -81,6 +81,7 @@
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_TCPM_TCPCI
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 2
#define CONFIG_USBC_SS_MUX

1
board/zinger/board.h
View File

@@ -63,6 +63,7 @@
#define CONFIG_USB_PD_TCPM_STUB
#undef CONFIG_USB_PD_RX_COMP_IRQ
#define CONFIG_USB_PD_SIMPLE_DFP
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USBC_BACKWARDS_COMPATIBLE_DFP
#undef CONFIG_WATCHDOG_HELP
#undef CONFIG_WATCHDOG_PERIOD_MS

8
common/usb_charger.c
View File

@@ -89,8 +89,12 @@ static void usb_charger_init(void)
i,
&charge_none);
#ifndef CONFIG_USB_PD_TCPM_VBUS
/* Initialize VBUS supplier based on whether VBUS is present */
#ifndef CONFIG_USB_PD_VBUS_DETECT_TCPC
/*
* Initialize VBUS supplier based on whether VBUS is present.
* For CONFIG_USB_PD_VBUS_DETECT_TCPC, usb_charger_vbus_change()
* will be called directly from TCPC alert.
*/
update_vbus_supplier(i, pd_snk_is_vbus_provided(i));
#endif
}

8
common/usb_pd_protocol.c
View File

@@ -224,7 +224,7 @@ void pd_vbus_low(int port)
static inline int pd_is_vbus_present(int port)
{
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
return tcpm_get_vbus_level(port);
#else
return pd_snk_is_vbus_provided(port);
@@ -704,7 +704,7 @@ static void handle_data_request(int port, uint16_t head,
case PD_DATA_SOURCE_CAP:
if ((pd[port].task_state == PD_STATE_SNK_DISCOVERY)
|| (pd[port].task_state == PD_STATE_SNK_TRANSITION)
#ifdef CONFIG_USB_PD_NO_VBUS_DETECT
#ifdef CONFIG_USB_PD_VBUS_DETECT_NONE
|| (pd[port].task_state ==
PD_STATE_SNK_HARD_RESET_RECOVER)
#endif
@@ -1393,7 +1393,7 @@ void pd_task(void)
int hard_reset_count = 0;
#ifdef CONFIG_USB_PD_DUAL_ROLE
uint64_t next_role_swap = PD_T_DRP_SNK;
#ifndef CONFIG_USB_PD_NO_VBUS_DETECT
#ifndef CONFIG_USB_PD_VBUS_DETECT_NONE
int snk_hard_reset_vbus_off = 0;
#endif
#ifdef CONFIG_CHARGE_MANAGER
@@ -2101,7 +2101,7 @@ void pd_task(void)
case PD_STATE_SNK_HARD_RESET_RECOVER:
if (pd[port].last_state != pd[port].task_state)
pd[port].flags |= PD_FLAGS_DATA_SWAPPED;
#ifdef CONFIG_USB_PD_NO_VBUS_DETECT
#ifdef CONFIG_USB_PD_VBUS_DETECT_NONE
/*
* Can't measure vbus state so this is the maximum
* recovery time for the source.

12
common/usb_pd_tcpc.c
View File

@@ -978,7 +978,7 @@ int tcpc_set_polarity(int port, int polarity)
return EC_SUCCESS;
}
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_TCPC_TRACK_VBUS
static int tcpc_set_power_status(int port, int vbus_present)
{
/* Update VBUS present bit */
@@ -993,7 +993,7 @@ static int tcpc_set_power_status(int port, int vbus_present)
return EC_SUCCESS;
}
#endif /* CONFIG_USB_PD_TCPM_VBUS */
#endif /* CONFIG_USB_PD_TCPC_TRACK_VBUS */
int tcpc_set_power_status_mask(int port, uint8_t mask)
{
@@ -1102,7 +1102,7 @@ void tcpc_init(int port)
pd_adc_read(port, i));
}
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_TCPC_TRACK_VBUS
#if CONFIG_USB_PD_PORT_COUNT >= 2
tcpc_set_power_status(port, !gpio_get_level(port ?
GPIO_USB_C1_VBUS_WAKE_L :
@@ -1110,7 +1110,7 @@ void tcpc_init(int port)
#else
tcpc_set_power_status(port, !gpio_get_level(GPIO_USB_C0_VBUS_WAKE_L));
#endif /* CONFIG_USB_PD_PORT_COUNT >= 2 */
#endif /* CONFIG_USB_PD_TCPM_VBUS */
#endif /* CONFIG_USB_PD_TCPC_TRACK_VBUS */
/* set default alert and power mask register values */
pd[port].alert_mask = TCPC_REG_ALERT_MASK_ALL;
@@ -1120,7 +1120,7 @@ void tcpc_init(int port)
alert(port, TCPC_REG_ALERT_POWER_STATUS);
}
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_TCPC_TRACK_VBUS
void pd_vbus_evt_p0(enum gpio_signal signal)
{
tcpc_set_power_status(TASK_ID_TO_PD_PORT(TASK_ID_PD_C0),
@@ -1136,7 +1136,7 @@ void pd_vbus_evt_p1(enum gpio_signal signal)
task_wake(TASK_ID_PD_C1);
}
#endif /* PD_PORT_COUNT >= 2 */
#endif /* CONFIG_USB_PD_TCPM_VBUS */
#endif /* CONFIG_USB_PD_TCPC_TRACK_VBUS */
#ifndef CONFIG_USB_POWER_DELIVERY
static void tcpc_i2c_write(int port, int reg, int len, uint8_t *payload)

4
driver/tcpm/anx74xx.c
View File

@@ -592,7 +592,7 @@ static int anx74xx_tcpm_set_rx_enable(int port, int enable)
return rv;
}
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
static int anx74xx_tcpm_get_vbus_level(int port)
{
int reg = 0;
@@ -785,7 +785,7 @@ int anx74xx_tcpm_init(int port)
const struct tcpm_drv anx74xx_tcpm_drv = {
.init = &anx74xx_tcpm_init,
.get_cc = &anx74xx_tcpm_get_cc,
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
.get_vbus_level = &anx74xx_tcpm_get_vbus_level,
#endif
.set_cc = &anx74xx_tcpm_set_cc,

4
driver/tcpm/fusb302.c
View File

@@ -807,7 +807,7 @@ static int fusb302_tcpm_transmit(int port, enum tcpm_transmit_type type,
return 0;
}
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
static int fusb302_tcpm_get_vbus_level(int port)
{
int reg;
@@ -990,7 +990,7 @@ void tcpm_set_bist_test_data(int port)
const struct tcpm_drv fusb302_tcpm_drv = {
.init = &fusb302_tcpm_init,
.get_cc = &fusb302_tcpm_get_cc,
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
.get_vbus_level = &fusb302_tcpm_get_vbus_level,
#endif
.set_cc = &fusb302_tcpm_set_cc,

2
driver/tcpm/it83xx.c
View File

@@ -442,7 +442,7 @@ static int it83xx_tcpm_transmit(int port,
const struct tcpm_drv it83xx_tcpm_drv = {
.init = &it83xx_tcpm_init,
.get_cc = &it83xx_tcpm_get_cc,
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
.get_vbus_level = NULL,
#endif
.set_cc = &it83xx_tcpm_set_cc,

12
driver/tcpm/tcpci.c
View File

@@ -29,7 +29,7 @@ static int init_alert_mask(int port)
mask = TCPC_REG_ALERT_TX_SUCCESS | TCPC_REG_ALERT_TX_FAILED |
TCPC_REG_ALERT_TX_DISCARDED | TCPC_REG_ALERT_RX_STATUS |
TCPC_REG_ALERT_RX_HARD_RST | TCPC_REG_ALERT_CC_STATUS
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
| TCPC_REG_ALERT_POWER_STATUS
#endif
;
@@ -44,7 +44,7 @@ static int init_power_status_mask(int port)
uint8_t mask;
int rv;
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
mask = TCPC_REG_POWER_STATUS_VBUS_PRES;
#else
mask = 0;
@@ -127,7 +127,7 @@ static int tcpci_tcpm_set_rx_enable(int port, int enable)
enable ? TCPC_REG_RX_DETECT_SOP_HRST_MASK : 0);
}
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
static int tcpci_tcpm_get_vbus_level(int port)
{
return tcpc_vbus[port];
@@ -226,11 +226,11 @@ void tcpci_tcpc_alert(int port)
/* Update VBUS status */
tcpc_vbus[port] = reg &
TCPC_REG_POWER_STATUS_VBUS_PRES ? 1 : 0;
#if defined(CONFIG_USB_PD_TCPM_VBUS) && defined(CONFIG_USB_CHARGER)
#if defined(CONFIG_USB_PD_VBUS_DETECT_TCPC) && defined(CONFIG_USB_CHARGER)
/* Update charge manager with new VBUS state */
usb_charger_vbus_change(port, tcpc_vbus[port]);
task_wake(PD_PORT_TO_TASK_ID(port));
#endif /* CONFIG_USB_PD_TCPM_VBUS && CONFIG_USB_CHARGER */
#endif /* CONFIG_USB_PD_VBUS_DETECT_TCPC && CONFIG_USB_CHARGER */
}
}
if (status & TCPC_REG_ALERT_RX_STATUS) {
@@ -336,7 +336,7 @@ const struct usb_mux_driver tcpci_tcpm_usb_mux_driver = {
const struct tcpm_drv tcpci_tcpm_drv = {
.init = &tcpci_tcpm_init,
.get_cc = &tcpci_tcpm_get_cc,
#ifdef CONFIG_USB_PD_TCPM_VBUS
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
.get_vbus_level = &tcpci_tcpm_get_vbus_level,
#endif
.set_cc = &tcpci_tcpm_set_cc,

2
driver/usb_switch_pi3usb9281.c
View File

@@ -383,7 +383,7 @@ void usb_charger_task(void)
*/
if (evt & USB_CHG_EVENT_VBUS) {
pi3usb9281_enable_interrupts(port);
#ifndef CONFIG_USB_PD_TCPM_VBUS
#ifndef CONFIG_USB_PD_VBUS_DETECT_TCPC
CPRINTS("VBUS p%d %d", port,
pd_snk_is_vbus_provided(port));
#endif

28
include/config.h
View File

@@ -1869,9 +1869,6 @@
/* Allow chip to go into low power idle even when a PD device is attached */
#undef CONFIG_USB_PD_LOW_POWER_IDLE_WHEN_CONNECTED
/* Define if USB-PD device has no way of detecting USB VBUS */
#undef CONFIG_USB_PD_NO_VBUS_DETECT
/* Number of USB PD ports */
#undef CONFIG_USB_PD_PORT_COUNT
@@ -1884,6 +1881,12 @@
/* Use TCPC module (type-C port controller) */
#undef CONFIG_USB_PD_TCPC
/*
* Track VBUS level in TCPC module. This will only be needed if we're acting
* as an external TCPC.
*/
#undef CONFIG_USB_PD_TCPC_TRACK_VBUS
/*
* Choose one of the following TCPMs (type-C port manager) to manage TCPC. The
* TCPM stub is used to make direct function calls to TCPC when TCPC is on
@@ -1902,11 +1905,22 @@
#undef CONFIG_USB_PD_TCPM_MUX
/*
* Use this option if the TCPC port controller is on a seperate chip from
* the TCPM layer and if VUBS detect GPIO is not available on the TCPM
* mcu.
* The TCPM must know whether VBUS is present in order to make proper state
* transitions. In addition, charge_manager must know about VBUS presence in
* order to make charging decisions. VBUS state can be determined by various
* methods:
* - Some TCPCs can detect and report the presence of VBUS.
* - In some configurations, charger ICs can report the presence of VBUS.
* - On some boards, dedicated VBUS interrupt pins are available.
*
* Exactly one of these should be defined for all boards that run the PD
* state machine.
*/
#undef CONFIG_USB_PD_TCPM_VBUS
#undef CONFIG_USB_PD_VBUS_DETECT_TCPC
#undef CONFIG_USB_PD_VBUS_DETECT_CHARGER
#undef CONFIG_USB_PD_VBUS_DETECT_GPIO
#undef CONFIG_USB_PD_VBUS_DETECT_NONE
/* Define the type-c port controller I2C base address. */
#define CONFIG_TCPC_I2C_BASE_ADDR 0x9c