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chip/stm32: Add support for half-duplex UART

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BRANCH=none
BUG=b:65697962
TEST=make BOARD=wand -j

Change-Id: I2af4acb5cce6da6ce2f01d6d60cf5e806c9a4ed2
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/821891
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This commit is contained in:
Nicolas Boichat
2017-11-20 17:36:55 +08:00
committed by chrome-bot
parent 7610082ddc
commit 575c03f31c
2 changed files with 7 additions and 3 deletions
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7
chip/stm32/usart.c
View File

@@ -17,7 +17,7 @@
void usart_init(struct usart_config const *config)
{
intptr_t base = config->hw->base;
uint32_t cr2;
uint32_t cr2, cr3;
/*
* Enable clock to USART, this must be done first, before attempting
@@ -43,6 +43,7 @@ void usart_init(struct usart_config const *config)
*/
cr2 = 0x0000;
cr3 = 0x0000;
#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32F3) || \
defined(CHIP_FAMILY_STM32L4)
if (config->flags & USART_CONFIG_FLAG_RX_INV)
@@ -50,10 +51,12 @@ void usart_init(struct usart_config const *config)
if (config->flags & USART_CONFIG_FLAG_TX_INV)
cr2 |= (1 << 17);
#endif
if (config->flags & USART_CONFIG_FLAG_HDSEL)
cr3 |= (1 << 3);
STM32_USART_CR1(base) = 0x0000;
STM32_USART_CR2(base) = cr2;
STM32_USART_CR3(base) = 0x0000;
STM32_USART_CR3(base) = cr3;
/*
* Enable the RX, TX, and variant specific HW.

3
chip/stm32/usart.h
View File

@@ -133,9 +133,10 @@ struct usart_config {
*/
int baud;
/* Other flags. */
/* Other flags (rx/tx inversion, half-duplex). */
#define USART_CONFIG_FLAG_RX_INV (1 << 0)
#define USART_CONFIG_FLAG_TX_INV (1 << 1)
#define USART_CONFIG_FLAG_HDSEL (1 << 2)
unsigned int flags;
struct consumer consumer;